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path: root/drivers/char/drm/radeon_state.c
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Diffstat (limited to 'drivers/char/drm/radeon_state.c')
-rw-r--r--drivers/char/drm/radeon_state.c62
1 files changed, 31 insertions, 31 deletions
diff --git a/drivers/char/drm/radeon_state.c b/drivers/char/drm/radeon_state.c
index 348a89e05812..2f325c79915e 100644
--- a/drivers/char/drm/radeon_state.c
+++ b/drivers/char/drm/radeon_state.c
@@ -39,7 +39,7 @@
39 39
40static __inline__ int radeon_check_and_fixup_offset(drm_radeon_private_t * 40static __inline__ int radeon_check_and_fixup_offset(drm_radeon_private_t *
41 dev_priv, 41 dev_priv,
42 drm_file_t * filp_priv, 42 struct drm_file * filp_priv,
43 u32 *offset) 43 u32 *offset)
44{ 44{
45 u64 off = *offset; 45 u64 off = *offset;
@@ -90,7 +90,7 @@ static __inline__ int radeon_check_and_fixup_offset(drm_radeon_private_t *
90 90
91static __inline__ int radeon_check_and_fixup_packets(drm_radeon_private_t * 91static __inline__ int radeon_check_and_fixup_packets(drm_radeon_private_t *
92 dev_priv, 92 dev_priv,
93 drm_file_t * filp_priv, 93 struct drm_file * filp_priv,
94 int id, u32 *data) 94 int id, u32 *data)
95{ 95{
96 switch (id) { 96 switch (id) {
@@ -264,7 +264,7 @@ static __inline__ int radeon_check_and_fixup_packets(drm_radeon_private_t *
264 264
265static __inline__ int radeon_check_and_fixup_packet3(drm_radeon_private_t * 265static __inline__ int radeon_check_and_fixup_packet3(drm_radeon_private_t *
266 dev_priv, 266 dev_priv,
267 drm_file_t *filp_priv, 267 struct drm_file *filp_priv,
268 drm_radeon_kcmd_buffer_t * 268 drm_radeon_kcmd_buffer_t *
269 cmdbuf, 269 cmdbuf,
270 unsigned int *cmdsz) 270 unsigned int *cmdsz)
@@ -439,7 +439,7 @@ static __inline__ void radeon_emit_clip_rect(drm_radeon_private_t * dev_priv,
439/* Emit 1.1 state 439/* Emit 1.1 state
440 */ 440 */
441static int radeon_emit_state(drm_radeon_private_t * dev_priv, 441static int radeon_emit_state(drm_radeon_private_t * dev_priv,
442 drm_file_t * filp_priv, 442 struct drm_file * filp_priv,
443 drm_radeon_context_regs_t * ctx, 443 drm_radeon_context_regs_t * ctx,
444 drm_radeon_texture_regs_t * tex, 444 drm_radeon_texture_regs_t * tex,
445 unsigned int dirty) 445 unsigned int dirty)
@@ -608,7 +608,7 @@ static int radeon_emit_state(drm_radeon_private_t * dev_priv,
608/* Emit 1.2 state 608/* Emit 1.2 state
609 */ 609 */
610static int radeon_emit_state2(drm_radeon_private_t * dev_priv, 610static int radeon_emit_state2(drm_radeon_private_t * dev_priv,
611 drm_file_t * filp_priv, 611 struct drm_file * filp_priv,
612 drm_radeon_state_t * state) 612 drm_radeon_state_t * state)
613{ 613{
614 RING_LOCALS; 614 RING_LOCALS;
@@ -844,7 +844,7 @@ static void radeon_cp_performance_boxes(drm_radeon_private_t * dev_priv)
844 * CP command dispatch functions 844 * CP command dispatch functions
845 */ 845 */
846 846
847static void radeon_cp_dispatch_clear(drm_device_t * dev, 847static void radeon_cp_dispatch_clear(struct drm_device * dev,
848 drm_radeon_clear_t * clear, 848 drm_radeon_clear_t * clear,
849 drm_radeon_clear_rect_t * depth_boxes) 849 drm_radeon_clear_rect_t * depth_boxes)
850{ 850{
@@ -1335,7 +1335,7 @@ static void radeon_cp_dispatch_clear(drm_device_t * dev,
1335 ADVANCE_RING(); 1335 ADVANCE_RING();
1336} 1336}
1337 1337
1338static void radeon_cp_dispatch_swap(drm_device_t * dev) 1338static void radeon_cp_dispatch_swap(struct drm_device * dev)
1339{ 1339{
1340 drm_radeon_private_t *dev_priv = dev->dev_private; 1340 drm_radeon_private_t *dev_priv = dev->dev_private;
1341 drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; 1341 drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv;
@@ -1412,7 +1412,7 @@ static void radeon_cp_dispatch_swap(drm_device_t * dev)
1412 ADVANCE_RING(); 1412 ADVANCE_RING();
1413} 1413}
1414 1414
1415static void radeon_cp_dispatch_flip(drm_device_t * dev) 1415static void radeon_cp_dispatch_flip(struct drm_device * dev)
1416{ 1416{
1417 drm_radeon_private_t *dev_priv = dev->dev_private; 1417 drm_radeon_private_t *dev_priv = dev->dev_private;
1418 drm_sarea_t *sarea = (drm_sarea_t *) dev_priv->sarea->handle; 1418 drm_sarea_t *sarea = (drm_sarea_t *) dev_priv->sarea->handle;
@@ -1491,7 +1491,7 @@ typedef struct {
1491 unsigned int vc_format; 1491 unsigned int vc_format;
1492} drm_radeon_tcl_prim_t; 1492} drm_radeon_tcl_prim_t;
1493 1493
1494static void radeon_cp_dispatch_vertex(drm_device_t * dev, 1494static void radeon_cp_dispatch_vertex(struct drm_device * dev,
1495 drm_buf_t * buf, 1495 drm_buf_t * buf,
1496 drm_radeon_tcl_prim_t * prim) 1496 drm_radeon_tcl_prim_t * prim)
1497{ 1497{
@@ -1537,7 +1537,7 @@ static void radeon_cp_dispatch_vertex(drm_device_t * dev,
1537 } while (i < nbox); 1537 } while (i < nbox);
1538} 1538}
1539 1539
1540static void radeon_cp_discard_buffer(drm_device_t * dev, drm_buf_t * buf) 1540static void radeon_cp_discard_buffer(struct drm_device * dev, drm_buf_t * buf)
1541{ 1541{
1542 drm_radeon_private_t *dev_priv = dev->dev_private; 1542 drm_radeon_private_t *dev_priv = dev->dev_private;
1543 drm_radeon_buf_priv_t *buf_priv = buf->dev_private; 1543 drm_radeon_buf_priv_t *buf_priv = buf->dev_private;
@@ -1554,7 +1554,7 @@ static void radeon_cp_discard_buffer(drm_device_t * dev, drm_buf_t * buf)
1554 buf->used = 0; 1554 buf->used = 0;
1555} 1555}
1556 1556
1557static void radeon_cp_dispatch_indirect(drm_device_t * dev, 1557static void radeon_cp_dispatch_indirect(struct drm_device * dev,
1558 drm_buf_t * buf, int start, int end) 1558 drm_buf_t * buf, int start, int end)
1559{ 1559{
1560 drm_radeon_private_t *dev_priv = dev->dev_private; 1560 drm_radeon_private_t *dev_priv = dev->dev_private;
@@ -1588,7 +1588,7 @@ static void radeon_cp_dispatch_indirect(drm_device_t * dev,
1588 } 1588 }
1589} 1589}
1590 1590
1591static void radeon_cp_dispatch_indices(drm_device_t * dev, 1591static void radeon_cp_dispatch_indices(struct drm_device * dev,
1592 drm_buf_t * elt_buf, 1592 drm_buf_t * elt_buf,
1593 drm_radeon_tcl_prim_t * prim) 1593 drm_radeon_tcl_prim_t * prim)
1594{ 1594{
@@ -1647,12 +1647,12 @@ static void radeon_cp_dispatch_indices(drm_device_t * dev,
1647#define RADEON_MAX_TEXTURE_SIZE RADEON_BUFFER_SIZE 1647#define RADEON_MAX_TEXTURE_SIZE RADEON_BUFFER_SIZE
1648 1648
1649static int radeon_cp_dispatch_texture(DRMFILE filp, 1649static int radeon_cp_dispatch_texture(DRMFILE filp,
1650 drm_device_t * dev, 1650 struct drm_device * dev,
1651 drm_radeon_texture_t * tex, 1651 drm_radeon_texture_t * tex,
1652 drm_radeon_tex_image_t * image) 1652 drm_radeon_tex_image_t * image)
1653{ 1653{
1654 drm_radeon_private_t *dev_priv = dev->dev_private; 1654 drm_radeon_private_t *dev_priv = dev->dev_private;
1655 drm_file_t *filp_priv; 1655 struct drm_file *filp_priv;
1656 drm_buf_t *buf; 1656 drm_buf_t *buf;
1657 u32 format; 1657 u32 format;
1658 u32 *buffer; 1658 u32 *buffer;
@@ -1881,7 +1881,7 @@ static int radeon_cp_dispatch_texture(DRMFILE filp,
1881 return 0; 1881 return 0;
1882} 1882}
1883 1883
1884static void radeon_cp_dispatch_stipple(drm_device_t * dev, u32 * stipple) 1884static void radeon_cp_dispatch_stipple(struct drm_device * dev, u32 * stipple)
1885{ 1885{
1886 drm_radeon_private_t *dev_priv = dev->dev_private; 1886 drm_radeon_private_t *dev_priv = dev->dev_private;
1887 int i; 1887 int i;
@@ -2134,7 +2134,7 @@ static int radeon_cp_clear(DRM_IOCTL_ARGS)
2134 2134
2135/* Not sure why this isn't set all the time: 2135/* Not sure why this isn't set all the time:
2136 */ 2136 */
2137static int radeon_do_init_pageflip(drm_device_t * dev) 2137static int radeon_do_init_pageflip(struct drm_device * dev)
2138{ 2138{
2139 drm_radeon_private_t *dev_priv = dev->dev_private; 2139 drm_radeon_private_t *dev_priv = dev->dev_private;
2140 RING_LOCALS; 2140 RING_LOCALS;
@@ -2206,7 +2206,7 @@ static int radeon_cp_vertex(DRM_IOCTL_ARGS)
2206{ 2206{
2207 DRM_DEVICE; 2207 DRM_DEVICE;
2208 drm_radeon_private_t *dev_priv = dev->dev_private; 2208 drm_radeon_private_t *dev_priv = dev->dev_private;
2209 drm_file_t *filp_priv; 2209 struct drm_file *filp_priv;
2210 drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; 2210 drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv;
2211 drm_device_dma_t *dma = dev->dma; 2211 drm_device_dma_t *dma = dev->dma;
2212 drm_buf_t *buf; 2212 drm_buf_t *buf;
@@ -2289,7 +2289,7 @@ static int radeon_cp_indices(DRM_IOCTL_ARGS)
2289{ 2289{
2290 DRM_DEVICE; 2290 DRM_DEVICE;
2291 drm_radeon_private_t *dev_priv = dev->dev_private; 2291 drm_radeon_private_t *dev_priv = dev->dev_private;
2292 drm_file_t *filp_priv; 2292 struct drm_file *filp_priv;
2293 drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; 2293 drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv;
2294 drm_device_dma_t *dma = dev->dma; 2294 drm_device_dma_t *dma = dev->dma;
2295 drm_buf_t *buf; 2295 drm_buf_t *buf;
@@ -2507,7 +2507,7 @@ static int radeon_cp_vertex2(DRM_IOCTL_ARGS)
2507{ 2507{
2508 DRM_DEVICE; 2508 DRM_DEVICE;
2509 drm_radeon_private_t *dev_priv = dev->dev_private; 2509 drm_radeon_private_t *dev_priv = dev->dev_private;
2510 drm_file_t *filp_priv; 2510 struct drm_file *filp_priv;
2511 drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; 2511 drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv;
2512 drm_device_dma_t *dma = dev->dma; 2512 drm_device_dma_t *dma = dev->dma;
2513 drm_buf_t *buf; 2513 drm_buf_t *buf;
@@ -2603,7 +2603,7 @@ static int radeon_cp_vertex2(DRM_IOCTL_ARGS)
2603} 2603}
2604 2604
2605static int radeon_emit_packets(drm_radeon_private_t * dev_priv, 2605static int radeon_emit_packets(drm_radeon_private_t * dev_priv,
2606 drm_file_t * filp_priv, 2606 struct drm_file * filp_priv,
2607 drm_radeon_cmd_header_t header, 2607 drm_radeon_cmd_header_t header,
2608 drm_radeon_kcmd_buffer_t *cmdbuf) 2608 drm_radeon_kcmd_buffer_t *cmdbuf)
2609{ 2609{
@@ -2728,8 +2728,8 @@ static __inline__ int radeon_emit_veclinear(drm_radeon_private_t *dev_priv,
2728 return 0; 2728 return 0;
2729} 2729}
2730 2730
2731static int radeon_emit_packet3(drm_device_t * dev, 2731static int radeon_emit_packet3(struct drm_device * dev,
2732 drm_file_t * filp_priv, 2732 struct drm_file * filp_priv,
2733 drm_radeon_kcmd_buffer_t *cmdbuf) 2733 drm_radeon_kcmd_buffer_t *cmdbuf)
2734{ 2734{
2735 drm_radeon_private_t *dev_priv = dev->dev_private; 2735 drm_radeon_private_t *dev_priv = dev->dev_private;
@@ -2754,8 +2754,8 @@ static int radeon_emit_packet3(drm_device_t * dev,
2754 return 0; 2754 return 0;
2755} 2755}
2756 2756
2757static int radeon_emit_packet3_cliprect(drm_device_t *dev, 2757static int radeon_emit_packet3_cliprect(struct drm_device *dev,
2758 drm_file_t *filp_priv, 2758 struct drm_file *filp_priv,
2759 drm_radeon_kcmd_buffer_t *cmdbuf, 2759 drm_radeon_kcmd_buffer_t *cmdbuf,
2760 int orig_nbox) 2760 int orig_nbox)
2761{ 2761{
@@ -2816,7 +2816,7 @@ static int radeon_emit_packet3_cliprect(drm_device_t *dev,
2816 return 0; 2816 return 0;
2817} 2817}
2818 2818
2819static int radeon_emit_wait(drm_device_t * dev, int flags) 2819static int radeon_emit_wait(struct drm_device * dev, int flags)
2820{ 2820{
2821 drm_radeon_private_t *dev_priv = dev->dev_private; 2821 drm_radeon_private_t *dev_priv = dev->dev_private;
2822 RING_LOCALS; 2822 RING_LOCALS;
@@ -2849,7 +2849,7 @@ static int radeon_cp_cmdbuf(DRM_IOCTL_ARGS)
2849{ 2849{
2850 DRM_DEVICE; 2850 DRM_DEVICE;
2851 drm_radeon_private_t *dev_priv = dev->dev_private; 2851 drm_radeon_private_t *dev_priv = dev->dev_private;
2852 drm_file_t *filp_priv; 2852 struct drm_file *filp_priv;
2853 drm_device_dma_t *dma = dev->dma; 2853 drm_device_dma_t *dma = dev->dma;
2854 drm_buf_t *buf = NULL; 2854 drm_buf_t *buf = NULL;
2855 int idx; 2855 int idx;
@@ -3105,7 +3105,7 @@ static int radeon_cp_setparam(DRM_IOCTL_ARGS)
3105{ 3105{
3106 DRM_DEVICE; 3106 DRM_DEVICE;
3107 drm_radeon_private_t *dev_priv = dev->dev_private; 3107 drm_radeon_private_t *dev_priv = dev->dev_private;
3108 drm_file_t *filp_priv; 3108 struct drm_file *filp_priv;
3109 drm_radeon_setparam_t sp; 3109 drm_radeon_setparam_t sp;
3110 struct drm_radeon_driver_file_fields *radeon_priv; 3110 struct drm_radeon_driver_file_fields *radeon_priv;
3111 3111
@@ -3162,7 +3162,7 @@ static int radeon_cp_setparam(DRM_IOCTL_ARGS)
3162 * 3162 *
3163 * DRM infrastructure takes care of reclaiming dma buffers. 3163 * DRM infrastructure takes care of reclaiming dma buffers.
3164 */ 3164 */
3165void radeon_driver_preclose(drm_device_t * dev, DRMFILE filp) 3165void radeon_driver_preclose(struct drm_device *dev, DRMFILE filp)
3166{ 3166{
3167 if (dev->dev_private) { 3167 if (dev->dev_private) {
3168 drm_radeon_private_t *dev_priv = dev->dev_private; 3168 drm_radeon_private_t *dev_priv = dev->dev_private;
@@ -3173,7 +3173,7 @@ void radeon_driver_preclose(drm_device_t * dev, DRMFILE filp)
3173 } 3173 }
3174} 3174}
3175 3175
3176void radeon_driver_lastclose(drm_device_t * dev) 3176void radeon_driver_lastclose(struct drm_device *dev)
3177{ 3177{
3178 if (dev->dev_private) { 3178 if (dev->dev_private) {
3179 drm_radeon_private_t *dev_priv = dev->dev_private; 3179 drm_radeon_private_t *dev_priv = dev->dev_private;
@@ -3186,7 +3186,7 @@ void radeon_driver_lastclose(drm_device_t * dev)
3186 radeon_do_release(dev); 3186 radeon_do_release(dev);
3187} 3187}
3188 3188
3189int radeon_driver_open(drm_device_t * dev, drm_file_t * filp_priv) 3189int radeon_driver_open(struct drm_device *dev, struct drm_file *filp_priv)
3190{ 3190{
3191 drm_radeon_private_t *dev_priv = dev->dev_private; 3191 drm_radeon_private_t *dev_priv = dev->dev_private;
3192 struct drm_radeon_driver_file_fields *radeon_priv; 3192 struct drm_radeon_driver_file_fields *radeon_priv;
@@ -3208,7 +3208,7 @@ int radeon_driver_open(drm_device_t * dev, drm_file_t * filp_priv)
3208 return 0; 3208 return 0;
3209} 3209}
3210 3210
3211void radeon_driver_postclose(drm_device_t * dev, drm_file_t * filp_priv) 3211void radeon_driver_postclose(struct drm_device *dev, struct drm_file *filp_priv)
3212{ 3212{
3213 struct drm_radeon_driver_file_fields *radeon_priv = 3213 struct drm_radeon_driver_file_fields *radeon_priv =
3214 filp_priv->driver_priv; 3214 filp_priv->driver_priv;