1 files changed, 88 insertions, 83 deletions

diff --git a/drivers/char/drm/radeon_irq.c b/drivers/char/drm/radeon_irq.c
index 507d6b747a13..ee40d197deb7 100644
--- a/drivers/char/drm/radeon_irq.c
+++ b/drivers/char/drm/radeon_irq.c
@@ -35,61 +35,12 @@
 #include "radeon_drm.h"
 #include "radeon_drv.h"
 
-static void radeon_irq_set_state(struct drm_device *dev, u32 mask, int state)
+static __inline__ u32 radeon_acknowledge_irqs(drm_radeon_private_t * dev_priv,
+                                              u32 mask)
 {
-        drm_radeon_private_t *dev_priv = dev->dev_private;
-
-        if (state)
-                dev_priv->irq_enable_reg |= mask;
-        else
-                dev_priv->irq_enable_reg &= ~mask;
-
-        RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
-}
-
-int radeon_enable_vblank(struct drm_device *dev, int crtc)
-{
-        switch (crtc) {
-        case 0:
-                radeon_irq_set_state(dev, RADEON_CRTC_VBLANK_MASK, 1);
-                break;
-        case 1:
-                radeon_irq_set_state(dev, RADEON_CRTC2_VBLANK_MASK, 1);
-                break;
-        default:
-                DRM_ERROR("tried to enable vblank on non-existent crtc %d\n",
-                          crtc);
-                return EINVAL;
-        }
-
-        return 0;
-}
-
-void radeon_disable_vblank(struct drm_device *dev, int crtc)
-{
-        switch (crtc) {
-        case 0:
-                radeon_irq_set_state(dev, RADEON_CRTC_VBLANK_MASK, 0);
-                break;
-        case 1:
-                radeon_irq_set_state(dev, RADEON_CRTC2_VBLANK_MASK, 0);
-                break;
-        default:
-                DRM_ERROR("tried to enable vblank on non-existent crtc %d\n",
-                          crtc);
-                break;
-        }
-}
-
-static __inline__ u32 radeon_acknowledge_irqs(drm_radeon_private_t * dev_priv)
-{
-        u32 irqs = RADEON_READ(RADEON_GEN_INT_STATUS) &
-                (RADEON_SW_INT_TEST | RADEON_CRTC_VBLANK_STAT |
-                 RADEON_CRTC2_VBLANK_STAT);
-
+        u32 irqs = RADEON_READ(RADEON_GEN_INT_STATUS) & mask;
         if (irqs)
                 RADEON_WRITE(RADEON_GEN_INT_STATUS, irqs);
-
         return irqs;
 }
 
@@ -121,21 +72,39 @@ irqreturn_t radeon_driver_irq_handler(DRM_IRQ_ARGS)
         /* Only consider the bits we're interested in - others could be used
          * outside the DRM
          */
-        stat = radeon_acknowledge_irqs(dev_priv);
+        stat = radeon_acknowledge_irqs(dev_priv, (RADEON_SW_INT_TEST_ACK |
+                                                  RADEON_CRTC_VBLANK_STAT |
+                                                  RADEON_CRTC2_VBLANK_STAT));
         if (!stat)
                 return IRQ_NONE;
 
         stat &= dev_priv->irq_enable_reg;
 
         /* SW interrupt */
-        if (stat & RADEON_SW_INT_TEST)
+        if (stat & RADEON_SW_INT_TEST) {
                 DRM_WAKEUP(&dev_priv->swi_queue);
+        }
 
         /* VBLANK interrupt */
-        if (stat & RADEON_CRTC_VBLANK_STAT)
-                drm_handle_vblank(dev, 0);
-        if (stat & RADEON_CRTC2_VBLANK_STAT)
-                drm_handle_vblank(dev, 1);
+        if (stat & (RADEON_CRTC_VBLANK_STAT|RADEON_CRTC2_VBLANK_STAT)) {
+                int vblank_crtc = dev_priv->vblank_crtc;
+
+                if ((vblank_crtc &
+                     (DRM_RADEON_VBLANK_CRTC1 | DRM_RADEON_VBLANK_CRTC2)) ==
+                    (DRM_RADEON_VBLANK_CRTC1 | DRM_RADEON_VBLANK_CRTC2)) {
+                        if (stat & RADEON_CRTC_VBLANK_STAT)
+                                atomic_inc(&dev->vbl_received);
+                        if (stat & RADEON_CRTC2_VBLANK_STAT)
+                                atomic_inc(&dev->vbl_received2);
+                } else if (((stat & RADEON_CRTC_VBLANK_STAT) &&
+                           (vblank_crtc & DRM_RADEON_VBLANK_CRTC1)) ||
+                           ((stat & RADEON_CRTC2_VBLANK_STAT) &&
+                            (vblank_crtc & DRM_RADEON_VBLANK_CRTC2)))
+                        atomic_inc(&dev->vbl_received);
+
+                DRM_WAKEUP(&dev->vbl_queue);
+                drm_vbl_send_signals(dev);
+        }
 
         return IRQ_HANDLED;
 }
@@ -175,27 +144,54 @@ static int radeon_wait_irq(struct drm_device * dev, int swi_nr)
         return ret;
 }
 
-u32 radeon_get_vblank_counter(struct drm_device *dev, int crtc)
+static int radeon_driver_vblank_do_wait(struct drm_device * dev,
+                                        unsigned int *sequence, int crtc)
 {
-        drm_radeon_private_t *dev_priv = dev->dev_private;
-        u32 crtc_cnt_reg, crtc_status_reg;
-
+        drm_radeon_private_t *dev_priv =
+            (drm_radeon_private_t *) dev->dev_private;
+        unsigned int cur_vblank;
+        int ret = 0;
+        int ack = 0;
+        atomic_t *counter;
         if (!dev_priv) {
                 DRM_ERROR("called with no initialization\n");
                 return -EINVAL;
         }
 
-        if (crtc == 0) {
-                crtc_cnt_reg = RADEON_CRTC_CRNT_FRAME;
-                crtc_status_reg = RADEON_CRTC_STATUS;
-        } else if (crtc == 1) {
-                crtc_cnt_reg = RADEON_CRTC2_CRNT_FRAME;
-                crtc_status_reg = RADEON_CRTC2_STATUS;
-        } else {
+        if (crtc == DRM_RADEON_VBLANK_CRTC1) {
+                counter = &dev->vbl_received;
+                ack |= RADEON_CRTC_VBLANK_STAT;
+        } else if (crtc == DRM_RADEON_VBLANK_CRTC2) {
+                counter = &dev->vbl_received2;
+                ack |= RADEON_CRTC2_VBLANK_STAT;
+        } else
                 return -EINVAL;
-        }
 
-        return RADEON_READ(crtc_cnt_reg) + (RADEON_READ(crtc_status_reg) & 1);
+        radeon_acknowledge_irqs(dev_priv, ack);
+
+        dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE;
+
+        /* Assume that the user has missed the current sequence number
+         * by about a day rather than she wants to wait for years
+         * using vertical blanks...
+         */
+        DRM_WAIT_ON(ret, dev->vbl_queue, 3 * DRM_HZ,
+                    (((cur_vblank = atomic_read(counter))
+                      - *sequence) <= (1 << 23)));
+
+        *sequence = cur_vblank;
+
+        return ret;
+}
+
+int radeon_driver_vblank_wait(struct drm_device *dev, unsigned int *sequence)
+{
+        return radeon_driver_vblank_do_wait(dev, sequence, DRM_RADEON_VBLANK_CRTC1);
+}
+
+int radeon_driver_vblank_wait2(struct drm_device *dev, unsigned int *sequence)
+{
+        return radeon_driver_vblank_do_wait(dev, sequence, DRM_RADEON_VBLANK_CRTC2);
 }
 
 /* Needs the lock as it touches the ring.
@@ -238,6 +234,21 @@ int radeon_irq_wait(struct drm_device *dev, void *data, struct drm_file *file_pr
         return radeon_wait_irq(dev, irqwait->irq_seq);
 }
 
+void radeon_enable_interrupt(struct drm_device *dev)
+{
+        drm_radeon_private_t *dev_priv = (drm_radeon_private_t *) dev->dev_private;
+
+        dev_priv->irq_enable_reg = RADEON_SW_INT_ENABLE;
+        if (dev_priv->vblank_crtc & DRM_RADEON_VBLANK_CRTC1)
+                dev_priv->irq_enable_reg |= RADEON_CRTC_VBLANK_MASK;
+
+        if (dev_priv->vblank_crtc & DRM_RADEON_VBLANK_CRTC2)
+                dev_priv->irq_enable_reg |= RADEON_CRTC2_VBLANK_MASK;
+
+        RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
+        dev_priv->irq_enabled = 1;
+}
+
 /* drm_dma.h hooks
 */
 void radeon_driver_irq_preinstall(struct drm_device * dev)
@@ -249,27 +260,20 @@ void radeon_driver_irq_preinstall(struct drm_device * dev)
         RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
 
         /* Clear bits if they're already high */
-        radeon_acknowledge_irqs(dev_priv);
+        radeon_acknowledge_irqs(dev_priv, (RADEON_SW_INT_TEST_ACK |
+                                           RADEON_CRTC_VBLANK_STAT |
+                                           RADEON_CRTC2_VBLANK_STAT));
 }
 
-int radeon_driver_irq_postinstall(struct drm_device * dev)
+void radeon_driver_irq_postinstall(struct drm_device * dev)
 {
         drm_radeon_private_t *dev_priv =
             (drm_radeon_private_t *) dev->dev_private;
-        int ret;
 
         atomic_set(&dev_priv->swi_emitted, 0);
         DRM_INIT_WAITQUEUE(&dev_priv->swi_queue);
 
-        ret = drm_vblank_init(dev, 2);
-        if (ret)
-                return ret;
-
-        dev->max_vblank_count = 0x001fffff;
-
-        radeon_irq_set_state(dev, RADEON_SW_INT_ENABLE, 1);
-
-        return 0;
+        radeon_enable_interrupt(dev);
 }
 
 void radeon_driver_irq_uninstall(struct drm_device * dev)
@@ -311,5 +315,6 @@ int radeon_vblank_crtc_set(struct drm_device *dev, int64_t value)
                 return -EINVAL;
         }
         dev_priv->vblank_crtc = (unsigned int)value;
+        radeon_enable_interrupt(dev);
         return 0;
 }