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path: root/drivers/char/drm/radeon_cp.c
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Diffstat (limited to 'drivers/char/drm/radeon_cp.c')
-rw-r--r--drivers/char/drm/radeon_cp.c54
1 files changed, 29 insertions, 25 deletions
diff --git a/drivers/char/drm/radeon_cp.c b/drivers/char/drm/radeon_cp.c
index 68338389d836..af5790f8fd53 100644
--- a/drivers/char/drm/radeon_cp.c
+++ b/drivers/char/drm/radeon_cp.c
@@ -36,7 +36,7 @@
36 36
37#define RADEON_FIFO_DEBUG 0 37#define RADEON_FIFO_DEBUG 0
38 38
39static int radeon_do_cleanup_cp(drm_device_t * dev); 39static int radeon_do_cleanup_cp(struct drm_device * dev);
40 40
41/* CP microcode (from ATI) */ 41/* CP microcode (from ATI) */
42static const u32 R200_cp_microcode[][2] = { 42static const u32 R200_cp_microcode[][2] = {
@@ -816,7 +816,7 @@ static const u32 R300_cp_microcode[][2] = {
816 {0000000000, 0000000000}, 816 {0000000000, 0000000000},
817}; 817};
818 818
819static int RADEON_READ_PLL(drm_device_t * dev, int addr) 819static int RADEON_READ_PLL(struct drm_device * dev, int addr)
820{ 820{
821 drm_radeon_private_t *dev_priv = dev->dev_private; 821 drm_radeon_private_t *dev_priv = dev->dev_private;
822 822
@@ -1066,7 +1066,7 @@ static void radeon_do_cp_stop(drm_radeon_private_t * dev_priv)
1066 1066
1067/* Reset the engine. This will stop the CP if it is running. 1067/* Reset the engine. This will stop the CP if it is running.
1068 */ 1068 */
1069static int radeon_do_engine_reset(drm_device_t * dev) 1069static int radeon_do_engine_reset(struct drm_device * dev)
1070{ 1070{
1071 drm_radeon_private_t *dev_priv = dev->dev_private; 1071 drm_radeon_private_t *dev_priv = dev->dev_private;
1072 u32 clock_cntl_index, mclk_cntl, rbbm_soft_reset; 1072 u32 clock_cntl_index, mclk_cntl, rbbm_soft_reset;
@@ -1122,7 +1122,7 @@ static int radeon_do_engine_reset(drm_device_t * dev)
1122 return 0; 1122 return 0;
1123} 1123}
1124 1124
1125static void radeon_cp_init_ring_buffer(drm_device_t * dev, 1125static void radeon_cp_init_ring_buffer(struct drm_device * dev,
1126 drm_radeon_private_t * dev_priv) 1126 drm_radeon_private_t * dev_priv)
1127{ 1127{
1128 u32 ring_start, cur_read_ptr; 1128 u32 ring_start, cur_read_ptr;
@@ -1174,7 +1174,7 @@ static void radeon_cp_init_ring_buffer(drm_device_t * dev,
1174 } else 1174 } else
1175#endif 1175#endif
1176 { 1176 {
1177 drm_sg_mem_t *entry = dev->sg; 1177 struct drm_sg_mem *entry = dev->sg;
1178 unsigned long tmp_ofs, page_ofs; 1178 unsigned long tmp_ofs, page_ofs;
1179 1179
1180 tmp_ofs = dev_priv->ring_rptr->offset - 1180 tmp_ofs = dev_priv->ring_rptr->offset -
@@ -1384,7 +1384,7 @@ static void radeon_set_pcigart(drm_radeon_private_t * dev_priv, int on)
1384 } 1384 }
1385} 1385}
1386 1386
1387static int radeon_do_init_cp(drm_device_t * dev, drm_radeon_init_t * init) 1387static int radeon_do_init_cp(struct drm_device * dev, drm_radeon_init_t * init)
1388{ 1388{
1389 drm_radeon_private_t *dev_priv = dev->dev_private; 1389 drm_radeon_private_t *dev_priv = dev->dev_private;
1390 1390
@@ -1420,6 +1420,10 @@ static int radeon_do_init_cp(drm_device_t * dev, drm_radeon_init_t * init)
1420 return DRM_ERR(EINVAL); 1420 return DRM_ERR(EINVAL);
1421 } 1421 }
1422 1422
1423 /* Enable vblank on CRTC1 for older X servers
1424 */
1425 dev_priv->vblank_crtc = DRM_RADEON_VBLANK_CRTC1;
1426
1423 switch(init->func) { 1427 switch(init->func) {
1424 case RADEON_INIT_R200_CP: 1428 case RADEON_INIT_R200_CP:
1425 dev_priv->microcode_version = UCODE_R200; 1429 dev_priv->microcode_version = UCODE_R200;
@@ -1501,13 +1505,13 @@ static int radeon_do_init_cp(drm_device_t * dev, drm_radeon_init_t * init)
1501 RADEON_ROUND_MODE_TRUNC | 1505 RADEON_ROUND_MODE_TRUNC |
1502 RADEON_ROUND_PREC_8TH_PIX); 1506 RADEON_ROUND_PREC_8TH_PIX);
1503 1507
1504 DRM_GETSAREA();
1505 1508
1506 dev_priv->ring_offset = init->ring_offset; 1509 dev_priv->ring_offset = init->ring_offset;
1507 dev_priv->ring_rptr_offset = init->ring_rptr_offset; 1510 dev_priv->ring_rptr_offset = init->ring_rptr_offset;
1508 dev_priv->buffers_offset = init->buffers_offset; 1511 dev_priv->buffers_offset = init->buffers_offset;
1509 dev_priv->gart_textures_offset = init->gart_textures_offset; 1512 dev_priv->gart_textures_offset = init->gart_textures_offset;
1510 1513
1514 dev_priv->sarea = drm_getsarea(dev);
1511 if (!dev_priv->sarea) { 1515 if (!dev_priv->sarea) {
1512 DRM_ERROR("could not find sarea!\n"); 1516 DRM_ERROR("could not find sarea!\n");
1513 radeon_do_cleanup_cp(dev); 1517 radeon_do_cleanup_cp(dev);
@@ -1731,7 +1735,7 @@ static int radeon_do_init_cp(drm_device_t * dev, drm_radeon_init_t * init)
1731 return 0; 1735 return 0;
1732} 1736}
1733 1737
1734static int radeon_do_cleanup_cp(drm_device_t * dev) 1738static int radeon_do_cleanup_cp(struct drm_device * dev)
1735{ 1739{
1736 drm_radeon_private_t *dev_priv = dev->dev_private; 1740 drm_radeon_private_t *dev_priv = dev->dev_private;
1737 DRM_DEBUG("\n"); 1741 DRM_DEBUG("\n");
@@ -1787,7 +1791,7 @@ static int radeon_do_cleanup_cp(drm_device_t * dev)
1787 * 1791 *
1788 * Charl P. Botha <http://cpbotha.net> 1792 * Charl P. Botha <http://cpbotha.net>
1789 */ 1793 */
1790static int radeon_do_resume_cp(drm_device_t * dev) 1794static int radeon_do_resume_cp(struct drm_device * dev)
1791{ 1795{
1792 drm_radeon_private_t *dev_priv = dev->dev_private; 1796 drm_radeon_private_t *dev_priv = dev->dev_private;
1793 1797
@@ -1914,7 +1918,7 @@ int radeon_cp_stop(DRM_IOCTL_ARGS)
1914 return 0; 1918 return 0;
1915} 1919}
1916 1920
1917void radeon_do_release(drm_device_t * dev) 1921void radeon_do_release(struct drm_device * dev)
1918{ 1922{
1919 drm_radeon_private_t *dev_priv = dev->dev_private; 1923 drm_radeon_private_t *dev_priv = dev->dev_private;
1920 int i, ret; 1924 int i, ret;
@@ -2042,12 +2046,12 @@ int radeon_fullscreen(DRM_IOCTL_ARGS)
2042 * they can't get the lock. 2046 * they can't get the lock.
2043 */ 2047 */
2044 2048
2045drm_buf_t *radeon_freelist_get(drm_device_t * dev) 2049struct drm_buf *radeon_freelist_get(struct drm_device * dev)
2046{ 2050{
2047 drm_device_dma_t *dma = dev->dma; 2051 struct drm_device_dma *dma = dev->dma;
2048 drm_radeon_private_t *dev_priv = dev->dev_private; 2052 drm_radeon_private_t *dev_priv = dev->dev_private;
2049 drm_radeon_buf_priv_t *buf_priv; 2053 drm_radeon_buf_priv_t *buf_priv;
2050 drm_buf_t *buf; 2054 struct drm_buf *buf;
2051 int i, t; 2055 int i, t;
2052 int start; 2056 int start;
2053 2057
@@ -2082,12 +2086,12 @@ drm_buf_t *radeon_freelist_get(drm_device_t * dev)
2082} 2086}
2083 2087
2084#if 0 2088#if 0
2085drm_buf_t *radeon_freelist_get(drm_device_t * dev) 2089struct drm_buf *radeon_freelist_get(struct drm_device * dev)
2086{ 2090{
2087 drm_device_dma_t *dma = dev->dma; 2091 struct drm_device_dma *dma = dev->dma;
2088 drm_radeon_private_t *dev_priv = dev->dev_private; 2092 drm_radeon_private_t *dev_priv = dev->dev_private;
2089 drm_radeon_buf_priv_t *buf_priv; 2093 drm_radeon_buf_priv_t *buf_priv;
2090 drm_buf_t *buf; 2094 struct drm_buf *buf;
2091 int i, t; 2095 int i, t;
2092 int start; 2096 int start;
2093 u32 done_age = DRM_READ32(dev_priv->ring_rptr, RADEON_SCRATCHOFF(1)); 2097 u32 done_age = DRM_READ32(dev_priv->ring_rptr, RADEON_SCRATCHOFF(1));
@@ -2116,15 +2120,15 @@ drm_buf_t *radeon_freelist_get(drm_device_t * dev)
2116} 2120}
2117#endif 2121#endif
2118 2122
2119void radeon_freelist_reset(drm_device_t * dev) 2123void radeon_freelist_reset(struct drm_device * dev)
2120{ 2124{
2121 drm_device_dma_t *dma = dev->dma; 2125 struct drm_device_dma *dma = dev->dma;
2122 drm_radeon_private_t *dev_priv = dev->dev_private; 2126 drm_radeon_private_t *dev_priv = dev->dev_private;
2123 int i; 2127 int i;
2124 2128
2125 dev_priv->last_buf = 0; 2129 dev_priv->last_buf = 0;
2126 for (i = 0; i < dma->buf_count; i++) { 2130 for (i = 0; i < dma->buf_count; i++) {
2127 drm_buf_t *buf = dma->buflist[i]; 2131 struct drm_buf *buf = dma->buflist[i];
2128 drm_radeon_buf_priv_t *buf_priv = buf->dev_private; 2132 drm_radeon_buf_priv_t *buf_priv = buf->dev_private;
2129 buf_priv->age = 0; 2133 buf_priv->age = 0;
2130 } 2134 }
@@ -2166,11 +2170,11 @@ int radeon_wait_ring(drm_radeon_private_t * dev_priv, int n)
2166 return DRM_ERR(EBUSY); 2170 return DRM_ERR(EBUSY);
2167} 2171}
2168 2172
2169static int radeon_cp_get_buffers(DRMFILE filp, drm_device_t * dev, 2173static int radeon_cp_get_buffers(DRMFILE filp, struct drm_device * dev,
2170 drm_dma_t * d) 2174 struct drm_dma * d)
2171{ 2175{
2172 int i; 2176 int i;
2173 drm_buf_t *buf; 2177 struct drm_buf *buf;
2174 2178
2175 for (i = d->granted_count; i < d->request_count; i++) { 2179 for (i = d->granted_count; i < d->request_count; i++) {
2176 buf = radeon_freelist_get(dev); 2180 buf = radeon_freelist_get(dev);
@@ -2194,10 +2198,10 @@ static int radeon_cp_get_buffers(DRMFILE filp, drm_device_t * dev,
2194int radeon_cp_buffers(DRM_IOCTL_ARGS) 2198int radeon_cp_buffers(DRM_IOCTL_ARGS)
2195{ 2199{
2196 DRM_DEVICE; 2200 DRM_DEVICE;
2197 drm_device_dma_t *dma = dev->dma; 2201 struct drm_device_dma *dma = dev->dma;
2198 int ret = 0; 2202 int ret = 0;
2199 drm_dma_t __user *argp = (void __user *)data; 2203 struct drm_dma __user *argp = (void __user *)data;
2200 drm_dma_t d; 2204 struct drm_dma d;
2201 2205
2202 LOCK_TEST_WITH_RETURN(dev, filp); 2206 LOCK_TEST_WITH_RETURN(dev, filp);
2203 2207