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path: root/drivers/char/drm/r128_drv.h
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Diffstat (limited to 'drivers/char/drm/r128_drv.h')
-rw-r--r--drivers/char/drm/r128_drv.h67
1 files changed, 30 insertions, 37 deletions
diff --git a/drivers/char/drm/r128_drv.h b/drivers/char/drm/r128_drv.h
index 938dfaea553a..87c5e1381ba2 100644
--- a/drivers/char/drm/r128_drv.h
+++ b/drivers/char/drm/r128_drv.h
@@ -52,14 +52,13 @@
52#define DRIVER_MINOR 5 52#define DRIVER_MINOR 5
53#define DRIVER_PATCHLEVEL 0 53#define DRIVER_PATCHLEVEL 0
54 54
55
56#define GET_RING_HEAD(dev_priv) R128_READ( R128_PM4_BUFFER_DL_RPTR ) 55#define GET_RING_HEAD(dev_priv) R128_READ( R128_PM4_BUFFER_DL_RPTR )
57 56
58typedef struct drm_r128_freelist { 57typedef struct drm_r128_freelist {
59 unsigned int age; 58 unsigned int age;
60 drm_buf_t *buf; 59 drm_buf_t *buf;
61 struct drm_r128_freelist *next; 60 struct drm_r128_freelist *next;
62 struct drm_r128_freelist *prev; 61 struct drm_r128_freelist *prev;
63} drm_r128_freelist_t; 62} drm_r128_freelist_t;
64 63
65typedef struct drm_r128_ring_buffer { 64typedef struct drm_r128_ring_buffer {
@@ -83,8 +82,8 @@ typedef struct drm_r128_private {
83 int cce_fifo_size; 82 int cce_fifo_size;
84 int cce_running; 83 int cce_running;
85 84
86 drm_r128_freelist_t *head; 85 drm_r128_freelist_t *head;
87 drm_r128_freelist_t *tail; 86 drm_r128_freelist_t *tail;
88 87
89 int usec_timeout; 88 int usec_timeout;
90 int is_pci; 89 int is_pci;
@@ -126,34 +125,34 @@ typedef struct drm_r128_buf_priv {
126 int prim; 125 int prim;
127 int discard; 126 int discard;
128 int dispatched; 127 int dispatched;
129 drm_r128_freelist_t *list_entry; 128 drm_r128_freelist_t *list_entry;
130} drm_r128_buf_priv_t; 129} drm_r128_buf_priv_t;
131 130
132 /* r128_cce.c */ 131 /* r128_cce.c */
133extern int r128_cce_init( DRM_IOCTL_ARGS ); 132extern int r128_cce_init(DRM_IOCTL_ARGS);
134extern int r128_cce_start( DRM_IOCTL_ARGS ); 133extern int r128_cce_start(DRM_IOCTL_ARGS);
135extern int r128_cce_stop( DRM_IOCTL_ARGS ); 134extern int r128_cce_stop(DRM_IOCTL_ARGS);
136extern int r128_cce_reset( DRM_IOCTL_ARGS ); 135extern int r128_cce_reset(DRM_IOCTL_ARGS);
137extern int r128_cce_idle( DRM_IOCTL_ARGS ); 136extern int r128_cce_idle(DRM_IOCTL_ARGS);
138extern int r128_engine_reset( DRM_IOCTL_ARGS ); 137extern int r128_engine_reset(DRM_IOCTL_ARGS);
139extern int r128_fullscreen( DRM_IOCTL_ARGS ); 138extern int r128_fullscreen(DRM_IOCTL_ARGS);
140extern int r128_cce_buffers( DRM_IOCTL_ARGS ); 139extern int r128_cce_buffers(DRM_IOCTL_ARGS);
141 140
142extern void r128_freelist_reset( drm_device_t *dev ); 141extern void r128_freelist_reset(drm_device_t * dev);
143 142
144extern int r128_wait_ring( drm_r128_private_t *dev_priv, int n ); 143extern int r128_wait_ring(drm_r128_private_t * dev_priv, int n);
145 144
146extern int r128_do_cce_idle( drm_r128_private_t *dev_priv ); 145extern int r128_do_cce_idle(drm_r128_private_t * dev_priv);
147extern int r128_do_cleanup_cce( drm_device_t *dev ); 146extern int r128_do_cleanup_cce(drm_device_t * dev);
148 147
149extern int r128_driver_vblank_wait(drm_device_t *dev, unsigned int *sequence); 148extern int r128_driver_vblank_wait(drm_device_t * dev, unsigned int *sequence);
150 149
151extern irqreturn_t r128_driver_irq_handler( DRM_IRQ_ARGS ); 150extern irqreturn_t r128_driver_irq_handler(DRM_IRQ_ARGS);
152extern void r128_driver_irq_preinstall( drm_device_t *dev ); 151extern void r128_driver_irq_preinstall(drm_device_t * dev);
153extern void r128_driver_irq_postinstall( drm_device_t *dev ); 152extern void r128_driver_irq_postinstall(drm_device_t * dev);
154extern void r128_driver_irq_uninstall( drm_device_t *dev ); 153extern void r128_driver_irq_uninstall(drm_device_t * dev);
155extern void r128_driver_pretakedown(drm_device_t *dev); 154extern void r128_driver_pretakedown(drm_device_t * dev);
156extern void r128_driver_prerelease(drm_device_t *dev, DRMFILE filp); 155extern void r128_driver_prerelease(drm_device_t * dev, DRMFILE filp);
157 156
158extern long r128_compat_ioctl(struct file *filp, unsigned int cmd, 157extern long r128_compat_ioctl(struct file *filp, unsigned int cmd,
159 unsigned long arg); 158 unsigned long arg);
@@ -265,7 +264,6 @@ extern long r128_compat_ioctl(struct file *filp, unsigned int cmd,
265# define R128_EVENT_CRTC_OFFSET (1 << 0) 264# define R128_EVENT_CRTC_OFFSET (1 << 0)
266#define R128_WINDOW_XY_OFFSET 0x1bcc 265#define R128_WINDOW_XY_OFFSET 0x1bcc
267 266
268
269/* CCE registers 267/* CCE registers
270 */ 268 */
271#define R128_PM4_BUFFER_OFFSET 0x0700 269#define R128_PM4_BUFFER_OFFSET 0x0700
@@ -316,7 +314,6 @@ extern long r128_compat_ioctl(struct file *filp, unsigned int cmd,
316#define R128_PM4_FIFO_DATA_EVEN 0x1000 314#define R128_PM4_FIFO_DATA_EVEN 0x1000
317#define R128_PM4_FIFO_DATA_ODD 0x1004 315#define R128_PM4_FIFO_DATA_ODD 0x1004
318 316
319
320/* CCE command packets 317/* CCE command packets
321 */ 318 */
322#define R128_CCE_PACKET0 0x00000000 319#define R128_CCE_PACKET0 0x00000000
@@ -394,7 +391,6 @@ do { \
394 R128_WRITE(R128_CLOCK_CNTL_DATA, (val)); \ 391 R128_WRITE(R128_CLOCK_CNTL_DATA, (val)); \
395} while (0) 392} while (0)
396 393
397
398#define CCE_PACKET0( reg, n ) (R128_CCE_PACKET0 | \ 394#define CCE_PACKET0( reg, n ) (R128_CCE_PACKET0 | \
399 ((n) << 16) | ((reg) >> 2)) 395 ((n) << 16) | ((reg) >> 2))
400#define CCE_PACKET1( reg0, reg1 ) (R128_CCE_PACKET1 | \ 396#define CCE_PACKET1( reg0, reg1 ) (R128_CCE_PACKET1 | \
@@ -403,13 +399,11 @@ do { \
403#define CCE_PACKET3( pkt, n ) (R128_CCE_PACKET3 | \ 399#define CCE_PACKET3( pkt, n ) (R128_CCE_PACKET3 | \
404 (pkt) | ((n) << 16)) 400 (pkt) | ((n) << 16))
405 401
406 402static __inline__ void r128_update_ring_snapshot(drm_r128_private_t * dev_priv)
407static __inline__ void
408r128_update_ring_snapshot( drm_r128_private_t *dev_priv )
409{ 403{
410 drm_r128_ring_buffer_t *ring = &dev_priv->ring; 404 drm_r128_ring_buffer_t *ring = &dev_priv->ring;
411 ring->space = (GET_RING_HEAD( dev_priv ) - ring->tail) * sizeof(u32); 405 ring->space = (GET_RING_HEAD(dev_priv) - ring->tail) * sizeof(u32);
412 if ( ring->space <= 0 ) 406 if (ring->space <= 0)
413 ring->space += ring->size; 407 ring->space += ring->size;
414} 408}
415 409
@@ -450,7 +444,6 @@ do { \
450 OUT_RING( R128_EVENT_CRTC_OFFSET ); \ 444 OUT_RING( R128_EVENT_CRTC_OFFSET ); \
451} while (0) 445} while (0)
452 446
453
454/* ================================================================ 447/* ================================================================
455 * Ring control 448 * Ring control
456 */ 449 */
@@ -520,4 +513,4 @@ do { \
520 write &= tail_mask; \ 513 write &= tail_mask; \
521} while (0) 514} while (0)
522 515
523#endif /* __R128_DRV_H__ */ 516#endif /* __R128_DRV_H__ */