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path: root/drivers/char/drm/i915_dma.c
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Diffstat (limited to 'drivers/char/drm/i915_dma.c')
-rw-r--r--drivers/char/drm/i915_dma.c90
1 files changed, 72 insertions, 18 deletions
diff --git a/drivers/char/drm/i915_dma.c b/drivers/char/drm/i915_dma.c
index 1ba15d9a171a..ea52740af4f6 100644
--- a/drivers/char/drm/i915_dma.c
+++ b/drivers/char/drm/i915_dma.c
@@ -35,7 +35,12 @@
35 dev->pci_device == 0x2982 || \ 35 dev->pci_device == 0x2982 || \
36 dev->pci_device == 0x2992 || \ 36 dev->pci_device == 0x2992 || \
37 dev->pci_device == 0x29A2 || \ 37 dev->pci_device == 0x29A2 || \
38 dev->pci_device == 0x2A02) 38 dev->pci_device == 0x2A02 || \
39 dev->pci_device == 0x2A12)
40
41#define IS_G33(dev) (dev->pci_device == 0x29b2 || \
42 dev->pci_device == 0x29c2 || \
43 dev->pci_device == 0x29d2)
39 44
40/* Really want an OS-independent resettable timer. Would like to have 45/* Really want an OS-independent resettable timer. Would like to have
41 * this loop run for (eg) 3 sec, but have the timer reset every time 46 * this loop run for (eg) 3 sec, but have the timer reset every time
@@ -106,6 +111,12 @@ static int i915_dma_cleanup(drm_device_t * dev)
106 I915_WRITE(0x02080, 0x1ffff000); 111 I915_WRITE(0x02080, 0x1ffff000);
107 } 112 }
108 113
114 if (dev_priv->status_gfx_addr) {
115 dev_priv->status_gfx_addr = 0;
116 drm_core_ioremapfree(&dev_priv->hws_map, dev);
117 I915_WRITE(0x2080, 0x1ffff000);
118 }
119
109 drm_free(dev->dev_private, sizeof(drm_i915_private_t), 120 drm_free(dev->dev_private, sizeof(drm_i915_private_t),
110 DRM_MEM_DRIVER); 121 DRM_MEM_DRIVER);
111 122
@@ -179,26 +190,24 @@ static int i915_initialize(drm_device_t * dev,
179 dev_priv->allow_batchbuffer = 1; 190 dev_priv->allow_batchbuffer = 1;
180 191
181 /* Program Hardware Status Page */ 192 /* Program Hardware Status Page */
182 dev_priv->status_page_dmah = drm_pci_alloc(dev, PAGE_SIZE, PAGE_SIZE, 193 if (!IS_G33(dev)) {
183 0xffffffff); 194 dev_priv->status_page_dmah =
195 drm_pci_alloc(dev, PAGE_SIZE, PAGE_SIZE, 0xffffffff);
196
197 if (!dev_priv->status_page_dmah) {
198 dev->dev_private = (void *)dev_priv;
199 i915_dma_cleanup(dev);
200 DRM_ERROR("Can not allocate hardware status page\n");
201 return DRM_ERR(ENOMEM);
202 }
203 dev_priv->hw_status_page = dev_priv->status_page_dmah->vaddr;
204 dev_priv->dma_status_page = dev_priv->status_page_dmah->busaddr;
184 205
185 if (!dev_priv->status_page_dmah) { 206 memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
186 dev->dev_private = (void *)dev_priv; 207 I915_WRITE(0x02080, dev_priv->dma_status_page);
187 i915_dma_cleanup(dev);
188 DRM_ERROR("Can not allocate hardware status page\n");
189 return DRM_ERR(ENOMEM);
190 } 208 }
191 dev_priv->hw_status_page = dev_priv->status_page_dmah->vaddr;
192 dev_priv->dma_status_page = dev_priv->status_page_dmah->busaddr;
193
194 memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
195 DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
196
197 I915_WRITE(0x02080, dev_priv->dma_status_page);
198 DRM_DEBUG("Enabled hardware status page\n"); 209 DRM_DEBUG("Enabled hardware status page\n");
199
200 dev->dev_private = (void *)dev_priv; 210 dev->dev_private = (void *)dev_priv;
201
202 return 0; 211 return 0;
203} 212}
204 213
@@ -231,7 +240,10 @@ static int i915_dma_resume(drm_device_t * dev)
231 } 240 }
232 DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page); 241 DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
233 242
234 I915_WRITE(0x02080, dev_priv->dma_status_page); 243 if (dev_priv->status_gfx_addr != 0)
244 I915_WRITE(0x02080, dev_priv->status_gfx_addr);
245 else
246 I915_WRITE(0x02080, dev_priv->dma_status_page);
235 DRM_DEBUG("Enabled hardware status page\n"); 247 DRM_DEBUG("Enabled hardware status page\n");
236 248
237 return 0; 249 return 0;
@@ -739,6 +751,47 @@ static int i915_setparam(DRM_IOCTL_ARGS)
739 return 0; 751 return 0;
740} 752}
741 753
754static int i915_set_status_page(DRM_IOCTL_ARGS)
755{
756 DRM_DEVICE;
757 drm_i915_private_t *dev_priv = dev->dev_private;
758 drm_i915_hws_addr_t hws;
759
760 if (!dev_priv) {
761 DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
762 return DRM_ERR(EINVAL);
763 }
764 DRM_COPY_FROM_USER_IOCTL(hws, (drm_i915_hws_addr_t __user *) data,
765 sizeof(hws));
766 printk(KERN_DEBUG "set status page addr 0x%08x\n", (u32)hws.addr);
767
768 dev_priv->status_gfx_addr = hws.addr & (0x1ffff<<12);
769
770 dev_priv->hws_map.offset = dev->agp->agp_info.aper_base + hws.addr;
771 dev_priv->hws_map.size = 4*1024;
772 dev_priv->hws_map.type = 0;
773 dev_priv->hws_map.flags = 0;
774 dev_priv->hws_map.mtrr = 0;
775
776 drm_core_ioremap(&dev_priv->hws_map, dev);
777 if (dev_priv->hws_map.handle == NULL) {
778 dev->dev_private = (void *)dev_priv;
779 i915_dma_cleanup(dev);
780 dev_priv->status_gfx_addr = 0;
781 DRM_ERROR("can not ioremap virtual address for"
782 " G33 hw status page\n");
783 return DRM_ERR(ENOMEM);
784 }
785 dev_priv->hw_status_page = dev_priv->hws_map.handle;
786
787 memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
788 I915_WRITE(0x02080, dev_priv->status_gfx_addr);
789 DRM_DEBUG("load hws 0x2080 with gfx mem 0x%x\n",
790 dev_priv->status_gfx_addr);
791 DRM_DEBUG("load hws at %p\n", dev_priv->hw_status_page);
792 return 0;
793}
794
742int i915_driver_load(drm_device_t *dev, unsigned long flags) 795int i915_driver_load(drm_device_t *dev, unsigned long flags)
743{ 796{
744 /* i915 has 4 more counters */ 797 /* i915 has 4 more counters */
@@ -785,6 +838,7 @@ drm_ioctl_desc_t i915_ioctls[] = {
785 [DRM_IOCTL_NR(DRM_I915_SET_VBLANK_PIPE)] = { i915_vblank_pipe_set, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY }, 838 [DRM_IOCTL_NR(DRM_I915_SET_VBLANK_PIPE)] = { i915_vblank_pipe_set, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY },
786 [DRM_IOCTL_NR(DRM_I915_GET_VBLANK_PIPE)] = { i915_vblank_pipe_get, DRM_AUTH }, 839 [DRM_IOCTL_NR(DRM_I915_GET_VBLANK_PIPE)] = { i915_vblank_pipe_get, DRM_AUTH },
787 [DRM_IOCTL_NR(DRM_I915_VBLANK_SWAP)] = {i915_vblank_swap, DRM_AUTH}, 840 [DRM_IOCTL_NR(DRM_I915_VBLANK_SWAP)] = {i915_vblank_swap, DRM_AUTH},
841 [DRM_IOCTL_NR(DRM_I915_HWS_ADDR)] = {i915_set_status_page, DRM_AUTH},
788}; 842};
789 843
790int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls); 844int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls);