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path: root/drivers/char/drm/i830_dma.c
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Diffstat (limited to 'drivers/char/drm/i830_dma.c')
-rw-r--r--drivers/char/drm/i830_dma.c1315
1 files changed, 647 insertions, 668 deletions
diff --git a/drivers/char/drm/i830_dma.c b/drivers/char/drm/i830_dma.c
index 6f89d5796ef3..dc94f1914425 100644
--- a/drivers/char/drm/i830_dma.c
+++ b/drivers/char/drm/i830_dma.c
@@ -11,11 +11,11 @@
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the 12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions: 13 * Software is furnished to do so, subject to the following conditions:
14 * 14 *
15 * The above copyright notice and this permission notice (including the next 15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the 16 * paragraph) shall be included in all copies or substantial portions of the
17 * Software. 17 * Software.
18 * 18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
@@ -47,103 +47,104 @@
47#define I830_BUF_UNMAPPED 0 47#define I830_BUF_UNMAPPED 0
48#define I830_BUF_MAPPED 1 48#define I830_BUF_MAPPED 1
49 49
50static drm_buf_t *i830_freelist_get(drm_device_t *dev) 50static drm_buf_t *i830_freelist_get(drm_device_t * dev)
51{ 51{
52 drm_device_dma_t *dma = dev->dma; 52 drm_device_dma_t *dma = dev->dma;
53 int i; 53 int i;
54 int used; 54 int used;
55 55
56 /* Linear search might not be the best solution */ 56 /* Linear search might not be the best solution */
57 57
58 for (i = 0; i < dma->buf_count; i++) { 58 for (i = 0; i < dma->buf_count; i++) {
59 drm_buf_t *buf = dma->buflist[ i ]; 59 drm_buf_t *buf = dma->buflist[i];
60 drm_i830_buf_priv_t *buf_priv = buf->dev_private; 60 drm_i830_buf_priv_t *buf_priv = buf->dev_private;
61 /* In use is already a pointer */ 61 /* In use is already a pointer */
62 used = cmpxchg(buf_priv->in_use, I830_BUF_FREE, 62 used = cmpxchg(buf_priv->in_use, I830_BUF_FREE,
63 I830_BUF_CLIENT); 63 I830_BUF_CLIENT);
64 if(used == I830_BUF_FREE) { 64 if (used == I830_BUF_FREE) {
65 return buf; 65 return buf;
66 } 66 }
67 } 67 }
68 return NULL; 68 return NULL;
69} 69}
70 70
71/* This should only be called if the buffer is not sent to the hardware 71/* This should only be called if the buffer is not sent to the hardware
72 * yet, the hardware updates in use for us once its on the ring buffer. 72 * yet, the hardware updates in use for us once its on the ring buffer.
73 */ 73 */
74 74
75static int i830_freelist_put(drm_device_t *dev, drm_buf_t *buf) 75static int i830_freelist_put(drm_device_t * dev, drm_buf_t * buf)
76{ 76{
77 drm_i830_buf_priv_t *buf_priv = buf->dev_private; 77 drm_i830_buf_priv_t *buf_priv = buf->dev_private;
78 int used; 78 int used;
79 79
80 /* In use is already a pointer */ 80 /* In use is already a pointer */
81 used = cmpxchg(buf_priv->in_use, I830_BUF_CLIENT, I830_BUF_FREE); 81 used = cmpxchg(buf_priv->in_use, I830_BUF_CLIENT, I830_BUF_FREE);
82 if(used != I830_BUF_CLIENT) { 82 if (used != I830_BUF_CLIENT) {
83 DRM_ERROR("Freeing buffer thats not in use : %d\n", buf->idx); 83 DRM_ERROR("Freeing buffer thats not in use : %d\n", buf->idx);
84 return -EINVAL; 84 return -EINVAL;
85 } 85 }
86 86
87 return 0; 87 return 0;
88} 88}
89 89
90static int i830_mmap_buffers(struct file *filp, struct vm_area_struct *vma) 90static int i830_mmap_buffers(struct file *filp, struct vm_area_struct *vma)
91{ 91{
92 drm_file_t *priv = filp->private_data; 92 drm_file_t *priv = filp->private_data;
93 drm_device_t *dev; 93 drm_device_t *dev;
94 drm_i830_private_t *dev_priv; 94 drm_i830_private_t *dev_priv;
95 drm_buf_t *buf; 95 drm_buf_t *buf;
96 drm_i830_buf_priv_t *buf_priv; 96 drm_i830_buf_priv_t *buf_priv;
97 97
98 lock_kernel(); 98 lock_kernel();
99 dev = priv->head->dev; 99 dev = priv->head->dev;
100 dev_priv = dev->dev_private; 100 dev_priv = dev->dev_private;
101 buf = dev_priv->mmap_buffer; 101 buf = dev_priv->mmap_buffer;
102 buf_priv = buf->dev_private; 102 buf_priv = buf->dev_private;
103 103
104 vma->vm_flags |= (VM_IO | VM_DONTCOPY); 104 vma->vm_flags |= (VM_IO | VM_DONTCOPY);
105 vma->vm_file = filp; 105 vma->vm_file = filp;
106 106
107 buf_priv->currently_mapped = I830_BUF_MAPPED; 107 buf_priv->currently_mapped = I830_BUF_MAPPED;
108 unlock_kernel(); 108 unlock_kernel();
109 109
110 if (io_remap_pfn_range(vma, vma->vm_start, 110 if (io_remap_pfn_range(vma, vma->vm_start,
111 VM_OFFSET(vma) >> PAGE_SHIFT, 111 VM_OFFSET(vma) >> PAGE_SHIFT,
112 vma->vm_end - vma->vm_start, 112 vma->vm_end - vma->vm_start, vma->vm_page_prot))
113 vma->vm_page_prot)) return -EAGAIN; 113 return -EAGAIN;
114 return 0; 114 return 0;
115} 115}
116 116
117static struct file_operations i830_buffer_fops = { 117static struct file_operations i830_buffer_fops = {
118 .open = drm_open, 118 .open = drm_open,
119 .flush = drm_flush, 119 .flush = drm_flush,
120 .release = drm_release, 120 .release = drm_release,
121 .ioctl = drm_ioctl, 121 .ioctl = drm_ioctl,
122 .mmap = i830_mmap_buffers, 122 .mmap = i830_mmap_buffers,
123 .fasync = drm_fasync, 123 .fasync = drm_fasync,
124}; 124};
125 125
126static int i830_map_buffer(drm_buf_t *buf, struct file *filp) 126static int i830_map_buffer(drm_buf_t * buf, struct file *filp)
127{ 127{
128 drm_file_t *priv = filp->private_data; 128 drm_file_t *priv = filp->private_data;
129 drm_device_t *dev = priv->head->dev; 129 drm_device_t *dev = priv->head->dev;
130 drm_i830_buf_priv_t *buf_priv = buf->dev_private; 130 drm_i830_buf_priv_t *buf_priv = buf->dev_private;
131 drm_i830_private_t *dev_priv = dev->dev_private; 131 drm_i830_private_t *dev_priv = dev->dev_private;
132 struct file_operations *old_fops; 132 struct file_operations *old_fops;
133 unsigned long virtual; 133 unsigned long virtual;
134 int retcode = 0; 134 int retcode = 0;
135 135
136 if(buf_priv->currently_mapped == I830_BUF_MAPPED) return -EINVAL; 136 if (buf_priv->currently_mapped == I830_BUF_MAPPED)
137 return -EINVAL;
137 138
138 down_write( &current->mm->mmap_sem ); 139 down_write(&current->mm->mmap_sem);
139 old_fops = filp->f_op; 140 old_fops = filp->f_op;
140 filp->f_op = &i830_buffer_fops; 141 filp->f_op = &i830_buffer_fops;
141 dev_priv->mmap_buffer = buf; 142 dev_priv->mmap_buffer = buf;
142 virtual = do_mmap(filp, 0, buf->total, PROT_READ|PROT_WRITE, 143 virtual = do_mmap(filp, 0, buf->total, PROT_READ | PROT_WRITE,
143 MAP_SHARED, buf->bus_address); 144 MAP_SHARED, buf->bus_address);
144 dev_priv->mmap_buffer = NULL; 145 dev_priv->mmap_buffer = NULL;
145 filp->f_op = old_fops; 146 filp->f_op = old_fops;
146 if (IS_ERR((void *)virtual)) { /* ugh */ 147 if (IS_ERR((void *)virtual)) { /* ugh */
147 /* Real error */ 148 /* Real error */
148 DRM_ERROR("mmap error\n"); 149 DRM_ERROR("mmap error\n");
149 retcode = virtual; 150 retcode = virtual;
@@ -151,17 +152,17 @@ static int i830_map_buffer(drm_buf_t *buf, struct file *filp)
151 } else { 152 } else {
152 buf_priv->virtual = (void __user *)virtual; 153 buf_priv->virtual = (void __user *)virtual;
153 } 154 }
154 up_write( &current->mm->mmap_sem ); 155 up_write(&current->mm->mmap_sem);
155 156
156 return retcode; 157 return retcode;
157} 158}
158 159
159static int i830_unmap_buffer(drm_buf_t *buf) 160static int i830_unmap_buffer(drm_buf_t * buf)
160{ 161{
161 drm_i830_buf_priv_t *buf_priv = buf->dev_private; 162 drm_i830_buf_priv_t *buf_priv = buf->dev_private;
162 int retcode = 0; 163 int retcode = 0;
163 164
164 if(buf_priv->currently_mapped != I830_BUF_MAPPED) 165 if (buf_priv->currently_mapped != I830_BUF_MAPPED)
165 return -EINVAL; 166 return -EINVAL;
166 167
167 down_write(&current->mm->mmap_sem); 168 down_write(&current->mm->mmap_sem);
@@ -170,43 +171,43 @@ static int i830_unmap_buffer(drm_buf_t *buf)
170 (size_t) buf->total); 171 (size_t) buf->total);
171 up_write(&current->mm->mmap_sem); 172 up_write(&current->mm->mmap_sem);
172 173
173 buf_priv->currently_mapped = I830_BUF_UNMAPPED; 174 buf_priv->currently_mapped = I830_BUF_UNMAPPED;
174 buf_priv->virtual = NULL; 175 buf_priv->virtual = NULL;
175 176
176 return retcode; 177 return retcode;
177} 178}
178 179
179static int i830_dma_get_buffer(drm_device_t *dev, drm_i830_dma_t *d, 180static int i830_dma_get_buffer(drm_device_t * dev, drm_i830_dma_t * d,
180 struct file *filp) 181 struct file *filp)
181{ 182{
182 drm_buf_t *buf; 183 drm_buf_t *buf;
183 drm_i830_buf_priv_t *buf_priv; 184 drm_i830_buf_priv_t *buf_priv;
184 int retcode = 0; 185 int retcode = 0;
185 186
186 buf = i830_freelist_get(dev); 187 buf = i830_freelist_get(dev);
187 if (!buf) { 188 if (!buf) {
188 retcode = -ENOMEM; 189 retcode = -ENOMEM;
189 DRM_DEBUG("retcode=%d\n", retcode); 190 DRM_DEBUG("retcode=%d\n", retcode);
190 return retcode; 191 return retcode;
191 } 192 }
192 193
193 retcode = i830_map_buffer(buf, filp); 194 retcode = i830_map_buffer(buf, filp);
194 if(retcode) { 195 if (retcode) {
195 i830_freelist_put(dev, buf); 196 i830_freelist_put(dev, buf);
196 DRM_ERROR("mapbuf failed, retcode %d\n", retcode); 197 DRM_ERROR("mapbuf failed, retcode %d\n", retcode);
197 return retcode; 198 return retcode;
198 } 199 }
199 buf->filp = filp; 200 buf->filp = filp;
200 buf_priv = buf->dev_private; 201 buf_priv = buf->dev_private;
201 d->granted = 1; 202 d->granted = 1;
202 d->request_idx = buf->idx; 203 d->request_idx = buf->idx;
203 d->request_size = buf->total; 204 d->request_size = buf->total;
204 d->virtual = buf_priv->virtual; 205 d->virtual = buf_priv->virtual;
205 206
206 return retcode; 207 return retcode;
207} 208}
208 209
209static int i830_dma_cleanup(drm_device_t *dev) 210static int i830_dma_cleanup(drm_device_t * dev)
210{ 211{
211 drm_device_dma_t *dma = dev->dma; 212 drm_device_dma_t *dma = dev->dma;
212 213
@@ -214,140 +215,144 @@ static int i830_dma_cleanup(drm_device_t *dev)
214 * may not have been called from userspace and after dev_private 215 * may not have been called from userspace and after dev_private
215 * is freed, it's too late. 216 * is freed, it's too late.
216 */ 217 */
217 if ( dev->irq_enabled ) drm_irq_uninstall(dev); 218 if (dev->irq_enabled)
219 drm_irq_uninstall(dev);
218 220
219 if (dev->dev_private) { 221 if (dev->dev_private) {
220 int i; 222 int i;
221 drm_i830_private_t *dev_priv = 223 drm_i830_private_t *dev_priv =
222 (drm_i830_private_t *) dev->dev_private; 224 (drm_i830_private_t *) dev->dev_private;
223 225
224 if (dev_priv->ring.virtual_start) { 226 if (dev_priv->ring.virtual_start) {
225 drm_ioremapfree((void *) dev_priv->ring.virtual_start, 227 drm_ioremapfree((void *)dev_priv->ring.virtual_start,
226 dev_priv->ring.Size, dev); 228 dev_priv->ring.Size, dev);
227 } 229 }
228 if (dev_priv->hw_status_page) { 230 if (dev_priv->hw_status_page) {
229 pci_free_consistent(dev->pdev, PAGE_SIZE, 231 pci_free_consistent(dev->pdev, PAGE_SIZE,
230 dev_priv->hw_status_page, 232 dev_priv->hw_status_page,
231 dev_priv->dma_status_page); 233 dev_priv->dma_status_page);
232 /* Need to rewrite hardware status page */ 234 /* Need to rewrite hardware status page */
233 I830_WRITE(0x02080, 0x1ffff000); 235 I830_WRITE(0x02080, 0x1ffff000);
234 } 236 }
235 237
236 drm_free(dev->dev_private, sizeof(drm_i830_private_t), 238 drm_free(dev->dev_private, sizeof(drm_i830_private_t),
237 DRM_MEM_DRIVER); 239 DRM_MEM_DRIVER);
238 dev->dev_private = NULL; 240 dev->dev_private = NULL;
239 241
240 for (i = 0; i < dma->buf_count; i++) { 242 for (i = 0; i < dma->buf_count; i++) {
241 drm_buf_t *buf = dma->buflist[ i ]; 243 drm_buf_t *buf = dma->buflist[i];
242 drm_i830_buf_priv_t *buf_priv = buf->dev_private; 244 drm_i830_buf_priv_t *buf_priv = buf->dev_private;
243 if ( buf_priv->kernel_virtual && buf->total ) 245 if (buf_priv->kernel_virtual && buf->total)
244 drm_ioremapfree(buf_priv->kernel_virtual, buf->total, dev); 246 drm_ioremapfree(buf_priv->kernel_virtual,
247 buf->total, dev);
245 } 248 }
246 } 249 }
247 return 0; 250 return 0;
248} 251}
249 252
250int i830_wait_ring(drm_device_t *dev, int n, const char *caller) 253int i830_wait_ring(drm_device_t * dev, int n, const char *caller)
251{ 254{
252 drm_i830_private_t *dev_priv = dev->dev_private; 255 drm_i830_private_t *dev_priv = dev->dev_private;
253 drm_i830_ring_buffer_t *ring = &(dev_priv->ring); 256 drm_i830_ring_buffer_t *ring = &(dev_priv->ring);
254 int iters = 0; 257 int iters = 0;
255 unsigned long end; 258 unsigned long end;
256 unsigned int last_head = I830_READ(LP_RING + RING_HEAD) & HEAD_ADDR; 259 unsigned int last_head = I830_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
257 260
258 end = jiffies + (HZ*3); 261 end = jiffies + (HZ * 3);
259 while (ring->space < n) { 262 while (ring->space < n) {
260 ring->head = I830_READ(LP_RING + RING_HEAD) & HEAD_ADDR; 263 ring->head = I830_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
261 ring->space = ring->head - (ring->tail+8); 264 ring->space = ring->head - (ring->tail + 8);
262 if (ring->space < 0) ring->space += ring->Size; 265 if (ring->space < 0)
263 266 ring->space += ring->Size;
267
264 if (ring->head != last_head) { 268 if (ring->head != last_head) {
265 end = jiffies + (HZ*3); 269 end = jiffies + (HZ * 3);
266 last_head = ring->head; 270 last_head = ring->head;
267 } 271 }
268 272
269 iters++; 273 iters++;
270 if(time_before(end, jiffies)) { 274 if (time_before(end, jiffies)) {
271 DRM_ERROR("space: %d wanted %d\n", ring->space, n); 275 DRM_ERROR("space: %d wanted %d\n", ring->space, n);
272 DRM_ERROR("lockup\n"); 276 DRM_ERROR("lockup\n");
273 goto out_wait_ring; 277 goto out_wait_ring;
274 } 278 }
275 udelay(1); 279 udelay(1);
276 dev_priv->sarea_priv->perf_boxes |= I830_BOX_WAIT; 280 dev_priv->sarea_priv->perf_boxes |= I830_BOX_WAIT;
277 } 281 }
278 282
279out_wait_ring: 283 out_wait_ring:
280 return iters; 284 return iters;
281} 285}
282 286
283static void i830_kernel_lost_context(drm_device_t *dev) 287static void i830_kernel_lost_context(drm_device_t * dev)
284{ 288{
285 drm_i830_private_t *dev_priv = dev->dev_private; 289 drm_i830_private_t *dev_priv = dev->dev_private;
286 drm_i830_ring_buffer_t *ring = &(dev_priv->ring); 290 drm_i830_ring_buffer_t *ring = &(dev_priv->ring);
287 291
288 ring->head = I830_READ(LP_RING + RING_HEAD) & HEAD_ADDR; 292 ring->head = I830_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
289 ring->tail = I830_READ(LP_RING + RING_TAIL) & TAIL_ADDR; 293 ring->tail = I830_READ(LP_RING + RING_TAIL) & TAIL_ADDR;
290 ring->space = ring->head - (ring->tail+8); 294 ring->space = ring->head - (ring->tail + 8);
291 if (ring->space < 0) ring->space += ring->Size; 295 if (ring->space < 0)
296 ring->space += ring->Size;
292 297
293 if (ring->head == ring->tail) 298 if (ring->head == ring->tail)
294 dev_priv->sarea_priv->perf_boxes |= I830_BOX_RING_EMPTY; 299 dev_priv->sarea_priv->perf_boxes |= I830_BOX_RING_EMPTY;
295} 300}
296 301
297static int i830_freelist_init(drm_device_t *dev, drm_i830_private_t *dev_priv) 302static int i830_freelist_init(drm_device_t * dev, drm_i830_private_t * dev_priv)
298{ 303{
299 drm_device_dma_t *dma = dev->dma; 304 drm_device_dma_t *dma = dev->dma;
300 int my_idx = 36; 305 int my_idx = 36;
301 u32 *hw_status = (u32 *)(dev_priv->hw_status_page + my_idx); 306 u32 *hw_status = (u32 *) (dev_priv->hw_status_page + my_idx);
302 int i; 307 int i;
303 308
304 if(dma->buf_count > 1019) { 309 if (dma->buf_count > 1019) {
305 /* Not enough space in the status page for the freelist */ 310 /* Not enough space in the status page for the freelist */
306 return -EINVAL; 311 return -EINVAL;
307 } 312 }
308 313
309 for (i = 0; i < dma->buf_count; i++) { 314 for (i = 0; i < dma->buf_count; i++) {
310 drm_buf_t *buf = dma->buflist[ i ]; 315 drm_buf_t *buf = dma->buflist[i];
311 drm_i830_buf_priv_t *buf_priv = buf->dev_private; 316 drm_i830_buf_priv_t *buf_priv = buf->dev_private;
312 317
313 buf_priv->in_use = hw_status++; 318 buf_priv->in_use = hw_status++;
314 buf_priv->my_use_idx = my_idx; 319 buf_priv->my_use_idx = my_idx;
315 my_idx += 4; 320 my_idx += 4;
316 321
317 *buf_priv->in_use = I830_BUF_FREE; 322 *buf_priv->in_use = I830_BUF_FREE;
318 323
319 buf_priv->kernel_virtual = drm_ioremap(buf->bus_address, 324 buf_priv->kernel_virtual = drm_ioremap(buf->bus_address,
320 buf->total, dev); 325 buf->total, dev);
321 } 326 }
322 return 0; 327 return 0;
323} 328}
324 329
325static int i830_dma_initialize(drm_device_t *dev, 330static int i830_dma_initialize(drm_device_t * dev,
326 drm_i830_private_t *dev_priv, 331 drm_i830_private_t * dev_priv,
327 drm_i830_init_t *init) 332 drm_i830_init_t * init)
328{ 333{
329 struct list_head *list; 334 struct list_head *list;
330 335
331 memset(dev_priv, 0, sizeof(drm_i830_private_t)); 336 memset(dev_priv, 0, sizeof(drm_i830_private_t));
332 337
333 list_for_each(list, &dev->maplist->head) { 338 list_for_each(list, &dev->maplist->head) {
334 drm_map_list_t *r_list = list_entry(list, drm_map_list_t, head); 339 drm_map_list_t *r_list = list_entry(list, drm_map_list_t, head);
335 if( r_list->map && 340 if (r_list->map &&
336 r_list->map->type == _DRM_SHM && 341 r_list->map->type == _DRM_SHM &&
337 r_list->map->flags & _DRM_CONTAINS_LOCK ) { 342 r_list->map->flags & _DRM_CONTAINS_LOCK) {
338 dev_priv->sarea_map = r_list->map; 343 dev_priv->sarea_map = r_list->map;
339 break; 344 break;
340 } 345 }
341 } 346 }
342 347
343 if(!dev_priv->sarea_map) { 348 if (!dev_priv->sarea_map) {
344 dev->dev_private = (void *)dev_priv; 349 dev->dev_private = (void *)dev_priv;
345 i830_dma_cleanup(dev); 350 i830_dma_cleanup(dev);
346 DRM_ERROR("can not find sarea!\n"); 351 DRM_ERROR("can not find sarea!\n");
347 return -EINVAL; 352 return -EINVAL;
348 } 353 }
349 dev_priv->mmio_map = drm_core_findmap(dev, init->mmio_offset); 354 dev_priv->mmio_map = drm_core_findmap(dev, init->mmio_offset);
350 if(!dev_priv->mmio_map) { 355 if (!dev_priv->mmio_map) {
351 dev->dev_private = (void *)dev_priv; 356 dev->dev_private = (void *)dev_priv;
352 i830_dma_cleanup(dev); 357 i830_dma_cleanup(dev);
353 DRM_ERROR("can not find mmio map!\n"); 358 DRM_ERROR("can not find mmio map!\n");
@@ -355,7 +360,7 @@ static int i830_dma_initialize(drm_device_t *dev,
355 } 360 }
356 dev->agp_buffer_token = init->buffers_offset; 361 dev->agp_buffer_token = init->buffers_offset;
357 dev->agp_buffer_map = drm_core_findmap(dev, init->buffers_offset); 362 dev->agp_buffer_map = drm_core_findmap(dev, init->buffers_offset);
358 if(!dev->agp_buffer_map) { 363 if (!dev->agp_buffer_map) {
359 dev->dev_private = (void *)dev_priv; 364 dev->dev_private = (void *)dev_priv;
360 i830_dma_cleanup(dev); 365 i830_dma_cleanup(dev);
361 DRM_ERROR("can not find dma buffer map!\n"); 366 DRM_ERROR("can not find dma buffer map!\n");
@@ -363,27 +368,26 @@ static int i830_dma_initialize(drm_device_t *dev,
363 } 368 }
364 369
365 dev_priv->sarea_priv = (drm_i830_sarea_t *) 370 dev_priv->sarea_priv = (drm_i830_sarea_t *)
366 ((u8 *)dev_priv->sarea_map->handle + 371 ((u8 *) dev_priv->sarea_map->handle + init->sarea_priv_offset);
367 init->sarea_priv_offset);
368 372
369 dev_priv->ring.Start = init->ring_start; 373 dev_priv->ring.Start = init->ring_start;
370 dev_priv->ring.End = init->ring_end; 374 dev_priv->ring.End = init->ring_end;
371 dev_priv->ring.Size = init->ring_size; 375 dev_priv->ring.Size = init->ring_size;
372 376
373 dev_priv->ring.virtual_start = drm_ioremap(dev->agp->base + 377 dev_priv->ring.virtual_start = drm_ioremap(dev->agp->base +
374 init->ring_start, 378 init->ring_start,
375 init->ring_size, dev); 379 init->ring_size, dev);
376 380
377 if (dev_priv->ring.virtual_start == NULL) { 381 if (dev_priv->ring.virtual_start == NULL) {
378 dev->dev_private = (void *) dev_priv; 382 dev->dev_private = (void *)dev_priv;
379 i830_dma_cleanup(dev); 383 i830_dma_cleanup(dev);
380 DRM_ERROR("can not ioremap virtual address for" 384 DRM_ERROR("can not ioremap virtual address for"
381 " ring buffer\n"); 385 " ring buffer\n");
382 return -ENOMEM; 386 return -ENOMEM;
383 } 387 }
384 388
385 dev_priv->ring.tail_mask = dev_priv->ring.Size - 1; 389 dev_priv->ring.tail_mask = dev_priv->ring.Size - 1;
386 390
387 dev_priv->w = init->w; 391 dev_priv->w = init->w;
388 dev_priv->h = init->h; 392 dev_priv->h = init->h;
389 dev_priv->pitch = init->pitch; 393 dev_priv->pitch = init->pitch;
@@ -395,10 +399,10 @@ static int i830_dma_initialize(drm_device_t *dev,
395 dev_priv->back_di1 = init->back_offset | init->pitch_bits; 399 dev_priv->back_di1 = init->back_offset | init->pitch_bits;
396 dev_priv->zi1 = init->depth_offset | init->pitch_bits; 400 dev_priv->zi1 = init->depth_offset | init->pitch_bits;
397 401
398 DRM_DEBUG("front_di1 %x\n", dev_priv->front_di1); 402 DRM_DEBUG("front_di1 %x\n", dev_priv->front_di1);
399 DRM_DEBUG("back_offset %x\n", dev_priv->back_offset); 403 DRM_DEBUG("back_offset %x\n", dev_priv->back_offset);
400 DRM_DEBUG("back_di1 %x\n", dev_priv->back_di1); 404 DRM_DEBUG("back_di1 %x\n", dev_priv->back_di1);
401 DRM_DEBUG("pitch_bits %x\n", init->pitch_bits); 405 DRM_DEBUG("pitch_bits %x\n", init->pitch_bits);
402 406
403 dev_priv->cpp = init->cpp; 407 dev_priv->cpp = init->cpp;
404 /* We are using separate values as placeholders for mechanisms for 408 /* We are using separate values as placeholders for mechanisms for
@@ -410,63 +414,64 @@ static int i830_dma_initialize(drm_device_t *dev,
410 dev_priv->do_boxes = 0; 414 dev_priv->do_boxes = 0;
411 dev_priv->use_mi_batchbuffer_start = 0; 415 dev_priv->use_mi_batchbuffer_start = 0;
412 416
413 /* Program Hardware Status Page */ 417 /* Program Hardware Status Page */
414 dev_priv->hw_status_page = 418 dev_priv->hw_status_page =
415 pci_alloc_consistent(dev->pdev, PAGE_SIZE, 419 pci_alloc_consistent(dev->pdev, PAGE_SIZE,
416 &dev_priv->dma_status_page); 420 &dev_priv->dma_status_page);
417 if (!dev_priv->hw_status_page) { 421 if (!dev_priv->hw_status_page) {
418 dev->dev_private = (void *)dev_priv; 422 dev->dev_private = (void *)dev_priv;
419 i830_dma_cleanup(dev); 423 i830_dma_cleanup(dev);
420 DRM_ERROR("Can not allocate hardware status page\n"); 424 DRM_ERROR("Can not allocate hardware status page\n");
421 return -ENOMEM; 425 return -ENOMEM;
422 } 426 }
423 memset(dev_priv->hw_status_page, 0, PAGE_SIZE); 427 memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
424 DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page); 428 DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
425 429
426 I830_WRITE(0x02080, dev_priv->dma_status_page); 430 I830_WRITE(0x02080, dev_priv->dma_status_page);
427 DRM_DEBUG("Enabled hardware status page\n"); 431 DRM_DEBUG("Enabled hardware status page\n");
428 432
429 /* Now we need to init our freelist */ 433 /* Now we need to init our freelist */
430 if(i830_freelist_init(dev, dev_priv) != 0) { 434 if (i830_freelist_init(dev, dev_priv) != 0) {
431 dev->dev_private = (void *)dev_priv; 435 dev->dev_private = (void *)dev_priv;
432 i830_dma_cleanup(dev); 436 i830_dma_cleanup(dev);
433 DRM_ERROR("Not enough space in the status page for" 437 DRM_ERROR("Not enough space in the status page for"
434 " the freelist\n"); 438 " the freelist\n");
435 return -ENOMEM; 439 return -ENOMEM;
436 } 440 }
437 dev->dev_private = (void *)dev_priv; 441 dev->dev_private = (void *)dev_priv;
438 442
439 return 0; 443 return 0;
440} 444}
441 445
442static int i830_dma_init(struct inode *inode, struct file *filp, 446static int i830_dma_init(struct inode *inode, struct file *filp,
443 unsigned int cmd, unsigned long arg) 447 unsigned int cmd, unsigned long arg)
444{ 448{
445 drm_file_t *priv = filp->private_data; 449 drm_file_t *priv = filp->private_data;
446 drm_device_t *dev = priv->head->dev; 450 drm_device_t *dev = priv->head->dev;
447 drm_i830_private_t *dev_priv; 451 drm_i830_private_t *dev_priv;
448 drm_i830_init_t init; 452 drm_i830_init_t init;
449 int retcode = 0; 453 int retcode = 0;
450 454
451 if (copy_from_user(&init, (void * __user) arg, sizeof(init))) 455 if (copy_from_user(&init, (void *__user)arg, sizeof(init)))
452 return -EFAULT; 456 return -EFAULT;
453 457
454 switch(init.func) { 458 switch (init.func) {
455 case I830_INIT_DMA: 459 case I830_INIT_DMA:
456 dev_priv = drm_alloc(sizeof(drm_i830_private_t), 460 dev_priv = drm_alloc(sizeof(drm_i830_private_t),
457 DRM_MEM_DRIVER); 461 DRM_MEM_DRIVER);
458 if(dev_priv == NULL) return -ENOMEM; 462 if (dev_priv == NULL)
459 retcode = i830_dma_initialize(dev, dev_priv, &init); 463 return -ENOMEM;
460 break; 464 retcode = i830_dma_initialize(dev, dev_priv, &init);
461 case I830_CLEANUP_DMA: 465 break;
462 retcode = i830_dma_cleanup(dev); 466 case I830_CLEANUP_DMA:
463 break; 467 retcode = i830_dma_cleanup(dev);
464 default: 468 break;
465 retcode = -EINVAL; 469 default:
466 break; 470 retcode = -EINVAL;
471 break;
467 } 472 }
468 473
469 return retcode; 474 return retcode;
470} 475}
471 476
472#define GFX_OP_STIPPLE ((0x3<<29)|(0x1d<<24)|(0x83<<16)) 477#define GFX_OP_STIPPLE ((0x3<<29)|(0x1d<<24)|(0x83<<16))
@@ -476,92 +481,89 @@ static int i830_dma_init(struct inode *inode, struct file *filp,
476/* Most efficient way to verify state for the i830 is as it is 481/* Most efficient way to verify state for the i830 is as it is
477 * emitted. Non-conformant state is silently dropped. 482 * emitted. Non-conformant state is silently dropped.
478 */ 483 */
479static void i830EmitContextVerified( drm_device_t *dev, 484static void i830EmitContextVerified(drm_device_t * dev, unsigned int *code)
480 unsigned int *code )
481{ 485{
482 drm_i830_private_t *dev_priv = dev->dev_private; 486 drm_i830_private_t *dev_priv = dev->dev_private;
483 int i, j = 0; 487 int i, j = 0;
484 unsigned int tmp; 488 unsigned int tmp;
485 RING_LOCALS; 489 RING_LOCALS;
486 490
487 BEGIN_LP_RING( I830_CTX_SETUP_SIZE + 4 ); 491 BEGIN_LP_RING(I830_CTX_SETUP_SIZE + 4);
488 492
489 for ( i = 0 ; i < I830_CTXREG_BLENDCOLR0 ; i++ ) { 493 for (i = 0; i < I830_CTXREG_BLENDCOLR0; i++) {
490 tmp = code[i]; 494 tmp = code[i];
491 if ((tmp & (7<<29)) == CMD_3D && 495 if ((tmp & (7 << 29)) == CMD_3D &&
492 (tmp & (0x1f<<24)) < (0x1d<<24)) { 496 (tmp & (0x1f << 24)) < (0x1d << 24)) {
493 OUT_RING( tmp ); 497 OUT_RING(tmp);
494 j++; 498 j++;
495 } else { 499 } else {
496 DRM_ERROR("Skipping %d\n", i); 500 DRM_ERROR("Skipping %d\n", i);
497 } 501 }
498 } 502 }
499 503
500 OUT_RING( STATE3D_CONST_BLEND_COLOR_CMD ); 504 OUT_RING(STATE3D_CONST_BLEND_COLOR_CMD);
501 OUT_RING( code[I830_CTXREG_BLENDCOLR] ); 505 OUT_RING(code[I830_CTXREG_BLENDCOLR]);
502 j += 2; 506 j += 2;
503 507
504 for ( i = I830_CTXREG_VF ; i < I830_CTXREG_MCSB0 ; i++ ) { 508 for (i = I830_CTXREG_VF; i < I830_CTXREG_MCSB0; i++) {
505 tmp = code[i]; 509 tmp = code[i];
506 if ((tmp & (7<<29)) == CMD_3D && 510 if ((tmp & (7 << 29)) == CMD_3D &&
507 (tmp & (0x1f<<24)) < (0x1d<<24)) { 511 (tmp & (0x1f << 24)) < (0x1d << 24)) {
508 OUT_RING( tmp ); 512 OUT_RING(tmp);
509 j++; 513 j++;
510 } else { 514 } else {
511 DRM_ERROR("Skipping %d\n", i); 515 DRM_ERROR("Skipping %d\n", i);
512 } 516 }
513 } 517 }
514 518
515 OUT_RING( STATE3D_MAP_COORD_SETBIND_CMD ); 519 OUT_RING(STATE3D_MAP_COORD_SETBIND_CMD);
516 OUT_RING( code[I830_CTXREG_MCSB1] ); 520 OUT_RING(code[I830_CTXREG_MCSB1]);
517 j += 2; 521 j += 2;
518 522
519 if (j & 1) 523 if (j & 1)
520 OUT_RING( 0 ); 524 OUT_RING(0);
521 525
522 ADVANCE_LP_RING(); 526 ADVANCE_LP_RING();
523} 527}
524 528
525static void i830EmitTexVerified( drm_device_t *dev, unsigned int *code ) 529static void i830EmitTexVerified(drm_device_t * dev, unsigned int *code)
526{ 530{
527 drm_i830_private_t *dev_priv = dev->dev_private; 531 drm_i830_private_t *dev_priv = dev->dev_private;
528 int i, j = 0; 532 int i, j = 0;
529 unsigned int tmp; 533 unsigned int tmp;
530 RING_LOCALS; 534 RING_LOCALS;
531 535
532 if (code[I830_TEXREG_MI0] == GFX_OP_MAP_INFO || 536 if (code[I830_TEXREG_MI0] == GFX_OP_MAP_INFO ||
533 (code[I830_TEXREG_MI0] & ~(0xf*LOAD_TEXTURE_MAP0)) == 537 (code[I830_TEXREG_MI0] & ~(0xf * LOAD_TEXTURE_MAP0)) ==
534 (STATE3D_LOAD_STATE_IMMEDIATE_2|4)) { 538 (STATE3D_LOAD_STATE_IMMEDIATE_2 | 4)) {
535 539
536 BEGIN_LP_RING( I830_TEX_SETUP_SIZE ); 540 BEGIN_LP_RING(I830_TEX_SETUP_SIZE);
537 541
538 OUT_RING( code[I830_TEXREG_MI0] ); /* TM0LI */ 542 OUT_RING(code[I830_TEXREG_MI0]); /* TM0LI */
539 OUT_RING( code[I830_TEXREG_MI1] ); /* TM0S0 */ 543 OUT_RING(code[I830_TEXREG_MI1]); /* TM0S0 */
540 OUT_RING( code[I830_TEXREG_MI2] ); /* TM0S1 */ 544 OUT_RING(code[I830_TEXREG_MI2]); /* TM0S1 */
541 OUT_RING( code[I830_TEXREG_MI3] ); /* TM0S2 */ 545 OUT_RING(code[I830_TEXREG_MI3]); /* TM0S2 */
542 OUT_RING( code[I830_TEXREG_MI4] ); /* TM0S3 */ 546 OUT_RING(code[I830_TEXREG_MI4]); /* TM0S3 */
543 OUT_RING( code[I830_TEXREG_MI5] ); /* TM0S4 */ 547 OUT_RING(code[I830_TEXREG_MI5]); /* TM0S4 */
544 548
545 for ( i = 6 ; i < I830_TEX_SETUP_SIZE ; i++ ) { 549 for (i = 6; i < I830_TEX_SETUP_SIZE; i++) {
546 tmp = code[i]; 550 tmp = code[i];
547 OUT_RING( tmp ); 551 OUT_RING(tmp);
548 j++; 552 j++;
549 } 553 }
550 554
551 if (j & 1) 555 if (j & 1)
552 OUT_RING( 0 ); 556 OUT_RING(0);
553 557
554 ADVANCE_LP_RING(); 558 ADVANCE_LP_RING();
555 } 559 } else
556 else
557 printk("rejected packet %x\n", code[0]); 560 printk("rejected packet %x\n", code[0]);
558} 561}
559 562
560static void i830EmitTexBlendVerified( drm_device_t *dev, 563static void i830EmitTexBlendVerified(drm_device_t * dev,
561 unsigned int *code, 564 unsigned int *code, unsigned int num)
562 unsigned int num)
563{ 565{
564 drm_i830_private_t *dev_priv = dev->dev_private; 566 drm_i830_private_t *dev_priv = dev->dev_private;
565 int i, j = 0; 567 int i, j = 0;
566 unsigned int tmp; 568 unsigned int tmp;
567 RING_LOCALS; 569 RING_LOCALS;
@@ -569,59 +571,54 @@ static void i830EmitTexBlendVerified( drm_device_t *dev,
569 if (!num) 571 if (!num)
570 return; 572 return;
571 573
572 BEGIN_LP_RING( num + 1 ); 574 BEGIN_LP_RING(num + 1);
573 575
574 for ( i = 0 ; i < num ; i++ ) { 576 for (i = 0; i < num; i++) {
575 tmp = code[i]; 577 tmp = code[i];
576 OUT_RING( tmp ); 578 OUT_RING(tmp);
577 j++; 579 j++;
578 } 580 }
579 581
580 if (j & 1) 582 if (j & 1)
581 OUT_RING( 0 ); 583 OUT_RING(0);
582 584
583 ADVANCE_LP_RING(); 585 ADVANCE_LP_RING();
584} 586}
585 587
586static void i830EmitTexPalette( drm_device_t *dev, 588static void i830EmitTexPalette(drm_device_t * dev,
587 unsigned int *palette, 589 unsigned int *palette, int number, int is_shared)
588 int number,
589 int is_shared )
590{ 590{
591 drm_i830_private_t *dev_priv = dev->dev_private; 591 drm_i830_private_t *dev_priv = dev->dev_private;
592 int i; 592 int i;
593 RING_LOCALS; 593 RING_LOCALS;
594 594
595 return; 595 return;
596 596
597 BEGIN_LP_RING( 258 ); 597 BEGIN_LP_RING(258);
598 598
599 if(is_shared == 1) { 599 if (is_shared == 1) {
600 OUT_RING(CMD_OP_MAP_PALETTE_LOAD | 600 OUT_RING(CMD_OP_MAP_PALETTE_LOAD |
601 MAP_PALETTE_NUM(0) | 601 MAP_PALETTE_NUM(0) | MAP_PALETTE_BOTH);
602 MAP_PALETTE_BOTH);
603 } else { 602 } else {
604 OUT_RING(CMD_OP_MAP_PALETTE_LOAD | MAP_PALETTE_NUM(number)); 603 OUT_RING(CMD_OP_MAP_PALETTE_LOAD | MAP_PALETTE_NUM(number));
605 } 604 }
606 for(i = 0; i < 256; i++) { 605 for (i = 0; i < 256; i++) {
607 OUT_RING(palette[i]); 606 OUT_RING(palette[i]);
608 } 607 }
609 OUT_RING(0); 608 OUT_RING(0);
610 /* KW: WHERE IS THE ADVANCE_LP_RING? This is effectively a noop! 609 /* KW: WHERE IS THE ADVANCE_LP_RING? This is effectively a noop!
611 */ 610 */
612} 611}
613 612
614/* Need to do some additional checking when setting the dest buffer. 613/* Need to do some additional checking when setting the dest buffer.
615 */ 614 */
616static void i830EmitDestVerified( drm_device_t *dev, 615static void i830EmitDestVerified(drm_device_t * dev, unsigned int *code)
617 unsigned int *code ) 616{
618{ 617 drm_i830_private_t *dev_priv = dev->dev_private;
619 drm_i830_private_t *dev_priv = dev->dev_private;
620 unsigned int tmp; 618 unsigned int tmp;
621 RING_LOCALS; 619 RING_LOCALS;
622 620
623 BEGIN_LP_RING( I830_DEST_SETUP_SIZE + 10 ); 621 BEGIN_LP_RING(I830_DEST_SETUP_SIZE + 10);
624
625 622
626 tmp = code[I830_DESTREG_CBUFADDR]; 623 tmp = code[I830_DESTREG_CBUFADDR];
627 if (tmp == dev_priv->front_di1 || tmp == dev_priv->back_di1) { 624 if (tmp == dev_priv->front_di1 || tmp == dev_priv->back_di1) {
@@ -630,18 +627,18 @@ static void i830EmitDestVerified( drm_device_t *dev,
630 OUT_RING(0); 627 OUT_RING(0);
631 } 628 }
632 629
633 OUT_RING( CMD_OP_DESTBUFFER_INFO ); 630 OUT_RING(CMD_OP_DESTBUFFER_INFO);
634 OUT_RING( BUF_3D_ID_COLOR_BACK | 631 OUT_RING(BUF_3D_ID_COLOR_BACK |
635 BUF_3D_PITCH(dev_priv->back_pitch * dev_priv->cpp) | 632 BUF_3D_PITCH(dev_priv->back_pitch * dev_priv->cpp) |
636 BUF_3D_USE_FENCE); 633 BUF_3D_USE_FENCE);
637 OUT_RING( tmp ); 634 OUT_RING(tmp);
638 OUT_RING( 0 ); 635 OUT_RING(0);
639 636
640 OUT_RING( CMD_OP_DESTBUFFER_INFO ); 637 OUT_RING(CMD_OP_DESTBUFFER_INFO);
641 OUT_RING( BUF_3D_ID_DEPTH | BUF_3D_USE_FENCE | 638 OUT_RING(BUF_3D_ID_DEPTH | BUF_3D_USE_FENCE |
642 BUF_3D_PITCH(dev_priv->depth_pitch * dev_priv->cpp)); 639 BUF_3D_PITCH(dev_priv->depth_pitch * dev_priv->cpp));
643 OUT_RING( dev_priv->zi1 ); 640 OUT_RING(dev_priv->zi1);
644 OUT_RING( 0 ); 641 OUT_RING(0);
645 } else { 642 } else {
646 DRM_ERROR("bad di1 %x (allow %x or %x)\n", 643 DRM_ERROR("bad di1 %x (allow %x or %x)\n",
647 tmp, dev_priv->front_di1, dev_priv->back_di1); 644 tmp, dev_priv->front_di1, dev_priv->back_di1);
@@ -650,83 +647,80 @@ static void i830EmitDestVerified( drm_device_t *dev,
650 /* invarient: 647 /* invarient:
651 */ 648 */
652 649
650 OUT_RING(GFX_OP_DESTBUFFER_VARS);
651 OUT_RING(code[I830_DESTREG_DV1]);
653 652
654 OUT_RING( GFX_OP_DESTBUFFER_VARS ); 653 OUT_RING(GFX_OP_DRAWRECT_INFO);
655 OUT_RING( code[I830_DESTREG_DV1] ); 654 OUT_RING(code[I830_DESTREG_DR1]);
656 655 OUT_RING(code[I830_DESTREG_DR2]);
657 OUT_RING( GFX_OP_DRAWRECT_INFO ); 656 OUT_RING(code[I830_DESTREG_DR3]);
658 OUT_RING( code[I830_DESTREG_DR1] ); 657 OUT_RING(code[I830_DESTREG_DR4]);
659 OUT_RING( code[I830_DESTREG_DR2] );
660 OUT_RING( code[I830_DESTREG_DR3] );
661 OUT_RING( code[I830_DESTREG_DR4] );
662 658
663 /* Need to verify this */ 659 /* Need to verify this */
664 tmp = code[I830_DESTREG_SENABLE]; 660 tmp = code[I830_DESTREG_SENABLE];
665 if((tmp & ~0x3) == GFX_OP_SCISSOR_ENABLE) { 661 if ((tmp & ~0x3) == GFX_OP_SCISSOR_ENABLE) {
666 OUT_RING( tmp ); 662 OUT_RING(tmp);
667 } else { 663 } else {
668 DRM_ERROR("bad scissor enable\n"); 664 DRM_ERROR("bad scissor enable\n");
669 OUT_RING( 0 ); 665 OUT_RING(0);
670 } 666 }
671 667
672 OUT_RING( GFX_OP_SCISSOR_RECT ); 668 OUT_RING(GFX_OP_SCISSOR_RECT);
673 OUT_RING( code[I830_DESTREG_SR1] ); 669 OUT_RING(code[I830_DESTREG_SR1]);
674 OUT_RING( code[I830_DESTREG_SR2] ); 670 OUT_RING(code[I830_DESTREG_SR2]);
675 OUT_RING( 0 ); 671 OUT_RING(0);
676 672
677 ADVANCE_LP_RING(); 673 ADVANCE_LP_RING();
678} 674}
679 675
680static void i830EmitStippleVerified( drm_device_t *dev, 676static void i830EmitStippleVerified(drm_device_t * dev, unsigned int *code)
681 unsigned int *code )
682{ 677{
683 drm_i830_private_t *dev_priv = dev->dev_private; 678 drm_i830_private_t *dev_priv = dev->dev_private;
684 RING_LOCALS; 679 RING_LOCALS;
685 680
686 BEGIN_LP_RING( 2 ); 681 BEGIN_LP_RING(2);
687 OUT_RING( GFX_OP_STIPPLE ); 682 OUT_RING(GFX_OP_STIPPLE);
688 OUT_RING( code[1] ); 683 OUT_RING(code[1]);
689 ADVANCE_LP_RING(); 684 ADVANCE_LP_RING();
690} 685}
691 686
692 687static void i830EmitState(drm_device_t * dev)
693static void i830EmitState( drm_device_t *dev )
694{ 688{
695 drm_i830_private_t *dev_priv = dev->dev_private; 689 drm_i830_private_t *dev_priv = dev->dev_private;
696 drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv; 690 drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv;
697 unsigned int dirty = sarea_priv->dirty; 691 unsigned int dirty = sarea_priv->dirty;
698 692
699 DRM_DEBUG("%s %x\n", __FUNCTION__, dirty); 693 DRM_DEBUG("%s %x\n", __FUNCTION__, dirty);
700 694
701 if (dirty & I830_UPLOAD_BUFFERS) { 695 if (dirty & I830_UPLOAD_BUFFERS) {
702 i830EmitDestVerified( dev, sarea_priv->BufferState ); 696 i830EmitDestVerified(dev, sarea_priv->BufferState);
703 sarea_priv->dirty &= ~I830_UPLOAD_BUFFERS; 697 sarea_priv->dirty &= ~I830_UPLOAD_BUFFERS;
704 } 698 }
705 699
706 if (dirty & I830_UPLOAD_CTX) { 700 if (dirty & I830_UPLOAD_CTX) {
707 i830EmitContextVerified( dev, sarea_priv->ContextState ); 701 i830EmitContextVerified(dev, sarea_priv->ContextState);
708 sarea_priv->dirty &= ~I830_UPLOAD_CTX; 702 sarea_priv->dirty &= ~I830_UPLOAD_CTX;
709 } 703 }
710 704
711 if (dirty & I830_UPLOAD_TEX0) { 705 if (dirty & I830_UPLOAD_TEX0) {
712 i830EmitTexVerified( dev, sarea_priv->TexState[0] ); 706 i830EmitTexVerified(dev, sarea_priv->TexState[0]);
713 sarea_priv->dirty &= ~I830_UPLOAD_TEX0; 707 sarea_priv->dirty &= ~I830_UPLOAD_TEX0;
714 } 708 }
715 709
716 if (dirty & I830_UPLOAD_TEX1) { 710 if (dirty & I830_UPLOAD_TEX1) {
717 i830EmitTexVerified( dev, sarea_priv->TexState[1] ); 711 i830EmitTexVerified(dev, sarea_priv->TexState[1]);
718 sarea_priv->dirty &= ~I830_UPLOAD_TEX1; 712 sarea_priv->dirty &= ~I830_UPLOAD_TEX1;
719 } 713 }
720 714
721 if (dirty & I830_UPLOAD_TEXBLEND0) { 715 if (dirty & I830_UPLOAD_TEXBLEND0) {
722 i830EmitTexBlendVerified( dev, sarea_priv->TexBlendState[0], 716 i830EmitTexBlendVerified(dev, sarea_priv->TexBlendState[0],
723 sarea_priv->TexBlendStateWordsUsed[0]); 717 sarea_priv->TexBlendStateWordsUsed[0]);
724 sarea_priv->dirty &= ~I830_UPLOAD_TEXBLEND0; 718 sarea_priv->dirty &= ~I830_UPLOAD_TEXBLEND0;
725 } 719 }
726 720
727 if (dirty & I830_UPLOAD_TEXBLEND1) { 721 if (dirty & I830_UPLOAD_TEXBLEND1) {
728 i830EmitTexBlendVerified( dev, sarea_priv->TexBlendState[1], 722 i830EmitTexBlendVerified(dev, sarea_priv->TexBlendState[1],
729 sarea_priv->TexBlendStateWordsUsed[1]); 723 sarea_priv->TexBlendStateWordsUsed[1]);
730 sarea_priv->dirty &= ~I830_UPLOAD_TEXBLEND1; 724 sarea_priv->dirty &= ~I830_UPLOAD_TEXBLEND1;
731 } 725 }
732 726
@@ -759,36 +753,32 @@ static void i830EmitState( drm_device_t *dev )
759 /* 1.3: 753 /* 1.3:
760 */ 754 */
761 if (dirty & I830_UPLOAD_STIPPLE) { 755 if (dirty & I830_UPLOAD_STIPPLE) {
762 i830EmitStippleVerified( dev, 756 i830EmitStippleVerified(dev, sarea_priv->StippleState);
763 sarea_priv->StippleState);
764 sarea_priv->dirty &= ~I830_UPLOAD_STIPPLE; 757 sarea_priv->dirty &= ~I830_UPLOAD_STIPPLE;
765 } 758 }
766 759
767 if (dirty & I830_UPLOAD_TEX2) { 760 if (dirty & I830_UPLOAD_TEX2) {
768 i830EmitTexVerified( dev, sarea_priv->TexState2 ); 761 i830EmitTexVerified(dev, sarea_priv->TexState2);
769 sarea_priv->dirty &= ~I830_UPLOAD_TEX2; 762 sarea_priv->dirty &= ~I830_UPLOAD_TEX2;
770 } 763 }
771 764
772 if (dirty & I830_UPLOAD_TEX3) { 765 if (dirty & I830_UPLOAD_TEX3) {
773 i830EmitTexVerified( dev, sarea_priv->TexState3 ); 766 i830EmitTexVerified(dev, sarea_priv->TexState3);
774 sarea_priv->dirty &= ~I830_UPLOAD_TEX3; 767 sarea_priv->dirty &= ~I830_UPLOAD_TEX3;
775 } 768 }
776 769
777
778 if (dirty & I830_UPLOAD_TEXBLEND2) { 770 if (dirty & I830_UPLOAD_TEXBLEND2) {
779 i830EmitTexBlendVerified( 771 i830EmitTexBlendVerified(dev,
780 dev, 772 sarea_priv->TexBlendState2,
781 sarea_priv->TexBlendState2, 773 sarea_priv->TexBlendStateWordsUsed2);
782 sarea_priv->TexBlendStateWordsUsed2);
783 774
784 sarea_priv->dirty &= ~I830_UPLOAD_TEXBLEND2; 775 sarea_priv->dirty &= ~I830_UPLOAD_TEXBLEND2;
785 } 776 }
786 777
787 if (dirty & I830_UPLOAD_TEXBLEND3) { 778 if (dirty & I830_UPLOAD_TEXBLEND3) {
788 i830EmitTexBlendVerified( 779 i830EmitTexBlendVerified(dev,
789 dev, 780 sarea_priv->TexBlendState3,
790 sarea_priv->TexBlendState3, 781 sarea_priv->TexBlendStateWordsUsed3);
791 sarea_priv->TexBlendStateWordsUsed3);
792 sarea_priv->dirty &= ~I830_UPLOAD_TEXBLEND3; 782 sarea_priv->dirty &= ~I830_UPLOAD_TEXBLEND3;
793 } 783 }
794} 784}
@@ -797,97 +787,96 @@ static void i830EmitState( drm_device_t *dev )
797 * Performance monitoring functions 787 * Performance monitoring functions
798 */ 788 */
799 789
800static void i830_fill_box( drm_device_t *dev, 790static void i830_fill_box(drm_device_t * dev,
801 int x, int y, int w, int h, 791 int x, int y, int w, int h, int r, int g, int b)
802 int r, int g, int b )
803{ 792{
804 drm_i830_private_t *dev_priv = dev->dev_private; 793 drm_i830_private_t *dev_priv = dev->dev_private;
805 u32 color; 794 u32 color;
806 unsigned int BR13, CMD; 795 unsigned int BR13, CMD;
807 RING_LOCALS; 796 RING_LOCALS;
808 797
809 BR13 = (0xF0 << 16) | (dev_priv->pitch * dev_priv->cpp) | (1<<24); 798 BR13 = (0xF0 << 16) | (dev_priv->pitch * dev_priv->cpp) | (1 << 24);
810 CMD = XY_COLOR_BLT_CMD; 799 CMD = XY_COLOR_BLT_CMD;
811 x += dev_priv->sarea_priv->boxes[0].x1; 800 x += dev_priv->sarea_priv->boxes[0].x1;
812 y += dev_priv->sarea_priv->boxes[0].y1; 801 y += dev_priv->sarea_priv->boxes[0].y1;
813 802
814 if (dev_priv->cpp == 4) { 803 if (dev_priv->cpp == 4) {
815 BR13 |= (1<<25); 804 BR13 |= (1 << 25);
816 CMD |= (XY_COLOR_BLT_WRITE_ALPHA | XY_COLOR_BLT_WRITE_RGB); 805 CMD |= (XY_COLOR_BLT_WRITE_ALPHA | XY_COLOR_BLT_WRITE_RGB);
817 color = (((0xff) << 24) | (r << 16) | (g << 8) | b); 806 color = (((0xff) << 24) | (r << 16) | (g << 8) | b);
818 } else { 807 } else {
819 color = (((r & 0xf8) << 8) | 808 color = (((r & 0xf8) << 8) |
820 ((g & 0xfc) << 3) | 809 ((g & 0xfc) << 3) | ((b & 0xf8) >> 3));
821 ((b & 0xf8) >> 3));
822 } 810 }
823 811
824 BEGIN_LP_RING( 6 ); 812 BEGIN_LP_RING(6);
825 OUT_RING( CMD ); 813 OUT_RING(CMD);
826 OUT_RING( BR13 ); 814 OUT_RING(BR13);
827 OUT_RING( (y << 16) | x ); 815 OUT_RING((y << 16) | x);
828 OUT_RING( ((y+h) << 16) | (x+w) ); 816 OUT_RING(((y + h) << 16) | (x + w));
829 817
830 if ( dev_priv->current_page == 1 ) { 818 if (dev_priv->current_page == 1) {
831 OUT_RING( dev_priv->front_offset ); 819 OUT_RING(dev_priv->front_offset);
832 } else { 820 } else {
833 OUT_RING( dev_priv->back_offset ); 821 OUT_RING(dev_priv->back_offset);
834 } 822 }
835 823
836 OUT_RING( color ); 824 OUT_RING(color);
837 ADVANCE_LP_RING(); 825 ADVANCE_LP_RING();
838} 826}
839 827
840static void i830_cp_performance_boxes( drm_device_t *dev ) 828static void i830_cp_performance_boxes(drm_device_t * dev)
841{ 829{
842 drm_i830_private_t *dev_priv = dev->dev_private; 830 drm_i830_private_t *dev_priv = dev->dev_private;
843 831
844 /* Purple box for page flipping 832 /* Purple box for page flipping
845 */ 833 */
846 if ( dev_priv->sarea_priv->perf_boxes & I830_BOX_FLIP ) 834 if (dev_priv->sarea_priv->perf_boxes & I830_BOX_FLIP)
847 i830_fill_box( dev, 4, 4, 8, 8, 255, 0, 255 ); 835 i830_fill_box(dev, 4, 4, 8, 8, 255, 0, 255);
848 836
849 /* Red box if we have to wait for idle at any point 837 /* Red box if we have to wait for idle at any point
850 */ 838 */
851 if ( dev_priv->sarea_priv->perf_boxes & I830_BOX_WAIT ) 839 if (dev_priv->sarea_priv->perf_boxes & I830_BOX_WAIT)
852 i830_fill_box( dev, 16, 4, 8, 8, 255, 0, 0 ); 840 i830_fill_box(dev, 16, 4, 8, 8, 255, 0, 0);
853 841
854 /* Blue box: lost context? 842 /* Blue box: lost context?
855 */ 843 */
856 if ( dev_priv->sarea_priv->perf_boxes & I830_BOX_LOST_CONTEXT ) 844 if (dev_priv->sarea_priv->perf_boxes & I830_BOX_LOST_CONTEXT)
857 i830_fill_box( dev, 28, 4, 8, 8, 0, 0, 255 ); 845 i830_fill_box(dev, 28, 4, 8, 8, 0, 0, 255);
858 846
859 /* Yellow box for texture swaps 847 /* Yellow box for texture swaps
860 */ 848 */
861 if ( dev_priv->sarea_priv->perf_boxes & I830_BOX_TEXTURE_LOAD ) 849 if (dev_priv->sarea_priv->perf_boxes & I830_BOX_TEXTURE_LOAD)
862 i830_fill_box( dev, 40, 4, 8, 8, 255, 255, 0 ); 850 i830_fill_box(dev, 40, 4, 8, 8, 255, 255, 0);
863 851
864 /* Green box if hardware never idles (as far as we can tell) 852 /* Green box if hardware never idles (as far as we can tell)
865 */ 853 */
866 if ( !(dev_priv->sarea_priv->perf_boxes & I830_BOX_RING_EMPTY) ) 854 if (!(dev_priv->sarea_priv->perf_boxes & I830_BOX_RING_EMPTY))
867 i830_fill_box( dev, 64, 4, 8, 8, 0, 255, 0 ); 855 i830_fill_box(dev, 64, 4, 8, 8, 0, 255, 0);
868
869 856
870 /* Draw bars indicating number of buffers allocated 857 /* Draw bars indicating number of buffers allocated
871 * (not a great measure, easily confused) 858 * (not a great measure, easily confused)
872 */ 859 */
873 if (dev_priv->dma_used) { 860 if (dev_priv->dma_used) {
874 int bar = dev_priv->dma_used / 10240; 861 int bar = dev_priv->dma_used / 10240;
875 if (bar > 100) bar = 100; 862 if (bar > 100)
876 if (bar < 1) bar = 1; 863 bar = 100;
877 i830_fill_box( dev, 4, 16, bar, 4, 196, 128, 128 ); 864 if (bar < 1)
865 bar = 1;
866 i830_fill_box(dev, 4, 16, bar, 4, 196, 128, 128);
878 dev_priv->dma_used = 0; 867 dev_priv->dma_used = 0;
879 } 868 }
880 869
881 dev_priv->sarea_priv->perf_boxes = 0; 870 dev_priv->sarea_priv->perf_boxes = 0;
882} 871}
883 872
884static void i830_dma_dispatch_clear( drm_device_t *dev, int flags, 873static void i830_dma_dispatch_clear(drm_device_t * dev, int flags,
885 unsigned int clear_color, 874 unsigned int clear_color,
886 unsigned int clear_zval, 875 unsigned int clear_zval,
887 unsigned int clear_depthmask) 876 unsigned int clear_depthmask)
888{ 877{
889 drm_i830_private_t *dev_priv = dev->dev_private; 878 drm_i830_private_t *dev_priv = dev->dev_private;
890 drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv; 879 drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv;
891 int nbox = sarea_priv->nbox; 880 int nbox = sarea_priv->nbox;
892 drm_clip_rect_t *pbox = sarea_priv->boxes; 881 drm_clip_rect_t *pbox = sarea_priv->boxes;
893 int pitch = dev_priv->pitch; 882 int pitch = dev_priv->pitch;
@@ -896,90 +885,90 @@ static void i830_dma_dispatch_clear( drm_device_t *dev, int flags,
896 unsigned int BR13, CMD, D_CMD; 885 unsigned int BR13, CMD, D_CMD;
897 RING_LOCALS; 886 RING_LOCALS;
898 887
899 888 if (dev_priv->current_page == 1) {
900 if ( dev_priv->current_page == 1 ) {
901 unsigned int tmp = flags; 889 unsigned int tmp = flags;
902 890
903 flags &= ~(I830_FRONT | I830_BACK); 891 flags &= ~(I830_FRONT | I830_BACK);
904 if ( tmp & I830_FRONT ) flags |= I830_BACK; 892 if (tmp & I830_FRONT)
905 if ( tmp & I830_BACK ) flags |= I830_FRONT; 893 flags |= I830_BACK;
894 if (tmp & I830_BACK)
895 flags |= I830_FRONT;
906 } 896 }
907 897
908 i830_kernel_lost_context(dev); 898 i830_kernel_lost_context(dev);
909 899
910 switch(cpp) { 900 switch (cpp) {
911 case 2: 901 case 2:
912 BR13 = (0xF0 << 16) | (pitch * cpp) | (1<<24); 902 BR13 = (0xF0 << 16) | (pitch * cpp) | (1 << 24);
913 D_CMD = CMD = XY_COLOR_BLT_CMD; 903 D_CMD = CMD = XY_COLOR_BLT_CMD;
914 break; 904 break;
915 case 4: 905 case 4:
916 BR13 = (0xF0 << 16) | (pitch * cpp) | (1<<24) | (1<<25); 906 BR13 = (0xF0 << 16) | (pitch * cpp) | (1 << 24) | (1 << 25);
917 CMD = (XY_COLOR_BLT_CMD | XY_COLOR_BLT_WRITE_ALPHA | 907 CMD = (XY_COLOR_BLT_CMD | XY_COLOR_BLT_WRITE_ALPHA |
918 XY_COLOR_BLT_WRITE_RGB); 908 XY_COLOR_BLT_WRITE_RGB);
919 D_CMD = XY_COLOR_BLT_CMD; 909 D_CMD = XY_COLOR_BLT_CMD;
920 if(clear_depthmask & 0x00ffffff) 910 if (clear_depthmask & 0x00ffffff)
921 D_CMD |= XY_COLOR_BLT_WRITE_RGB; 911 D_CMD |= XY_COLOR_BLT_WRITE_RGB;
922 if(clear_depthmask & 0xff000000) 912 if (clear_depthmask & 0xff000000)
923 D_CMD |= XY_COLOR_BLT_WRITE_ALPHA; 913 D_CMD |= XY_COLOR_BLT_WRITE_ALPHA;
924 break; 914 break;
925 default: 915 default:
926 BR13 = (0xF0 << 16) | (pitch * cpp) | (1<<24); 916 BR13 = (0xF0 << 16) | (pitch * cpp) | (1 << 24);
927 D_CMD = CMD = XY_COLOR_BLT_CMD; 917 D_CMD = CMD = XY_COLOR_BLT_CMD;
928 break; 918 break;
929 } 919 }
930 920
931 if (nbox > I830_NR_SAREA_CLIPRECTS) 921 if (nbox > I830_NR_SAREA_CLIPRECTS)
932 nbox = I830_NR_SAREA_CLIPRECTS; 922 nbox = I830_NR_SAREA_CLIPRECTS;
933 923
934 for (i = 0 ; i < nbox ; i++, pbox++) { 924 for (i = 0; i < nbox; i++, pbox++) {
935 if (pbox->x1 > pbox->x2 || 925 if (pbox->x1 > pbox->x2 ||
936 pbox->y1 > pbox->y2 || 926 pbox->y1 > pbox->y2 ||
937 pbox->x2 > dev_priv->w || 927 pbox->x2 > dev_priv->w || pbox->y2 > dev_priv->h)
938 pbox->y2 > dev_priv->h)
939 continue; 928 continue;
940 929
941 if ( flags & I830_FRONT ) { 930 if (flags & I830_FRONT) {
942 DRM_DEBUG("clear front\n"); 931 DRM_DEBUG("clear front\n");
943 BEGIN_LP_RING( 6 ); 932 BEGIN_LP_RING(6);
944 OUT_RING( CMD ); 933 OUT_RING(CMD);
945 OUT_RING( BR13 ); 934 OUT_RING(BR13);
946 OUT_RING( (pbox->y1 << 16) | pbox->x1 ); 935 OUT_RING((pbox->y1 << 16) | pbox->x1);
947 OUT_RING( (pbox->y2 << 16) | pbox->x2 ); 936 OUT_RING((pbox->y2 << 16) | pbox->x2);
948 OUT_RING( dev_priv->front_offset ); 937 OUT_RING(dev_priv->front_offset);
949 OUT_RING( clear_color ); 938 OUT_RING(clear_color);
950 ADVANCE_LP_RING(); 939 ADVANCE_LP_RING();
951 } 940 }
952 941
953 if ( flags & I830_BACK ) { 942 if (flags & I830_BACK) {
954 DRM_DEBUG("clear back\n"); 943 DRM_DEBUG("clear back\n");
955 BEGIN_LP_RING( 6 ); 944 BEGIN_LP_RING(6);
956 OUT_RING( CMD ); 945 OUT_RING(CMD);
957 OUT_RING( BR13 ); 946 OUT_RING(BR13);
958 OUT_RING( (pbox->y1 << 16) | pbox->x1 ); 947 OUT_RING((pbox->y1 << 16) | pbox->x1);
959 OUT_RING( (pbox->y2 << 16) | pbox->x2 ); 948 OUT_RING((pbox->y2 << 16) | pbox->x2);
960 OUT_RING( dev_priv->back_offset ); 949 OUT_RING(dev_priv->back_offset);
961 OUT_RING( clear_color ); 950 OUT_RING(clear_color);
962 ADVANCE_LP_RING(); 951 ADVANCE_LP_RING();
963 } 952 }
964 953
965 if ( flags & I830_DEPTH ) { 954 if (flags & I830_DEPTH) {
966 DRM_DEBUG("clear depth\n"); 955 DRM_DEBUG("clear depth\n");
967 BEGIN_LP_RING( 6 ); 956 BEGIN_LP_RING(6);
968 OUT_RING( D_CMD ); 957 OUT_RING(D_CMD);
969 OUT_RING( BR13 ); 958 OUT_RING(BR13);
970 OUT_RING( (pbox->y1 << 16) | pbox->x1 ); 959 OUT_RING((pbox->y1 << 16) | pbox->x1);
971 OUT_RING( (pbox->y2 << 16) | pbox->x2 ); 960 OUT_RING((pbox->y2 << 16) | pbox->x2);
972 OUT_RING( dev_priv->depth_offset ); 961 OUT_RING(dev_priv->depth_offset);
973 OUT_RING( clear_zval ); 962 OUT_RING(clear_zval);
974 ADVANCE_LP_RING(); 963 ADVANCE_LP_RING();
975 } 964 }
976 } 965 }
977} 966}
978 967
979static void i830_dma_dispatch_swap( drm_device_t *dev ) 968static void i830_dma_dispatch_swap(drm_device_t * dev)
980{ 969{
981 drm_i830_private_t *dev_priv = dev->dev_private; 970 drm_i830_private_t *dev_priv = dev->dev_private;
982 drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv; 971 drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv;
983 int nbox = sarea_priv->nbox; 972 int nbox = sarea_priv->nbox;
984 drm_clip_rect_t *pbox = sarea_priv->boxes; 973 drm_clip_rect_t *pbox = sarea_priv->boxes;
985 int pitch = dev_priv->pitch; 974 int pitch = dev_priv->pitch;
@@ -990,202 +979,192 @@ static void i830_dma_dispatch_swap( drm_device_t *dev )
990 979
991 DRM_DEBUG("swapbuffers\n"); 980 DRM_DEBUG("swapbuffers\n");
992 981
993 i830_kernel_lost_context(dev); 982 i830_kernel_lost_context(dev);
994 983
995 if (dev_priv->do_boxes) 984 if (dev_priv->do_boxes)
996 i830_cp_performance_boxes( dev ); 985 i830_cp_performance_boxes(dev);
997 986
998 switch(cpp) { 987 switch (cpp) {
999 case 2: 988 case 2:
1000 BR13 = (pitch * cpp) | (0xCC << 16) | (1<<24); 989 BR13 = (pitch * cpp) | (0xCC << 16) | (1 << 24);
1001 CMD = XY_SRC_COPY_BLT_CMD; 990 CMD = XY_SRC_COPY_BLT_CMD;
1002 break; 991 break;
1003 case 4: 992 case 4:
1004 BR13 = (pitch * cpp) | (0xCC << 16) | (1<<24) | (1<<25); 993 BR13 = (pitch * cpp) | (0xCC << 16) | (1 << 24) | (1 << 25);
1005 CMD = (XY_SRC_COPY_BLT_CMD | XY_SRC_COPY_BLT_WRITE_ALPHA | 994 CMD = (XY_SRC_COPY_BLT_CMD | XY_SRC_COPY_BLT_WRITE_ALPHA |
1006 XY_SRC_COPY_BLT_WRITE_RGB); 995 XY_SRC_COPY_BLT_WRITE_RGB);
1007 break; 996 break;
1008 default: 997 default:
1009 BR13 = (pitch * cpp) | (0xCC << 16) | (1<<24); 998 BR13 = (pitch * cpp) | (0xCC << 16) | (1 << 24);
1010 CMD = XY_SRC_COPY_BLT_CMD; 999 CMD = XY_SRC_COPY_BLT_CMD;
1011 break; 1000 break;
1012 } 1001 }
1013 1002
1003 if (nbox > I830_NR_SAREA_CLIPRECTS)
1004 nbox = I830_NR_SAREA_CLIPRECTS;
1014 1005
1015 if (nbox > I830_NR_SAREA_CLIPRECTS) 1006 for (i = 0; i < nbox; i++, pbox++) {
1016 nbox = I830_NR_SAREA_CLIPRECTS;
1017
1018 for (i = 0 ; i < nbox; i++, pbox++)
1019 {
1020 if (pbox->x1 > pbox->x2 || 1007 if (pbox->x1 > pbox->x2 ||
1021 pbox->y1 > pbox->y2 || 1008 pbox->y1 > pbox->y2 ||
1022 pbox->x2 > dev_priv->w || 1009 pbox->x2 > dev_priv->w || pbox->y2 > dev_priv->h)
1023 pbox->y2 > dev_priv->h)
1024 continue; 1010 continue;
1025 1011
1026 DRM_DEBUG("dispatch swap %d,%d-%d,%d!\n", 1012 DRM_DEBUG("dispatch swap %d,%d-%d,%d!\n",
1027 pbox->x1, pbox->y1, 1013 pbox->x1, pbox->y1, pbox->x2, pbox->y2);
1028 pbox->x2, pbox->y2);
1029 1014
1030 BEGIN_LP_RING( 8 ); 1015 BEGIN_LP_RING(8);
1031 OUT_RING( CMD ); 1016 OUT_RING(CMD);
1032 OUT_RING( BR13 ); 1017 OUT_RING(BR13);
1033 OUT_RING( (pbox->y1 << 16) | pbox->x1 ); 1018 OUT_RING((pbox->y1 << 16) | pbox->x1);
1034 OUT_RING( (pbox->y2 << 16) | pbox->x2 ); 1019 OUT_RING((pbox->y2 << 16) | pbox->x2);
1035 1020
1036 if (dev_priv->current_page == 0) 1021 if (dev_priv->current_page == 0)
1037 OUT_RING( dev_priv->front_offset ); 1022 OUT_RING(dev_priv->front_offset);
1038 else 1023 else
1039 OUT_RING( dev_priv->back_offset ); 1024 OUT_RING(dev_priv->back_offset);
1040 1025
1041 OUT_RING( (pbox->y1 << 16) | pbox->x1 ); 1026 OUT_RING((pbox->y1 << 16) | pbox->x1);
1042 OUT_RING( BR13 & 0xffff ); 1027 OUT_RING(BR13 & 0xffff);
1043 1028
1044 if (dev_priv->current_page == 0) 1029 if (dev_priv->current_page == 0)
1045 OUT_RING( dev_priv->back_offset ); 1030 OUT_RING(dev_priv->back_offset);
1046 else 1031 else
1047 OUT_RING( dev_priv->front_offset ); 1032 OUT_RING(dev_priv->front_offset);
1048 1033
1049 ADVANCE_LP_RING(); 1034 ADVANCE_LP_RING();
1050 } 1035 }
1051} 1036}
1052 1037
1053static void i830_dma_dispatch_flip( drm_device_t *dev ) 1038static void i830_dma_dispatch_flip(drm_device_t * dev)
1054{ 1039{
1055 drm_i830_private_t *dev_priv = dev->dev_private; 1040 drm_i830_private_t *dev_priv = dev->dev_private;
1056 RING_LOCALS; 1041 RING_LOCALS;
1057 1042
1058 DRM_DEBUG( "%s: page=%d pfCurrentPage=%d\n", 1043 DRM_DEBUG("%s: page=%d pfCurrentPage=%d\n",
1059 __FUNCTION__, 1044 __FUNCTION__,
1060 dev_priv->current_page, 1045 dev_priv->current_page,
1061 dev_priv->sarea_priv->pf_current_page); 1046 dev_priv->sarea_priv->pf_current_page);
1062 1047
1063 i830_kernel_lost_context(dev); 1048 i830_kernel_lost_context(dev);
1064 1049
1065 if (dev_priv->do_boxes) { 1050 if (dev_priv->do_boxes) {
1066 dev_priv->sarea_priv->perf_boxes |= I830_BOX_FLIP; 1051 dev_priv->sarea_priv->perf_boxes |= I830_BOX_FLIP;
1067 i830_cp_performance_boxes( dev ); 1052 i830_cp_performance_boxes(dev);
1068 } 1053 }
1069 1054
1070 1055 BEGIN_LP_RING(2);
1071 BEGIN_LP_RING( 2 ); 1056 OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
1072 OUT_RING( INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE ); 1057 OUT_RING(0);
1073 OUT_RING( 0 );
1074 ADVANCE_LP_RING(); 1058 ADVANCE_LP_RING();
1075 1059
1076 BEGIN_LP_RING( 6 ); 1060 BEGIN_LP_RING(6);
1077 OUT_RING( CMD_OP_DISPLAYBUFFER_INFO | ASYNC_FLIP ); 1061 OUT_RING(CMD_OP_DISPLAYBUFFER_INFO | ASYNC_FLIP);
1078 OUT_RING( 0 ); 1062 OUT_RING(0);
1079 if ( dev_priv->current_page == 0 ) { 1063 if (dev_priv->current_page == 0) {
1080 OUT_RING( dev_priv->back_offset ); 1064 OUT_RING(dev_priv->back_offset);
1081 dev_priv->current_page = 1; 1065 dev_priv->current_page = 1;
1082 } else { 1066 } else {
1083 OUT_RING( dev_priv->front_offset ); 1067 OUT_RING(dev_priv->front_offset);
1084 dev_priv->current_page = 0; 1068 dev_priv->current_page = 0;
1085 } 1069 }
1086 OUT_RING(0); 1070 OUT_RING(0);
1087 ADVANCE_LP_RING(); 1071 ADVANCE_LP_RING();
1088 1072
1089 1073 BEGIN_LP_RING(2);
1090 BEGIN_LP_RING( 2 ); 1074 OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_PLANE_A_FLIP);
1091 OUT_RING( MI_WAIT_FOR_EVENT | 1075 OUT_RING(0);
1092 MI_WAIT_FOR_PLANE_A_FLIP );
1093 OUT_RING( 0 );
1094 ADVANCE_LP_RING(); 1076 ADVANCE_LP_RING();
1095
1096 1077
1097 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page; 1078 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
1098} 1079}
1099 1080
1100static void i830_dma_dispatch_vertex(drm_device_t *dev, 1081static void i830_dma_dispatch_vertex(drm_device_t * dev,
1101 drm_buf_t *buf, 1082 drm_buf_t * buf, int discard, int used)
1102 int discard,
1103 int used)
1104{ 1083{
1105 drm_i830_private_t *dev_priv = dev->dev_private; 1084 drm_i830_private_t *dev_priv = dev->dev_private;
1106 drm_i830_buf_priv_t *buf_priv = buf->dev_private; 1085 drm_i830_buf_priv_t *buf_priv = buf->dev_private;
1107 drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv; 1086 drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv;
1108 drm_clip_rect_t *box = sarea_priv->boxes; 1087 drm_clip_rect_t *box = sarea_priv->boxes;
1109 int nbox = sarea_priv->nbox; 1088 int nbox = sarea_priv->nbox;
1110 unsigned long address = (unsigned long)buf->bus_address; 1089 unsigned long address = (unsigned long)buf->bus_address;
1111 unsigned long start = address - dev->agp->base; 1090 unsigned long start = address - dev->agp->base;
1112 int i = 0, u; 1091 int i = 0, u;
1113 RING_LOCALS; 1092 RING_LOCALS;
1114 1093
1115 i830_kernel_lost_context(dev); 1094 i830_kernel_lost_context(dev);
1116 1095
1117 if (nbox > I830_NR_SAREA_CLIPRECTS) 1096 if (nbox > I830_NR_SAREA_CLIPRECTS)
1118 nbox = I830_NR_SAREA_CLIPRECTS; 1097 nbox = I830_NR_SAREA_CLIPRECTS;
1119 1098
1120 if (discard) { 1099 if (discard) {
1121 u = cmpxchg(buf_priv->in_use, I830_BUF_CLIENT, 1100 u = cmpxchg(buf_priv->in_use, I830_BUF_CLIENT,
1122 I830_BUF_HARDWARE); 1101 I830_BUF_HARDWARE);
1123 if(u != I830_BUF_CLIENT) { 1102 if (u != I830_BUF_CLIENT) {
1124 DRM_DEBUG("xxxx 2\n"); 1103 DRM_DEBUG("xxxx 2\n");
1125 } 1104 }
1126 } 1105 }
1127 1106
1128 if (used > 4*1023) 1107 if (used > 4 * 1023)
1129 used = 0; 1108 used = 0;
1130 1109
1131 if (sarea_priv->dirty) 1110 if (sarea_priv->dirty)
1132 i830EmitState( dev ); 1111 i830EmitState(dev);
1133 1112
1134 DRM_DEBUG("dispatch vertex addr 0x%lx, used 0x%x nbox %d\n", 1113 DRM_DEBUG("dispatch vertex addr 0x%lx, used 0x%x nbox %d\n",
1135 address, used, nbox); 1114 address, used, nbox);
1136 1115
1137 dev_priv->counter++; 1116 dev_priv->counter++;
1138 DRM_DEBUG( "dispatch counter : %ld\n", dev_priv->counter); 1117 DRM_DEBUG("dispatch counter : %ld\n", dev_priv->counter);
1139 DRM_DEBUG( "i830_dma_dispatch\n"); 1118 DRM_DEBUG("i830_dma_dispatch\n");
1140 DRM_DEBUG( "start : %lx\n", start); 1119 DRM_DEBUG("start : %lx\n", start);
1141 DRM_DEBUG( "used : %d\n", used); 1120 DRM_DEBUG("used : %d\n", used);
1142 DRM_DEBUG( "start + used - 4 : %ld\n", start + used - 4); 1121 DRM_DEBUG("start + used - 4 : %ld\n", start + used - 4);
1143 1122
1144 if (buf_priv->currently_mapped == I830_BUF_MAPPED) { 1123 if (buf_priv->currently_mapped == I830_BUF_MAPPED) {
1145 u32 *vp = buf_priv->kernel_virtual; 1124 u32 *vp = buf_priv->kernel_virtual;
1146 1125
1147 vp[0] = (GFX_OP_PRIMITIVE | 1126 vp[0] = (GFX_OP_PRIMITIVE |
1148 sarea_priv->vertex_prim | 1127 sarea_priv->vertex_prim | ((used / 4) - 2));
1149 ((used/4)-2));
1150 1128
1151 if (dev_priv->use_mi_batchbuffer_start) { 1129 if (dev_priv->use_mi_batchbuffer_start) {
1152 vp[used/4] = MI_BATCH_BUFFER_END; 1130 vp[used / 4] = MI_BATCH_BUFFER_END;
1153 used += 4; 1131 used += 4;
1154 } 1132 }
1155 1133
1156 if (used & 4) { 1134 if (used & 4) {
1157 vp[used/4] = 0; 1135 vp[used / 4] = 0;
1158 used += 4; 1136 used += 4;
1159 } 1137 }
1160 1138
1161 i830_unmap_buffer(buf); 1139 i830_unmap_buffer(buf);
1162 } 1140 }
1163 1141
1164 if (used) { 1142 if (used) {
1165 do { 1143 do {
1166 if (i < nbox) { 1144 if (i < nbox) {
1167 BEGIN_LP_RING(6); 1145 BEGIN_LP_RING(6);
1168 OUT_RING( GFX_OP_DRAWRECT_INFO ); 1146 OUT_RING(GFX_OP_DRAWRECT_INFO);
1169 OUT_RING( sarea_priv->BufferState[I830_DESTREG_DR1] ); 1147 OUT_RING(sarea_priv->
1170 OUT_RING( box[i].x1 | (box[i].y1<<16) ); 1148 BufferState[I830_DESTREG_DR1]);
1171 OUT_RING( box[i].x2 | (box[i].y2<<16) ); 1149 OUT_RING(box[i].x1 | (box[i].y1 << 16));
1172 OUT_RING( sarea_priv->BufferState[I830_DESTREG_DR4] ); 1150 OUT_RING(box[i].x2 | (box[i].y2 << 16));
1173 OUT_RING( 0 ); 1151 OUT_RING(sarea_priv->
1152 BufferState[I830_DESTREG_DR4]);
1153 OUT_RING(0);
1174 ADVANCE_LP_RING(); 1154 ADVANCE_LP_RING();
1175 } 1155 }
1176 1156
1177 if (dev_priv->use_mi_batchbuffer_start) { 1157 if (dev_priv->use_mi_batchbuffer_start) {
1178 BEGIN_LP_RING(2); 1158 BEGIN_LP_RING(2);
1179 OUT_RING( MI_BATCH_BUFFER_START | (2<<6) ); 1159 OUT_RING(MI_BATCH_BUFFER_START | (2 << 6));
1180 OUT_RING( start | MI_BATCH_NON_SECURE ); 1160 OUT_RING(start | MI_BATCH_NON_SECURE);
1181 ADVANCE_LP_RING(); 1161 ADVANCE_LP_RING();
1182 } 1162 } else {
1183 else {
1184 BEGIN_LP_RING(4); 1163 BEGIN_LP_RING(4);
1185 OUT_RING( MI_BATCH_BUFFER ); 1164 OUT_RING(MI_BATCH_BUFFER);
1186 OUT_RING( start | MI_BATCH_NON_SECURE ); 1165 OUT_RING(start | MI_BATCH_NON_SECURE);
1187 OUT_RING( start + used - 4 ); 1166 OUT_RING(start + used - 4);
1188 OUT_RING( 0 ); 1167 OUT_RING(0);
1189 ADVANCE_LP_RING(); 1168 ADVANCE_LP_RING();
1190 } 1169 }
1191 1170
@@ -1195,61 +1174,60 @@ static void i830_dma_dispatch_vertex(drm_device_t *dev,
1195 if (discard) { 1174 if (discard) {
1196 dev_priv->counter++; 1175 dev_priv->counter++;
1197 1176
1198 (void) cmpxchg(buf_priv->in_use, I830_BUF_CLIENT, 1177 (void)cmpxchg(buf_priv->in_use, I830_BUF_CLIENT,
1199 I830_BUF_HARDWARE); 1178 I830_BUF_HARDWARE);
1200 1179
1201 BEGIN_LP_RING(8); 1180 BEGIN_LP_RING(8);
1202 OUT_RING( CMD_STORE_DWORD_IDX ); 1181 OUT_RING(CMD_STORE_DWORD_IDX);
1203 OUT_RING( 20 ); 1182 OUT_RING(20);
1204 OUT_RING( dev_priv->counter ); 1183 OUT_RING(dev_priv->counter);
1205 OUT_RING( CMD_STORE_DWORD_IDX ); 1184 OUT_RING(CMD_STORE_DWORD_IDX);
1206 OUT_RING( buf_priv->my_use_idx ); 1185 OUT_RING(buf_priv->my_use_idx);
1207 OUT_RING( I830_BUF_FREE ); 1186 OUT_RING(I830_BUF_FREE);
1208 OUT_RING( CMD_REPORT_HEAD ); 1187 OUT_RING(CMD_REPORT_HEAD);
1209 OUT_RING( 0 ); 1188 OUT_RING(0);
1210 ADVANCE_LP_RING(); 1189 ADVANCE_LP_RING();
1211 } 1190 }
1212} 1191}
1213 1192
1214 1193static void i830_dma_quiescent(drm_device_t * dev)
1215static void i830_dma_quiescent(drm_device_t *dev)
1216{ 1194{
1217 drm_i830_private_t *dev_priv = dev->dev_private; 1195 drm_i830_private_t *dev_priv = dev->dev_private;
1218 RING_LOCALS; 1196 RING_LOCALS;
1219 1197
1220 i830_kernel_lost_context(dev); 1198 i830_kernel_lost_context(dev);
1221 1199
1222 BEGIN_LP_RING(4); 1200 BEGIN_LP_RING(4);
1223 OUT_RING( INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE ); 1201 OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
1224 OUT_RING( CMD_REPORT_HEAD ); 1202 OUT_RING(CMD_REPORT_HEAD);
1225 OUT_RING( 0 ); 1203 OUT_RING(0);
1226 OUT_RING( 0 ); 1204 OUT_RING(0);
1227 ADVANCE_LP_RING(); 1205 ADVANCE_LP_RING();
1228 1206
1229 i830_wait_ring( dev, dev_priv->ring.Size - 8, __FUNCTION__ ); 1207 i830_wait_ring(dev, dev_priv->ring.Size - 8, __FUNCTION__);
1230} 1208}
1231 1209
1232static int i830_flush_queue(drm_device_t *dev) 1210static int i830_flush_queue(drm_device_t * dev)
1233{ 1211{
1234 drm_i830_private_t *dev_priv = dev->dev_private; 1212 drm_i830_private_t *dev_priv = dev->dev_private;
1235 drm_device_dma_t *dma = dev->dma; 1213 drm_device_dma_t *dma = dev->dma;
1236 int i, ret = 0; 1214 int i, ret = 0;
1237 RING_LOCALS; 1215 RING_LOCALS;
1238 1216
1239 i830_kernel_lost_context(dev); 1217 i830_kernel_lost_context(dev);
1240 1218
1241 BEGIN_LP_RING(2); 1219 BEGIN_LP_RING(2);
1242 OUT_RING( CMD_REPORT_HEAD ); 1220 OUT_RING(CMD_REPORT_HEAD);
1243 OUT_RING( 0 ); 1221 OUT_RING(0);
1244 ADVANCE_LP_RING(); 1222 ADVANCE_LP_RING();
1245 1223
1246 i830_wait_ring( dev, dev_priv->ring.Size - 8, __FUNCTION__ ); 1224 i830_wait_ring(dev, dev_priv->ring.Size - 8, __FUNCTION__);
1247 1225
1248 for (i = 0; i < dma->buf_count; i++) { 1226 for (i = 0; i < dma->buf_count; i++) {
1249 drm_buf_t *buf = dma->buflist[ i ]; 1227 drm_buf_t *buf = dma->buflist[i];
1250 drm_i830_buf_priv_t *buf_priv = buf->dev_private; 1228 drm_i830_buf_priv_t *buf_priv = buf->dev_private;
1251 1229
1252 int used = cmpxchg(buf_priv->in_use, I830_BUF_HARDWARE, 1230 int used = cmpxchg(buf_priv->in_use, I830_BUF_HARDWARE,
1253 I830_BUF_FREE); 1231 I830_BUF_FREE);
1254 1232
1255 if (used == I830_BUF_HARDWARE) 1233 if (used == I830_BUF_HARDWARE)
@@ -1258,62 +1236,66 @@ static int i830_flush_queue(drm_device_t *dev)
1258 DRM_DEBUG("still on client\n"); 1236 DRM_DEBUG("still on client\n");
1259 } 1237 }
1260 1238
1261 return ret; 1239 return ret;
1262} 1240}
1263 1241
1264/* Must be called with the lock held */ 1242/* Must be called with the lock held */
1265void i830_reclaim_buffers(drm_device_t *dev, struct file *filp) 1243void i830_reclaim_buffers(drm_device_t * dev, struct file *filp)
1266{ 1244{
1267 drm_device_dma_t *dma = dev->dma; 1245 drm_device_dma_t *dma = dev->dma;
1268 int i; 1246 int i;
1269 1247
1270 if (!dma) return; 1248 if (!dma)
1271 if (!dev->dev_private) return; 1249 return;
1272 if (!dma->buflist) return; 1250 if (!dev->dev_private)
1251 return;
1252 if (!dma->buflist)
1253 return;
1273 1254
1274 i830_flush_queue(dev); 1255 i830_flush_queue(dev);
1275 1256
1276 for (i = 0; i < dma->buf_count; i++) { 1257 for (i = 0; i < dma->buf_count; i++) {
1277 drm_buf_t *buf = dma->buflist[ i ]; 1258 drm_buf_t *buf = dma->buflist[i];
1278 drm_i830_buf_priv_t *buf_priv = buf->dev_private; 1259 drm_i830_buf_priv_t *buf_priv = buf->dev_private;
1279 1260
1280 if (buf->filp == filp && buf_priv) { 1261 if (buf->filp == filp && buf_priv) {
1281 int used = cmpxchg(buf_priv->in_use, I830_BUF_CLIENT, 1262 int used = cmpxchg(buf_priv->in_use, I830_BUF_CLIENT,
1282 I830_BUF_FREE); 1263 I830_BUF_FREE);
1283 1264
1284 if (used == I830_BUF_CLIENT) 1265 if (used == I830_BUF_CLIENT)
1285 DRM_DEBUG("reclaimed from client\n"); 1266 DRM_DEBUG("reclaimed from client\n");
1286 if(buf_priv->currently_mapped == I830_BUF_MAPPED) 1267 if (buf_priv->currently_mapped == I830_BUF_MAPPED)
1287 buf_priv->currently_mapped = I830_BUF_UNMAPPED; 1268 buf_priv->currently_mapped = I830_BUF_UNMAPPED;
1288 } 1269 }
1289 } 1270 }
1290} 1271}
1291 1272
1292static int i830_flush_ioctl(struct inode *inode, struct file *filp, 1273static int i830_flush_ioctl(struct inode *inode, struct file *filp,
1293 unsigned int cmd, unsigned long arg) 1274 unsigned int cmd, unsigned long arg)
1294{ 1275{
1295 drm_file_t *priv = filp->private_data; 1276 drm_file_t *priv = filp->private_data;
1296 drm_device_t *dev = priv->head->dev; 1277 drm_device_t *dev = priv->head->dev;
1297 1278
1298 LOCK_TEST_WITH_RETURN(dev, filp); 1279 LOCK_TEST_WITH_RETURN(dev, filp);
1299 1280
1300 i830_flush_queue(dev); 1281 i830_flush_queue(dev);
1301 return 0; 1282 return 0;
1302} 1283}
1303 1284
1304static int i830_dma_vertex(struct inode *inode, struct file *filp, 1285static int i830_dma_vertex(struct inode *inode, struct file *filp,
1305 unsigned int cmd, unsigned long arg) 1286 unsigned int cmd, unsigned long arg)
1306{ 1287{
1307 drm_file_t *priv = filp->private_data; 1288 drm_file_t *priv = filp->private_data;
1308 drm_device_t *dev = priv->head->dev; 1289 drm_device_t *dev = priv->head->dev;
1309 drm_device_dma_t *dma = dev->dma; 1290 drm_device_dma_t *dma = dev->dma;
1310 drm_i830_private_t *dev_priv = (drm_i830_private_t *)dev->dev_private; 1291 drm_i830_private_t *dev_priv = (drm_i830_private_t *) dev->dev_private;
1311 u32 *hw_status = dev_priv->hw_status_page; 1292 u32 *hw_status = dev_priv->hw_status_page;
1312 drm_i830_sarea_t *sarea_priv = (drm_i830_sarea_t *) 1293 drm_i830_sarea_t *sarea_priv = (drm_i830_sarea_t *)
1313 dev_priv->sarea_priv; 1294 dev_priv->sarea_priv;
1314 drm_i830_vertex_t vertex; 1295 drm_i830_vertex_t vertex;
1315 1296
1316 if (copy_from_user(&vertex, (drm_i830_vertex_t __user *)arg, sizeof(vertex))) 1297 if (copy_from_user
1298 (&vertex, (drm_i830_vertex_t __user *) arg, sizeof(vertex)))
1317 return -EFAULT; 1299 return -EFAULT;
1318 1300
1319 LOCK_TEST_WITH_RETURN(dev, filp); 1301 LOCK_TEST_WITH_RETURN(dev, filp);
@@ -1321,15 +1303,16 @@ static int i830_dma_vertex(struct inode *inode, struct file *filp,
1321 DRM_DEBUG("i830 dma vertex, idx %d used %d discard %d\n", 1303 DRM_DEBUG("i830 dma vertex, idx %d used %d discard %d\n",
1322 vertex.idx, vertex.used, vertex.discard); 1304 vertex.idx, vertex.used, vertex.discard);
1323 1305
1324 if(vertex.idx < 0 || vertex.idx > dma->buf_count) return -EINVAL; 1306 if (vertex.idx < 0 || vertex.idx > dma->buf_count)
1307 return -EINVAL;
1325 1308
1326 i830_dma_dispatch_vertex( dev, 1309 i830_dma_dispatch_vertex(dev,
1327 dma->buflist[ vertex.idx ], 1310 dma->buflist[vertex.idx],
1328 vertex.discard, vertex.used ); 1311 vertex.discard, vertex.used);
1312
1313 sarea_priv->last_enqueue = dev_priv->counter - 1;
1314 sarea_priv->last_dispatch = (int)hw_status[5];
1329 1315
1330 sarea_priv->last_enqueue = dev_priv->counter-1;
1331 sarea_priv->last_dispatch = (int) hw_status[5];
1332
1333 return 0; 1316 return 0;
1334} 1317}
1335 1318
@@ -1340,9 +1323,10 @@ static int i830_clear_bufs(struct inode *inode, struct file *filp,
1340 drm_device_t *dev = priv->head->dev; 1323 drm_device_t *dev = priv->head->dev;
1341 drm_i830_clear_t clear; 1324 drm_i830_clear_t clear;
1342 1325
1343 if (copy_from_user(&clear, (drm_i830_clear_t __user *)arg, sizeof(clear))) 1326 if (copy_from_user
1327 (&clear, (drm_i830_clear_t __user *) arg, sizeof(clear)))
1344 return -EFAULT; 1328 return -EFAULT;
1345 1329
1346 LOCK_TEST_WITH_RETURN(dev, filp); 1330 LOCK_TEST_WITH_RETURN(dev, filp);
1347 1331
1348 /* GH: Someone's doing nasty things... */ 1332 /* GH: Someone's doing nasty things... */
@@ -1350,11 +1334,10 @@ static int i830_clear_bufs(struct inode *inode, struct file *filp,
1350 return -EINVAL; 1334 return -EINVAL;
1351 } 1335 }
1352 1336
1353 i830_dma_dispatch_clear( dev, clear.flags, 1337 i830_dma_dispatch_clear(dev, clear.flags,
1354 clear.clear_color, 1338 clear.clear_color,
1355 clear.clear_depth, 1339 clear.clear_depth, clear.clear_depthmask);
1356 clear.clear_depthmask); 1340 return 0;
1357 return 0;
1358} 1341}
1359 1342
1360static int i830_swap_bufs(struct inode *inode, struct file *filp, 1343static int i830_swap_bufs(struct inode *inode, struct file *filp,
@@ -1362,20 +1345,18 @@ static int i830_swap_bufs(struct inode *inode, struct file *filp,
1362{ 1345{
1363 drm_file_t *priv = filp->private_data; 1346 drm_file_t *priv = filp->private_data;
1364 drm_device_t *dev = priv->head->dev; 1347 drm_device_t *dev = priv->head->dev;
1365 1348
1366 DRM_DEBUG("i830_swap_bufs\n"); 1349 DRM_DEBUG("i830_swap_bufs\n");
1367 1350
1368 LOCK_TEST_WITH_RETURN(dev, filp); 1351 LOCK_TEST_WITH_RETURN(dev, filp);
1369 1352
1370 i830_dma_dispatch_swap( dev ); 1353 i830_dma_dispatch_swap(dev);
1371 return 0; 1354 return 0;
1372} 1355}
1373 1356
1374
1375
1376/* Not sure why this isn't set all the time: 1357/* Not sure why this isn't set all the time:
1377 */ 1358 */
1378static void i830_do_init_pageflip( drm_device_t *dev ) 1359static void i830_do_init_pageflip(drm_device_t * dev)
1379{ 1360{
1380 drm_i830_private_t *dev_priv = dev->dev_private; 1361 drm_i830_private_t *dev_priv = dev->dev_private;
1381 1362
@@ -1385,20 +1366,20 @@ static void i830_do_init_pageflip( drm_device_t *dev )
1385 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page; 1366 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
1386} 1367}
1387 1368
1388static int i830_do_cleanup_pageflip( drm_device_t *dev ) 1369static int i830_do_cleanup_pageflip(drm_device_t * dev)
1389{ 1370{
1390 drm_i830_private_t *dev_priv = dev->dev_private; 1371 drm_i830_private_t *dev_priv = dev->dev_private;
1391 1372
1392 DRM_DEBUG("%s\n", __FUNCTION__); 1373 DRM_DEBUG("%s\n", __FUNCTION__);
1393 if (dev_priv->current_page != 0) 1374 if (dev_priv->current_page != 0)
1394 i830_dma_dispatch_flip( dev ); 1375 i830_dma_dispatch_flip(dev);
1395 1376
1396 dev_priv->page_flipping = 0; 1377 dev_priv->page_flipping = 0;
1397 return 0; 1378 return 0;
1398} 1379}
1399 1380
1400static int i830_flip_bufs(struct inode *inode, struct file *filp, 1381static int i830_flip_bufs(struct inode *inode, struct file *filp,
1401 unsigned int cmd, unsigned long arg) 1382 unsigned int cmd, unsigned long arg)
1402{ 1383{
1403 drm_file_t *priv = filp->private_data; 1384 drm_file_t *priv = filp->private_data;
1404 drm_device_t *dev = priv->head->dev; 1385 drm_device_t *dev = priv->head->dev;
@@ -1408,45 +1389,45 @@ static int i830_flip_bufs(struct inode *inode, struct file *filp,
1408 1389
1409 LOCK_TEST_WITH_RETURN(dev, filp); 1390 LOCK_TEST_WITH_RETURN(dev, filp);
1410 1391
1411 if (!dev_priv->page_flipping) 1392 if (!dev_priv->page_flipping)
1412 i830_do_init_pageflip( dev ); 1393 i830_do_init_pageflip(dev);
1413 1394
1414 i830_dma_dispatch_flip( dev ); 1395 i830_dma_dispatch_flip(dev);
1415 return 0; 1396 return 0;
1416} 1397}
1417 1398
1418static int i830_getage(struct inode *inode, struct file *filp, unsigned int cmd, 1399static int i830_getage(struct inode *inode, struct file *filp, unsigned int cmd,
1419 unsigned long arg) 1400 unsigned long arg)
1420{ 1401{
1421 drm_file_t *priv = filp->private_data; 1402 drm_file_t *priv = filp->private_data;
1422 drm_device_t *dev = priv->head->dev; 1403 drm_device_t *dev = priv->head->dev;
1423 drm_i830_private_t *dev_priv = (drm_i830_private_t *)dev->dev_private; 1404 drm_i830_private_t *dev_priv = (drm_i830_private_t *) dev->dev_private;
1424 u32 *hw_status = dev_priv->hw_status_page; 1405 u32 *hw_status = dev_priv->hw_status_page;
1425 drm_i830_sarea_t *sarea_priv = (drm_i830_sarea_t *) 1406 drm_i830_sarea_t *sarea_priv = (drm_i830_sarea_t *)
1426 dev_priv->sarea_priv; 1407 dev_priv->sarea_priv;
1427 1408
1428 sarea_priv->last_dispatch = (int) hw_status[5]; 1409 sarea_priv->last_dispatch = (int)hw_status[5];
1429 return 0; 1410 return 0;
1430} 1411}
1431 1412
1432static int i830_getbuf(struct inode *inode, struct file *filp, unsigned int cmd, 1413static int i830_getbuf(struct inode *inode, struct file *filp, unsigned int cmd,
1433 unsigned long arg) 1414 unsigned long arg)
1434{ 1415{
1435 drm_file_t *priv = filp->private_data; 1416 drm_file_t *priv = filp->private_data;
1436 drm_device_t *dev = priv->head->dev; 1417 drm_device_t *dev = priv->head->dev;
1437 int retcode = 0; 1418 int retcode = 0;
1438 drm_i830_dma_t d; 1419 drm_i830_dma_t d;
1439 drm_i830_private_t *dev_priv = (drm_i830_private_t *)dev->dev_private; 1420 drm_i830_private_t *dev_priv = (drm_i830_private_t *) dev->dev_private;
1440 u32 *hw_status = dev_priv->hw_status_page; 1421 u32 *hw_status = dev_priv->hw_status_page;
1441 drm_i830_sarea_t *sarea_priv = (drm_i830_sarea_t *) 1422 drm_i830_sarea_t *sarea_priv = (drm_i830_sarea_t *)
1442 dev_priv->sarea_priv; 1423 dev_priv->sarea_priv;
1443 1424
1444 DRM_DEBUG("getbuf\n"); 1425 DRM_DEBUG("getbuf\n");
1445 if (copy_from_user(&d, (drm_i830_dma_t __user *)arg, sizeof(d))) 1426 if (copy_from_user(&d, (drm_i830_dma_t __user *) arg, sizeof(d)))
1446 return -EFAULT; 1427 return -EFAULT;
1447 1428
1448 LOCK_TEST_WITH_RETURN(dev, filp); 1429 LOCK_TEST_WITH_RETURN(dev, filp);
1449 1430
1450 d.granted = 0; 1431 d.granted = 0;
1451 1432
1452 retcode = i830_dma_get_buffer(dev, &d, filp); 1433 retcode = i830_dma_get_buffer(dev, &d, filp);
@@ -1454,46 +1435,45 @@ static int i830_getbuf(struct inode *inode, struct file *filp, unsigned int cmd,
1454 DRM_DEBUG("i830_dma: %d returning %d, granted = %d\n", 1435 DRM_DEBUG("i830_dma: %d returning %d, granted = %d\n",
1455 current->pid, retcode, d.granted); 1436 current->pid, retcode, d.granted);
1456 1437
1457 if (copy_to_user((drm_dma_t __user *)arg, &d, sizeof(d))) 1438 if (copy_to_user((drm_dma_t __user *) arg, &d, sizeof(d)))
1458 return -EFAULT; 1439 return -EFAULT;
1459 sarea_priv->last_dispatch = (int) hw_status[5]; 1440 sarea_priv->last_dispatch = (int)hw_status[5];
1460 1441
1461 return retcode; 1442 return retcode;
1462} 1443}
1463 1444
1464static int i830_copybuf(struct inode *inode, 1445static int i830_copybuf(struct inode *inode,
1465 struct file *filp, unsigned int cmd, unsigned long arg) 1446 struct file *filp, unsigned int cmd, unsigned long arg)
1466{ 1447{
1467 /* Never copy - 2.4.x doesn't need it */ 1448 /* Never copy - 2.4.x doesn't need it */
1468 return 0; 1449 return 0;
1469} 1450}
1470 1451
1471static int i830_docopy(struct inode *inode, struct file *filp, unsigned int cmd, 1452static int i830_docopy(struct inode *inode, struct file *filp, unsigned int cmd,
1472 unsigned long arg) 1453 unsigned long arg)
1473{ 1454{
1474 return 0; 1455 return 0;
1475} 1456}
1476 1457
1477 1458static int i830_getparam(struct inode *inode, struct file *filp,
1478 1459 unsigned int cmd, unsigned long arg)
1479static int i830_getparam( struct inode *inode, struct file *filp,
1480 unsigned int cmd, unsigned long arg )
1481{ 1460{
1482 drm_file_t *priv = filp->private_data; 1461 drm_file_t *priv = filp->private_data;
1483 drm_device_t *dev = priv->head->dev; 1462 drm_device_t *dev = priv->head->dev;
1484 drm_i830_private_t *dev_priv = dev->dev_private; 1463 drm_i830_private_t *dev_priv = dev->dev_private;
1485 drm_i830_getparam_t param; 1464 drm_i830_getparam_t param;
1486 int value; 1465 int value;
1487 1466
1488 if ( !dev_priv ) { 1467 if (!dev_priv) {
1489 DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ ); 1468 DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
1490 return -EINVAL; 1469 return -EINVAL;
1491 } 1470 }
1492 1471
1493 if (copy_from_user(&param, (drm_i830_getparam_t __user *)arg, sizeof(param) )) 1472 if (copy_from_user
1473 (&param, (drm_i830_getparam_t __user *) arg, sizeof(param)))
1494 return -EFAULT; 1474 return -EFAULT;
1495 1475
1496 switch( param.param ) { 1476 switch (param.param) {
1497 case I830_PARAM_IRQ_ACTIVE: 1477 case I830_PARAM_IRQ_ACTIVE:
1498 value = dev->irq_enabled; 1478 value = dev->irq_enabled;
1499 break; 1479 break;
@@ -1501,32 +1481,32 @@ static int i830_getparam( struct inode *inode, struct file *filp,
1501 return -EINVAL; 1481 return -EINVAL;
1502 } 1482 }
1503 1483
1504 if ( copy_to_user( param.value, &value, sizeof(int) ) ) { 1484 if (copy_to_user(param.value, &value, sizeof(int))) {
1505 DRM_ERROR( "copy_to_user\n" ); 1485 DRM_ERROR("copy_to_user\n");
1506 return -EFAULT; 1486 return -EFAULT;
1507 } 1487 }
1508 1488
1509 return 0; 1489 return 0;
1510} 1490}
1511 1491
1512 1492static int i830_setparam(struct inode *inode, struct file *filp,
1513static int i830_setparam( struct inode *inode, struct file *filp, 1493 unsigned int cmd, unsigned long arg)
1514 unsigned int cmd, unsigned long arg )
1515{ 1494{
1516 drm_file_t *priv = filp->private_data; 1495 drm_file_t *priv = filp->private_data;
1517 drm_device_t *dev = priv->head->dev; 1496 drm_device_t *dev = priv->head->dev;
1518 drm_i830_private_t *dev_priv = dev->dev_private; 1497 drm_i830_private_t *dev_priv = dev->dev_private;
1519 drm_i830_setparam_t param; 1498 drm_i830_setparam_t param;
1520 1499
1521 if ( !dev_priv ) { 1500 if (!dev_priv) {
1522 DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ ); 1501 DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
1523 return -EINVAL; 1502 return -EINVAL;
1524 } 1503 }
1525 1504
1526 if (copy_from_user(&param, (drm_i830_setparam_t __user *)arg, sizeof(param) )) 1505 if (copy_from_user
1506 (&param, (drm_i830_setparam_t __user *) arg, sizeof(param)))
1527 return -EFAULT; 1507 return -EFAULT;
1528 1508
1529 switch( param.param ) { 1509 switch (param.param) {
1530 case I830_SETPARAM_USE_MI_BATCHBUFFER_START: 1510 case I830_SETPARAM_USE_MI_BATCHBUFFER_START:
1531 dev_priv->use_mi_batchbuffer_start = param.value; 1511 dev_priv->use_mi_batchbuffer_start = param.value;
1532 break; 1512 break;
@@ -1537,13 +1517,12 @@ static int i830_setparam( struct inode *inode, struct file *filp,
1537 return 0; 1517 return 0;
1538} 1518}
1539 1519
1540 1520void i830_driver_pretakedown(drm_device_t * dev)
1541void i830_driver_pretakedown(drm_device_t *dev)
1542{ 1521{
1543 i830_dma_cleanup( dev ); 1522 i830_dma_cleanup(dev);
1544} 1523}
1545 1524
1546void i830_driver_prerelease(drm_device_t *dev, DRMFILE filp) 1525void i830_driver_prerelease(drm_device_t * dev, DRMFILE filp)
1547{ 1526{
1548 if (dev->dev_private) { 1527 if (dev->dev_private) {
1549 drm_i830_private_t *dev_priv = dev->dev_private; 1528 drm_i830_private_t *dev_priv = dev->dev_private;
@@ -1553,32 +1532,32 @@ void i830_driver_prerelease(drm_device_t *dev, DRMFILE filp)
1553 } 1532 }
1554} 1533}
1555 1534
1556void i830_driver_release(drm_device_t *dev, struct file *filp) 1535void i830_driver_release(drm_device_t * dev, struct file *filp)
1557{ 1536{
1558 i830_reclaim_buffers(dev, filp); 1537 i830_reclaim_buffers(dev, filp);
1559} 1538}
1560 1539
1561int i830_driver_dma_quiescent(drm_device_t *dev) 1540int i830_driver_dma_quiescent(drm_device_t * dev)
1562{ 1541{
1563 i830_dma_quiescent( dev ); 1542 i830_dma_quiescent(dev);
1564 return 0; 1543 return 0;
1565} 1544}
1566 1545
1567drm_ioctl_desc_t i830_ioctls[] = { 1546drm_ioctl_desc_t i830_ioctls[] = {
1568 [DRM_IOCTL_NR(DRM_I830_INIT)] = { i830_dma_init, 1, 1 }, 1547 [DRM_IOCTL_NR(DRM_I830_INIT)] = {i830_dma_init, 1, 1},
1569 [DRM_IOCTL_NR(DRM_I830_VERTEX)] = { i830_dma_vertex, 1, 0 }, 1548 [DRM_IOCTL_NR(DRM_I830_VERTEX)] = {i830_dma_vertex, 1, 0},
1570 [DRM_IOCTL_NR(DRM_I830_CLEAR)] = { i830_clear_bufs, 1, 0 }, 1549 [DRM_IOCTL_NR(DRM_I830_CLEAR)] = {i830_clear_bufs, 1, 0},
1571 [DRM_IOCTL_NR(DRM_I830_FLUSH)] = { i830_flush_ioctl, 1, 0 }, 1550 [DRM_IOCTL_NR(DRM_I830_FLUSH)] = {i830_flush_ioctl, 1, 0},
1572 [DRM_IOCTL_NR(DRM_I830_GETAGE)] = { i830_getage, 1, 0 }, 1551 [DRM_IOCTL_NR(DRM_I830_GETAGE)] = {i830_getage, 1, 0},
1573 [DRM_IOCTL_NR(DRM_I830_GETBUF)] = { i830_getbuf, 1, 0 }, 1552 [DRM_IOCTL_NR(DRM_I830_GETBUF)] = {i830_getbuf, 1, 0},
1574 [DRM_IOCTL_NR(DRM_I830_SWAP)] = { i830_swap_bufs, 1, 0 }, 1553 [DRM_IOCTL_NR(DRM_I830_SWAP)] = {i830_swap_bufs, 1, 0},
1575 [DRM_IOCTL_NR(DRM_I830_COPY)] = { i830_copybuf, 1, 0 }, 1554 [DRM_IOCTL_NR(DRM_I830_COPY)] = {i830_copybuf, 1, 0},
1576 [DRM_IOCTL_NR(DRM_I830_DOCOPY)] = { i830_docopy, 1, 0 }, 1555 [DRM_IOCTL_NR(DRM_I830_DOCOPY)] = {i830_docopy, 1, 0},
1577 [DRM_IOCTL_NR(DRM_I830_FLIP)] = { i830_flip_bufs, 1, 0 }, 1556 [DRM_IOCTL_NR(DRM_I830_FLIP)] = {i830_flip_bufs, 1, 0},
1578 [DRM_IOCTL_NR(DRM_I830_IRQ_EMIT)] = { i830_irq_emit, 1, 0 }, 1557 [DRM_IOCTL_NR(DRM_I830_IRQ_EMIT)] = {i830_irq_emit, 1, 0},
1579 [DRM_IOCTL_NR(DRM_I830_IRQ_WAIT)] = { i830_irq_wait, 1, 0 }, 1558 [DRM_IOCTL_NR(DRM_I830_IRQ_WAIT)] = {i830_irq_wait, 1, 0},
1580 [DRM_IOCTL_NR(DRM_I830_GETPARAM)] = { i830_getparam, 1, 0 }, 1559 [DRM_IOCTL_NR(DRM_I830_GETPARAM)] = {i830_getparam, 1, 0},
1581 [DRM_IOCTL_NR(DRM_I830_SETPARAM)] = { i830_setparam, 1, 0 } 1560 [DRM_IOCTL_NR(DRM_I830_SETPARAM)] = {i830_setparam, 1, 0}
1582}; 1561};
1583 1562
1584int i830_max_ioctl = DRM_ARRAY_SIZE(i830_ioctls); 1563int i830_max_ioctl = DRM_ARRAY_SIZE(i830_ioctls);
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-19 13:17:32 -0500