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path: root/drivers/char/drm/i810_dma.c
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-rw-r--r--drivers/char/drm/i810_dma.c1101
1 files changed, 550 insertions, 551 deletions
diff --git a/drivers/char/drm/i810_dma.c b/drivers/char/drm/i810_dma.c
index 2f1659b96fd1..810625093c06 100644
--- a/drivers/char/drm/i810_dma.c
+++ b/drivers/char/drm/i810_dma.c
@@ -45,102 +45,101 @@
45#define I810_BUF_UNMAPPED 0 45#define I810_BUF_UNMAPPED 0
46#define I810_BUF_MAPPED 1 46#define I810_BUF_MAPPED 1
47 47
48static drm_buf_t *i810_freelist_get(drm_device_t *dev) 48static drm_buf_t *i810_freelist_get(drm_device_t * dev)
49{ 49{
50 drm_device_dma_t *dma = dev->dma; 50 drm_device_dma_t *dma = dev->dma;
51 int i; 51 int i;
52 int used; 52 int used;
53 53
54 /* Linear search might not be the best solution */ 54 /* Linear search might not be the best solution */
55 55
56 for (i = 0; i < dma->buf_count; i++) { 56 for (i = 0; i < dma->buf_count; i++) {
57 drm_buf_t *buf = dma->buflist[ i ]; 57 drm_buf_t *buf = dma->buflist[i];
58 drm_i810_buf_priv_t *buf_priv = buf->dev_private; 58 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
59 /* In use is already a pointer */ 59 /* In use is already a pointer */
60 used = cmpxchg(buf_priv->in_use, I810_BUF_FREE, 60 used = cmpxchg(buf_priv->in_use, I810_BUF_FREE,
61 I810_BUF_CLIENT); 61 I810_BUF_CLIENT);
62 if (used == I810_BUF_FREE) { 62 if (used == I810_BUF_FREE) {
63 return buf; 63 return buf;
64 } 64 }
65 } 65 }
66 return NULL; 66 return NULL;
67} 67}
68 68
69/* This should only be called if the buffer is not sent to the hardware 69/* This should only be called if the buffer is not sent to the hardware
70 * yet, the hardware updates in use for us once its on the ring buffer. 70 * yet, the hardware updates in use for us once its on the ring buffer.
71 */ 71 */
72 72
73static int i810_freelist_put(drm_device_t *dev, drm_buf_t *buf) 73static int i810_freelist_put(drm_device_t * dev, drm_buf_t * buf)
74{ 74{
75 drm_i810_buf_priv_t *buf_priv = buf->dev_private; 75 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
76 int used; 76 int used;
77 77
78 /* In use is already a pointer */ 78 /* In use is already a pointer */
79 used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, I810_BUF_FREE); 79 used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, I810_BUF_FREE);
80 if (used != I810_BUF_CLIENT) { 80 if (used != I810_BUF_CLIENT) {
81 DRM_ERROR("Freeing buffer thats not in use : %d\n", buf->idx); 81 DRM_ERROR("Freeing buffer thats not in use : %d\n", buf->idx);
82 return -EINVAL; 82 return -EINVAL;
83 } 83 }
84 84
85 return 0; 85 return 0;
86} 86}
87 87
88static int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma) 88static int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma)
89{ 89{
90 drm_file_t *priv = filp->private_data; 90 drm_file_t *priv = filp->private_data;
91 drm_device_t *dev; 91 drm_device_t *dev;
92 drm_i810_private_t *dev_priv; 92 drm_i810_private_t *dev_priv;
93 drm_buf_t *buf; 93 drm_buf_t *buf;
94 drm_i810_buf_priv_t *buf_priv; 94 drm_i810_buf_priv_t *buf_priv;
95 95
96 lock_kernel(); 96 lock_kernel();
97 dev = priv->head->dev; 97 dev = priv->head->dev;
98 dev_priv = dev->dev_private; 98 dev_priv = dev->dev_private;
99 buf = dev_priv->mmap_buffer; 99 buf = dev_priv->mmap_buffer;
100 buf_priv = buf->dev_private; 100 buf_priv = buf->dev_private;
101 101
102 vma->vm_flags |= (VM_IO | VM_DONTCOPY); 102 vma->vm_flags |= (VM_IO | VM_DONTCOPY);
103 vma->vm_file = filp; 103 vma->vm_file = filp;
104 104
105 buf_priv->currently_mapped = I810_BUF_MAPPED; 105 buf_priv->currently_mapped = I810_BUF_MAPPED;
106 unlock_kernel(); 106 unlock_kernel();
107 107
108 if (io_remap_pfn_range(vma, vma->vm_start, 108 if (io_remap_pfn_range(vma, vma->vm_start,
109 VM_OFFSET(vma) >> PAGE_SHIFT, 109 VM_OFFSET(vma) >> PAGE_SHIFT,
110 vma->vm_end - vma->vm_start, 110 vma->vm_end - vma->vm_start, vma->vm_page_prot))
111 vma->vm_page_prot)) return -EAGAIN; 111 return -EAGAIN;
112 return 0; 112 return 0;
113} 113}
114 114
115static struct file_operations i810_buffer_fops = { 115static struct file_operations i810_buffer_fops = {
116 .open = drm_open, 116 .open = drm_open,
117 .flush = drm_flush, 117 .flush = drm_flush,
118 .release = drm_release, 118 .release = drm_release,
119 .ioctl = drm_ioctl, 119 .ioctl = drm_ioctl,
120 .mmap = i810_mmap_buffers, 120 .mmap = i810_mmap_buffers,
121 .fasync = drm_fasync, 121 .fasync = drm_fasync,
122}; 122};
123 123
124static int i810_map_buffer(drm_buf_t *buf, struct file *filp) 124static int i810_map_buffer(drm_buf_t * buf, struct file *filp)
125{ 125{
126 drm_file_t *priv = filp->private_data; 126 drm_file_t *priv = filp->private_data;
127 drm_device_t *dev = priv->head->dev; 127 drm_device_t *dev = priv->head->dev;
128 drm_i810_buf_priv_t *buf_priv = buf->dev_private; 128 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
129 drm_i810_private_t *dev_priv = dev->dev_private; 129 drm_i810_private_t *dev_priv = dev->dev_private;
130 struct file_operations *old_fops; 130 struct file_operations *old_fops;
131 int retcode = 0; 131 int retcode = 0;
132 132
133 if (buf_priv->currently_mapped == I810_BUF_MAPPED) 133 if (buf_priv->currently_mapped == I810_BUF_MAPPED)
134 return -EINVAL; 134 return -EINVAL;
135 135
136 down_write( &current->mm->mmap_sem ); 136 down_write(&current->mm->mmap_sem);
137 old_fops = filp->f_op; 137 old_fops = filp->f_op;
138 filp->f_op = &i810_buffer_fops; 138 filp->f_op = &i810_buffer_fops;
139 dev_priv->mmap_buffer = buf; 139 dev_priv->mmap_buffer = buf;
140 buf_priv->virtual = (void *)do_mmap(filp, 0, buf->total, 140 buf_priv->virtual = (void *)do_mmap(filp, 0, buf->total,
141 PROT_READ|PROT_WRITE, 141 PROT_READ | PROT_WRITE,
142 MAP_SHARED, 142 MAP_SHARED, buf->bus_address);
143 buf->bus_address);
144 dev_priv->mmap_buffer = NULL; 143 dev_priv->mmap_buffer = NULL;
145 filp->f_op = old_fops; 144 filp->f_op = old_fops;
146 if ((unsigned long)buf_priv->virtual > -1024UL) { 145 if ((unsigned long)buf_priv->virtual > -1024UL) {
@@ -149,12 +148,12 @@ static int i810_map_buffer(drm_buf_t *buf, struct file *filp)
149 retcode = (signed int)buf_priv->virtual; 148 retcode = (signed int)buf_priv->virtual;
150 buf_priv->virtual = NULL; 149 buf_priv->virtual = NULL;
151 } 150 }
152 up_write( &current->mm->mmap_sem ); 151 up_write(&current->mm->mmap_sem);
153 152
154 return retcode; 153 return retcode;
155} 154}
156 155
157static int i810_unmap_buffer(drm_buf_t *buf) 156static int i810_unmap_buffer(drm_buf_t * buf)
158{ 157{
159 drm_i810_buf_priv_t *buf_priv = buf->dev_private; 158 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
160 int retcode = 0; 159 int retcode = 0;
@@ -168,43 +167,43 @@ static int i810_unmap_buffer(drm_buf_t *buf)
168 (size_t) buf->total); 167 (size_t) buf->total);
169 up_write(&current->mm->mmap_sem); 168 up_write(&current->mm->mmap_sem);
170 169
171 buf_priv->currently_mapped = I810_BUF_UNMAPPED; 170 buf_priv->currently_mapped = I810_BUF_UNMAPPED;
172 buf_priv->virtual = NULL; 171 buf_priv->virtual = NULL;
173 172
174 return retcode; 173 return retcode;
175} 174}
176 175
177static int i810_dma_get_buffer(drm_device_t *dev, drm_i810_dma_t *d, 176static int i810_dma_get_buffer(drm_device_t * dev, drm_i810_dma_t * d,
178 struct file *filp) 177 struct file *filp)
179{ 178{
180 drm_buf_t *buf; 179 drm_buf_t *buf;
181 drm_i810_buf_priv_t *buf_priv; 180 drm_i810_buf_priv_t *buf_priv;
182 int retcode = 0; 181 int retcode = 0;
183 182
184 buf = i810_freelist_get(dev); 183 buf = i810_freelist_get(dev);
185 if (!buf) { 184 if (!buf) {
186 retcode = -ENOMEM; 185 retcode = -ENOMEM;
187 DRM_DEBUG("retcode=%d\n", retcode); 186 DRM_DEBUG("retcode=%d\n", retcode);
188 return retcode; 187 return retcode;
189 } 188 }
190 189
191 retcode = i810_map_buffer(buf, filp); 190 retcode = i810_map_buffer(buf, filp);
192 if (retcode) { 191 if (retcode) {
193 i810_freelist_put(dev, buf); 192 i810_freelist_put(dev, buf);
194 DRM_ERROR("mapbuf failed, retcode %d\n", retcode); 193 DRM_ERROR("mapbuf failed, retcode %d\n", retcode);
195 return retcode; 194 return retcode;
196 } 195 }
197 buf->filp = filp; 196 buf->filp = filp;
198 buf_priv = buf->dev_private; 197 buf_priv = buf->dev_private;
199 d->granted = 1; 198 d->granted = 1;
200 d->request_idx = buf->idx; 199 d->request_idx = buf->idx;
201 d->request_size = buf->total; 200 d->request_size = buf->total;
202 d->virtual = buf_priv->virtual; 201 d->virtual = buf_priv->virtual;
203 202
204 return retcode; 203 return retcode;
205} 204}
206 205
207static int i810_dma_cleanup(drm_device_t *dev) 206static int i810_dma_cleanup(drm_device_t * dev)
208{ 207{
209 drm_device_dma_t *dma = dev->dma; 208 drm_device_dma_t *dma = dev->dma;
210 209
@@ -217,165 +216,167 @@ static int i810_dma_cleanup(drm_device_t *dev)
217 216
218 if (dev->dev_private) { 217 if (dev->dev_private) {
219 int i; 218 int i;
220 drm_i810_private_t *dev_priv = 219 drm_i810_private_t *dev_priv =
221 (drm_i810_private_t *) dev->dev_private; 220 (drm_i810_private_t *) dev->dev_private;
222 221
223 if (dev_priv->ring.virtual_start) { 222 if (dev_priv->ring.virtual_start) {
224 drm_ioremapfree((void *) dev_priv->ring.virtual_start, 223 drm_ioremapfree((void *)dev_priv->ring.virtual_start,
225 dev_priv->ring.Size, dev); 224 dev_priv->ring.Size, dev);
226 } 225 }
227 if (dev_priv->hw_status_page) { 226 if (dev_priv->hw_status_page) {
228 pci_free_consistent(dev->pdev, PAGE_SIZE, 227 pci_free_consistent(dev->pdev, PAGE_SIZE,
229 dev_priv->hw_status_page, 228 dev_priv->hw_status_page,
230 dev_priv->dma_status_page); 229 dev_priv->dma_status_page);
231 /* Need to rewrite hardware status page */ 230 /* Need to rewrite hardware status page */
232 I810_WRITE(0x02080, 0x1ffff000); 231 I810_WRITE(0x02080, 0x1ffff000);
233 } 232 }
234 drm_free(dev->dev_private, sizeof(drm_i810_private_t), 233 drm_free(dev->dev_private, sizeof(drm_i810_private_t),
235 DRM_MEM_DRIVER); 234 DRM_MEM_DRIVER);
236 dev->dev_private = NULL; 235 dev->dev_private = NULL;
237 236
238 for (i = 0; i < dma->buf_count; i++) { 237 for (i = 0; i < dma->buf_count; i++) {
239 drm_buf_t *buf = dma->buflist[ i ]; 238 drm_buf_t *buf = dma->buflist[i];
240 drm_i810_buf_priv_t *buf_priv = buf->dev_private; 239 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
241 if ( buf_priv->kernel_virtual && buf->total ) 240 if (buf_priv->kernel_virtual && buf->total)
242 drm_ioremapfree(buf_priv->kernel_virtual, buf->total, dev); 241 drm_ioremapfree(buf_priv->kernel_virtual,
242 buf->total, dev);
243 } 243 }
244 } 244 }
245 return 0; 245 return 0;
246} 246}
247 247
248static int i810_wait_ring(drm_device_t *dev, int n) 248static int i810_wait_ring(drm_device_t * dev, int n)
249{ 249{
250 drm_i810_private_t *dev_priv = dev->dev_private; 250 drm_i810_private_t *dev_priv = dev->dev_private;
251 drm_i810_ring_buffer_t *ring = &(dev_priv->ring); 251 drm_i810_ring_buffer_t *ring = &(dev_priv->ring);
252 int iters = 0; 252 int iters = 0;
253 unsigned long end; 253 unsigned long end;
254 unsigned int last_head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR; 254 unsigned int last_head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
255 255
256 end = jiffies + (HZ*3); 256 end = jiffies + (HZ * 3);
257 while (ring->space < n) { 257 while (ring->space < n) {
258 ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR; 258 ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
259 ring->space = ring->head - (ring->tail+8); 259 ring->space = ring->head - (ring->tail + 8);
260 if (ring->space < 0) ring->space += ring->Size; 260 if (ring->space < 0)
261 261 ring->space += ring->Size;
262
262 if (ring->head != last_head) { 263 if (ring->head != last_head) {
263 end = jiffies + (HZ*3); 264 end = jiffies + (HZ * 3);
264 last_head = ring->head; 265 last_head = ring->head;
265 } 266 }
266 267
267 iters++; 268 iters++;
268 if (time_before(end, jiffies)) { 269 if (time_before(end, jiffies)) {
269 DRM_ERROR("space: %d wanted %d\n", ring->space, n); 270 DRM_ERROR("space: %d wanted %d\n", ring->space, n);
270 DRM_ERROR("lockup\n"); 271 DRM_ERROR("lockup\n");
271 goto out_wait_ring; 272 goto out_wait_ring;
272 } 273 }
273 udelay(1); 274 udelay(1);
274 } 275 }
275 276
276out_wait_ring: 277 out_wait_ring:
277 return iters; 278 return iters;
278} 279}
279 280
280static void i810_kernel_lost_context(drm_device_t *dev) 281static void i810_kernel_lost_context(drm_device_t * dev)
281{ 282{
282 drm_i810_private_t *dev_priv = dev->dev_private; 283 drm_i810_private_t *dev_priv = dev->dev_private;
283 drm_i810_ring_buffer_t *ring = &(dev_priv->ring); 284 drm_i810_ring_buffer_t *ring = &(dev_priv->ring);
284 285
285 ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR; 286 ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
286 ring->tail = I810_READ(LP_RING + RING_TAIL); 287 ring->tail = I810_READ(LP_RING + RING_TAIL);
287 ring->space = ring->head - (ring->tail+8); 288 ring->space = ring->head - (ring->tail + 8);
288 if (ring->space < 0) ring->space += ring->Size; 289 if (ring->space < 0)
290 ring->space += ring->Size;
289} 291}
290 292
291static int i810_freelist_init(drm_device_t *dev, drm_i810_private_t *dev_priv) 293static int i810_freelist_init(drm_device_t * dev, drm_i810_private_t * dev_priv)
292{ 294{
293 drm_device_dma_t *dma = dev->dma; 295 drm_device_dma_t *dma = dev->dma;
294 int my_idx = 24; 296 int my_idx = 24;
295 u32 *hw_status = (u32 *)(dev_priv->hw_status_page + my_idx); 297 u32 *hw_status = (u32 *) (dev_priv->hw_status_page + my_idx);
296 int i; 298 int i;
297 299
298 if (dma->buf_count > 1019) { 300 if (dma->buf_count > 1019) {
299 /* Not enough space in the status page for the freelist */ 301 /* Not enough space in the status page for the freelist */
300 return -EINVAL; 302 return -EINVAL;
301 } 303 }
302 304
303 for (i = 0; i < dma->buf_count; i++) { 305 for (i = 0; i < dma->buf_count; i++) {
304 drm_buf_t *buf = dma->buflist[ i ]; 306 drm_buf_t *buf = dma->buflist[i];
305 drm_i810_buf_priv_t *buf_priv = buf->dev_private; 307 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
306 308
307 buf_priv->in_use = hw_status++; 309 buf_priv->in_use = hw_status++;
308 buf_priv->my_use_idx = my_idx; 310 buf_priv->my_use_idx = my_idx;
309 my_idx += 4; 311 my_idx += 4;
310 312
311 *buf_priv->in_use = I810_BUF_FREE; 313 *buf_priv->in_use = I810_BUF_FREE;
312 314
313 buf_priv->kernel_virtual = drm_ioremap(buf->bus_address, 315 buf_priv->kernel_virtual = drm_ioremap(buf->bus_address,
314 buf->total, dev); 316 buf->total, dev);
315 } 317 }
316 return 0; 318 return 0;
317} 319}
318 320
319static int i810_dma_initialize(drm_device_t *dev, 321static int i810_dma_initialize(drm_device_t * dev,
320 drm_i810_private_t *dev_priv, 322 drm_i810_private_t * dev_priv,
321 drm_i810_init_t *init) 323 drm_i810_init_t * init)
322{ 324{
323 struct list_head *list; 325 struct list_head *list;
324 326
325 memset(dev_priv, 0, sizeof(drm_i810_private_t)); 327 memset(dev_priv, 0, sizeof(drm_i810_private_t));
326 328
327 list_for_each(list, &dev->maplist->head) { 329 list_for_each(list, &dev->maplist->head) {
328 drm_map_list_t *r_list = list_entry(list, drm_map_list_t, head); 330 drm_map_list_t *r_list = list_entry(list, drm_map_list_t, head);
329 if (r_list->map && 331 if (r_list->map &&
330 r_list->map->type == _DRM_SHM && 332 r_list->map->type == _DRM_SHM &&
331 r_list->map->flags & _DRM_CONTAINS_LOCK ) { 333 r_list->map->flags & _DRM_CONTAINS_LOCK) {
332 dev_priv->sarea_map = r_list->map; 334 dev_priv->sarea_map = r_list->map;
333 break; 335 break;
334 } 336 }
335 } 337 }
336 if (!dev_priv->sarea_map) { 338 if (!dev_priv->sarea_map) {
337 dev->dev_private = (void *)dev_priv; 339 dev->dev_private = (void *)dev_priv;
338 i810_dma_cleanup(dev); 340 i810_dma_cleanup(dev);
339 DRM_ERROR("can not find sarea!\n"); 341 DRM_ERROR("can not find sarea!\n");
340 return -EINVAL; 342 return -EINVAL;
341 } 343 }
342 dev_priv->mmio_map = drm_core_findmap(dev, init->mmio_offset); 344 dev_priv->mmio_map = drm_core_findmap(dev, init->mmio_offset);
343 if (!dev_priv->mmio_map) { 345 if (!dev_priv->mmio_map) {
344 dev->dev_private = (void *)dev_priv; 346 dev->dev_private = (void *)dev_priv;
345 i810_dma_cleanup(dev); 347 i810_dma_cleanup(dev);
346 DRM_ERROR("can not find mmio map!\n"); 348 DRM_ERROR("can not find mmio map!\n");
347 return -EINVAL; 349 return -EINVAL;
348 } 350 }
349 dev->agp_buffer_token = init->buffers_offset; 351 dev->agp_buffer_token = init->buffers_offset;
350 dev->agp_buffer_map = drm_core_findmap(dev, init->buffers_offset); 352 dev->agp_buffer_map = drm_core_findmap(dev, init->buffers_offset);
351 if (!dev->agp_buffer_map) { 353 if (!dev->agp_buffer_map) {
352 dev->dev_private = (void *)dev_priv; 354 dev->dev_private = (void *)dev_priv;
353 i810_dma_cleanup(dev); 355 i810_dma_cleanup(dev);
354 DRM_ERROR("can not find dma buffer map!\n"); 356 DRM_ERROR("can not find dma buffer map!\n");
355 return -EINVAL; 357 return -EINVAL;
356 } 358 }
357 359
358 dev_priv->sarea_priv = (drm_i810_sarea_t *) 360 dev_priv->sarea_priv = (drm_i810_sarea_t *)
359 ((u8 *)dev_priv->sarea_map->handle + 361 ((u8 *) dev_priv->sarea_map->handle + init->sarea_priv_offset);
360 init->sarea_priv_offset);
361 362
362 dev_priv->ring.Start = init->ring_start; 363 dev_priv->ring.Start = init->ring_start;
363 dev_priv->ring.End = init->ring_end; 364 dev_priv->ring.End = init->ring_end;
364 dev_priv->ring.Size = init->ring_size; 365 dev_priv->ring.Size = init->ring_size;
365 366
366 dev_priv->ring.virtual_start = drm_ioremap(dev->agp->base + 367 dev_priv->ring.virtual_start = drm_ioremap(dev->agp->base +
367 init->ring_start, 368 init->ring_start,
368 init->ring_size, dev); 369 init->ring_size, dev);
369 370
370 if (dev_priv->ring.virtual_start == NULL) { 371 if (dev_priv->ring.virtual_start == NULL) {
371 dev->dev_private = (void *) dev_priv; 372 dev->dev_private = (void *)dev_priv;
372 i810_dma_cleanup(dev); 373 i810_dma_cleanup(dev);
373 DRM_ERROR("can not ioremap virtual address for" 374 DRM_ERROR("can not ioremap virtual address for"
374 " ring buffer\n"); 375 " ring buffer\n");
375 return -ENOMEM; 376 return -ENOMEM;
376 } 377 }
377 378
378 dev_priv->ring.tail_mask = dev_priv->ring.Size - 1; 379 dev_priv->ring.tail_mask = dev_priv->ring.Size - 1;
379 380
380 dev_priv->w = init->w; 381 dev_priv->w = init->w;
381 dev_priv->h = init->h; 382 dev_priv->h = init->h;
@@ -391,33 +392,33 @@ static int i810_dma_initialize(drm_device_t *dev,
391 dev_priv->back_di1 = init->back_offset | init->pitch_bits; 392 dev_priv->back_di1 = init->back_offset | init->pitch_bits;
392 dev_priv->zi1 = init->depth_offset | init->pitch_bits; 393 dev_priv->zi1 = init->depth_offset | init->pitch_bits;
393 394
394 /* Program Hardware Status Page */ 395 /* Program Hardware Status Page */
395 dev_priv->hw_status_page = 396 dev_priv->hw_status_page =
396 pci_alloc_consistent(dev->pdev, PAGE_SIZE, 397 pci_alloc_consistent(dev->pdev, PAGE_SIZE,
397 &dev_priv->dma_status_page); 398 &dev_priv->dma_status_page);
398 if (!dev_priv->hw_status_page) { 399 if (!dev_priv->hw_status_page) {
399 dev->dev_private = (void *)dev_priv; 400 dev->dev_private = (void *)dev_priv;
400 i810_dma_cleanup(dev); 401 i810_dma_cleanup(dev);
401 DRM_ERROR("Can not allocate hardware status page\n"); 402 DRM_ERROR("Can not allocate hardware status page\n");
402 return -ENOMEM; 403 return -ENOMEM;
403 } 404 }
404 memset(dev_priv->hw_status_page, 0, PAGE_SIZE); 405 memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
405 DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page); 406 DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
406 407
407 I810_WRITE(0x02080, dev_priv->dma_status_page); 408 I810_WRITE(0x02080, dev_priv->dma_status_page);
408 DRM_DEBUG("Enabled hardware status page\n"); 409 DRM_DEBUG("Enabled hardware status page\n");
409 410
410 /* Now we need to init our freelist */ 411 /* Now we need to init our freelist */
411 if (i810_freelist_init(dev, dev_priv) != 0) { 412 if (i810_freelist_init(dev, dev_priv) != 0) {
412 dev->dev_private = (void *)dev_priv; 413 dev->dev_private = (void *)dev_priv;
413 i810_dma_cleanup(dev); 414 i810_dma_cleanup(dev);
414 DRM_ERROR("Not enough space in the status page for" 415 DRM_ERROR("Not enough space in the status page for"
415 " the freelist\n"); 416 " the freelist\n");
416 return -ENOMEM; 417 return -ENOMEM;
417 } 418 }
418 dev->dev_private = (void *)dev_priv; 419 dev->dev_private = (void *)dev_priv;
419 420
420 return 0; 421 return 0;
421} 422}
422 423
423/* i810 DRM version 1.1 used a smaller init structure with different 424/* i810 DRM version 1.1 used a smaller init structure with different
@@ -431,12 +432,12 @@ static int i810_dma_initialize(drm_device_t *dev,
431 * If it isn't then we have a v1.1 client. Fix up params. 432 * If it isn't then we have a v1.1 client. Fix up params.
432 * If it is, then we have a 1.2 client... get the rest of the data. 433 * If it is, then we have a 1.2 client... get the rest of the data.
433 */ 434 */
434static int i810_dma_init_compat(drm_i810_init_t *init, unsigned long arg) 435static int i810_dma_init_compat(drm_i810_init_t * init, unsigned long arg)
435{ 436{
436 437
437 /* Get v1.1 init data */ 438 /* Get v1.1 init data */
438 if (copy_from_user(init, (drm_i810_pre12_init_t __user *)arg, 439 if (copy_from_user(init, (drm_i810_pre12_init_t __user *) arg,
439 sizeof(drm_i810_pre12_init_t))) { 440 sizeof(drm_i810_pre12_init_t))) {
440 return -EFAULT; 441 return -EFAULT;
441 } 442 }
442 443
@@ -444,7 +445,7 @@ static int i810_dma_init_compat(drm_i810_init_t *init, unsigned long arg)
444 445
445 /* This is a v1.2 client, just get the v1.2 init data */ 446 /* This is a v1.2 client, just get the v1.2 init data */
446 DRM_INFO("Using POST v1.2 init.\n"); 447 DRM_INFO("Using POST v1.2 init.\n");
447 if (copy_from_user(init, (drm_i810_init_t __user *)arg, 448 if (copy_from_user(init, (drm_i810_init_t __user *) arg,
448 sizeof(drm_i810_init_t))) { 449 sizeof(drm_i810_init_t))) {
449 return -EFAULT; 450 return -EFAULT;
450 } 451 }
@@ -452,246 +453,239 @@ static int i810_dma_init_compat(drm_i810_init_t *init, unsigned long arg)
452 453
453 /* This is a v1.1 client, fix the params */ 454 /* This is a v1.1 client, fix the params */
454 DRM_INFO("Using PRE v1.2 init.\n"); 455 DRM_INFO("Using PRE v1.2 init.\n");
455 init->pitch_bits = init->h; 456 init->pitch_bits = init->h;
456 init->pitch = init->w; 457 init->pitch = init->w;
457 init->h = init->overlay_physical; 458 init->h = init->overlay_physical;
458 init->w = init->overlay_offset; 459 init->w = init->overlay_offset;
459 init->overlay_physical = 0; 460 init->overlay_physical = 0;
460 init->overlay_offset = 0; 461 init->overlay_offset = 0;
461 } 462 }
462 463
463 return 0; 464 return 0;
464} 465}
465 466
466static int i810_dma_init(struct inode *inode, struct file *filp, 467static int i810_dma_init(struct inode *inode, struct file *filp,
467 unsigned int cmd, unsigned long arg) 468 unsigned int cmd, unsigned long arg)
468{ 469{
469 drm_file_t *priv = filp->private_data; 470 drm_file_t *priv = filp->private_data;
470 drm_device_t *dev = priv->head->dev; 471 drm_device_t *dev = priv->head->dev;
471 drm_i810_private_t *dev_priv; 472 drm_i810_private_t *dev_priv;
472 drm_i810_init_t init; 473 drm_i810_init_t init;
473 int retcode = 0; 474 int retcode = 0;
474 475
475 /* Get only the init func */ 476 /* Get only the init func */
476 if (copy_from_user(&init, (void __user *)arg, sizeof(drm_i810_init_func_t))) 477 if (copy_from_user
478 (&init, (void __user *)arg, sizeof(drm_i810_init_func_t)))
477 return -EFAULT; 479 return -EFAULT;
478 480
479 switch(init.func) { 481 switch (init.func) {
480 case I810_INIT_DMA: 482 case I810_INIT_DMA:
481 /* This case is for backward compatibility. It 483 /* This case is for backward compatibility. It
482 * handles XFree 4.1.0 and 4.2.0, and has to 484 * handles XFree 4.1.0 and 4.2.0, and has to
483 * do some parameter checking as described below. 485 * do some parameter checking as described below.
484 * It will someday go away. 486 * It will someday go away.
485 */ 487 */
486 retcode = i810_dma_init_compat(&init, arg); 488 retcode = i810_dma_init_compat(&init, arg);
487 if (retcode) 489 if (retcode)
488 return retcode; 490 return retcode;
489 491
490 dev_priv = drm_alloc(sizeof(drm_i810_private_t), 492 dev_priv = drm_alloc(sizeof(drm_i810_private_t),
491 DRM_MEM_DRIVER); 493 DRM_MEM_DRIVER);
492 if (dev_priv == NULL) 494 if (dev_priv == NULL)
493 return -ENOMEM; 495 return -ENOMEM;
494 retcode = i810_dma_initialize(dev, dev_priv, &init); 496 retcode = i810_dma_initialize(dev, dev_priv, &init);
495 break; 497 break;
496 498
497 default: 499 default:
498 case I810_INIT_DMA_1_4: 500 case I810_INIT_DMA_1_4:
499 DRM_INFO("Using v1.4 init.\n"); 501 DRM_INFO("Using v1.4 init.\n");
500 if (copy_from_user(&init, (drm_i810_init_t __user *)arg, 502 if (copy_from_user(&init, (drm_i810_init_t __user *) arg,
501 sizeof(drm_i810_init_t))) { 503 sizeof(drm_i810_init_t))) {
502 return -EFAULT; 504 return -EFAULT;
503 } 505 }
504 dev_priv = drm_alloc(sizeof(drm_i810_private_t), 506 dev_priv = drm_alloc(sizeof(drm_i810_private_t),
505 DRM_MEM_DRIVER); 507 DRM_MEM_DRIVER);
506 if (dev_priv == NULL) 508 if (dev_priv == NULL)
507 return -ENOMEM; 509 return -ENOMEM;
508 retcode = i810_dma_initialize(dev, dev_priv, &init); 510 retcode = i810_dma_initialize(dev, dev_priv, &init);
509 break; 511 break;
510 512
511 case I810_CLEANUP_DMA: 513 case I810_CLEANUP_DMA:
512 DRM_INFO("DMA Cleanup\n"); 514 DRM_INFO("DMA Cleanup\n");
513 retcode = i810_dma_cleanup(dev); 515 retcode = i810_dma_cleanup(dev);
514 break; 516 break;
515 } 517 }
516 518
517 return retcode; 519 return retcode;
518} 520}
519 521
520
521
522/* Most efficient way to verify state for the i810 is as it is 522/* Most efficient way to verify state for the i810 is as it is
523 * emitted. Non-conformant state is silently dropped. 523 * emitted. Non-conformant state is silently dropped.
524 * 524 *
525 * Use 'volatile' & local var tmp to force the emitted values to be 525 * Use 'volatile' & local var tmp to force the emitted values to be
526 * identical to the verified ones. 526 * identical to the verified ones.
527 */ 527 */
528static void i810EmitContextVerified( drm_device_t *dev, 528static void i810EmitContextVerified(drm_device_t * dev,
529 volatile unsigned int *code ) 529 volatile unsigned int *code)
530{ 530{
531 drm_i810_private_t *dev_priv = dev->dev_private; 531 drm_i810_private_t *dev_priv = dev->dev_private;
532 int i, j = 0; 532 int i, j = 0;
533 unsigned int tmp; 533 unsigned int tmp;
534 RING_LOCALS; 534 RING_LOCALS;
535 535
536 BEGIN_LP_RING( I810_CTX_SETUP_SIZE ); 536 BEGIN_LP_RING(I810_CTX_SETUP_SIZE);
537 537
538 OUT_RING( GFX_OP_COLOR_FACTOR ); 538 OUT_RING(GFX_OP_COLOR_FACTOR);
539 OUT_RING( code[I810_CTXREG_CF1] ); 539 OUT_RING(code[I810_CTXREG_CF1]);
540 540
541 OUT_RING( GFX_OP_STIPPLE ); 541 OUT_RING(GFX_OP_STIPPLE);
542 OUT_RING( code[I810_CTXREG_ST1] ); 542 OUT_RING(code[I810_CTXREG_ST1]);
543 543
544 for ( i = 4 ; i < I810_CTX_SETUP_SIZE ; i++ ) { 544 for (i = 4; i < I810_CTX_SETUP_SIZE; i++) {
545 tmp = code[i]; 545 tmp = code[i];
546 546
547 if ((tmp & (7<<29)) == (3<<29) && 547 if ((tmp & (7 << 29)) == (3 << 29) &&
548 (tmp & (0x1f<<24)) < (0x1d<<24)) 548 (tmp & (0x1f << 24)) < (0x1d << 24)) {
549 { 549 OUT_RING(tmp);
550 OUT_RING( tmp );
551 j++; 550 j++;
552 } 551 } else
553 else printk("constext state dropped!!!\n"); 552 printk("constext state dropped!!!\n");
554 } 553 }
555 554
556 if (j & 1) 555 if (j & 1)
557 OUT_RING( 0 ); 556 OUT_RING(0);
558 557
559 ADVANCE_LP_RING(); 558 ADVANCE_LP_RING();
560} 559}
561 560
562static void i810EmitTexVerified( drm_device_t *dev, 561static void i810EmitTexVerified(drm_device_t * dev, volatile unsigned int *code)
563 volatile unsigned int *code )
564{ 562{
565 drm_i810_private_t *dev_priv = dev->dev_private; 563 drm_i810_private_t *dev_priv = dev->dev_private;
566 int i, j = 0; 564 int i, j = 0;
567 unsigned int tmp; 565 unsigned int tmp;
568 RING_LOCALS; 566 RING_LOCALS;
569 567
570 BEGIN_LP_RING( I810_TEX_SETUP_SIZE ); 568 BEGIN_LP_RING(I810_TEX_SETUP_SIZE);
571 569
572 OUT_RING( GFX_OP_MAP_INFO ); 570 OUT_RING(GFX_OP_MAP_INFO);
573 OUT_RING( code[I810_TEXREG_MI1] ); 571 OUT_RING(code[I810_TEXREG_MI1]);
574 OUT_RING( code[I810_TEXREG_MI2] ); 572 OUT_RING(code[I810_TEXREG_MI2]);
575 OUT_RING( code[I810_TEXREG_MI3] ); 573 OUT_RING(code[I810_TEXREG_MI3]);
576 574
577 for ( i = 4 ; i < I810_TEX_SETUP_SIZE ; i++ ) { 575 for (i = 4; i < I810_TEX_SETUP_SIZE; i++) {
578 tmp = code[i]; 576 tmp = code[i];
579 577
580 if ((tmp & (7<<29)) == (3<<29) && 578 if ((tmp & (7 << 29)) == (3 << 29) &&
581 (tmp & (0x1f<<24)) < (0x1d<<24)) 579 (tmp & (0x1f << 24)) < (0x1d << 24)) {
582 { 580 OUT_RING(tmp);
583 OUT_RING( tmp );
584 j++; 581 j++;
585 } 582 } else
586 else printk("texture state dropped!!!\n"); 583 printk("texture state dropped!!!\n");
587 } 584 }
588 585
589 if (j & 1) 586 if (j & 1)
590 OUT_RING( 0 ); 587 OUT_RING(0);
591 588
592 ADVANCE_LP_RING(); 589 ADVANCE_LP_RING();
593} 590}
594 591
595
596/* Need to do some additional checking when setting the dest buffer. 592/* Need to do some additional checking when setting the dest buffer.
597 */ 593 */
598static void i810EmitDestVerified( drm_device_t *dev, 594static void i810EmitDestVerified(drm_device_t * dev,
599 volatile unsigned int *code ) 595 volatile unsigned int *code)
600{ 596{
601 drm_i810_private_t *dev_priv = dev->dev_private; 597 drm_i810_private_t *dev_priv = dev->dev_private;
602 unsigned int tmp; 598 unsigned int tmp;
603 RING_LOCALS; 599 RING_LOCALS;
604 600
605 BEGIN_LP_RING( I810_DEST_SETUP_SIZE + 2 ); 601 BEGIN_LP_RING(I810_DEST_SETUP_SIZE + 2);
606 602
607 tmp = code[I810_DESTREG_DI1]; 603 tmp = code[I810_DESTREG_DI1];
608 if (tmp == dev_priv->front_di1 || tmp == dev_priv->back_di1) { 604 if (tmp == dev_priv->front_di1 || tmp == dev_priv->back_di1) {
609 OUT_RING( CMD_OP_DESTBUFFER_INFO ); 605 OUT_RING(CMD_OP_DESTBUFFER_INFO);
610 OUT_RING( tmp ); 606 OUT_RING(tmp);
611 } else 607 } else
612 DRM_DEBUG("bad di1 %x (allow %x or %x)\n", 608 DRM_DEBUG("bad di1 %x (allow %x or %x)\n",
613 tmp, dev_priv->front_di1, dev_priv->back_di1); 609 tmp, dev_priv->front_di1, dev_priv->back_di1);
614 610
615 /* invarient: 611 /* invarient:
616 */ 612 */
617 OUT_RING( CMD_OP_Z_BUFFER_INFO ); 613 OUT_RING(CMD_OP_Z_BUFFER_INFO);
618 OUT_RING( dev_priv->zi1 ); 614 OUT_RING(dev_priv->zi1);
619 615
620 OUT_RING( GFX_OP_DESTBUFFER_VARS ); 616 OUT_RING(GFX_OP_DESTBUFFER_VARS);
621 OUT_RING( code[I810_DESTREG_DV1] ); 617 OUT_RING(code[I810_DESTREG_DV1]);
622 618
623 OUT_RING( GFX_OP_DRAWRECT_INFO ); 619 OUT_RING(GFX_OP_DRAWRECT_INFO);
624 OUT_RING( code[I810_DESTREG_DR1] ); 620 OUT_RING(code[I810_DESTREG_DR1]);
625 OUT_RING( code[I810_DESTREG_DR2] ); 621 OUT_RING(code[I810_DESTREG_DR2]);
626 OUT_RING( code[I810_DESTREG_DR3] ); 622 OUT_RING(code[I810_DESTREG_DR3]);
627 OUT_RING( code[I810_DESTREG_DR4] ); 623 OUT_RING(code[I810_DESTREG_DR4]);
628 OUT_RING( 0 ); 624 OUT_RING(0);
629 625
630 ADVANCE_LP_RING(); 626 ADVANCE_LP_RING();
631} 627}
632 628
633 629static void i810EmitState(drm_device_t * dev)
634
635static void i810EmitState( drm_device_t *dev )
636{ 630{
637 drm_i810_private_t *dev_priv = dev->dev_private; 631 drm_i810_private_t *dev_priv = dev->dev_private;
638 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv; 632 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
639 unsigned int dirty = sarea_priv->dirty; 633 unsigned int dirty = sarea_priv->dirty;
640 634
641 DRM_DEBUG("%s %x\n", __FUNCTION__, dirty); 635 DRM_DEBUG("%s %x\n", __FUNCTION__, dirty);
642 636
643 if (dirty & I810_UPLOAD_BUFFERS) { 637 if (dirty & I810_UPLOAD_BUFFERS) {
644 i810EmitDestVerified( dev, sarea_priv->BufferState ); 638 i810EmitDestVerified(dev, sarea_priv->BufferState);
645 sarea_priv->dirty &= ~I810_UPLOAD_BUFFERS; 639 sarea_priv->dirty &= ~I810_UPLOAD_BUFFERS;
646 } 640 }
647 641
648 if (dirty & I810_UPLOAD_CTX) { 642 if (dirty & I810_UPLOAD_CTX) {
649 i810EmitContextVerified( dev, sarea_priv->ContextState ); 643 i810EmitContextVerified(dev, sarea_priv->ContextState);
650 sarea_priv->dirty &= ~I810_UPLOAD_CTX; 644 sarea_priv->dirty &= ~I810_UPLOAD_CTX;
651 } 645 }
652 646
653 if (dirty & I810_UPLOAD_TEX0) { 647 if (dirty & I810_UPLOAD_TEX0) {
654 i810EmitTexVerified( dev, sarea_priv->TexState[0] ); 648 i810EmitTexVerified(dev, sarea_priv->TexState[0]);
655 sarea_priv->dirty &= ~I810_UPLOAD_TEX0; 649 sarea_priv->dirty &= ~I810_UPLOAD_TEX0;
656 } 650 }
657 651
658 if (dirty & I810_UPLOAD_TEX1) { 652 if (dirty & I810_UPLOAD_TEX1) {
659 i810EmitTexVerified( dev, sarea_priv->TexState[1] ); 653 i810EmitTexVerified(dev, sarea_priv->TexState[1]);
660 sarea_priv->dirty &= ~I810_UPLOAD_TEX1; 654 sarea_priv->dirty &= ~I810_UPLOAD_TEX1;
661 } 655 }
662} 656}
663 657
664
665
666/* need to verify 658/* need to verify
667 */ 659 */
668static void i810_dma_dispatch_clear( drm_device_t *dev, int flags, 660static void i810_dma_dispatch_clear(drm_device_t * dev, int flags,
669 unsigned int clear_color, 661 unsigned int clear_color,
670 unsigned int clear_zval ) 662 unsigned int clear_zval)
671{ 663{
672 drm_i810_private_t *dev_priv = dev->dev_private; 664 drm_i810_private_t *dev_priv = dev->dev_private;
673 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv; 665 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
674 int nbox = sarea_priv->nbox; 666 int nbox = sarea_priv->nbox;
675 drm_clip_rect_t *pbox = sarea_priv->boxes; 667 drm_clip_rect_t *pbox = sarea_priv->boxes;
676 int pitch = dev_priv->pitch; 668 int pitch = dev_priv->pitch;
677 int cpp = 2; 669 int cpp = 2;
678 int i; 670 int i;
679 RING_LOCALS; 671 RING_LOCALS;
680 672
681 if ( dev_priv->current_page == 1 ) { 673 if (dev_priv->current_page == 1) {
682 unsigned int tmp = flags; 674 unsigned int tmp = flags;
683 675
684 flags &= ~(I810_FRONT | I810_BACK); 676 flags &= ~(I810_FRONT | I810_BACK);
685 if (tmp & I810_FRONT) flags |= I810_BACK; 677 if (tmp & I810_FRONT)
686 if (tmp & I810_BACK) flags |= I810_FRONT; 678 flags |= I810_BACK;
679 if (tmp & I810_BACK)
680 flags |= I810_FRONT;
687 } 681 }
688 682
689 i810_kernel_lost_context(dev); 683 i810_kernel_lost_context(dev);
690 684
691 if (nbox > I810_NR_SAREA_CLIPRECTS) 685 if (nbox > I810_NR_SAREA_CLIPRECTS)
692 nbox = I810_NR_SAREA_CLIPRECTS; 686 nbox = I810_NR_SAREA_CLIPRECTS;
693 687
694 for (i = 0 ; i < nbox ; i++, pbox++) { 688 for (i = 0; i < nbox; i++, pbox++) {
695 unsigned int x = pbox->x1; 689 unsigned int x = pbox->x1;
696 unsigned int y = pbox->y1; 690 unsigned int y = pbox->y1;
697 unsigned int width = (pbox->x2 - x) * cpp; 691 unsigned int width = (pbox->x2 - x) * cpp;
@@ -700,52 +694,48 @@ static void i810_dma_dispatch_clear( drm_device_t *dev, int flags,
700 694
701 if (pbox->x1 > pbox->x2 || 695 if (pbox->x1 > pbox->x2 ||
702 pbox->y1 > pbox->y2 || 696 pbox->y1 > pbox->y2 ||
703 pbox->x2 > dev_priv->w || 697 pbox->x2 > dev_priv->w || pbox->y2 > dev_priv->h)
704 pbox->y2 > dev_priv->h)
705 continue; 698 continue;
706 699
707 if ( flags & I810_FRONT ) { 700 if (flags & I810_FRONT) {
708 BEGIN_LP_RING( 6 ); 701 BEGIN_LP_RING(6);
709 OUT_RING( BR00_BITBLT_CLIENT | 702 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
710 BR00_OP_COLOR_BLT | 0x3 ); 703 OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
711 OUT_RING( BR13_SOLID_PATTERN | (0xF0 << 16) | pitch ); 704 OUT_RING((height << 16) | width);
712 OUT_RING( (height << 16) | width ); 705 OUT_RING(start);
713 OUT_RING( start ); 706 OUT_RING(clear_color);
714 OUT_RING( clear_color ); 707 OUT_RING(0);
715 OUT_RING( 0 );
716 ADVANCE_LP_RING(); 708 ADVANCE_LP_RING();
717 } 709 }
718 710
719 if ( flags & I810_BACK ) { 711 if (flags & I810_BACK) {
720 BEGIN_LP_RING( 6 ); 712 BEGIN_LP_RING(6);
721 OUT_RING( BR00_BITBLT_CLIENT | 713 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
722 BR00_OP_COLOR_BLT | 0x3 ); 714 OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
723 OUT_RING( BR13_SOLID_PATTERN | (0xF0 << 16) | pitch ); 715 OUT_RING((height << 16) | width);
724 OUT_RING( (height << 16) | width ); 716 OUT_RING(dev_priv->back_offset + start);
725 OUT_RING( dev_priv->back_offset + start ); 717 OUT_RING(clear_color);
726 OUT_RING( clear_color ); 718 OUT_RING(0);
727 OUT_RING( 0 );
728 ADVANCE_LP_RING(); 719 ADVANCE_LP_RING();
729 } 720 }
730 721
731 if ( flags & I810_DEPTH ) { 722 if (flags & I810_DEPTH) {
732 BEGIN_LP_RING( 6 ); 723 BEGIN_LP_RING(6);
733 OUT_RING( BR00_BITBLT_CLIENT | 724 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
734 BR00_OP_COLOR_BLT | 0x3 ); 725 OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
735 OUT_RING( BR13_SOLID_PATTERN | (0xF0 << 16) | pitch ); 726 OUT_RING((height << 16) | width);
736 OUT_RING( (height << 16) | width ); 727 OUT_RING(dev_priv->depth_offset + start);
737 OUT_RING( dev_priv->depth_offset + start ); 728 OUT_RING(clear_zval);
738 OUT_RING( clear_zval ); 729 OUT_RING(0);
739 OUT_RING( 0 );
740 ADVANCE_LP_RING(); 730 ADVANCE_LP_RING();
741 } 731 }
742 } 732 }
743} 733}
744 734
745static void i810_dma_dispatch_swap( drm_device_t *dev ) 735static void i810_dma_dispatch_swap(drm_device_t * dev)
746{ 736{
747 drm_i810_private_t *dev_priv = dev->dev_private; 737 drm_i810_private_t *dev_priv = dev->dev_private;
748 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv; 738 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
749 int nbox = sarea_priv->nbox; 739 int nbox = sarea_priv->nbox;
750 drm_clip_rect_t *pbox = sarea_priv->boxes; 740 drm_clip_rect_t *pbox = sarea_priv->boxes;
751 int pitch = dev_priv->pitch; 741 int pitch = dev_priv->pitch;
@@ -755,75 +745,71 @@ static void i810_dma_dispatch_swap( drm_device_t *dev )
755 745
756 DRM_DEBUG("swapbuffers\n"); 746 DRM_DEBUG("swapbuffers\n");
757 747
758 i810_kernel_lost_context(dev); 748 i810_kernel_lost_context(dev);
759 749
760 if (nbox > I810_NR_SAREA_CLIPRECTS) 750 if (nbox > I810_NR_SAREA_CLIPRECTS)
761 nbox = I810_NR_SAREA_CLIPRECTS; 751 nbox = I810_NR_SAREA_CLIPRECTS;
762 752
763 for (i = 0 ; i < nbox; i++, pbox++) 753 for (i = 0; i < nbox; i++, pbox++) {
764 {
765 unsigned int w = pbox->x2 - pbox->x1; 754 unsigned int w = pbox->x2 - pbox->x1;
766 unsigned int h = pbox->y2 - pbox->y1; 755 unsigned int h = pbox->y2 - pbox->y1;
767 unsigned int dst = pbox->x1*cpp + pbox->y1*pitch; 756 unsigned int dst = pbox->x1 * cpp + pbox->y1 * pitch;
768 unsigned int start = dst; 757 unsigned int start = dst;
769 758
770 if (pbox->x1 > pbox->x2 || 759 if (pbox->x1 > pbox->x2 ||
771 pbox->y1 > pbox->y2 || 760 pbox->y1 > pbox->y2 ||
772 pbox->x2 > dev_priv->w || 761 pbox->x2 > dev_priv->w || pbox->y2 > dev_priv->h)
773 pbox->y2 > dev_priv->h)
774 continue; 762 continue;
775 763
776 BEGIN_LP_RING( 6 ); 764 BEGIN_LP_RING(6);
777 OUT_RING( BR00_BITBLT_CLIENT | BR00_OP_SRC_COPY_BLT | 0x4 ); 765 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_SRC_COPY_BLT | 0x4);
778 OUT_RING( pitch | (0xCC << 16)); 766 OUT_RING(pitch | (0xCC << 16));
779 OUT_RING( (h << 16) | (w * cpp)); 767 OUT_RING((h << 16) | (w * cpp));
780 if (dev_priv->current_page == 0) 768 if (dev_priv->current_page == 0)
781 OUT_RING(dev_priv->front_offset + start); 769 OUT_RING(dev_priv->front_offset + start);
782 else 770 else
783 OUT_RING(dev_priv->back_offset + start); 771 OUT_RING(dev_priv->back_offset + start);
784 OUT_RING( pitch ); 772 OUT_RING(pitch);
785 if (dev_priv->current_page == 0) 773 if (dev_priv->current_page == 0)
786 OUT_RING(dev_priv->back_offset + start); 774 OUT_RING(dev_priv->back_offset + start);
787 else 775 else
788 OUT_RING(dev_priv->front_offset + start); 776 OUT_RING(dev_priv->front_offset + start);
789 ADVANCE_LP_RING(); 777 ADVANCE_LP_RING();
790 } 778 }
791} 779}
792 780
793 781static void i810_dma_dispatch_vertex(drm_device_t * dev,
794static void i810_dma_dispatch_vertex(drm_device_t *dev, 782 drm_buf_t * buf, int discard, int used)
795 drm_buf_t *buf,
796 int discard,
797 int used)
798{ 783{
799 drm_i810_private_t *dev_priv = dev->dev_private; 784 drm_i810_private_t *dev_priv = dev->dev_private;
800 drm_i810_buf_priv_t *buf_priv = buf->dev_private; 785 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
801 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv; 786 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
802 drm_clip_rect_t *box = sarea_priv->boxes; 787 drm_clip_rect_t *box = sarea_priv->boxes;
803 int nbox = sarea_priv->nbox; 788 int nbox = sarea_priv->nbox;
804 unsigned long address = (unsigned long)buf->bus_address; 789 unsigned long address = (unsigned long)buf->bus_address;
805 unsigned long start = address - dev->agp->base; 790 unsigned long start = address - dev->agp->base;
806 int i = 0; 791 int i = 0;
807 RING_LOCALS; 792 RING_LOCALS;
808 793
809 i810_kernel_lost_context(dev); 794 i810_kernel_lost_context(dev);
810 795
811 if (nbox > I810_NR_SAREA_CLIPRECTS) 796 if (nbox > I810_NR_SAREA_CLIPRECTS)
812 nbox = I810_NR_SAREA_CLIPRECTS; 797 nbox = I810_NR_SAREA_CLIPRECTS;
813 798
814 if (used > 4*1024) 799 if (used > 4 * 1024)
815 used = 0; 800 used = 0;
816 801
817 if (sarea_priv->dirty) 802 if (sarea_priv->dirty)
818 i810EmitState( dev ); 803 i810EmitState(dev);
819 804
820 if (buf_priv->currently_mapped == I810_BUF_MAPPED) { 805 if (buf_priv->currently_mapped == I810_BUF_MAPPED) {
821 unsigned int prim = (sarea_priv->vertex_prim & PR_MASK); 806 unsigned int prim = (sarea_priv->vertex_prim & PR_MASK);
822 807
823 *(u32 *)buf_priv->kernel_virtual = ((GFX_OP_PRIMITIVE | prim | ((used/4)-2))); 808 *(u32 *) buf_priv->kernel_virtual =
809 ((GFX_OP_PRIMITIVE | prim | ((used / 4) - 2)));
824 810
825 if (used & 4) { 811 if (used & 4) {
826 *(u32 *)((u32)buf_priv->kernel_virtual + used) = 0; 812 *(u32 *) ((u32) buf_priv->kernel_virtual + used) = 0;
827 used += 4; 813 used += 4;
828 } 814 }
829 815
@@ -834,19 +820,20 @@ static void i810_dma_dispatch_vertex(drm_device_t *dev,
834 do { 820 do {
835 if (i < nbox) { 821 if (i < nbox) {
836 BEGIN_LP_RING(4); 822 BEGIN_LP_RING(4);
837 OUT_RING( GFX_OP_SCISSOR | SC_UPDATE_SCISSOR | 823 OUT_RING(GFX_OP_SCISSOR | SC_UPDATE_SCISSOR |
838 SC_ENABLE ); 824 SC_ENABLE);
839 OUT_RING( GFX_OP_SCISSOR_INFO ); 825 OUT_RING(GFX_OP_SCISSOR_INFO);
840 OUT_RING( box[i].x1 | (box[i].y1<<16) ); 826 OUT_RING(box[i].x1 | (box[i].y1 << 16));
841 OUT_RING( (box[i].x2-1) | ((box[i].y2-1)<<16) ); 827 OUT_RING((box[i].x2 -
828 1) | ((box[i].y2 - 1) << 16));
842 ADVANCE_LP_RING(); 829 ADVANCE_LP_RING();
843 } 830 }
844 831
845 BEGIN_LP_RING(4); 832 BEGIN_LP_RING(4);
846 OUT_RING( CMD_OP_BATCH_BUFFER ); 833 OUT_RING(CMD_OP_BATCH_BUFFER);
847 OUT_RING( start | BB1_PROTECTED ); 834 OUT_RING(start | BB1_PROTECTED);
848 OUT_RING( start + used - 4 ); 835 OUT_RING(start + used - 4);
849 OUT_RING( 0 ); 836 OUT_RING(0);
850 ADVANCE_LP_RING(); 837 ADVANCE_LP_RING();
851 838
852 } while (++i < nbox); 839 } while (++i < nbox);
@@ -855,59 +842,59 @@ static void i810_dma_dispatch_vertex(drm_device_t *dev,
855 if (discard) { 842 if (discard) {
856 dev_priv->counter++; 843 dev_priv->counter++;
857 844
858 (void) cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, 845 (void)cmpxchg(buf_priv->in_use, I810_BUF_CLIENT,
859 I810_BUF_HARDWARE); 846 I810_BUF_HARDWARE);
860 847
861 BEGIN_LP_RING(8); 848 BEGIN_LP_RING(8);
862 OUT_RING( CMD_STORE_DWORD_IDX ); 849 OUT_RING(CMD_STORE_DWORD_IDX);
863 OUT_RING( 20 ); 850 OUT_RING(20);
864 OUT_RING( dev_priv->counter ); 851 OUT_RING(dev_priv->counter);
865 OUT_RING( CMD_STORE_DWORD_IDX ); 852 OUT_RING(CMD_STORE_DWORD_IDX);
866 OUT_RING( buf_priv->my_use_idx ); 853 OUT_RING(buf_priv->my_use_idx);
867 OUT_RING( I810_BUF_FREE ); 854 OUT_RING(I810_BUF_FREE);
868 OUT_RING( CMD_REPORT_HEAD ); 855 OUT_RING(CMD_REPORT_HEAD);
869 OUT_RING( 0 ); 856 OUT_RING(0);
870 ADVANCE_LP_RING(); 857 ADVANCE_LP_RING();
871 } 858 }
872} 859}
873 860
874static void i810_dma_dispatch_flip( drm_device_t *dev ) 861static void i810_dma_dispatch_flip(drm_device_t * dev)
875{ 862{
876 drm_i810_private_t *dev_priv = dev->dev_private; 863 drm_i810_private_t *dev_priv = dev->dev_private;
877 int pitch = dev_priv->pitch; 864 int pitch = dev_priv->pitch;
878 RING_LOCALS; 865 RING_LOCALS;
879 866
880 DRM_DEBUG( "%s: page=%d pfCurrentPage=%d\n", 867 DRM_DEBUG("%s: page=%d pfCurrentPage=%d\n",
881 __FUNCTION__, 868 __FUNCTION__,
882 dev_priv->current_page, 869 dev_priv->current_page,
883 dev_priv->sarea_priv->pf_current_page); 870 dev_priv->sarea_priv->pf_current_page);
884 871
885 i810_kernel_lost_context(dev); 872 i810_kernel_lost_context(dev);
886 873
887 BEGIN_LP_RING( 2 ); 874 BEGIN_LP_RING(2);
888 OUT_RING( INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE ); 875 OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
889 OUT_RING( 0 ); 876 OUT_RING(0);
890 ADVANCE_LP_RING(); 877 ADVANCE_LP_RING();
891 878
892 BEGIN_LP_RING( I810_DEST_SETUP_SIZE + 2 ); 879 BEGIN_LP_RING(I810_DEST_SETUP_SIZE + 2);
893 /* On i815 at least ASYNC is buggy */ 880 /* On i815 at least ASYNC is buggy */
894 /* pitch<<5 is from 11.2.8 p158, 881 /* pitch<<5 is from 11.2.8 p158,
895 its the pitch / 8 then left shifted 8, 882 its the pitch / 8 then left shifted 8,
896 so (pitch >> 3) << 8 */ 883 so (pitch >> 3) << 8 */
897 OUT_RING( CMD_OP_FRONTBUFFER_INFO | (pitch<<5) /*| ASYNC_FLIP */ ); 884 OUT_RING(CMD_OP_FRONTBUFFER_INFO | (pitch << 5) /*| ASYNC_FLIP */ );
898 if ( dev_priv->current_page == 0 ) { 885 if (dev_priv->current_page == 0) {
899 OUT_RING( dev_priv->back_offset ); 886 OUT_RING(dev_priv->back_offset);
900 dev_priv->current_page = 1; 887 dev_priv->current_page = 1;
901 } else { 888 } else {
902 OUT_RING( dev_priv->front_offset ); 889 OUT_RING(dev_priv->front_offset);
903 dev_priv->current_page = 0; 890 dev_priv->current_page = 0;
904 } 891 }
905 OUT_RING(0); 892 OUT_RING(0);
906 ADVANCE_LP_RING(); 893 ADVANCE_LP_RING();
907 894
908 BEGIN_LP_RING(2); 895 BEGIN_LP_RING(2);
909 OUT_RING( CMD_OP_WAIT_FOR_EVENT | WAIT_FOR_PLANE_A_FLIP ); 896 OUT_RING(CMD_OP_WAIT_FOR_EVENT | WAIT_FOR_PLANE_A_FLIP);
910 OUT_RING( 0 ); 897 OUT_RING(0);
911 ADVANCE_LP_RING(); 898 ADVANCE_LP_RING();
912 899
913 /* Increment the frame counter. The client-side 3D driver must 900 /* Increment the frame counter. The client-side 3D driver must
@@ -918,46 +905,46 @@ static void i810_dma_dispatch_flip( drm_device_t *dev )
918 905
919} 906}
920 907
921static void i810_dma_quiescent(drm_device_t *dev) 908static void i810_dma_quiescent(drm_device_t * dev)
922{ 909{
923 drm_i810_private_t *dev_priv = dev->dev_private; 910 drm_i810_private_t *dev_priv = dev->dev_private;
924 RING_LOCALS; 911 RING_LOCALS;
925 912
926/* printk("%s\n", __FUNCTION__); */ 913/* printk("%s\n", __FUNCTION__); */
927 914
928 i810_kernel_lost_context(dev); 915 i810_kernel_lost_context(dev);
929 916
930 BEGIN_LP_RING(4); 917 BEGIN_LP_RING(4);
931 OUT_RING( INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE ); 918 OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
932 OUT_RING( CMD_REPORT_HEAD ); 919 OUT_RING(CMD_REPORT_HEAD);
933 OUT_RING( 0 ); 920 OUT_RING(0);
934 OUT_RING( 0 ); 921 OUT_RING(0);
935 ADVANCE_LP_RING(); 922 ADVANCE_LP_RING();
936 923
937 i810_wait_ring( dev, dev_priv->ring.Size - 8 ); 924 i810_wait_ring(dev, dev_priv->ring.Size - 8);
938} 925}
939 926
940static int i810_flush_queue(drm_device_t *dev) 927static int i810_flush_queue(drm_device_t * dev)
941{ 928{
942 drm_i810_private_t *dev_priv = dev->dev_private; 929 drm_i810_private_t *dev_priv = dev->dev_private;
943 drm_device_dma_t *dma = dev->dma; 930 drm_device_dma_t *dma = dev->dma;
944 int i, ret = 0; 931 int i, ret = 0;
945 RING_LOCALS; 932 RING_LOCALS;
946 933
947/* printk("%s\n", __FUNCTION__); */ 934/* printk("%s\n", __FUNCTION__); */
948 935
949 i810_kernel_lost_context(dev); 936 i810_kernel_lost_context(dev);
950 937
951 BEGIN_LP_RING(2); 938 BEGIN_LP_RING(2);
952 OUT_RING( CMD_REPORT_HEAD ); 939 OUT_RING(CMD_REPORT_HEAD);
953 OUT_RING( 0 ); 940 OUT_RING(0);
954 ADVANCE_LP_RING(); 941 ADVANCE_LP_RING();
955 942
956 i810_wait_ring( dev, dev_priv->ring.Size - 8 ); 943 i810_wait_ring(dev, dev_priv->ring.Size - 8);
957 944
958 for (i = 0; i < dma->buf_count; i++) { 945 for (i = 0; i < dma->buf_count; i++) {
959 drm_buf_t *buf = dma->buflist[ i ]; 946 drm_buf_t *buf = dma->buflist[i];
960 drm_i810_buf_priv_t *buf_priv = buf->dev_private; 947 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
961 948
962 int used = cmpxchg(buf_priv->in_use, I810_BUF_HARDWARE, 949 int used = cmpxchg(buf_priv->in_use, I810_BUF_HARDWARE,
963 I810_BUF_FREE); 950 I810_BUF_FREE);
@@ -968,24 +955,27 @@ static int i810_flush_queue(drm_device_t *dev)
968 DRM_DEBUG("still on client\n"); 955 DRM_DEBUG("still on client\n");
969 } 956 }
970 957
971 return ret; 958 return ret;
972} 959}
973 960
974/* Must be called with the lock held */ 961/* Must be called with the lock held */
975void i810_reclaim_buffers(drm_device_t *dev, struct file *filp) 962void i810_reclaim_buffers(drm_device_t * dev, struct file *filp)
976{ 963{
977 drm_device_dma_t *dma = dev->dma; 964 drm_device_dma_t *dma = dev->dma;
978 int i; 965 int i;
979 966
980 if (!dma) return; 967 if (!dma)
981 if (!dev->dev_private) return; 968 return;
982 if (!dma->buflist) return; 969 if (!dev->dev_private)
970 return;
971 if (!dma->buflist)
972 return;
983 973
984 i810_flush_queue(dev); 974 i810_flush_queue(dev);
985 975
986 for (i = 0; i < dma->buf_count; i++) { 976 for (i = 0; i < dma->buf_count; i++) {
987 drm_buf_t *buf = dma->buflist[ i ]; 977 drm_buf_t *buf = dma->buflist[i];
988 drm_i810_buf_priv_t *buf_priv = buf->dev_private; 978 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
989 979
990 if (buf->filp == filp && buf_priv) { 980 if (buf->filp == filp && buf_priv) {
991 int used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, 981 int used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT,
@@ -994,7 +984,7 @@ void i810_reclaim_buffers(drm_device_t *dev, struct file *filp)
994 if (used == I810_BUF_CLIENT) 984 if (used == I810_BUF_CLIENT)
995 DRM_DEBUG("reclaimed from client\n"); 985 DRM_DEBUG("reclaimed from client\n");
996 if (buf_priv->currently_mapped == I810_BUF_MAPPED) 986 if (buf_priv->currently_mapped == I810_BUF_MAPPED)
997 buf_priv->currently_mapped = I810_BUF_UNMAPPED; 987 buf_priv->currently_mapped = I810_BUF_UNMAPPED;
998 } 988 }
999 } 989 }
1000} 990}
@@ -1002,29 +992,29 @@ void i810_reclaim_buffers(drm_device_t *dev, struct file *filp)
1002static int i810_flush_ioctl(struct inode *inode, struct file *filp, 992static int i810_flush_ioctl(struct inode *inode, struct file *filp,
1003 unsigned int cmd, unsigned long arg) 993 unsigned int cmd, unsigned long arg)
1004{ 994{
1005 drm_file_t *priv = filp->private_data; 995 drm_file_t *priv = filp->private_data;
1006 drm_device_t *dev = priv->head->dev; 996 drm_device_t *dev = priv->head->dev;
1007 997
1008 LOCK_TEST_WITH_RETURN(dev, filp); 998 LOCK_TEST_WITH_RETURN(dev, filp);
1009 999
1010 i810_flush_queue(dev); 1000 i810_flush_queue(dev);
1011 return 0; 1001 return 0;
1012} 1002}
1013 1003
1014
1015static int i810_dma_vertex(struct inode *inode, struct file *filp, 1004static int i810_dma_vertex(struct inode *inode, struct file *filp,
1016 unsigned int cmd, unsigned long arg) 1005 unsigned int cmd, unsigned long arg)
1017{ 1006{
1018 drm_file_t *priv = filp->private_data; 1007 drm_file_t *priv = filp->private_data;
1019 drm_device_t *dev = priv->head->dev; 1008 drm_device_t *dev = priv->head->dev;
1020 drm_device_dma_t *dma = dev->dma; 1009 drm_device_dma_t *dma = dev->dma;
1021 drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private; 1010 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1022 u32 *hw_status = dev_priv->hw_status_page; 1011 u32 *hw_status = dev_priv->hw_status_page;
1023 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *) 1012 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
1024 dev_priv->sarea_priv; 1013 dev_priv->sarea_priv;
1025 drm_i810_vertex_t vertex; 1014 drm_i810_vertex_t vertex;
1026 1015
1027 if (copy_from_user(&vertex, (drm_i810_vertex_t __user *)arg, sizeof(vertex))) 1016 if (copy_from_user
1017 (&vertex, (drm_i810_vertex_t __user *) arg, sizeof(vertex)))
1028 return -EFAULT; 1018 return -EFAULT;
1029 1019
1030 LOCK_TEST_WITH_RETURN(dev, filp); 1020 LOCK_TEST_WITH_RETURN(dev, filp);
@@ -1032,48 +1022,46 @@ static int i810_dma_vertex(struct inode *inode, struct file *filp,
1032 DRM_DEBUG("i810 dma vertex, idx %d used %d discard %d\n", 1022 DRM_DEBUG("i810 dma vertex, idx %d used %d discard %d\n",
1033 vertex.idx, vertex.used, vertex.discard); 1023 vertex.idx, vertex.used, vertex.discard);
1034 1024
1035 if (vertex.idx < 0 || vertex.idx > dma->buf_count) 1025 if (vertex.idx < 0 || vertex.idx > dma->buf_count)
1036 return -EINVAL; 1026 return -EINVAL;
1037 1027
1038 i810_dma_dispatch_vertex( dev, 1028 i810_dma_dispatch_vertex(dev,
1039 dma->buflist[ vertex.idx ], 1029 dma->buflist[vertex.idx],
1040 vertex.discard, vertex.used ); 1030 vertex.discard, vertex.used);
1041 1031
1042 atomic_add(vertex.used, &dev->counts[_DRM_STAT_SECONDARY]); 1032 atomic_add(vertex.used, &dev->counts[_DRM_STAT_SECONDARY]);
1043 atomic_inc(&dev->counts[_DRM_STAT_DMA]); 1033 atomic_inc(&dev->counts[_DRM_STAT_DMA]);
1044 sarea_priv->last_enqueue = dev_priv->counter-1; 1034 sarea_priv->last_enqueue = dev_priv->counter - 1;
1045 sarea_priv->last_dispatch = (int) hw_status[5]; 1035 sarea_priv->last_dispatch = (int)hw_status[5];
1046 1036
1047 return 0; 1037 return 0;
1048} 1038}
1049 1039
1050
1051
1052static int i810_clear_bufs(struct inode *inode, struct file *filp, 1040static int i810_clear_bufs(struct inode *inode, struct file *filp,
1053 unsigned int cmd, unsigned long arg) 1041 unsigned int cmd, unsigned long arg)
1054{ 1042{
1055 drm_file_t *priv = filp->private_data; 1043 drm_file_t *priv = filp->private_data;
1056 drm_device_t *dev = priv->head->dev; 1044 drm_device_t *dev = priv->head->dev;
1057 drm_i810_clear_t clear; 1045 drm_i810_clear_t clear;
1058 1046
1059 if (copy_from_user(&clear, (drm_i810_clear_t __user *)arg, sizeof(clear))) 1047 if (copy_from_user
1048 (&clear, (drm_i810_clear_t __user *) arg, sizeof(clear)))
1060 return -EFAULT; 1049 return -EFAULT;
1061 1050
1062 LOCK_TEST_WITH_RETURN(dev, filp); 1051 LOCK_TEST_WITH_RETURN(dev, filp);
1063 1052
1064 /* GH: Someone's doing nasty things... */ 1053 /* GH: Someone's doing nasty things... */
1065 if (!dev->dev_private) { 1054 if (!dev->dev_private) {
1066 return -EINVAL; 1055 return -EINVAL;
1067 } 1056 }
1068 1057
1069 i810_dma_dispatch_clear( dev, clear.flags, 1058 i810_dma_dispatch_clear(dev, clear.flags,
1070 clear.clear_color, 1059 clear.clear_color, clear.clear_depth);
1071 clear.clear_depth ); 1060 return 0;
1072 return 0;
1073} 1061}
1074 1062
1075static int i810_swap_bufs(struct inode *inode, struct file *filp, 1063static int i810_swap_bufs(struct inode *inode, struct file *filp,
1076 unsigned int cmd, unsigned long arg) 1064 unsigned int cmd, unsigned long arg)
1077{ 1065{
1078 drm_file_t *priv = filp->private_data; 1066 drm_file_t *priv = filp->private_data;
1079 drm_device_t *dev = priv->head->dev; 1067 drm_device_t *dev = priv->head->dev;
@@ -1082,37 +1070,37 @@ static int i810_swap_bufs(struct inode *inode, struct file *filp,
1082 1070
1083 LOCK_TEST_WITH_RETURN(dev, filp); 1071 LOCK_TEST_WITH_RETURN(dev, filp);
1084 1072
1085 i810_dma_dispatch_swap( dev ); 1073 i810_dma_dispatch_swap(dev);
1086 return 0; 1074 return 0;
1087} 1075}
1088 1076
1089static int i810_getage(struct inode *inode, struct file *filp, unsigned int cmd, 1077static int i810_getage(struct inode *inode, struct file *filp, unsigned int cmd,
1090 unsigned long arg) 1078 unsigned long arg)
1091{ 1079{
1092 drm_file_t *priv = filp->private_data; 1080 drm_file_t *priv = filp->private_data;
1093 drm_device_t *dev = priv->head->dev; 1081 drm_device_t *dev = priv->head->dev;
1094 drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private; 1082 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1095 u32 *hw_status = dev_priv->hw_status_page; 1083 u32 *hw_status = dev_priv->hw_status_page;
1096 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *) 1084 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
1097 dev_priv->sarea_priv; 1085 dev_priv->sarea_priv;
1098 1086
1099 sarea_priv->last_dispatch = (int) hw_status[5]; 1087 sarea_priv->last_dispatch = (int)hw_status[5];
1100 return 0; 1088 return 0;
1101} 1089}
1102 1090
1103static int i810_getbuf(struct inode *inode, struct file *filp, unsigned int cmd, 1091static int i810_getbuf(struct inode *inode, struct file *filp, unsigned int cmd,
1104 unsigned long arg) 1092 unsigned long arg)
1105{ 1093{
1106 drm_file_t *priv = filp->private_data; 1094 drm_file_t *priv = filp->private_data;
1107 drm_device_t *dev = priv->head->dev; 1095 drm_device_t *dev = priv->head->dev;
1108 int retcode = 0; 1096 int retcode = 0;
1109 drm_i810_dma_t d; 1097 drm_i810_dma_t d;
1110 drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private; 1098 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1111 u32 *hw_status = dev_priv->hw_status_page; 1099 u32 *hw_status = dev_priv->hw_status_page;
1112 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *) 1100 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
1113 dev_priv->sarea_priv; 1101 dev_priv->sarea_priv;
1114 1102
1115 if (copy_from_user(&d, (drm_i810_dma_t __user *)arg, sizeof(d))) 1103 if (copy_from_user(&d, (drm_i810_dma_t __user *) arg, sizeof(d)))
1116 return -EFAULT; 1104 return -EFAULT;
1117 1105
1118 LOCK_TEST_WITH_RETURN(dev, filp); 1106 LOCK_TEST_WITH_RETURN(dev, filp);
@@ -1124,29 +1112,29 @@ static int i810_getbuf(struct inode *inode, struct file *filp, unsigned int cmd,
1124 DRM_DEBUG("i810_dma: %d returning %d, granted = %d\n", 1112 DRM_DEBUG("i810_dma: %d returning %d, granted = %d\n",
1125 current->pid, retcode, d.granted); 1113 current->pid, retcode, d.granted);
1126 1114
1127 if (copy_to_user((drm_dma_t __user *)arg, &d, sizeof(d))) 1115 if (copy_to_user((drm_dma_t __user *) arg, &d, sizeof(d)))
1128 return -EFAULT; 1116 return -EFAULT;
1129 sarea_priv->last_dispatch = (int) hw_status[5]; 1117 sarea_priv->last_dispatch = (int)hw_status[5];
1130 1118
1131 return retcode; 1119 return retcode;
1132} 1120}
1133 1121
1134static int i810_copybuf(struct inode *inode, 1122static int i810_copybuf(struct inode *inode,
1135 struct file *filp, unsigned int cmd, unsigned long arg) 1123 struct file *filp, unsigned int cmd, unsigned long arg)
1136{ 1124{
1137 /* Never copy - 2.4.x doesn't need it */ 1125 /* Never copy - 2.4.x doesn't need it */
1138 return 0; 1126 return 0;
1139} 1127}
1140 1128
1141static int i810_docopy(struct inode *inode, struct file *filp, unsigned int cmd, 1129static int i810_docopy(struct inode *inode, struct file *filp, unsigned int cmd,
1142 unsigned long arg) 1130 unsigned long arg)
1143{ 1131{
1144 /* Never copy - 2.4.x doesn't need it */ 1132 /* Never copy - 2.4.x doesn't need it */
1145 return 0; 1133 return 0;
1146} 1134}
1147 1135
1148static void i810_dma_dispatch_mc(drm_device_t *dev, drm_buf_t *buf, int used, 1136static void i810_dma_dispatch_mc(drm_device_t * dev, drm_buf_t * buf, int used,
1149 unsigned int last_render) 1137 unsigned int last_render)
1150{ 1138{
1151 drm_i810_private_t *dev_priv = dev->dev_private; 1139 drm_i810_private_t *dev_priv = dev->dev_private;
1152 drm_i810_buf_priv_t *buf_priv = buf->dev_private; 1140 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
@@ -1158,19 +1146,17 @@ static void i810_dma_dispatch_mc(drm_device_t *dev, drm_buf_t *buf, int used,
1158 1146
1159 i810_kernel_lost_context(dev); 1147 i810_kernel_lost_context(dev);
1160 1148
1161 u = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, 1149 u = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, I810_BUF_HARDWARE);
1162 I810_BUF_HARDWARE);
1163 if (u != I810_BUF_CLIENT) { 1150 if (u != I810_BUF_CLIENT) {
1164 DRM_DEBUG("MC found buffer that isn't mine!\n"); 1151 DRM_DEBUG("MC found buffer that isn't mine!\n");
1165 } 1152 }
1166 1153
1167 if (used > 4*1024) 1154 if (used > 4 * 1024)
1168 used = 0; 1155 used = 0;
1169 1156
1170 sarea_priv->dirty = 0x7f; 1157 sarea_priv->dirty = 0x7f;
1171 1158
1172 DRM_DEBUG("dispatch mc addr 0x%lx, used 0x%x\n", 1159 DRM_DEBUG("dispatch mc addr 0x%lx, used 0x%x\n", address, used);
1173 address, used);
1174 1160
1175 dev_priv->counter++; 1161 dev_priv->counter++;
1176 DRM_DEBUG("dispatch counter : %ld\n", dev_priv->counter); 1162 DRM_DEBUG("dispatch counter : %ld\n", dev_priv->counter);
@@ -1181,46 +1167,45 @@ static void i810_dma_dispatch_mc(drm_device_t *dev, drm_buf_t *buf, int used,
1181 1167
1182 if (buf_priv->currently_mapped == I810_BUF_MAPPED) { 1168 if (buf_priv->currently_mapped == I810_BUF_MAPPED) {
1183 if (used & 4) { 1169 if (used & 4) {
1184 *(u32 *)((u32)buf_priv->virtual + used) = 0; 1170 *(u32 *) ((u32) buf_priv->virtual + used) = 0;
1185 used += 4; 1171 used += 4;
1186 } 1172 }
1187 1173
1188 i810_unmap_buffer(buf); 1174 i810_unmap_buffer(buf);
1189 } 1175 }
1190 BEGIN_LP_RING(4); 1176 BEGIN_LP_RING(4);
1191 OUT_RING( CMD_OP_BATCH_BUFFER ); 1177 OUT_RING(CMD_OP_BATCH_BUFFER);
1192 OUT_RING( start | BB1_PROTECTED ); 1178 OUT_RING(start | BB1_PROTECTED);
1193 OUT_RING( start + used - 4 ); 1179 OUT_RING(start + used - 4);
1194 OUT_RING( 0 ); 1180 OUT_RING(0);
1195 ADVANCE_LP_RING(); 1181 ADVANCE_LP_RING();
1196 1182
1197
1198 BEGIN_LP_RING(8); 1183 BEGIN_LP_RING(8);
1199 OUT_RING( CMD_STORE_DWORD_IDX ); 1184 OUT_RING(CMD_STORE_DWORD_IDX);
1200 OUT_RING( buf_priv->my_use_idx ); 1185 OUT_RING(buf_priv->my_use_idx);
1201 OUT_RING( I810_BUF_FREE ); 1186 OUT_RING(I810_BUF_FREE);
1202 OUT_RING( 0 ); 1187 OUT_RING(0);
1203 1188
1204 OUT_RING( CMD_STORE_DWORD_IDX ); 1189 OUT_RING(CMD_STORE_DWORD_IDX);
1205 OUT_RING( 16 ); 1190 OUT_RING(16);
1206 OUT_RING( last_render ); 1191 OUT_RING(last_render);
1207 OUT_RING( 0 ); 1192 OUT_RING(0);
1208 ADVANCE_LP_RING(); 1193 ADVANCE_LP_RING();
1209} 1194}
1210 1195
1211static int i810_dma_mc(struct inode *inode, struct file *filp, 1196static int i810_dma_mc(struct inode *inode, struct file *filp,
1212 unsigned int cmd, unsigned long arg) 1197 unsigned int cmd, unsigned long arg)
1213{ 1198{
1214 drm_file_t *priv = filp->private_data; 1199 drm_file_t *priv = filp->private_data;
1215 drm_device_t *dev = priv->head->dev; 1200 drm_device_t *dev = priv->head->dev;
1216 drm_device_dma_t *dma = dev->dma; 1201 drm_device_dma_t *dma = dev->dma;
1217 drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private; 1202 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1218 u32 *hw_status = dev_priv->hw_status_page; 1203 u32 *hw_status = dev_priv->hw_status_page;
1219 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *) 1204 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
1220 dev_priv->sarea_priv; 1205 dev_priv->sarea_priv;
1221 drm_i810_mc_t mc; 1206 drm_i810_mc_t mc;
1222 1207
1223 if (copy_from_user(&mc, (drm_i810_mc_t __user *)arg, sizeof(mc))) 1208 if (copy_from_user(&mc, (drm_i810_mc_t __user *) arg, sizeof(mc)))
1224 return -EFAULT; 1209 return -EFAULT;
1225 1210
1226 LOCK_TEST_WITH_RETURN(dev, filp); 1211 LOCK_TEST_WITH_RETURN(dev, filp);
@@ -1229,12 +1214,12 @@ static int i810_dma_mc(struct inode *inode, struct file *filp,
1229 return -EINVAL; 1214 return -EINVAL;
1230 1215
1231 i810_dma_dispatch_mc(dev, dma->buflist[mc.idx], mc.used, 1216 i810_dma_dispatch_mc(dev, dma->buflist[mc.idx], mc.used,
1232 mc.last_render ); 1217 mc.last_render);
1233 1218
1234 atomic_add(mc.used, &dev->counts[_DRM_STAT_SECONDARY]); 1219 atomic_add(mc.used, &dev->counts[_DRM_STAT_SECONDARY]);
1235 atomic_inc(&dev->counts[_DRM_STAT_DMA]); 1220 atomic_inc(&dev->counts[_DRM_STAT_DMA]);
1236 sarea_priv->last_enqueue = dev_priv->counter-1; 1221 sarea_priv->last_enqueue = dev_priv->counter - 1;
1237 sarea_priv->last_dispatch = (int) hw_status[5]; 1222 sarea_priv->last_dispatch = (int)hw_status[5];
1238 1223
1239 return 0; 1224 return 0;
1240} 1225}
@@ -1244,22 +1229,23 @@ static int i810_rstatus(struct inode *inode, struct file *filp,
1244{ 1229{
1245 drm_file_t *priv = filp->private_data; 1230 drm_file_t *priv = filp->private_data;
1246 drm_device_t *dev = priv->head->dev; 1231 drm_device_t *dev = priv->head->dev;
1247 drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private; 1232 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1248 1233
1249 return (int)(((u32 *)(dev_priv->hw_status_page))[4]); 1234 return (int)(((u32 *) (dev_priv->hw_status_page))[4]);
1250} 1235}
1251 1236
1252static int i810_ov0_info(struct inode *inode, struct file *filp, 1237static int i810_ov0_info(struct inode *inode, struct file *filp,
1253 unsigned int cmd, unsigned long arg) 1238 unsigned int cmd, unsigned long arg)
1254{ 1239{
1255 drm_file_t *priv = filp->private_data; 1240 drm_file_t *priv = filp->private_data;
1256 drm_device_t *dev = priv->head->dev; 1241 drm_device_t *dev = priv->head->dev;
1257 drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private; 1242 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1258 drm_i810_overlay_t data; 1243 drm_i810_overlay_t data;
1259 1244
1260 data.offset = dev_priv->overlay_offset; 1245 data.offset = dev_priv->overlay_offset;
1261 data.physical = dev_priv->overlay_physical; 1246 data.physical = dev_priv->overlay_physical;
1262 if (copy_to_user((drm_i810_overlay_t __user *)arg,&data,sizeof(data))) 1247 if (copy_to_user
1248 ((drm_i810_overlay_t __user *) arg, &data, sizeof(data)))
1263 return -EFAULT; 1249 return -EFAULT;
1264 return 0; 1250 return 0;
1265} 1251}
@@ -1269,7 +1255,7 @@ static int i810_fstatus(struct inode *inode, struct file *filp,
1269{ 1255{
1270 drm_file_t *priv = filp->private_data; 1256 drm_file_t *priv = filp->private_data;
1271 drm_device_t *dev = priv->head->dev; 1257 drm_device_t *dev = priv->head->dev;
1272 drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private; 1258 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1273 1259
1274 LOCK_TEST_WITH_RETURN(dev, filp); 1260 LOCK_TEST_WITH_RETURN(dev, filp);
1275 1261
@@ -1277,47 +1263,46 @@ static int i810_fstatus(struct inode *inode, struct file *filp,
1277} 1263}
1278 1264
1279static int i810_ov0_flip(struct inode *inode, struct file *filp, 1265static int i810_ov0_flip(struct inode *inode, struct file *filp,
1280 unsigned int cmd, unsigned long arg) 1266 unsigned int cmd, unsigned long arg)
1281{ 1267{
1282 drm_file_t *priv = filp->private_data; 1268 drm_file_t *priv = filp->private_data;
1283 drm_device_t *dev = priv->head->dev; 1269 drm_device_t *dev = priv->head->dev;
1284 drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private; 1270 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1285 1271
1286 LOCK_TEST_WITH_RETURN(dev, filp); 1272 LOCK_TEST_WITH_RETURN(dev, filp);
1287 1273
1288 //Tell the overlay to update 1274 //Tell the overlay to update
1289 I810_WRITE(0x30000,dev_priv->overlay_physical | 0x80000000); 1275 I810_WRITE(0x30000, dev_priv->overlay_physical | 0x80000000);
1290 1276
1291 return 0; 1277 return 0;
1292} 1278}
1293 1279
1294
1295/* Not sure why this isn't set all the time: 1280/* Not sure why this isn't set all the time:
1296 */ 1281 */
1297static void i810_do_init_pageflip( drm_device_t *dev ) 1282static void i810_do_init_pageflip(drm_device_t * dev)
1298{ 1283{
1299 drm_i810_private_t *dev_priv = dev->dev_private; 1284 drm_i810_private_t *dev_priv = dev->dev_private;
1300 1285
1301 DRM_DEBUG("%s\n", __FUNCTION__); 1286 DRM_DEBUG("%s\n", __FUNCTION__);
1302 dev_priv->page_flipping = 1; 1287 dev_priv->page_flipping = 1;
1303 dev_priv->current_page = 0; 1288 dev_priv->current_page = 0;
1304 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page; 1289 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
1305} 1290}
1306 1291
1307static int i810_do_cleanup_pageflip( drm_device_t *dev ) 1292static int i810_do_cleanup_pageflip(drm_device_t * dev)
1308{ 1293{
1309 drm_i810_private_t *dev_priv = dev->dev_private; 1294 drm_i810_private_t *dev_priv = dev->dev_private;
1310 1295
1311 DRM_DEBUG("%s\n", __FUNCTION__); 1296 DRM_DEBUG("%s\n", __FUNCTION__);
1312 if (dev_priv->current_page != 0) 1297 if (dev_priv->current_page != 0)
1313 i810_dma_dispatch_flip( dev ); 1298 i810_dma_dispatch_flip(dev);
1314 1299
1315 dev_priv->page_flipping = 0; 1300 dev_priv->page_flipping = 0;
1316 return 0; 1301 return 0;
1317} 1302}
1318 1303
1319static int i810_flip_bufs(struct inode *inode, struct file *filp, 1304static int i810_flip_bufs(struct inode *inode, struct file *filp,
1320 unsigned int cmd, unsigned long arg) 1305 unsigned int cmd, unsigned long arg)
1321{ 1306{
1322 drm_file_t *priv = filp->private_data; 1307 drm_file_t *priv = filp->private_data;
1323 drm_device_t *dev = priv->head->dev; 1308 drm_device_t *dev = priv->head->dev;
@@ -1327,19 +1312,19 @@ static int i810_flip_bufs(struct inode *inode, struct file *filp,
1327 1312
1328 LOCK_TEST_WITH_RETURN(dev, filp); 1313 LOCK_TEST_WITH_RETURN(dev, filp);
1329 1314
1330 if (!dev_priv->page_flipping) 1315 if (!dev_priv->page_flipping)
1331 i810_do_init_pageflip( dev ); 1316 i810_do_init_pageflip(dev);
1332 1317
1333 i810_dma_dispatch_flip( dev ); 1318 i810_dma_dispatch_flip(dev);
1334 return 0; 1319 return 0;
1335} 1320}
1336 1321
1337void i810_driver_pretakedown(drm_device_t *dev) 1322void i810_driver_pretakedown(drm_device_t * dev)
1338{ 1323{
1339 i810_dma_cleanup( dev ); 1324 i810_dma_cleanup(dev);
1340} 1325}
1341 1326
1342void i810_driver_prerelease(drm_device_t *dev, DRMFILE filp) 1327void i810_driver_prerelease(drm_device_t * dev, DRMFILE filp)
1343{ 1328{
1344 if (dev->dev_private) { 1329 if (dev->dev_private) {
1345 drm_i810_private_t *dev_priv = dev->dev_private; 1330 drm_i810_private_t *dev_priv = dev->dev_private;
@@ -1349,33 +1334,47 @@ void i810_driver_prerelease(drm_device_t *dev, DRMFILE filp)
1349 } 1334 }
1350} 1335}
1351 1336
1352void i810_driver_release(drm_device_t *dev, struct file *filp) 1337void i810_driver_release(drm_device_t * dev, struct file *filp)
1353{ 1338{
1354 i810_reclaim_buffers(dev, filp); 1339 i810_reclaim_buffers(dev, filp);
1355} 1340}
1356 1341
1357int i810_driver_dma_quiescent(drm_device_t *dev) 1342int i810_driver_dma_quiescent(drm_device_t * dev)
1358{ 1343{
1359 i810_dma_quiescent( dev ); 1344 i810_dma_quiescent(dev);
1360 return 0; 1345 return 0;
1361} 1346}
1362 1347
1363drm_ioctl_desc_t i810_ioctls[] = { 1348drm_ioctl_desc_t i810_ioctls[] = {
1364 [DRM_IOCTL_NR(DRM_I810_INIT)] = { i810_dma_init, 1, 1 }, 1349 [DRM_IOCTL_NR(DRM_I810_INIT)] = {i810_dma_init, 1, 1}
1365 [DRM_IOCTL_NR(DRM_I810_VERTEX)] = { i810_dma_vertex, 1, 0 }, 1350 ,
1366 [DRM_IOCTL_NR(DRM_I810_CLEAR)] = { i810_clear_bufs, 1, 0 }, 1351 [DRM_IOCTL_NR(DRM_I810_VERTEX)] = {i810_dma_vertex, 1, 0}
1367 [DRM_IOCTL_NR(DRM_I810_FLUSH)] = { i810_flush_ioctl, 1, 0 }, 1352 ,
1368 [DRM_IOCTL_NR(DRM_I810_GETAGE)] = { i810_getage, 1, 0 }, 1353 [DRM_IOCTL_NR(DRM_I810_CLEAR)] = {i810_clear_bufs, 1, 0}
1369 [DRM_IOCTL_NR(DRM_I810_GETBUF)] = { i810_getbuf, 1, 0 }, 1354 ,
1370 [DRM_IOCTL_NR(DRM_I810_SWAP)] = { i810_swap_bufs, 1, 0 }, 1355 [DRM_IOCTL_NR(DRM_I810_FLUSH)] = {i810_flush_ioctl, 1, 0}
1371 [DRM_IOCTL_NR(DRM_I810_COPY)] = { i810_copybuf, 1, 0 }, 1356 ,
1372 [DRM_IOCTL_NR(DRM_I810_DOCOPY)] = { i810_docopy, 1, 0 }, 1357 [DRM_IOCTL_NR(DRM_I810_GETAGE)] = {i810_getage, 1, 0}
1373 [DRM_IOCTL_NR(DRM_I810_OV0INFO)] = { i810_ov0_info, 1, 0 }, 1358 ,
1374 [DRM_IOCTL_NR(DRM_I810_FSTATUS)] = { i810_fstatus, 1, 0 }, 1359 [DRM_IOCTL_NR(DRM_I810_GETBUF)] = {i810_getbuf, 1, 0}
1375 [DRM_IOCTL_NR(DRM_I810_OV0FLIP)] = { i810_ov0_flip, 1, 0 }, 1360 ,
1376 [DRM_IOCTL_NR(DRM_I810_MC)] = { i810_dma_mc, 1, 1 }, 1361 [DRM_IOCTL_NR(DRM_I810_SWAP)] = {i810_swap_bufs, 1, 0}
1377 [DRM_IOCTL_NR(DRM_I810_RSTATUS)] = { i810_rstatus, 1, 0 }, 1362 ,
1378 [DRM_IOCTL_NR(DRM_I810_FLIP)] = { i810_flip_bufs, 1, 0 } 1363 [DRM_IOCTL_NR(DRM_I810_COPY)] = {i810_copybuf, 1, 0}
1364 ,
1365 [DRM_IOCTL_NR(DRM_I810_DOCOPY)] = {i810_docopy, 1, 0}
1366 ,
1367 [DRM_IOCTL_NR(DRM_I810_OV0INFO)] = {i810_ov0_info, 1, 0}
1368 ,
1369 [DRM_IOCTL_NR(DRM_I810_FSTATUS)] = {i810_fstatus, 1, 0}
1370 ,
1371 [DRM_IOCTL_NR(DRM_I810_OV0FLIP)] = {i810_ov0_flip, 1, 0}
1372 ,
1373 [DRM_IOCTL_NR(DRM_I810_MC)] = {i810_dma_mc, 1, 1}
1374 ,
1375 [DRM_IOCTL_NR(DRM_I810_RSTATUS)] = {i810_rstatus, 1, 0}
1376 ,
1377 [DRM_IOCTL_NR(DRM_I810_FLIP)] = {i810_flip_bufs, 1, 0}
1379}; 1378};
1380 1379
1381int i810_max_ioctl = DRM_ARRAY_SIZE(i810_ioctls); 1380int i810_max_ioctl = DRM_ARRAY_SIZE(i810_ioctls);
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-29 22:18:12 -0500