9 files changed, 204 insertions, 101 deletions

diff --git a/drivers/char/agp/Kconfig b/drivers/char/agp/Kconfig
index c603bf291580..a9f9c48c2424 100644
--- a/drivers/char/agp/Kconfig
+++ b/drivers/char/agp/Kconfig
@@ -86,7 +86,7 @@ config AGP_NVIDIA
 
 config AGP_SIS
         tristate "SiS chipset support"
-        depends on AGP
+        depends on AGP && X86
         help
           This option gives you AGP support for the GLX component of
           X on Silicon Integrated Systems [SiS] chipsets.
@@ -103,7 +103,7 @@ config AGP_SWORKS
 
 config AGP_VIA
         tristate "VIA chipset support"
-        depends on AGP
+        depends on AGP && X86
         help
           This option gives you AGP support for the GLX component of
           X on VIA MVP3/Apollo Pro chipsets.
diff --git a/drivers/char/agp/agp.h b/drivers/char/agp/agp.h
index 8b3317fd46c9..1d59e2a5b9aa 100644
--- a/drivers/char/agp/agp.h
+++ b/drivers/char/agp/agp.h
@@ -225,6 +225,10 @@ struct agp_bridge_data {
 #define I810_GMS_DISABLE        0x00000000
 #define I810_PGETBL_CTL         0x2020
 #define I810_PGETBL_ENABLED     0x00000001
+#define I965_PGETBL_SIZE_MASK   0x0000000e
+#define I965_PGETBL_SIZE_512KB  (0 << 1)
+#define I965_PGETBL_SIZE_256KB  (1 << 1)
+#define I965_PGETBL_SIZE_128KB  (2 << 1)
 #define I810_DRAM_CTL           0x3000
 #define I810_DRAM_ROW_0         0x00000001
 #define I810_DRAM_ROW_0_SDRAM   0x00000001
diff --git a/drivers/char/agp/amd-k7-agp.c b/drivers/char/agp/amd-k7-agp.c
index 51d0d562d01e..c85c8cadb6df 100644
--- a/drivers/char/agp/amd-k7-agp.c
+++ b/drivers/char/agp/amd-k7-agp.c
@@ -101,6 +101,11 @@ static int amd_create_gatt_pages(int nr_tables)
         for (i = 0; i < nr_tables; i++) {
                 entry = kzalloc(sizeof(struct amd_page_map), GFP_KERNEL);
                 if (entry == NULL) {
+                        while (i > 0) {
+                                kfree(tables[i-1]);
+                                i--;
+                        }
+                        kfree(tables);
                         retval = -ENOMEM;
                         break;
                 }
diff --git a/drivers/char/agp/amd64-agp.c b/drivers/char/agp/amd64-agp.c
index 2f2c4efff8a3..93d2209fee4c 100644
--- a/drivers/char/agp/amd64-agp.c
+++ b/drivers/char/agp/amd64-agp.c
@@ -650,6 +650,15 @@ static struct pci_device_id agp_amd64_pci_table[] = {
         .subvendor      = PCI_ANY_ID,
         .subdevice      = PCI_ANY_ID,
         },
+        /* VIA K8M890 / K8N890 */
+        {
+        .class          = (PCI_CLASS_BRIDGE_HOST << 8),
+        .class_mask     = ~0,
+        .vendor         = PCI_VENDOR_ID_VIA,
+        .device         = PCI_DEVICE_ID_VIA_VT3336,
+        .subvendor      = PCI_ANY_ID,
+        .subdevice      = PCI_ANY_ID,
+        },
         /* VIA K8T890 */
         {
         .class          = (PCI_CLASS_BRIDGE_HOST << 8),
diff --git a/drivers/char/agp/ati-agp.c b/drivers/char/agp/ati-agp.c
index f244c6682738..9987dc2e0c3f 100644
--- a/drivers/char/agp/ati-agp.c
+++ b/drivers/char/agp/ati-agp.c
@@ -41,18 +41,18 @@ static struct gatt_mask ati_generic_masks[] =
 };
 
 
-typedef struct _ati_page_map {
+struct ati_page_map {
         unsigned long *real;
         unsigned long __iomem *remapped;
-} ati_page_map;
+};
 
 static struct _ati_generic_private {
         volatile u8 __iomem *registers;
-        ati_page_map **gatt_pages;
+        struct ati_page_map **gatt_pages;
         int num_tables;
 } ati_generic_private;
 
-static int ati_create_page_map(ati_page_map *page_map)
+static int ati_create_page_map(struct ati_page_map *page_map)
 {
         int i, err = 0;
 
@@ -82,7 +82,7 @@ static int ati_create_page_map(ati_page_map *page_map)
 }
 
 
-static void ati_free_page_map(ati_page_map *page_map)
+static void ati_free_page_map(struct ati_page_map *page_map)
 {
         unmap_page_from_agp(virt_to_page(page_map->real));
         iounmap(page_map->remapped);
@@ -94,8 +94,8 @@ static void ati_free_page_map(ati_page_map *page_map)
 static void ati_free_gatt_pages(void)
 {
         int i;
-        ati_page_map **tables;
-        ati_page_map *entry;
+        struct ati_page_map **tables;
+        struct ati_page_map *entry;
 
         tables = ati_generic_private.gatt_pages;
         for (i = 0; i < ati_generic_private.num_tables; i++) {
@@ -112,30 +112,30 @@ static void ati_free_gatt_pages(void)
 
 static int ati_create_gatt_pages(int nr_tables)
 {
-        ati_page_map **tables;
-        ati_page_map *entry;
+        struct ati_page_map **tables;
+        struct ati_page_map *entry;
         int retval = 0;
         int i;
 
-        tables = kzalloc((nr_tables + 1) * sizeof(ati_page_map *),GFP_KERNEL);
+        tables = kzalloc((nr_tables + 1) * sizeof(struct ati_page_map *),GFP_KERNEL);
         if (tables == NULL)
                 return -ENOMEM;
 
         for (i = 0; i < nr_tables; i++) {
-                entry = kzalloc(sizeof(ati_page_map), GFP_KERNEL);
+                entry = kzalloc(sizeof(struct ati_page_map), GFP_KERNEL);
                 if (entry == NULL) {
-                        while (i>0) {
-                                kfree (tables[i-1]);
+                        while (i > 0) {
+                                kfree(tables[i-1]);
                                 i--;
                         }
-                        kfree (tables);
-                        tables = NULL;
+                        kfree(tables);
                         retval = -ENOMEM;
                         break;
                 }
                 tables[i] = entry;
                 retval = ati_create_page_map(entry);
-                if (retval != 0) break;
+                if (retval != 0)
+                        break;
         }
         ati_generic_private.num_tables = nr_tables;
         ati_generic_private.gatt_pages = tables;
@@ -340,7 +340,7 @@ static int ati_remove_memory(struct agp_memory * mem, off_t pg_start,
 static int ati_create_gatt_table(struct agp_bridge_data *bridge)
 {
         struct aper_size_info_lvl2 *value;
-        ati_page_map page_dir;
+        struct ati_page_map page_dir;
         unsigned long addr;
         int retval;
         u32 temp;
@@ -400,7 +400,7 @@ static int ati_create_gatt_table(struct agp_bridge_data *bridge)
 
 static int ati_free_gatt_table(struct agp_bridge_data *bridge)
 {
-        ati_page_map page_dir;
+        struct ati_page_map page_dir;
 
         page_dir.real = (unsigned long *)agp_bridge->gatt_table_real;
         page_dir.remapped = (unsigned long __iomem *)agp_bridge->gatt_table;
diff --git a/drivers/char/agp/generic.c b/drivers/char/agp/generic.c
index 5ff457b41efb..3491d6f84bc6 100644
--- a/drivers/char/agp/generic.c
+++ b/drivers/char/agp/generic.c
@@ -419,6 +419,31 @@ static void agp_v2_parse_one(u32 *requested_mode, u32 *bridge_agpstat, u32 *vga_
                 *requested_mode &= ~AGP2_RESERVED_MASK;
         }
 
+        /*
+         * Some dumb bridges are programmed to disobey the AGP2 spec.
+         * This is likely a BIOS misprogramming rather than poweron default, or
+         * it would be a lot more common.
+         * https://bugs.freedesktop.org/show_bug.cgi?id=8816
+         * AGPv2 spec 6.1.9 states:
+         *   The RATE field indicates the data transfer rates supported by this
+         *   device. A.G.P. devices must report all that apply.
+         * Fix them up as best we can.
+         */
+        switch (*bridge_agpstat & 7) {
+        case 4:
+                *bridge_agpstat |= (AGPSTAT2_2X | AGPSTAT2_1X);
+                printk(KERN_INFO PFX "BIOS bug. AGP bridge claims to only support x4 rate"
+                        "Fixing up support for x2 & x1\n");
+                break;
+        case 2:
+                *bridge_agpstat |= AGPSTAT2_1X;
+                printk(KERN_INFO PFX "BIOS bug. AGP bridge claims to only support x2 rate"
+                        "Fixing up support for x1\n");
+                break;
+        default:
+                break;
+        }
+
         /* Check the speed bits make sense. Only one should be set. */
         tmp = *requested_mode & 7;
         switch (tmp) {
@@ -940,6 +965,9 @@ int agp_generic_insert_memory(struct agp_memory * mem, off_t pg_start, int type)
         if (!bridge)
                 return -EINVAL;
 
+        if (mem->page_count == 0)
+                return 0;
+
         temp = bridge->current_size;
 
         switch (bridge->driver->size_type) {
@@ -991,8 +1019,8 @@ int agp_generic_insert_memory(struct agp_memory * mem, off_t pg_start, int type)
 
         for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
                 writel(bridge->driver->mask_memory(bridge, mem->memory[i], mem->type), bridge->gatt_table+j);
-                readl(bridge->gatt_table+j);    /* PCI Posting. */
         }
+        readl(bridge->gatt_table+j-1);  /* PCI Posting. */
 
         bridge->driver->tlb_flush(mem);
         return 0;
@@ -1009,6 +1037,9 @@ int agp_generic_remove_memory(struct agp_memory *mem, off_t pg_start, int type)
         if (!bridge)
                 return -EINVAL;
 
+        if (mem->page_count == 0)
+                return 0;
+
         if (type != 0 || mem->type != 0) {
                 /* The generic routines know nothing of memory types */
                 return -EINVAL;
@@ -1017,10 +1048,9 @@ int agp_generic_remove_memory(struct agp_memory *mem, off_t pg_start, int type)
         /* AK: bogus, should encode addresses > 4GB */
         for (i = pg_start; i < (mem->page_count + pg_start); i++) {
                 writel(bridge->scratch_page, bridge->gatt_table+i);
-                readl(bridge->gatt_table+i);    /* PCI Posting. */
         }
+        readl(bridge->gatt_table+i-1);  /* PCI Posting. */
 
-        global_cache_flush();
         bridge->driver->tlb_flush(mem);
         return 0;
 }
diff --git a/drivers/char/agp/intel-agp.c b/drivers/char/agp/intel-agp.c
index 555b3a8ab49c..a3011de51f7c 100644
--- a/drivers/char/agp/intel-agp.c
+++ b/drivers/char/agp/intel-agp.c
@@ -207,6 +207,9 @@ static int intel_i810_insert_entries(struct agp_memory *mem, off_t pg_start,
         int i, j, num_entries;
         void *temp;
 
+        if (mem->page_count == 0)
+                return 0;
+
         temp = agp_bridge->current_size;
         num_entries = A_SIZE_FIX(temp)->num_entries;
 
@@ -221,12 +224,16 @@ static int intel_i810_insert_entries(struct agp_memory *mem, off_t pg_start,
         if (type != 0 || mem->type != 0) {
                 if ((type == AGP_DCACHE_MEMORY) && (mem->type == AGP_DCACHE_MEMORY)) {
                         /* special insert */
-                        global_cache_flush();
+                        if (!mem->is_flushed) {
+                                global_cache_flush();
+                                mem->is_flushed = TRUE;
+                        }
+
                         for (i = pg_start; i < (pg_start + mem->page_count); i++) {
                                 writel((i*4096)|I810_PTE_LOCAL|I810_PTE_VALID, intel_i810_private.registers+I810_PTE_BASE+(i*4));
-                                readl(intel_i810_private.registers+I810_PTE_BASE+(i*4));        /* PCI Posting. */
                         }
-                        global_cache_flush();
+                        readl(intel_i810_private.registers+I810_PTE_BASE+((i-1)*4));    /* PCI Posting. */
+
                         agp_bridge->driver->tlb_flush(mem);
                         return 0;
                 }
@@ -236,14 +243,17 @@ static int intel_i810_insert_entries(struct agp_memory *mem, off_t pg_start,
         }
 
 insert:
-        global_cache_flush();
+        if (!mem->is_flushed) {
+                global_cache_flush();
+                mem->is_flushed = TRUE;
+        }
+
         for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
                 writel(agp_bridge->driver->mask_memory(agp_bridge,
                         mem->memory[i], mem->type),
                         intel_i810_private.registers+I810_PTE_BASE+(j*4));
-                readl(intel_i810_private.registers+I810_PTE_BASE+(j*4));        /* PCI Posting. */
         }
-        global_cache_flush();
+        readl(intel_i810_private.registers+I810_PTE_BASE+((j-1)*4));    /* PCI Posting. */
 
         agp_bridge->driver->tlb_flush(mem);
         return 0;
@@ -254,12 +264,14 @@ static int intel_i810_remove_entries(struct agp_memory *mem, off_t pg_start,
 {
         int i;
 
+        if (mem->page_count == 0)
+                return 0;
+
         for (i = pg_start; i < (mem->page_count + pg_start); i++) {
                 writel(agp_bridge->scratch_page, intel_i810_private.registers+I810_PTE_BASE+(i*4));
-                readl(intel_i810_private.registers+I810_PTE_BASE+(i*4));        /* PCI Posting. */
         }
+        readl(intel_i810_private.registers+I810_PTE_BASE+((i-1)*4));
 
-        global_cache_flush();
         agp_bridge->driver->tlb_flush(mem);
         return 0;
 }
@@ -370,6 +382,11 @@ static struct _intel_i830_private {
         struct pci_dev *i830_dev;               /* device one */
         volatile u8 __iomem *registers;
         volatile u32 __iomem *gtt;              /* I915G */
+        /* gtt_entries is the number of gtt entries that are already mapped
+         * to stolen memory.  Stolen memory is larger than the memory mapped
+         * through gtt_entries, as it includes some reserved space for the BIOS
+         * popup and for the GTT.
+         */
         int gtt_entries;
 } intel_i830_private;
 
@@ -380,14 +397,41 @@ static void intel_i830_init_gtt_entries(void)
         u8 rdct;
         int local = 0;
         static const int ddt[4] = { 0, 16, 32, 64 };
-        int size;
+        int size; /* reserved space (in kb) at the top of stolen memory */
 
         pci_read_config_word(agp_bridge->dev,I830_GMCH_CTRL,&gmch_ctrl);
 
-        /* We obtain the size of the GTT, which is also stored (for some
-         * reason) at the top of stolen memory. Then we add 4KB to that
-         * for the video BIOS popup, which is also stored in there. */
-        size = agp_bridge->driver->fetch_size() + 4;
+        if (IS_I965) {
+                u32 pgetbl_ctl;
+
+                pci_read_config_dword(agp_bridge->dev, I810_PGETBL_CTL,
+                                      &pgetbl_ctl);
+                /* The 965 has a field telling us the size of the GTT,
+                 * which may be larger than what is necessary to map the
+                 * aperture.
+                 */
+                switch (pgetbl_ctl & I965_PGETBL_SIZE_MASK) {
+                case I965_PGETBL_SIZE_128KB:
+                        size = 128;
+                        break;
+                case I965_PGETBL_SIZE_256KB:
+                        size = 256;
+                        break;
+                case I965_PGETBL_SIZE_512KB:
+                        size = 512;
+                        break;
+                default:
+                        printk(KERN_INFO PFX "Unknown page table size, "
+                               "assuming 512KB\n");
+                        size = 512;
+                }
+                size += 4; /* add in BIOS popup space */
+        } else {
+                /* On previous hardware, the GTT size was just what was
+                 * required to map the aperture.
+                 */
+                size = agp_bridge->driver->fetch_size() + 4;
+        }
 
         if (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82830_HB ||
             agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82845G_HB) {
@@ -576,6 +620,9 @@ static int intel_i830_insert_entries(struct agp_memory *mem,off_t pg_start, int
         int i,j,num_entries;
         void *temp;
 
+        if (mem->page_count == 0)
+                return 0;
+
         temp = agp_bridge->current_size;
         num_entries = A_SIZE_FIX(temp)->num_entries;
 
@@ -598,16 +645,18 @@ static int intel_i830_insert_entries(struct agp_memory *mem,off_t pg_start, int
                 (mem->type != 0 && mem->type != AGP_PHYS_MEMORY))
                 return -EINVAL;
 
-        global_cache_flush();   /* FIXME: Necessary ?*/
+        if (!mem->is_flushed) {
+                global_cache_flush();
+                mem->is_flushed = TRUE;
+        }
 
         for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
                 writel(agp_bridge->driver->mask_memory(agp_bridge,
                         mem->memory[i], mem->type),
                         intel_i830_private.registers+I810_PTE_BASE+(j*4));
-                readl(intel_i830_private.registers+I810_PTE_BASE+(j*4));        /* PCI Posting. */
         }
+        readl(intel_i830_private.registers+I810_PTE_BASE+((j-1)*4));
 
-        global_cache_flush();
         agp_bridge->driver->tlb_flush(mem);
         return 0;
 }
@@ -617,7 +666,8 @@ static int intel_i830_remove_entries(struct agp_memory *mem,off_t pg_start,
 {
         int i;
 
-        global_cache_flush();
+        if (mem->page_count == 0)
+                return 0;
 
         if (pg_start < intel_i830_private.gtt_entries) {
                 printk (KERN_INFO PFX "Trying to disable local/stolen memory\n");
@@ -626,10 +676,9 @@ static int intel_i830_remove_entries(struct agp_memory *mem,off_t pg_start,
 
         for (i = pg_start; i < (mem->page_count + pg_start); i++) {
                 writel(agp_bridge->scratch_page, intel_i830_private.registers+I810_PTE_BASE+(i*4));
-                readl(intel_i830_private.registers+I810_PTE_BASE+(i*4));        /* PCI Posting. */
         }
+        readl(intel_i830_private.registers+I810_PTE_BASE+((i-1)*4));
 
-        global_cache_flush();
         agp_bridge->driver->tlb_flush(mem);
         return 0;
 }
@@ -686,6 +735,9 @@ static int intel_i915_insert_entries(struct agp_memory *mem,off_t pg_start,
         int i,j,num_entries;
         void *temp;
 
+        if (mem->page_count == 0)
+                return 0;
+
         temp = agp_bridge->current_size;
         num_entries = A_SIZE_FIX(temp)->num_entries;
 
@@ -708,15 +760,17 @@ static int intel_i915_insert_entries(struct agp_memory *mem,off_t pg_start,
                 (mem->type != 0 && mem->type != AGP_PHYS_MEMORY))
                 return -EINVAL;
 
-        global_cache_flush();
+        if (!mem->is_flushed) {
+                global_cache_flush();
+                mem->is_flushed = TRUE;
+        }
 
         for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
                 writel(agp_bridge->driver->mask_memory(agp_bridge,
                         mem->memory[i], mem->type), intel_i830_private.gtt+j);
-                readl(intel_i830_private.gtt+j);        /* PCI Posting. */
         }
+        readl(intel_i830_private.gtt+j-1);
 
-        global_cache_flush();
         agp_bridge->driver->tlb_flush(mem);
         return 0;
 }
@@ -726,7 +780,8 @@ static int intel_i915_remove_entries(struct agp_memory *mem,off_t pg_start,
 {
         int i;
 
-        global_cache_flush();
+        if (mem->page_count == 0)
+                return 0;
 
         if (pg_start < intel_i830_private.gtt_entries) {
                 printk (KERN_INFO PFX "Trying to disable local/stolen memory\n");
@@ -735,30 +790,34 @@ static int intel_i915_remove_entries(struct agp_memory *mem,off_t pg_start,
 
         for (i = pg_start; i < (mem->page_count + pg_start); i++) {
                 writel(agp_bridge->scratch_page, intel_i830_private.gtt+i);
-                readl(intel_i830_private.gtt+i);
         }
+        readl(intel_i830_private.gtt+i-1);
 
-        global_cache_flush();
         agp_bridge->driver->tlb_flush(mem);
         return 0;
 }
 
-static int intel_i915_fetch_size(void)
+/* Return the aperture size by just checking the resource length.  The effect
+ * described in the spec of the MSAC registers is just changing of the
+ * resource size.
+ */
+static int intel_i9xx_fetch_size(void)
 {
-        struct aper_size_info_fixed *values;
-        u32 temp, offset;
+        int num_sizes = sizeof(intel_i830_sizes) / sizeof(*intel_i830_sizes);
+        int aper_size; /* size in megabytes */
+        int i;
 
-#define I915_256MB_ADDRESS_MASK (1<<27)
+        aper_size = pci_resource_len(intel_i830_private.i830_dev, 2) / MB(1);
 
-        values = A_SIZE_FIX(agp_bridge->driver->aperture_sizes);
+        for (i = 0; i < num_sizes; i++) {
+                if (aper_size == intel_i830_sizes[i].size) {
+                        agp_bridge->current_size = intel_i830_sizes + i;
+                        agp_bridge->previous_size = agp_bridge->current_size;
+                        return aper_size;
+                }
+        }
 
-        pci_read_config_dword(intel_i830_private.i830_dev, I915_GMADDR, &temp);
-        if (temp & I915_256MB_ADDRESS_MASK)
-                offset = 0;     /* 128MB aperture */
-        else
-                offset = 2;     /* 256MB aperture */
-        agp_bridge->previous_size = agp_bridge->current_size = (void *)(values + offset);
-        return values[offset].size;
+        return 0;
 }
 
 /* The intel i915 automatically initializes the agp aperture during POST.
@@ -821,40 +880,9 @@ static unsigned long intel_i965_mask_memory(struct agp_bridge_data *bridge,
         return addr | bridge->driver->masks[type].mask;
 }
 
-static int intel_i965_fetch_size(void)
-{
-       struct aper_size_info_fixed *values;
-       u32 offset = 0;
-       u8 temp;
-
-#define I965_512MB_ADDRESS_MASK (3<<1)
-
-       values = A_SIZE_FIX(agp_bridge->driver->aperture_sizes);
-
-       pci_read_config_byte(intel_i830_private.i830_dev, I965_MSAC, &temp);
-       temp &= I965_512MB_ADDRESS_MASK;
-       switch (temp) {
-       case 0x00:
-               offset = 0; /* 128MB */
-               break;
-       case 0x06:
-               offset = 3; /* 512MB */
-               break;
-       default:
-       case 0x02:
-               offset = 2; /* 256MB */
-               break;
-       }
-
-       agp_bridge->previous_size = agp_bridge->current_size = (void *)(values + offset);
-
-        /* The i965 GTT is always sized as if it had a 512kB aperture size */
-        return 512;
-}
-
 /* The intel i965 automatically initializes the agp aperture during POST.
-+ * Use the memory already set aside for in the GTT.
-+ */
+ * Use the memory already set aside for in the GTT.
+ */
 static int intel_i965_create_gatt_table(struct agp_bridge_data *bridge)
 {
        int page_order;
@@ -1574,7 +1602,7 @@ static struct agp_bridge_driver intel_915_driver = {
         .num_aperture_sizes     = 4,
         .needs_scratch_page     = TRUE,
         .configure              = intel_i915_configure,
-        .fetch_size             = intel_i915_fetch_size,
+        .fetch_size             = intel_i9xx_fetch_size,
         .cleanup                = intel_i915_cleanup,
         .tlb_flush              = intel_i810_tlbflush,
         .mask_memory            = intel_i810_mask_memory,
@@ -1598,7 +1626,7 @@ static struct agp_bridge_driver intel_i965_driver = {
        .num_aperture_sizes     = 4,
        .needs_scratch_page     = TRUE,
        .configure              = intel_i915_configure,
-       .fetch_size             = intel_i965_fetch_size,
+       .fetch_size             = intel_i9xx_fetch_size,
        .cleanup                = intel_i915_cleanup,
        .tlb_flush              = intel_i810_tlbflush,
        .mask_memory            = intel_i965_mask_memory,
@@ -1927,6 +1955,15 @@ static int agp_intel_resume(struct pci_dev *pdev)
 
         pci_restore_state(pdev);
 
+        /* We should restore our graphics device's config space,
+         * as host bridge (00:00) resumes before graphics device (02:00),
+         * then our access to its pci space can work right.
+         */
+        if (intel_i810_private.i810_dev)
+                pci_restore_state(intel_i810_private.i810_dev);
+        if (intel_i830_private.i830_dev)
+                pci_restore_state(intel_i830_private.i830_dev);
+
         if (bridge->driver == &intel_generic_driver)
                 intel_configure();
         else if (bridge->driver == &intel_850_driver)
diff --git a/drivers/char/agp/sgi-agp.c b/drivers/char/agp/sgi-agp.c
index d73be4c2db8a..902648db7efa 100644
--- a/drivers/char/agp/sgi-agp.c
+++ b/drivers/char/agp/sgi-agp.c
@@ -281,10 +281,11 @@ static int __devinit agp_sgi_init(void)
         else
                 return 0;
 
-        sgi_tioca_agp_bridges =
-            (struct agp_bridge_data **)kmalloc(tioca_gart_found *
-                                               sizeof(struct agp_bridge_data *),
-                                               GFP_KERNEL);
+        sgi_tioca_agp_bridges = kmalloc(tioca_gart_found *
+                                        sizeof(struct agp_bridge_data *),
+                                        GFP_KERNEL);
+        if (!sgi_tioca_agp_bridges)
+                return -ENOMEM;
 
         j = 0;
         list_for_each_entry(info, &tioca_list, ca_list) {
diff --git a/drivers/char/agp/via-agp.c b/drivers/char/agp/via-agp.c
index c149ac9ce9a7..2ded7a280d7f 100644
--- a/drivers/char/agp/via-agp.c
+++ b/drivers/char/agp/via-agp.c
@@ -380,9 +380,23 @@ static struct agp_device_ids via_agp_device_ids[] __devinitdata =
         /* P4M800CE */
         {
                 .device_id      = PCI_DEVICE_ID_VIA_P4M800CE,
-                .chipset_name   = "P4M800CE",
+                .chipset_name   = "VT3314",
+        },
+        /* CX700 */
+        {
+                .device_id  = PCI_DEVICE_ID_VIA_CX700,
+                .chipset_name   = "CX700",
+        },
+        /* VT3336 */
+        {
+                .device_id  = PCI_DEVICE_ID_VIA_VT3336,
+                .chipset_name   = "VT3336",
+        },
+        /* P4M890 */
+        {
+                .device_id  = PCI_DEVICE_ID_VIA_P4M890,
+                .chipset_name   = "P4M890",
         },
-
         { }, /* dummy final entry, always present */
 };
 
@@ -524,6 +538,9 @@ static const struct pci_device_id agp_via_pci_table[] = {
         ID(PCI_DEVICE_ID_VIA_83_87XX_1),
         ID(PCI_DEVICE_ID_VIA_3296_0),
         ID(PCI_DEVICE_ID_VIA_P4M800CE),
+        ID(PCI_DEVICE_ID_VIA_CX700),
+        ID(PCI_DEVICE_ID_VIA_VT3336),
+        ID(PCI_DEVICE_ID_VIA_P4M890),
         { }
 };