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-rw-r--r--drivers/char/agp/agp.h6
-rw-r--r--drivers/char/agp/intel-agp.c576
2 files changed, 275 insertions, 307 deletions
diff --git a/drivers/char/agp/agp.h b/drivers/char/agp/agp.h
index fdbca25a3948..35ab1a9f8e8b 100644
--- a/drivers/char/agp/agp.h
+++ b/drivers/char/agp/agp.h
@@ -176,7 +176,7 @@ struct agp_bridge_data {
176#define I830_GMCH_MEM_MASK 0x1 176#define I830_GMCH_MEM_MASK 0x1
177#define I830_GMCH_MEM_64M 0x1 177#define I830_GMCH_MEM_64M 0x1
178#define I830_GMCH_MEM_128M 0 178#define I830_GMCH_MEM_128M 0
179#define I830_GMCH_GMS_MASK 0x70 179#define I830_GMCH_GMS_MASK 0xF0
180#define I830_GMCH_GMS_DISABLED 0x00 180#define I830_GMCH_GMS_DISABLED 0x00
181#define I830_GMCH_GMS_LOCAL 0x10 181#define I830_GMCH_GMS_LOCAL 0x10
182#define I830_GMCH_GMS_STOLEN_512 0x20 182#define I830_GMCH_GMS_STOLEN_512 0x20
@@ -231,6 +231,10 @@ struct agp_bridge_data {
231#define I965_PGETBL_SIZE_512KB (0 << 1) 231#define I965_PGETBL_SIZE_512KB (0 << 1)
232#define I965_PGETBL_SIZE_256KB (1 << 1) 232#define I965_PGETBL_SIZE_256KB (1 << 1)
233#define I965_PGETBL_SIZE_128KB (2 << 1) 233#define I965_PGETBL_SIZE_128KB (2 << 1)
234#define G33_PGETBL_SIZE_MASK (3 << 8)
235#define G33_PGETBL_SIZE_1M (1 << 8)
236#define G33_PGETBL_SIZE_2M (2 << 8)
237
234#define I810_DRAM_CTL 0x3000 238#define I810_DRAM_CTL 0x3000
235#define I810_DRAM_ROW_0 0x00000001 239#define I810_DRAM_ROW_0 0x00000001
236#define I810_DRAM_ROW_0_SDRAM 0x00000001 240#define I810_DRAM_ROW_0_SDRAM 0x00000001
diff --git a/drivers/char/agp/intel-agp.c b/drivers/char/agp/intel-agp.c
index 9c69f2e761f5..d383168b75fa 100644
--- a/drivers/char/agp/intel-agp.c
+++ b/drivers/char/agp/intel-agp.c
@@ -20,6 +20,14 @@
20#define PCI_DEVICE_ID_INTEL_82965G_IG 0x29A2 20#define PCI_DEVICE_ID_INTEL_82965G_IG 0x29A2
21#define PCI_DEVICE_ID_INTEL_82965GM_HB 0x2A00 21#define PCI_DEVICE_ID_INTEL_82965GM_HB 0x2A00
22#define PCI_DEVICE_ID_INTEL_82965GM_IG 0x2A02 22#define PCI_DEVICE_ID_INTEL_82965GM_IG 0x2A02
23#define PCI_DEVICE_ID_INTEL_82965GME_IG 0x2A12
24#define PCI_DEVICE_ID_INTEL_82945GME_IG 0x27AE
25#define PCI_DEVICE_ID_INTEL_G33_HB 0x29C0
26#define PCI_DEVICE_ID_INTEL_G33_IG 0x29C2
27#define PCI_DEVICE_ID_INTEL_Q35_HB 0x29B0
28#define PCI_DEVICE_ID_INTEL_Q35_IG 0x29B2
29#define PCI_DEVICE_ID_INTEL_Q33_HB 0x29D0
30#define PCI_DEVICE_ID_INTEL_Q33_IG 0x29D2
23 31
24#define IS_I965 (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82946GZ_HB || \ 32#define IS_I965 (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82946GZ_HB || \
25 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82965G_1_HB || \ 33 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82965G_1_HB || \
@@ -27,6 +35,9 @@
27 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82965G_HB || \ 35 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82965G_HB || \
28 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82965GM_HB) 36 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82965GM_HB)
29 37
38#define IS_G33 (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_G33_HB || \
39 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_Q35_HB || \
40 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_Q33_HB)
30 41
31extern int agp_memory_reserved; 42extern int agp_memory_reserved;
32 43
@@ -53,6 +64,8 @@ extern int agp_memory_reserved;
53#define I915_PTEADDR 0x1C 64#define I915_PTEADDR 0x1C
54#define I915_GMCH_GMS_STOLEN_48M (0x6 << 4) 65#define I915_GMCH_GMS_STOLEN_48M (0x6 << 4)
55#define I915_GMCH_GMS_STOLEN_64M (0x7 << 4) 66#define I915_GMCH_GMS_STOLEN_64M (0x7 << 4)
67#define G33_GMCH_GMS_STOLEN_128M (0x8 << 4)
68#define G33_GMCH_GMS_STOLEN_256M (0x9 << 4)
56 69
57/* Intel 965G registers */ 70/* Intel 965G registers */
58#define I965_MSAC 0x62 71#define I965_MSAC 0x62
@@ -86,11 +99,18 @@ static struct gatt_mask intel_i810_masks[] =
86 .type = INTEL_AGP_CACHED_MEMORY} 99 .type = INTEL_AGP_CACHED_MEMORY}
87}; 100};
88 101
89static struct _intel_i810_private { 102static struct _intel_private {
90 struct pci_dev *i810_dev; /* device one */ 103 struct pci_dev *pcidev; /* device one */
91 volatile u8 __iomem *registers; 104 u8 __iomem *registers;
105 u32 __iomem *gtt; /* I915G */
92 int num_dcache_entries; 106 int num_dcache_entries;
93} intel_i810_private; 107 /* gtt_entries is the number of gtt entries that are already mapped
108 * to stolen memory. Stolen memory is larger than the memory mapped
109 * through gtt_entries, as it includes some reserved space for the BIOS
110 * popup and for the GTT.
111 */
112 int gtt_entries; /* i830+ */
113} intel_private;
94 114
95static int intel_i810_fetch_size(void) 115static int intel_i810_fetch_size(void)
96{ 116{
@@ -127,32 +147,32 @@ static int intel_i810_configure(void)
127 147
128 current_size = A_SIZE_FIX(agp_bridge->current_size); 148 current_size = A_SIZE_FIX(agp_bridge->current_size);
129 149
130 if (!intel_i810_private.registers) { 150 if (!intel_private.registers) {
131 pci_read_config_dword(intel_i810_private.i810_dev, I810_MMADDR, &temp); 151 pci_read_config_dword(intel_private.pcidev, I810_MMADDR, &temp);
132 temp &= 0xfff80000; 152 temp &= 0xfff80000;
133 153
134 intel_i810_private.registers = ioremap(temp, 128 * 4096); 154 intel_private.registers = ioremap(temp, 128 * 4096);
135 if (!intel_i810_private.registers) { 155 if (!intel_private.registers) {
136 printk(KERN_ERR PFX "Unable to remap memory.\n"); 156 printk(KERN_ERR PFX "Unable to remap memory.\n");
137 return -ENOMEM; 157 return -ENOMEM;
138 } 158 }
139 } 159 }
140 160
141 if ((readl(intel_i810_private.registers+I810_DRAM_CTL) 161 if ((readl(intel_private.registers+I810_DRAM_CTL)
142 & I810_DRAM_ROW_0) == I810_DRAM_ROW_0_SDRAM) { 162 & I810_DRAM_ROW_0) == I810_DRAM_ROW_0_SDRAM) {
143 /* This will need to be dynamically assigned */ 163 /* This will need to be dynamically assigned */
144 printk(KERN_INFO PFX "detected 4MB dedicated video ram.\n"); 164 printk(KERN_INFO PFX "detected 4MB dedicated video ram.\n");
145 intel_i810_private.num_dcache_entries = 1024; 165 intel_private.num_dcache_entries = 1024;
146 } 166 }
147 pci_read_config_dword(intel_i810_private.i810_dev, I810_GMADDR, &temp); 167 pci_read_config_dword(intel_private.pcidev, I810_GMADDR, &temp);
148 agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK); 168 agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
149 writel(agp_bridge->gatt_bus_addr | I810_PGETBL_ENABLED, intel_i810_private.registers+I810_PGETBL_CTL); 169 writel(agp_bridge->gatt_bus_addr | I810_PGETBL_ENABLED, intel_private.registers+I810_PGETBL_CTL);
150 readl(intel_i810_private.registers+I810_PGETBL_CTL); /* PCI Posting. */ 170 readl(intel_private.registers+I810_PGETBL_CTL); /* PCI Posting. */
151 171
152 if (agp_bridge->driver->needs_scratch_page) { 172 if (agp_bridge->driver->needs_scratch_page) {
153 for (i = 0; i < current_size->num_entries; i++) { 173 for (i = 0; i < current_size->num_entries; i++) {
154 writel(agp_bridge->scratch_page, intel_i810_private.registers+I810_PTE_BASE+(i*4)); 174 writel(agp_bridge->scratch_page, intel_private.registers+I810_PTE_BASE+(i*4));
155 readl(intel_i810_private.registers+I810_PTE_BASE+(i*4)); /* PCI posting. */ 175 readl(intel_private.registers+I810_PTE_BASE+(i*4)); /* PCI posting. */
156 } 176 }
157 } 177 }
158 global_cache_flush(); 178 global_cache_flush();
@@ -161,9 +181,9 @@ static int intel_i810_configure(void)
161 181
162static void intel_i810_cleanup(void) 182static void intel_i810_cleanup(void)
163{ 183{
164 writel(0, intel_i810_private.registers+I810_PGETBL_CTL); 184 writel(0, intel_private.registers+I810_PGETBL_CTL);
165 readl(intel_i810_private.registers); /* PCI Posting. */ 185 readl(intel_private.registers); /* PCI Posting. */
166 iounmap(intel_i810_private.registers); 186 iounmap(intel_private.registers);
167} 187}
168 188
169static void intel_i810_tlbflush(struct agp_memory *mem) 189static void intel_i810_tlbflush(struct agp_memory *mem)
@@ -261,9 +281,9 @@ static int intel_i810_insert_entries(struct agp_memory *mem, off_t pg_start,
261 global_cache_flush(); 281 global_cache_flush();
262 for (i = pg_start; i < (pg_start + mem->page_count); i++) { 282 for (i = pg_start; i < (pg_start + mem->page_count); i++) {
263 writel((i*4096)|I810_PTE_LOCAL|I810_PTE_VALID, 283 writel((i*4096)|I810_PTE_LOCAL|I810_PTE_VALID,
264 intel_i810_private.registers+I810_PTE_BASE+(i*4)); 284 intel_private.registers+I810_PTE_BASE+(i*4));
265 } 285 }
266 readl(intel_i810_private.registers+I810_PTE_BASE+((i-1)*4)); 286 readl(intel_private.registers+I810_PTE_BASE+((i-1)*4));
267 break; 287 break;
268 case AGP_PHYS_MEMORY: 288 case AGP_PHYS_MEMORY:
269 case AGP_NORMAL_MEMORY: 289 case AGP_NORMAL_MEMORY:
@@ -273,9 +293,9 @@ static int intel_i810_insert_entries(struct agp_memory *mem, off_t pg_start,
273 writel(agp_bridge->driver->mask_memory(agp_bridge, 293 writel(agp_bridge->driver->mask_memory(agp_bridge,
274 mem->memory[i], 294 mem->memory[i],
275 mask_type), 295 mask_type),
276 intel_i810_private.registers+I810_PTE_BASE+(j*4)); 296 intel_private.registers+I810_PTE_BASE+(j*4));
277 } 297 }
278 readl(intel_i810_private.registers+I810_PTE_BASE+((j-1)*4)); 298 readl(intel_private.registers+I810_PTE_BASE+((j-1)*4));
279 break; 299 break;
280 default: 300 default:
281 goto out_err; 301 goto out_err;
@@ -298,9 +318,9 @@ static int intel_i810_remove_entries(struct agp_memory *mem, off_t pg_start,
298 return 0; 318 return 0;
299 319
300 for (i = pg_start; i < (mem->page_count + pg_start); i++) { 320 for (i = pg_start; i < (mem->page_count + pg_start); i++) {
301 writel(agp_bridge->scratch_page, intel_i810_private.registers+I810_PTE_BASE+(i*4)); 321 writel(agp_bridge->scratch_page, intel_private.registers+I810_PTE_BASE+(i*4));
302 } 322 }
303 readl(intel_i810_private.registers+I810_PTE_BASE+((i-1)*4)); 323 readl(intel_private.registers+I810_PTE_BASE+((i-1)*4));
304 324
305 agp_bridge->driver->tlb_flush(mem); 325 agp_bridge->driver->tlb_flush(mem);
306 return 0; 326 return 0;
@@ -354,7 +374,7 @@ static struct agp_memory *intel_i810_alloc_by_type(size_t pg_count, int type)
354 struct agp_memory *new; 374 struct agp_memory *new;
355 375
356 if (type == AGP_DCACHE_MEMORY) { 376 if (type == AGP_DCACHE_MEMORY) {
357 if (pg_count != intel_i810_private.num_dcache_entries) 377 if (pg_count != intel_private.num_dcache_entries)
358 return NULL; 378 return NULL;
359 379
360 new = agp_create_memory(1); 380 new = agp_create_memory(1);
@@ -404,18 +424,6 @@ static struct aper_size_info_fixed intel_i830_sizes[] =
404 {512, 131072, 7}, 424 {512, 131072, 7},
405}; 425};
406 426
407static struct _intel_i830_private {
408 struct pci_dev *i830_dev; /* device one */
409 volatile u8 __iomem *registers;
410 volatile u32 __iomem *gtt; /* I915G */
411 /* gtt_entries is the number of gtt entries that are already mapped
412 * to stolen memory. Stolen memory is larger than the memory mapped
413 * through gtt_entries, as it includes some reserved space for the BIOS
414 * popup and for the GTT.
415 */
416 int gtt_entries;
417} intel_i830_private;
418
419static void intel_i830_init_gtt_entries(void) 427static void intel_i830_init_gtt_entries(void)
420{ 428{
421 u16 gmch_ctrl; 429 u16 gmch_ctrl;
@@ -429,7 +437,7 @@ static void intel_i830_init_gtt_entries(void)
429 437
430 if (IS_I965) { 438 if (IS_I965) {
431 u32 pgetbl_ctl; 439 u32 pgetbl_ctl;
432 pgetbl_ctl = readl(intel_i830_private.registers+I810_PGETBL_CTL); 440 pgetbl_ctl = readl(intel_private.registers+I810_PGETBL_CTL);
433 441
434 /* The 965 has a field telling us the size of the GTT, 442 /* The 965 has a field telling us the size of the GTT,
435 * which may be larger than what is necessary to map the 443 * which may be larger than what is necessary to map the
@@ -451,6 +459,22 @@ static void intel_i830_init_gtt_entries(void)
451 size = 512; 459 size = 512;
452 } 460 }
453 size += 4; /* add in BIOS popup space */ 461 size += 4; /* add in BIOS popup space */
462 } else if (IS_G33) {
463 /* G33's GTT size defined in gmch_ctrl */
464 switch (gmch_ctrl & G33_PGETBL_SIZE_MASK) {
465 case G33_PGETBL_SIZE_1M:
466 size = 1024;
467 break;
468 case G33_PGETBL_SIZE_2M:
469 size = 2048;
470 break;
471 default:
472 printk(KERN_INFO PFX "Unknown page table size 0x%x, "
473 "assuming 512KB\n",
474 (gmch_ctrl & G33_PGETBL_SIZE_MASK));
475 size = 512;
476 }
477 size += 4;
454 } else { 478 } else {
455 /* On previous hardware, the GTT size was just what was 479 /* On previous hardware, the GTT size was just what was
456 * required to map the aperture. 480 * required to map the aperture.
@@ -471,7 +495,7 @@ static void intel_i830_init_gtt_entries(void)
471 gtt_entries = MB(8) - KB(size); 495 gtt_entries = MB(8) - KB(size);
472 break; 496 break;
473 case I830_GMCH_GMS_LOCAL: 497 case I830_GMCH_GMS_LOCAL:
474 rdct = readb(intel_i830_private.registers+I830_RDRAM_CHANNEL_TYPE); 498 rdct = readb(intel_private.registers+I830_RDRAM_CHANNEL_TYPE);
475 gtt_entries = (I830_RDRAM_ND(rdct) + 1) * 499 gtt_entries = (I830_RDRAM_ND(rdct) + 1) *
476 MB(ddt[I830_RDRAM_DDT(rdct)]); 500 MB(ddt[I830_RDRAM_DDT(rdct)]);
477 local = 1; 501 local = 1;
@@ -502,7 +526,8 @@ static void intel_i830_init_gtt_entries(void)
502 if (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82915G_HB || 526 if (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82915G_HB ||
503 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82915GM_HB || 527 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82915GM_HB ||
504 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82945G_HB || 528 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82945G_HB ||
505 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82945GM_HB || IS_I965 ) 529 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82945GM_HB ||
530 IS_I965 || IS_G33)
506 gtt_entries = MB(48) - KB(size); 531 gtt_entries = MB(48) - KB(size);
507 else 532 else
508 gtt_entries = 0; 533 gtt_entries = 0;
@@ -512,10 +537,24 @@ static void intel_i830_init_gtt_entries(void)
512 if (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82915G_HB || 537 if (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82915G_HB ||
513 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82915GM_HB || 538 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82915GM_HB ||
514 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82945G_HB || 539 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82945G_HB ||
515 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82945GM_HB || IS_I965) 540 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82945GM_HB ||
541 IS_I965 || IS_G33)
516 gtt_entries = MB(64) - KB(size); 542 gtt_entries = MB(64) - KB(size);
517 else 543 else
518 gtt_entries = 0; 544 gtt_entries = 0;
545 break;
546 case G33_GMCH_GMS_STOLEN_128M:
547 if (IS_G33)
548 gtt_entries = MB(128) - KB(size);
549 else
550 gtt_entries = 0;
551 break;
552 case G33_GMCH_GMS_STOLEN_256M:
553 if (IS_G33)
554 gtt_entries = MB(256) - KB(size);
555 else
556 gtt_entries = 0;
557 break;
519 default: 558 default:
520 gtt_entries = 0; 559 gtt_entries = 0;
521 break; 560 break;
@@ -529,7 +568,7 @@ static void intel_i830_init_gtt_entries(void)
529 "No pre-allocated video memory detected.\n"); 568 "No pre-allocated video memory detected.\n");
530 gtt_entries /= KB(4); 569 gtt_entries /= KB(4);
531 570
532 intel_i830_private.gtt_entries = gtt_entries; 571 intel_private.gtt_entries = gtt_entries;
533} 572}
534 573
535/* The intel i830 automatically initializes the agp aperture during POST. 574/* The intel i830 automatically initializes the agp aperture during POST.
@@ -547,14 +586,14 @@ static int intel_i830_create_gatt_table(struct agp_bridge_data *bridge)
547 num_entries = size->num_entries; 586 num_entries = size->num_entries;
548 agp_bridge->gatt_table_real = NULL; 587 agp_bridge->gatt_table_real = NULL;
549 588
550 pci_read_config_dword(intel_i830_private.i830_dev,I810_MMADDR,&temp); 589 pci_read_config_dword(intel_private.pcidev,I810_MMADDR,&temp);
551 temp &= 0xfff80000; 590 temp &= 0xfff80000;
552 591
553 intel_i830_private.registers = ioremap(temp,128 * 4096); 592 intel_private.registers = ioremap(temp,128 * 4096);
554 if (!intel_i830_private.registers) 593 if (!intel_private.registers)
555 return -ENOMEM; 594 return -ENOMEM;
556 595
557 temp = readl(intel_i830_private.registers+I810_PGETBL_CTL) & 0xfffff000; 596 temp = readl(intel_private.registers+I810_PGETBL_CTL) & 0xfffff000;
558 global_cache_flush(); /* FIXME: ?? */ 597 global_cache_flush(); /* FIXME: ?? */
559 598
560 /* we have to call this as early as possible after the MMIO base address is known */ 599 /* we have to call this as early as possible after the MMIO base address is known */
@@ -614,20 +653,20 @@ static int intel_i830_configure(void)
614 653
615 current_size = A_SIZE_FIX(agp_bridge->current_size); 654 current_size = A_SIZE_FIX(agp_bridge->current_size);
616 655
617 pci_read_config_dword(intel_i830_private.i830_dev,I810_GMADDR,&temp); 656 pci_read_config_dword(intel_private.pcidev,I810_GMADDR,&temp);
618 agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK); 657 agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
619 658
620 pci_read_config_word(agp_bridge->dev,I830_GMCH_CTRL,&gmch_ctrl); 659 pci_read_config_word(agp_bridge->dev,I830_GMCH_CTRL,&gmch_ctrl);
621 gmch_ctrl |= I830_GMCH_ENABLED; 660 gmch_ctrl |= I830_GMCH_ENABLED;
622 pci_write_config_word(agp_bridge->dev,I830_GMCH_CTRL,gmch_ctrl); 661 pci_write_config_word(agp_bridge->dev,I830_GMCH_CTRL,gmch_ctrl);
623 662
624 writel(agp_bridge->gatt_bus_addr|I810_PGETBL_ENABLED, intel_i830_private.registers+I810_PGETBL_CTL); 663 writel(agp_bridge->gatt_bus_addr|I810_PGETBL_ENABLED, intel_private.registers+I810_PGETBL_CTL);
625 readl(intel_i830_private.registers+I810_PGETBL_CTL); /* PCI Posting. */ 664 readl(intel_private.registers+I810_PGETBL_CTL); /* PCI Posting. */
626 665
627 if (agp_bridge->driver->needs_scratch_page) { 666 if (agp_bridge->driver->needs_scratch_page) {
628 for (i = intel_i830_private.gtt_entries; i < current_size->num_entries; i++) { 667 for (i = intel_private.gtt_entries; i < current_size->num_entries; i++) {
629 writel(agp_bridge->scratch_page, intel_i830_private.registers+I810_PTE_BASE+(i*4)); 668 writel(agp_bridge->scratch_page, intel_private.registers+I810_PTE_BASE+(i*4));
630 readl(intel_i830_private.registers+I810_PTE_BASE+(i*4)); /* PCI Posting. */ 669 readl(intel_private.registers+I810_PTE_BASE+(i*4)); /* PCI Posting. */
631 } 670 }
632 } 671 }
633 672
@@ -637,7 +676,7 @@ static int intel_i830_configure(void)
637 676
638static void intel_i830_cleanup(void) 677static void intel_i830_cleanup(void)
639{ 678{
640 iounmap(intel_i830_private.registers); 679 iounmap(intel_private.registers);
641} 680}
642 681
643static int intel_i830_insert_entries(struct agp_memory *mem,off_t pg_start, int type) 682static int intel_i830_insert_entries(struct agp_memory *mem,off_t pg_start, int type)
@@ -653,9 +692,9 @@ static int intel_i830_insert_entries(struct agp_memory *mem,off_t pg_start, int
653 temp = agp_bridge->current_size; 692 temp = agp_bridge->current_size;
654 num_entries = A_SIZE_FIX(temp)->num_entries; 693 num_entries = A_SIZE_FIX(temp)->num_entries;
655 694
656 if (pg_start < intel_i830_private.gtt_entries) { 695 if (pg_start < intel_private.gtt_entries) {
657 printk (KERN_DEBUG PFX "pg_start == 0x%.8lx,intel_i830_private.gtt_entries == 0x%.8x\n", 696 printk (KERN_DEBUG PFX "pg_start == 0x%.8lx,intel_private.gtt_entries == 0x%.8x\n",
658 pg_start,intel_i830_private.gtt_entries); 697 pg_start,intel_private.gtt_entries);
659 698
660 printk (KERN_INFO PFX "Trying to insert into local/stolen memory\n"); 699 printk (KERN_INFO PFX "Trying to insert into local/stolen memory\n");
661 goto out_err; 700 goto out_err;
@@ -683,9 +722,9 @@ static int intel_i830_insert_entries(struct agp_memory *mem,off_t pg_start, int
683 for (i = 0, j = pg_start; i < mem->page_count; i++, j++) { 722 for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
684 writel(agp_bridge->driver->mask_memory(agp_bridge, 723 writel(agp_bridge->driver->mask_memory(agp_bridge,
685 mem->memory[i], mask_type), 724 mem->memory[i], mask_type),
686 intel_i830_private.registers+I810_PTE_BASE+(j*4)); 725 intel_private.registers+I810_PTE_BASE+(j*4));
687 } 726 }
688 readl(intel_i830_private.registers+I810_PTE_BASE+((j-1)*4)); 727 readl(intel_private.registers+I810_PTE_BASE+((j-1)*4));
689 agp_bridge->driver->tlb_flush(mem); 728 agp_bridge->driver->tlb_flush(mem);
690 729
691out: 730out:
@@ -703,15 +742,15 @@ static int intel_i830_remove_entries(struct agp_memory *mem,off_t pg_start,
703 if (mem->page_count == 0) 742 if (mem->page_count == 0)
704 return 0; 743 return 0;
705 744
706 if (pg_start < intel_i830_private.gtt_entries) { 745 if (pg_start < intel_private.gtt_entries) {
707 printk (KERN_INFO PFX "Trying to disable local/stolen memory\n"); 746 printk (KERN_INFO PFX "Trying to disable local/stolen memory\n");
708 return -EINVAL; 747 return -EINVAL;
709 } 748 }
710 749
711 for (i = pg_start; i < (mem->page_count + pg_start); i++) { 750 for (i = pg_start; i < (mem->page_count + pg_start); i++) {
712 writel(agp_bridge->scratch_page, intel_i830_private.registers+I810_PTE_BASE+(i*4)); 751 writel(agp_bridge->scratch_page, intel_private.registers+I810_PTE_BASE+(i*4));
713 } 752 }
714 readl(intel_i830_private.registers+I810_PTE_BASE+((i-1)*4)); 753 readl(intel_private.registers+I810_PTE_BASE+((i-1)*4));
715 754
716 agp_bridge->driver->tlb_flush(mem); 755 agp_bridge->driver->tlb_flush(mem);
717 return 0; 756 return 0;
@@ -734,7 +773,7 @@ static int intel_i915_configure(void)
734 773
735 current_size = A_SIZE_FIX(agp_bridge->current_size); 774 current_size = A_SIZE_FIX(agp_bridge->current_size);
736 775
737 pci_read_config_dword(intel_i830_private.i830_dev, I915_GMADDR, &temp); 776 pci_read_config_dword(intel_private.pcidev, I915_GMADDR, &temp);
738 777
739 agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK); 778 agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
740 779
@@ -742,13 +781,13 @@ static int intel_i915_configure(void)
742 gmch_ctrl |= I830_GMCH_ENABLED; 781 gmch_ctrl |= I830_GMCH_ENABLED;
743 pci_write_config_word(agp_bridge->dev,I830_GMCH_CTRL,gmch_ctrl); 782 pci_write_config_word(agp_bridge->dev,I830_GMCH_CTRL,gmch_ctrl);
744 783
745 writel(agp_bridge->gatt_bus_addr|I810_PGETBL_ENABLED, intel_i830_private.registers+I810_PGETBL_CTL); 784 writel(agp_bridge->gatt_bus_addr|I810_PGETBL_ENABLED, intel_private.registers+I810_PGETBL_CTL);
746 readl(intel_i830_private.registers+I810_PGETBL_CTL); /* PCI Posting. */ 785 readl(intel_private.registers+I810_PGETBL_CTL); /* PCI Posting. */
747 786
748 if (agp_bridge->driver->needs_scratch_page) { 787 if (agp_bridge->driver->needs_scratch_page) {
749 for (i = intel_i830_private.gtt_entries; i < current_size->num_entries; i++) { 788 for (i = intel_private.gtt_entries; i < current_size->num_entries; i++) {
750 writel(agp_bridge->scratch_page, intel_i830_private.gtt+i); 789 writel(agp_bridge->scratch_page, intel_private.gtt+i);
751 readl(intel_i830_private.gtt+i); /* PCI Posting. */ 790 readl(intel_private.gtt+i); /* PCI Posting. */
752 } 791 }
753 } 792 }
754 793
@@ -758,8 +797,8 @@ static int intel_i915_configure(void)
758 797
759static void intel_i915_cleanup(void) 798static void intel_i915_cleanup(void)
760{ 799{
761 iounmap(intel_i830_private.gtt); 800 iounmap(intel_private.gtt);
762 iounmap(intel_i830_private.registers); 801 iounmap(intel_private.registers);
763} 802}
764 803
765static int intel_i915_insert_entries(struct agp_memory *mem,off_t pg_start, 804static int intel_i915_insert_entries(struct agp_memory *mem,off_t pg_start,
@@ -776,9 +815,9 @@ static int intel_i915_insert_entries(struct agp_memory *mem,off_t pg_start,
776 temp = agp_bridge->current_size; 815 temp = agp_bridge->current_size;
777 num_entries = A_SIZE_FIX(temp)->num_entries; 816 num_entries = A_SIZE_FIX(temp)->num_entries;
778 817
779 if (pg_start < intel_i830_private.gtt_entries) { 818 if (pg_start < intel_private.gtt_entries) {
780 printk (KERN_DEBUG PFX "pg_start == 0x%.8lx,intel_i830_private.gtt_entries == 0x%.8x\n", 819 printk (KERN_DEBUG PFX "pg_start == 0x%.8lx,intel_private.gtt_entries == 0x%.8x\n",
781 pg_start,intel_i830_private.gtt_entries); 820 pg_start,intel_private.gtt_entries);
782 821
783 printk (KERN_INFO PFX "Trying to insert into local/stolen memory\n"); 822 printk (KERN_INFO PFX "Trying to insert into local/stolen memory\n");
784 goto out_err; 823 goto out_err;
@@ -805,10 +844,10 @@ static int intel_i915_insert_entries(struct agp_memory *mem,off_t pg_start,
805 844
806 for (i = 0, j = pg_start; i < mem->page_count; i++, j++) { 845 for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
807 writel(agp_bridge->driver->mask_memory(agp_bridge, 846 writel(agp_bridge->driver->mask_memory(agp_bridge,
808 mem->memory[i], mask_type), intel_i830_private.gtt+j); 847 mem->memory[i], mask_type), intel_private.gtt+j);
809 } 848 }
810 849
811 readl(intel_i830_private.gtt+j-1); 850 readl(intel_private.gtt+j-1);
812 agp_bridge->driver->tlb_flush(mem); 851 agp_bridge->driver->tlb_flush(mem);
813 852
814 out: 853 out:
@@ -826,15 +865,15 @@ static int intel_i915_remove_entries(struct agp_memory *mem,off_t pg_start,
826 if (mem->page_count == 0) 865 if (mem->page_count == 0)
827 return 0; 866 return 0;
828 867
829 if (pg_start < intel_i830_private.gtt_entries) { 868 if (pg_start < intel_private.gtt_entries) {
830 printk (KERN_INFO PFX "Trying to disable local/stolen memory\n"); 869 printk (KERN_INFO PFX "Trying to disable local/stolen memory\n");
831 return -EINVAL; 870 return -EINVAL;
832 } 871 }
833 872
834 for (i = pg_start; i < (mem->page_count + pg_start); i++) { 873 for (i = pg_start; i < (mem->page_count + pg_start); i++) {
835 writel(agp_bridge->scratch_page, intel_i830_private.gtt+i); 874 writel(agp_bridge->scratch_page, intel_private.gtt+i);
836 } 875 }
837 readl(intel_i830_private.gtt+i-1); 876 readl(intel_private.gtt+i-1);
838 877
839 agp_bridge->driver->tlb_flush(mem); 878 agp_bridge->driver->tlb_flush(mem);
840 return 0; 879 return 0;
@@ -850,7 +889,7 @@ static int intel_i9xx_fetch_size(void)
850 int aper_size; /* size in megabytes */ 889 int aper_size; /* size in megabytes */
851 int i; 890 int i;
852 891
853 aper_size = pci_resource_len(intel_i830_private.i830_dev, 2) / MB(1); 892 aper_size = pci_resource_len(intel_private.pcidev, 2) / MB(1);
854 893
855 for (i = 0; i < num_sizes; i++) { 894 for (i = 0; i < num_sizes; i++) {
856 if (aper_size == intel_i830_sizes[i].size) { 895 if (aper_size == intel_i830_sizes[i].size) {
@@ -878,20 +917,20 @@ static int intel_i915_create_gatt_table(struct agp_bridge_data *bridge)
878 num_entries = size->num_entries; 917 num_entries = size->num_entries;
879 agp_bridge->gatt_table_real = NULL; 918 agp_bridge->gatt_table_real = NULL;
880 919
881 pci_read_config_dword(intel_i830_private.i830_dev, I915_MMADDR, &temp); 920 pci_read_config_dword(intel_private.pcidev, I915_MMADDR, &temp);
882 pci_read_config_dword(intel_i830_private.i830_dev, I915_PTEADDR,&temp2); 921 pci_read_config_dword(intel_private.pcidev, I915_PTEADDR,&temp2);
883 922
884 intel_i830_private.gtt = ioremap(temp2, 256 * 1024); 923 intel_private.gtt = ioremap(temp2, 256 * 1024);
885 if (!intel_i830_private.gtt) 924 if (!intel_private.gtt)
886 return -ENOMEM; 925 return -ENOMEM;
887 926
888 temp &= 0xfff80000; 927 temp &= 0xfff80000;
889 928
890 intel_i830_private.registers = ioremap(temp,128 * 4096); 929 intel_private.registers = ioremap(temp,128 * 4096);
891 if (!intel_i830_private.registers) 930 if (!intel_private.registers)
892 return -ENOMEM; 931 return -ENOMEM;
893 932
894 temp = readl(intel_i830_private.registers+I810_PGETBL_CTL) & 0xfffff000; 933 temp = readl(intel_private.registers+I810_PGETBL_CTL) & 0xfffff000;
895 global_cache_flush(); /* FIXME: ? */ 934 global_cache_flush(); /* FIXME: ? */
896 935
897 /* we have to call this as early as possible after the MMIO base address is known */ 936 /* we have to call this as early as possible after the MMIO base address is known */
@@ -938,20 +977,20 @@ static int intel_i965_create_gatt_table(struct agp_bridge_data *bridge)
938 num_entries = size->num_entries; 977 num_entries = size->num_entries;
939 agp_bridge->gatt_table_real = NULL; 978 agp_bridge->gatt_table_real = NULL;
940 979
941 pci_read_config_dword(intel_i830_private.i830_dev, I915_MMADDR, &temp); 980 pci_read_config_dword(intel_private.pcidev, I915_MMADDR, &temp);
942 981
943 temp &= 0xfff00000; 982 temp &= 0xfff00000;
944 intel_i830_private.gtt = ioremap((temp + (512 * 1024)) , 512 * 1024); 983 intel_private.gtt = ioremap((temp + (512 * 1024)) , 512 * 1024);
945 984
946 if (!intel_i830_private.gtt) 985 if (!intel_private.gtt)
947 return -ENOMEM; 986 return -ENOMEM;
948 987
949 988
950 intel_i830_private.registers = ioremap(temp,128 * 4096); 989 intel_private.registers = ioremap(temp,128 * 4096);
951 if (!intel_i830_private.registers) 990 if (!intel_private.registers)
952 return -ENOMEM; 991 return -ENOMEM;
953 992
954 temp = readl(intel_i830_private.registers+I810_PGETBL_CTL) & 0xfffff000; 993 temp = readl(intel_private.registers+I810_PGETBL_CTL) & 0xfffff000;
955 global_cache_flush(); /* FIXME: ? */ 994 global_cache_flush(); /* FIXME: ? */
956 995
957 /* we have to call this as early as possible after the MMIO base address is known */ 996 /* we have to call this as early as possible after the MMIO base address is known */
@@ -1722,41 +1761,126 @@ static const struct agp_bridge_driver intel_7505_driver = {
1722 .agp_type_to_mask_type = agp_generic_type_to_mask_type, 1761 .agp_type_to_mask_type = agp_generic_type_to_mask_type,
1723}; 1762};
1724 1763
1725static int find_i810(u16 device) 1764static const struct agp_bridge_driver intel_g33_driver = {
1726{ 1765 .owner = THIS_MODULE,
1727 struct pci_dev *i810_dev; 1766 .aperture_sizes = intel_i830_sizes,
1728 1767 .size_type = FIXED_APER_SIZE,
1729 i810_dev = pci_get_device(PCI_VENDOR_ID_INTEL, device, NULL); 1768 .num_aperture_sizes = 4,
1730 if (!i810_dev) 1769 .needs_scratch_page = TRUE,
1731 return 0; 1770 .configure = intel_i915_configure,
1732 intel_i810_private.i810_dev = i810_dev; 1771 .fetch_size = intel_i9xx_fetch_size,
1733 return 1; 1772 .cleanup = intel_i915_cleanup,
1734} 1773 .tlb_flush = intel_i810_tlbflush,
1774 .mask_memory = intel_i965_mask_memory,
1775 .masks = intel_i810_masks,
1776 .agp_enable = intel_i810_agp_enable,
1777 .cache_flush = global_cache_flush,
1778 .create_gatt_table = intel_i915_create_gatt_table,
1779 .free_gatt_table = intel_i830_free_gatt_table,
1780 .insert_memory = intel_i915_insert_entries,
1781 .remove_memory = intel_i915_remove_entries,
1782 .alloc_by_type = intel_i830_alloc_by_type,
1783 .free_by_type = intel_i810_free_by_type,
1784 .agp_alloc_page = agp_generic_alloc_page,
1785 .agp_destroy_page = agp_generic_destroy_page,
1786 .agp_type_to_mask_type = intel_i830_type_to_mask_type,
1787};
1735 1788
1736static int find_i830(u16 device) 1789static int find_gmch(u16 device)
1737{ 1790{
1738 struct pci_dev *i830_dev; 1791 struct pci_dev *gmch_device;
1739 1792
1740 i830_dev = pci_get_device(PCI_VENDOR_ID_INTEL, device, NULL); 1793 gmch_device = pci_get_device(PCI_VENDOR_ID_INTEL, device, NULL);
1741 if (i830_dev && PCI_FUNC(i830_dev->devfn) != 0) { 1794 if (gmch_device && PCI_FUNC(gmch_device->devfn) != 0) {
1742 i830_dev = pci_get_device(PCI_VENDOR_ID_INTEL, 1795 gmch_device = pci_get_device(PCI_VENDOR_ID_INTEL,
1743 device, i830_dev); 1796 device, gmch_device);
1744 } 1797 }
1745 1798
1746 if (!i830_dev) 1799 if (!gmch_device)
1747 return 0; 1800 return 0;
1748 1801
1749 intel_i830_private.i830_dev = i830_dev; 1802 intel_private.pcidev = gmch_device;
1750 return 1; 1803 return 1;
1751} 1804}
1752 1805
1806/* Table to describe Intel GMCH and AGP/PCIE GART drivers. At least one of
1807 * driver and gmch_driver must be non-null, and find_gmch will determine
1808 * which one should be used if a gmch_chip_id is present.
1809 */
1810static const struct intel_driver_description {
1811 unsigned int chip_id;
1812 unsigned int gmch_chip_id;
1813 char *name;
1814 const struct agp_bridge_driver *driver;
1815 const struct agp_bridge_driver *gmch_driver;
1816} intel_agp_chipsets[] = {
1817 { PCI_DEVICE_ID_INTEL_82443LX_0, 0, "440LX", &intel_generic_driver, NULL },
1818 { PCI_DEVICE_ID_INTEL_82443BX_0, 0, "440BX", &intel_generic_driver, NULL },
1819 { PCI_DEVICE_ID_INTEL_82443GX_0, 0, "440GX", &intel_generic_driver, NULL },
1820 { PCI_DEVICE_ID_INTEL_82810_MC1, PCI_DEVICE_ID_INTEL_82810_IG1, "i810",
1821 NULL, &intel_810_driver },
1822 { PCI_DEVICE_ID_INTEL_82810_MC3, PCI_DEVICE_ID_INTEL_82810_IG3, "i810",
1823 NULL, &intel_810_driver },
1824 { PCI_DEVICE_ID_INTEL_82810E_MC, PCI_DEVICE_ID_INTEL_82810E_IG, "i810",
1825 NULL, &intel_810_driver },
1826 { PCI_DEVICE_ID_INTEL_82815_MC, PCI_DEVICE_ID_INTEL_82815_CGC, "i815",
1827 &intel_810_driver, &intel_815_driver },
1828 { PCI_DEVICE_ID_INTEL_82820_HB, 0, "i820", &intel_820_driver, NULL },
1829 { PCI_DEVICE_ID_INTEL_82820_UP_HB, 0, "i820", &intel_820_driver, NULL },
1830 { PCI_DEVICE_ID_INTEL_82830_HB, PCI_DEVICE_ID_INTEL_82830_CGC, "830M",
1831 &intel_830mp_driver, &intel_830_driver },
1832 { PCI_DEVICE_ID_INTEL_82840_HB, 0, "i840", &intel_840_driver, NULL },
1833 { PCI_DEVICE_ID_INTEL_82845_HB, 0, "845G", &intel_845_driver, NULL },
1834 { PCI_DEVICE_ID_INTEL_82845G_HB, PCI_DEVICE_ID_INTEL_82845G_IG, "830M",
1835 &intel_845_driver, &intel_830_driver },
1836 { PCI_DEVICE_ID_INTEL_82850_HB, 0, "i850", &intel_850_driver, NULL },
1837 { PCI_DEVICE_ID_INTEL_82855PM_HB, 0, "855PM", &intel_845_driver, NULL },
1838 { PCI_DEVICE_ID_INTEL_82855GM_HB, PCI_DEVICE_ID_INTEL_82855GM_IG, "855GM",
1839 &intel_845_driver, &intel_830_driver },
1840 { PCI_DEVICE_ID_INTEL_82860_HB, 0, "i860", &intel_860_driver, NULL },
1841 { PCI_DEVICE_ID_INTEL_82865_HB, PCI_DEVICE_ID_INTEL_82865_IG, "865",
1842 &intel_845_driver, &intel_830_driver },
1843 { PCI_DEVICE_ID_INTEL_82875_HB, 0, "i875", &intel_845_driver, NULL },
1844 { PCI_DEVICE_ID_INTEL_82915G_HB, PCI_DEVICE_ID_INTEL_82915G_IG, "915G",
1845 &intel_845_driver, &intel_915_driver },
1846 { PCI_DEVICE_ID_INTEL_82915GM_HB, PCI_DEVICE_ID_INTEL_82915GM_IG, "915GM",
1847 &intel_845_driver, &intel_915_driver },
1848 { PCI_DEVICE_ID_INTEL_82945G_HB, PCI_DEVICE_ID_INTEL_82945G_IG, "945G",
1849 &intel_845_driver, &intel_915_driver },
1850 { PCI_DEVICE_ID_INTEL_82945GM_HB, PCI_DEVICE_ID_INTEL_82945GM_IG, "945GM",
1851 &intel_845_driver, &intel_915_driver },
1852 { PCI_DEVICE_ID_INTEL_82945GM_HB, PCI_DEVICE_ID_INTEL_82945GME_IG, "945GME",
1853 &intel_845_driver, &intel_915_driver },
1854 { PCI_DEVICE_ID_INTEL_82946GZ_HB, PCI_DEVICE_ID_INTEL_82946GZ_IG, "946GZ",
1855 &intel_845_driver, &intel_i965_driver },
1856 { PCI_DEVICE_ID_INTEL_82965G_1_HB, PCI_DEVICE_ID_INTEL_82965G_1_IG, "965G",
1857 &intel_845_driver, &intel_i965_driver },
1858 { PCI_DEVICE_ID_INTEL_82965Q_HB, PCI_DEVICE_ID_INTEL_82965Q_IG, "965Q",
1859 &intel_845_driver, &intel_i965_driver },
1860 { PCI_DEVICE_ID_INTEL_82965G_HB, PCI_DEVICE_ID_INTEL_82965G_IG, "965G",
1861 &intel_845_driver, &intel_i965_driver },
1862 { PCI_DEVICE_ID_INTEL_82965GM_HB, PCI_DEVICE_ID_INTEL_82965GM_IG, "965GM",
1863 &intel_845_driver, &intel_i965_driver },
1864 { PCI_DEVICE_ID_INTEL_82965GM_HB, PCI_DEVICE_ID_INTEL_82965GME_IG, "965GME/GLE",
1865 &intel_845_driver, &intel_i965_driver },
1866 { PCI_DEVICE_ID_INTEL_7505_0, 0, "E7505", &intel_7505_driver, NULL },
1867 { PCI_DEVICE_ID_INTEL_7205_0, 0, "E7205", &intel_7505_driver, NULL },
1868 { PCI_DEVICE_ID_INTEL_G33_HB, PCI_DEVICE_ID_INTEL_G33_IG, "G33",
1869 &intel_845_driver, &intel_g33_driver },
1870 { PCI_DEVICE_ID_INTEL_Q35_HB, PCI_DEVICE_ID_INTEL_Q35_IG, "Q35",
1871 &intel_845_driver, &intel_g33_driver },
1872 { PCI_DEVICE_ID_INTEL_Q33_HB, PCI_DEVICE_ID_INTEL_Q33_IG, "Q33",
1873 &intel_845_driver, &intel_g33_driver },
1874 { 0, 0, NULL, NULL, NULL }
1875};
1876
1753static int __devinit agp_intel_probe(struct pci_dev *pdev, 1877static int __devinit agp_intel_probe(struct pci_dev *pdev,
1754 const struct pci_device_id *ent) 1878 const struct pci_device_id *ent)
1755{ 1879{
1756 struct agp_bridge_data *bridge; 1880 struct agp_bridge_data *bridge;
1757 char *name = "(unknown)";
1758 u8 cap_ptr = 0; 1881 u8 cap_ptr = 0;
1759 struct resource *r; 1882 struct resource *r;
1883 int i;
1760 1884
1761 cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP); 1885 cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP);
1762 1886
@@ -1764,195 +1888,42 @@ static int __devinit agp_intel_probe(struct pci_dev *pdev,
1764 if (!bridge) 1888 if (!bridge)
1765 return -ENOMEM; 1889 return -ENOMEM;
1766 1890
1767 switch (pdev->device) { 1891 for (i = 0; intel_agp_chipsets[i].name != NULL; i++) {
1768 case PCI_DEVICE_ID_INTEL_82443LX_0: 1892 /* In case that multiple models of gfx chip may
1769 bridge->driver = &intel_generic_driver; 1893 stand on same host bridge type, this can be
1770 name = "440LX"; 1894 sure we detect the right IGD. */
1771 break; 1895 if ((pdev->device == intel_agp_chipsets[i].chip_id) &&
1772 case PCI_DEVICE_ID_INTEL_82443BX_0: 1896 ((intel_agp_chipsets[i].gmch_chip_id == 0) ||
1773 bridge->driver = &intel_generic_driver; 1897 find_gmch(intel_agp_chipsets[i].gmch_chip_id)))
1774 name = "440BX"; 1898 break;
1775 break; 1899 }
1776 case PCI_DEVICE_ID_INTEL_82443GX_0: 1900
1777 bridge->driver = &intel_generic_driver; 1901 if (intel_agp_chipsets[i].name == NULL) {
1778 name = "440GX";
1779 break;
1780 case PCI_DEVICE_ID_INTEL_82810_MC1:
1781 name = "i810";
1782 if (!find_i810(PCI_DEVICE_ID_INTEL_82810_IG1))
1783 goto fail;
1784 bridge->driver = &intel_810_driver;
1785 break;
1786 case PCI_DEVICE_ID_INTEL_82810_MC3:
1787 name = "i810 DC100";
1788 if (!find_i810(PCI_DEVICE_ID_INTEL_82810_IG3))
1789 goto fail;
1790 bridge->driver = &intel_810_driver;
1791 break;
1792 case PCI_DEVICE_ID_INTEL_82810E_MC:
1793 name = "i810 E";
1794 if (!find_i810(PCI_DEVICE_ID_INTEL_82810E_IG))
1795 goto fail;
1796 bridge->driver = &intel_810_driver;
1797 break;
1798 case PCI_DEVICE_ID_INTEL_82815_MC:
1799 /*
1800 * The i815 can operate either as an i810 style
1801 * integrated device, or as an AGP4X motherboard.
1802 */
1803 if (find_i810(PCI_DEVICE_ID_INTEL_82815_CGC))
1804 bridge->driver = &intel_810_driver;
1805 else
1806 bridge->driver = &intel_815_driver;
1807 name = "i815";
1808 break;
1809 case PCI_DEVICE_ID_INTEL_82820_HB:
1810 case PCI_DEVICE_ID_INTEL_82820_UP_HB:
1811 bridge->driver = &intel_820_driver;
1812 name = "i820";
1813 break;
1814 case PCI_DEVICE_ID_INTEL_82830_HB:
1815 if (find_i830(PCI_DEVICE_ID_INTEL_82830_CGC))
1816 bridge->driver = &intel_830_driver;
1817 else
1818 bridge->driver = &intel_830mp_driver;
1819 name = "830M";
1820 break;
1821 case PCI_DEVICE_ID_INTEL_82840_HB:
1822 bridge->driver = &intel_840_driver;
1823 name = "i840";
1824 break;
1825 case PCI_DEVICE_ID_INTEL_82845_HB:
1826 bridge->driver = &intel_845_driver;
1827 name = "i845";
1828 break;
1829 case PCI_DEVICE_ID_INTEL_82845G_HB:
1830 if (find_i830(PCI_DEVICE_ID_INTEL_82845G_IG))
1831 bridge->driver = &intel_830_driver;
1832 else
1833 bridge->driver = &intel_845_driver;
1834 name = "845G";
1835 break;
1836 case PCI_DEVICE_ID_INTEL_82850_HB:
1837 bridge->driver = &intel_850_driver;
1838 name = "i850";
1839 break;
1840 case PCI_DEVICE_ID_INTEL_82855PM_HB:
1841 bridge->driver = &intel_845_driver;
1842 name = "855PM";
1843 break;
1844 case PCI_DEVICE_ID_INTEL_82855GM_HB:
1845 if (find_i830(PCI_DEVICE_ID_INTEL_82855GM_IG)) {
1846 bridge->driver = &intel_830_driver;
1847 name = "855";
1848 } else {
1849 bridge->driver = &intel_845_driver;
1850 name = "855GM";
1851 }
1852 break;
1853 case PCI_DEVICE_ID_INTEL_82860_HB:
1854 bridge->driver = &intel_860_driver;
1855 name = "i860";
1856 break;
1857 case PCI_DEVICE_ID_INTEL_82865_HB:
1858 if (find_i830(PCI_DEVICE_ID_INTEL_82865_IG))
1859 bridge->driver = &intel_830_driver;
1860 else
1861 bridge->driver = &intel_845_driver;
1862 name = "865";
1863 break;
1864 case PCI_DEVICE_ID_INTEL_82875_HB:
1865 bridge->driver = &intel_845_driver;
1866 name = "i875";
1867 break;
1868 case PCI_DEVICE_ID_INTEL_82915G_HB:
1869 if (find_i830(PCI_DEVICE_ID_INTEL_82915G_IG))
1870 bridge->driver = &intel_915_driver;
1871 else
1872 bridge->driver = &intel_845_driver;
1873 name = "915G";
1874 break;
1875 case PCI_DEVICE_ID_INTEL_82915GM_HB:
1876 if (find_i830(PCI_DEVICE_ID_INTEL_82915GM_IG))
1877 bridge->driver = &intel_915_driver;
1878 else
1879 bridge->driver = &intel_845_driver;
1880 name = "915GM";
1881 break;
1882 case PCI_DEVICE_ID_INTEL_82945G_HB:
1883 if (find_i830(PCI_DEVICE_ID_INTEL_82945G_IG))
1884 bridge->driver = &intel_915_driver;
1885 else
1886 bridge->driver = &intel_845_driver;
1887 name = "945G";
1888 break;
1889 case PCI_DEVICE_ID_INTEL_82945GM_HB:
1890 if (find_i830(PCI_DEVICE_ID_INTEL_82945GM_IG))
1891 bridge->driver = &intel_915_driver;
1892 else
1893 bridge->driver = &intel_845_driver;
1894 name = "945GM";
1895 break;
1896 case PCI_DEVICE_ID_INTEL_82946GZ_HB:
1897 if (find_i830(PCI_DEVICE_ID_INTEL_82946GZ_IG))
1898 bridge->driver = &intel_i965_driver;
1899 else
1900 bridge->driver = &intel_845_driver;
1901 name = "946GZ";
1902 break;
1903 case PCI_DEVICE_ID_INTEL_82965G_1_HB:
1904 if (find_i830(PCI_DEVICE_ID_INTEL_82965G_1_IG))
1905 bridge->driver = &intel_i965_driver;
1906 else
1907 bridge->driver = &intel_845_driver;
1908 name = "965G";
1909 break;
1910 case PCI_DEVICE_ID_INTEL_82965Q_HB:
1911 if (find_i830(PCI_DEVICE_ID_INTEL_82965Q_IG))
1912 bridge->driver = &intel_i965_driver;
1913 else
1914 bridge->driver = &intel_845_driver;
1915 name = "965Q";
1916 break;
1917 case PCI_DEVICE_ID_INTEL_82965G_HB:
1918 if (find_i830(PCI_DEVICE_ID_INTEL_82965G_IG))
1919 bridge->driver = &intel_i965_driver;
1920 else
1921 bridge->driver = &intel_845_driver;
1922 name = "965G";
1923 break;
1924 case PCI_DEVICE_ID_INTEL_82965GM_HB:
1925 if (find_i830(PCI_DEVICE_ID_INTEL_82965GM_IG))
1926 bridge->driver = &intel_i965_driver;
1927 else
1928 bridge->driver = &intel_845_driver;
1929 name = "965GM";
1930 break;
1931 case PCI_DEVICE_ID_INTEL_7505_0:
1932 bridge->driver = &intel_7505_driver;
1933 name = "E7505";
1934 break;
1935 case PCI_DEVICE_ID_INTEL_7205_0:
1936 bridge->driver = &intel_7505_driver;
1937 name = "E7205";
1938 break;
1939 default:
1940 if (cap_ptr) 1902 if (cap_ptr)
1941 printk(KERN_WARNING PFX "Unsupported Intel chipset (device id: %04x)\n", 1903 printk(KERN_WARNING PFX "Unsupported Intel chipset"
1942 pdev->device); 1904 "(device id: %04x)\n", pdev->device);
1943 agp_put_bridge(bridge); 1905 agp_put_bridge(bridge);
1944 return -ENODEV; 1906 return -ENODEV;
1945 }; 1907 }
1908
1909 if (intel_agp_chipsets[i].gmch_chip_id != 0)
1910 bridge->driver = intel_agp_chipsets[i].gmch_driver;
1911 else
1912 bridge->driver = intel_agp_chipsets[i].driver;
1913
1914 if (bridge->driver == NULL) {
1915 printk(KERN_WARNING PFX "Failed to find bridge device "
1916 "(chip_id: %04x)\n", intel_agp_chipsets[i].gmch_chip_id);
1917 agp_put_bridge(bridge);
1918 return -ENODEV;
1919 }
1946 1920
1947 bridge->dev = pdev; 1921 bridge->dev = pdev;
1948 bridge->capndx = cap_ptr; 1922 bridge->capndx = cap_ptr;
1923 bridge->dev_private_data = &intel_private;
1949 1924
1950 if (bridge->driver == &intel_810_driver) 1925 printk(KERN_INFO PFX "Detected an Intel %s Chipset.\n",
1951 bridge->dev_private_data = &intel_i810_private; 1926 intel_agp_chipsets[i].name);
1952 else if (bridge->driver == &intel_830_driver)
1953 bridge->dev_private_data = &intel_i830_private;
1954
1955 printk(KERN_INFO PFX "Detected an Intel %s Chipset.\n", name);
1956 1927
1957 /* 1928 /*
1958 * The following fixes the case where the BIOS has "forgotten" to 1929 * The following fixes the case where the BIOS has "forgotten" to
@@ -1988,12 +1959,6 @@ static int __devinit agp_intel_probe(struct pci_dev *pdev,
1988 1959
1989 pci_set_drvdata(pdev, bridge); 1960 pci_set_drvdata(pdev, bridge);
1990 return agp_add_bridge(bridge); 1961 return agp_add_bridge(bridge);
1991
1992fail:
1993 printk(KERN_ERR PFX "Detected an Intel %s chipset, "
1994 "but could not find the secondary device.\n", name);
1995 agp_put_bridge(bridge);
1996 return -ENODEV;
1997} 1962}
1998 1963
1999static void __devexit agp_intel_remove(struct pci_dev *pdev) 1964static void __devexit agp_intel_remove(struct pci_dev *pdev)
@@ -2002,10 +1967,8 @@ static void __devexit agp_intel_remove(struct pci_dev *pdev)
2002 1967
2003 agp_remove_bridge(bridge); 1968 agp_remove_bridge(bridge);
2004 1969
2005 if (intel_i810_private.i810_dev) 1970 if (intel_private.pcidev)
2006 pci_dev_put(intel_i810_private.i810_dev); 1971 pci_dev_put(intel_private.pcidev);
2007 if (intel_i830_private.i830_dev)
2008 pci_dev_put(intel_i830_private.i830_dev);
2009 1972
2010 agp_put_bridge(bridge); 1973 agp_put_bridge(bridge);
2011} 1974}
@@ -2021,10 +1984,8 @@ static int agp_intel_resume(struct pci_dev *pdev)
2021 * as host bridge (00:00) resumes before graphics device (02:00), 1984 * as host bridge (00:00) resumes before graphics device (02:00),
2022 * then our access to its pci space can work right. 1985 * then our access to its pci space can work right.
2023 */ 1986 */
2024 if (intel_i810_private.i810_dev) 1987 if (intel_private.pcidev)
2025 pci_restore_state(intel_i810_private.i810_dev); 1988 pci_restore_state(intel_private.pcidev);
2026 if (intel_i830_private.i830_dev)
2027 pci_restore_state(intel_i830_private.i830_dev);
2028 1989
2029 if (bridge->driver == &intel_generic_driver) 1990 if (bridge->driver == &intel_generic_driver)
2030 intel_configure(); 1991 intel_configure();
@@ -2087,6 +2048,9 @@ static struct pci_device_id agp_intel_pci_table[] = {
2087 ID(PCI_DEVICE_ID_INTEL_82965Q_HB), 2048 ID(PCI_DEVICE_ID_INTEL_82965Q_HB),
2088 ID(PCI_DEVICE_ID_INTEL_82965G_HB), 2049 ID(PCI_DEVICE_ID_INTEL_82965G_HB),
2089 ID(PCI_DEVICE_ID_INTEL_82965GM_HB), 2050 ID(PCI_DEVICE_ID_INTEL_82965GM_HB),
2051 ID(PCI_DEVICE_ID_INTEL_G33_HB),
2052 ID(PCI_DEVICE_ID_INTEL_Q35_HB),
2053 ID(PCI_DEVICE_ID_INTEL_Q33_HB),
2090 { } 2054 { }
2091}; 2055};
2092 2056
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-30 03:55:08 -0500