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path: root/drivers/char/agp/isoch.c
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Diffstat (limited to 'drivers/char/agp/isoch.c')
-rw-r--r--drivers/char/agp/isoch.c20
1 files changed, 10 insertions, 10 deletions
diff --git a/drivers/char/agp/isoch.c b/drivers/char/agp/isoch.c
index 7c14a096b85e..3f9ccde62377 100644
--- a/drivers/char/agp/isoch.c
+++ b/drivers/char/agp/isoch.c
@@ -26,7 +26,7 @@ static void agp_3_5_dev_list_insert(struct list_head *head, struct list_head *ne
26 26
27 list_for_each(pos, head) { 27 list_for_each(pos, head) {
28 cur = list_entry(pos, struct agp_3_5_dev, list); 28 cur = list_entry(pos, struct agp_3_5_dev, list);
29 if(cur->maxbw > n->maxbw) 29 if (cur->maxbw > n->maxbw)
30 break; 30 break;
31 } 31 }
32 list_add_tail(new, pos); 32 list_add_tail(new, pos);
@@ -54,9 +54,9 @@ static void agp_3_5_dev_list_sort(struct agp_3_5_dev *list, unsigned int ndevs)
54 } 54 }
55} 55}
56 56
57/* 57/*
58 * Initialize all isochronous transfer parameters for an AGP 3.0 58 * Initialize all isochronous transfer parameters for an AGP 3.0
59 * node (i.e. a host bridge in combination with the adapters 59 * node (i.e. a host bridge in combination with the adapters
60 * lying behind it...) 60 * lying behind it...)
61 */ 61 */
62 62
@@ -200,7 +200,7 @@ static int agp_3_5_isochronous_node_enable(struct agp_bridge_data *bridge,
200 * this to the hungriest device (as per the spec) */ 200 * this to the hungriest device (as per the spec) */
201 rem = target.n - tot_n; 201 rem = target.n - tot_n;
202 202
203 /* 203 /*
204 * Calculate the minimum isochronous RQ depth needed by each master. 204 * Calculate the minimum isochronous RQ depth needed by each master.
205 * Along the way, distribute the extra ISOCH_N capability calculated 205 * Along the way, distribute the extra ISOCH_N capability calculated
206 * above. 206 * above.
@@ -214,7 +214,7 @@ static int agp_3_5_isochronous_node_enable(struct agp_bridge_data *bridge,
214 * many writes on the AGP bus). 214 * many writes on the AGP bus).
215 */ 215 */
216 master[cdev].rq = master[cdev].n; 216 master[cdev].rq = master[cdev].n;
217 if(master[cdev].y > 0x1) 217 if (master[cdev].y > 0x1)
218 master[cdev].rq *= (1 << (master[cdev].y - 1)); 218 master[cdev].rq *= (1 << (master[cdev].y - 1));
219 219
220 tot_rq += master[cdev].rq; 220 tot_rq += master[cdev].rq;
@@ -334,9 +334,9 @@ int agp_3_5_enable(struct agp_bridge_data *bridge)
334 334
335 arqsz = (tstatus >> 13) & 0x7; 335 arqsz = (tstatus >> 13) & 0x7;
336 336
337 /* 337 /*
338 * Allocate a head for our AGP 3.5 device list 338 * Allocate a head for our AGP 3.5 device list
339 * (multiple AGP v3 devices are allowed behind a single bridge). 339 * (multiple AGP v3 devices are allowed behind a single bridge).
340 */ 340 */
341 if ((dev_list = kmalloc(sizeof(*dev_list), GFP_KERNEL)) == NULL) { 341 if ((dev_list = kmalloc(sizeof(*dev_list), GFP_KERNEL)) == NULL) {
342 ret = -ENOMEM; 342 ret = -ENOMEM;
@@ -366,7 +366,7 @@ int agp_3_5_enable(struct agp_bridge_data *bridge)
366 366
367 case 0x0300: /* Display controller */ 367 case 0x0300: /* Display controller */
368 case 0x0400: /* Multimedia controller */ 368 case 0x0400: /* Multimedia controller */
369 if((cur = kmalloc(sizeof(*cur), GFP_KERNEL)) == NULL) { 369 if ((cur = kmalloc(sizeof(*cur), GFP_KERNEL)) == NULL) {
370 ret = -ENOMEM; 370 ret = -ENOMEM;
371 goto free_and_exit; 371 goto free_and_exit;
372 } 372 }
@@ -391,7 +391,7 @@ int agp_3_5_enable(struct agp_bridge_data *bridge)
391 list_for_each(pos, head) { 391 list_for_each(pos, head) {
392 cur = list_entry(pos, struct agp_3_5_dev, list); 392 cur = list_entry(pos, struct agp_3_5_dev, list);
393 dev = cur->dev; 393 dev = cur->dev;
394 394
395 pci_read_config_word(dev, PCI_STATUS, &mpstat); 395 pci_read_config_word(dev, PCI_STATUS, &mpstat);
396 if ((mpstat & PCI_STATUS_CAP_LIST) == 0) 396 if ((mpstat & PCI_STATUS_CAP_LIST) == 0)
397 continue; 397 continue;