aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/char/agp/intel-gtt.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/char/agp/intel-gtt.c')
-rw-r--r--drivers/char/agp/intel-gtt.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index 356f73e0d17e..da8161806f39 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -814,6 +814,12 @@ static bool intel_enable_gtt(void)
814 } 814 }
815 } 815 }
816 816
817 /* On the resume path we may be adjusting the PGTBL value, so
818 * be paranoid and flush all chipset write buffers...
819 */
820 if (INTEL_GTT_GEN >= 3)
821 writel(0, intel_private.registers+GFX_FLSH_CNTL);
822
817 reg = intel_private.registers+I810_PGETBL_CTL; 823 reg = intel_private.registers+I810_PGETBL_CTL;
818 writel(intel_private.PGETBL_save, reg); 824 writel(intel_private.PGETBL_save, reg);
819 if (HAS_PGTBL_EN && (readl(reg) & I810_PGETBL_ENABLED) == 0) { 825 if (HAS_PGTBL_EN && (readl(reg) & I810_PGETBL_ENABLED) == 0) {
@@ -823,6 +829,9 @@ static bool intel_enable_gtt(void)
823 return false; 829 return false;
824 } 830 }
825 831
832 if (INTEL_GTT_GEN >= 3)
833 writel(0, intel_private.registers+GFX_FLSH_CNTL);
834
826 return true; 835 return true;
827} 836}
828 837