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path: root/drivers/char/agp/amd-k7-agp.c
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Diffstat (limited to 'drivers/char/agp/amd-k7-agp.c')
-rw-r--r--drivers/char/agp/amd-k7-agp.c12
1 files changed, 5 insertions, 7 deletions
diff --git a/drivers/char/agp/amd-k7-agp.c b/drivers/char/agp/amd-k7-agp.c
index 779f0ab845a9..3661a51e93e2 100644
--- a/drivers/char/agp/amd-k7-agp.c
+++ b/drivers/char/agp/amd-k7-agp.c
@@ -11,7 +11,7 @@
11#include <linux/slab.h> 11#include <linux/slab.h>
12#include "agp.h" 12#include "agp.h"
13 13
14#define AMD_MMBASE 0x14 14#define AMD_MMBASE_BAR 1
15#define AMD_APSIZE 0xac 15#define AMD_APSIZE 0xac
16#define AMD_MODECNTL 0xb0 16#define AMD_MODECNTL 0xb0
17#define AMD_MODECNTL2 0xb2 17#define AMD_MODECNTL2 0xb2
@@ -126,7 +126,6 @@ static int amd_create_gatt_table(struct agp_bridge_data *bridge)
126 unsigned long __iomem *cur_gatt; 126 unsigned long __iomem *cur_gatt;
127 unsigned long addr; 127 unsigned long addr;
128 int retval; 128 int retval;
129 u32 temp;
130 int i; 129 int i;
131 130
132 value = A_SIZE_LVL2(agp_bridge->current_size); 131 value = A_SIZE_LVL2(agp_bridge->current_size);
@@ -149,8 +148,7 @@ static int amd_create_gatt_table(struct agp_bridge_data *bridge)
149 * used to program the agp master not the cpu 148 * used to program the agp master not the cpu
150 */ 149 */
151 150
152 pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp); 151 addr = pci_bus_address(agp_bridge->dev, AGP_APERTURE_BAR);
153 addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
154 agp_bridge->gart_bus_addr = addr; 152 agp_bridge->gart_bus_addr = addr;
155 153
156 /* Calculate the agp offset */ 154 /* Calculate the agp offset */
@@ -207,6 +205,7 @@ static int amd_irongate_fetch_size(void)
207static int amd_irongate_configure(void) 205static int amd_irongate_configure(void)
208{ 206{
209 struct aper_size_info_lvl2 *current_size; 207 struct aper_size_info_lvl2 *current_size;
208 phys_addr_t reg;
210 u32 temp; 209 u32 temp;
211 u16 enable_reg; 210 u16 enable_reg;
212 211
@@ -214,9 +213,8 @@ static int amd_irongate_configure(void)
214 213
215 if (!amd_irongate_private.registers) { 214 if (!amd_irongate_private.registers) {
216 /* Get the memory mapped registers */ 215 /* Get the memory mapped registers */
217 pci_read_config_dword(agp_bridge->dev, AMD_MMBASE, &temp); 216 reg = pci_resource_start(agp_bridge->dev, AMD_MMBASE_BAR);
218 temp = (temp & PCI_BASE_ADDRESS_MEM_MASK); 217 amd_irongate_private.registers = (volatile u8 __iomem *) ioremap(reg, 4096);
219 amd_irongate_private.registers = (volatile u8 __iomem *) ioremap(temp, 4096);
220 if (!amd_irongate_private.registers) 218 if (!amd_irongate_private.registers)
221 return -ENOMEM; 219 return -ENOMEM;
222 } 220 }