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-rw-r--r--drivers/block/Makefile1
-rw-r--r--drivers/block/aoe/aoe.h1
-rw-r--r--drivers/block/aoe/aoedev.c2
-rw-r--r--drivers/block/aoe/aoenet.c2
-rw-r--r--drivers/block/ataflop.c4
-rw-r--r--drivers/block/cciss.c217
-rw-r--r--drivers/block/floppy.c79
-rw-r--r--drivers/block/loop.c3
-rw-r--r--drivers/block/nbd.c9
-rw-r--r--drivers/block/paride/pg.c2
-rw-r--r--drivers/block/ps3vram.c865
-rw-r--r--drivers/block/xen-blkfront.c32
-rw-r--r--drivers/block/xsysace.c22
13 files changed, 1191 insertions, 48 deletions
diff --git a/drivers/block/Makefile b/drivers/block/Makefile
index 204332b29578..87e120e0a79c 100644
--- a/drivers/block/Makefile
+++ b/drivers/block/Makefile
@@ -9,6 +9,7 @@ obj-$(CONFIG_MAC_FLOPPY) += swim3.o
9obj-$(CONFIG_BLK_DEV_FD) += floppy.o 9obj-$(CONFIG_BLK_DEV_FD) += floppy.o
10obj-$(CONFIG_AMIGA_FLOPPY) += amiflop.o 10obj-$(CONFIG_AMIGA_FLOPPY) += amiflop.o
11obj-$(CONFIG_PS3_DISK) += ps3disk.o 11obj-$(CONFIG_PS3_DISK) += ps3disk.o
12obj-$(CONFIG_PS3_VRAM) += ps3vram.o
12obj-$(CONFIG_ATARI_FLOPPY) += ataflop.o 13obj-$(CONFIG_ATARI_FLOPPY) += ataflop.o
13obj-$(CONFIG_AMIGA_Z2RAM) += z2ram.o 14obj-$(CONFIG_AMIGA_Z2RAM) += z2ram.o
14obj-$(CONFIG_BLK_DEV_RAM) += brd.o 15obj-$(CONFIG_BLK_DEV_RAM) += brd.o
diff --git a/drivers/block/aoe/aoe.h b/drivers/block/aoe/aoe.h
index c237527b1aa5..5e41e6dd657b 100644
--- a/drivers/block/aoe/aoe.h
+++ b/drivers/block/aoe/aoe.h
@@ -18,6 +18,7 @@
18enum { 18enum {
19 AOECMD_ATA, 19 AOECMD_ATA,
20 AOECMD_CFG, 20 AOECMD_CFG,
21 AOECMD_VEND_MIN = 0xf0,
21 22
22 AOEFL_RSP = (1<<3), 23 AOEFL_RSP = (1<<3),
23 AOEFL_ERR = (1<<2), 24 AOEFL_ERR = (1<<2),
diff --git a/drivers/block/aoe/aoedev.c b/drivers/block/aoe/aoedev.c
index cc250577d405..eeea477d9601 100644
--- a/drivers/block/aoe/aoedev.c
+++ b/drivers/block/aoe/aoedev.c
@@ -173,7 +173,7 @@ skbfree(struct sk_buff *skb)
173 return; 173 return;
174 while (atomic_read(&skb_shinfo(skb)->dataref) != 1 && i-- > 0) 174 while (atomic_read(&skb_shinfo(skb)->dataref) != 1 && i-- > 0)
175 msleep(Sms); 175 msleep(Sms);
176 if (i <= 0) { 176 if (i < 0) {
177 printk(KERN_ERR 177 printk(KERN_ERR
178 "aoe: %s holds ref: %s\n", 178 "aoe: %s holds ref: %s\n",
179 skb->dev ? skb->dev->name : "netif", 179 skb->dev ? skb->dev->name : "netif",
diff --git a/drivers/block/aoe/aoenet.c b/drivers/block/aoe/aoenet.c
index 30de5b1c647e..c6099ba9a4b8 100644
--- a/drivers/block/aoe/aoenet.c
+++ b/drivers/block/aoe/aoenet.c
@@ -142,6 +142,8 @@ aoenet_rcv(struct sk_buff *skb, struct net_device *ifp, struct packet_type *pt,
142 aoecmd_cfg_rsp(skb); 142 aoecmd_cfg_rsp(skb);
143 break; 143 break;
144 default: 144 default:
145 if (h->cmd >= AOECMD_VEND_MIN)
146 break; /* don't complain about vendor commands */
145 printk(KERN_INFO "aoe: unknown cmd %d\n", h->cmd); 147 printk(KERN_INFO "aoe: unknown cmd %d\n", h->cmd);
146 } 148 }
147exit: 149exit:
diff --git a/drivers/block/ataflop.c b/drivers/block/ataflop.c
index 69e1df7dfa14..4234c11c1e4c 100644
--- a/drivers/block/ataflop.c
+++ b/drivers/block/ataflop.c
@@ -1730,7 +1730,7 @@ static int __init fd_test_drive_present( int drive )
1730 1730
1731 timeout = jiffies + 2*HZ+HZ/2; 1731 timeout = jiffies + 2*HZ+HZ/2;
1732 while (time_before(jiffies, timeout)) 1732 while (time_before(jiffies, timeout))
1733 if (!(mfp.par_dt_reg & 0x20)) 1733 if (!(st_mfp.par_dt_reg & 0x20))
1734 break; 1734 break;
1735 1735
1736 status = FDC_READ( FDCREG_STATUS ); 1736 status = FDC_READ( FDCREG_STATUS );
@@ -1747,7 +1747,7 @@ static int __init fd_test_drive_present( int drive )
1747 /* dummy seek command to make WP bit accessible */ 1747 /* dummy seek command to make WP bit accessible */
1748 FDC_WRITE( FDCREG_DATA, 0 ); 1748 FDC_WRITE( FDCREG_DATA, 0 );
1749 FDC_WRITE( FDCREG_CMD, FDCCMD_SEEK ); 1749 FDC_WRITE( FDCREG_CMD, FDCCMD_SEEK );
1750 while( mfp.par_dt_reg & 0x20 ) 1750 while( st_mfp.par_dt_reg & 0x20 )
1751 ; 1751 ;
1752 status = FDC_READ( FDCREG_STATUS ); 1752 status = FDC_READ( FDCREG_STATUS );
1753 } 1753 }
diff --git a/drivers/block/cciss.c b/drivers/block/cciss.c
index 01e69383d9c0..4f9b6d792017 100644
--- a/drivers/block/cciss.c
+++ b/drivers/block/cciss.c
@@ -3390,6 +3390,203 @@ static void free_hba(int i)
3390 kfree(p); 3390 kfree(p);
3391} 3391}
3392 3392
3393/* Send a message CDB to the firmware. */
3394static __devinit int cciss_message(struct pci_dev *pdev, unsigned char opcode, unsigned char type)
3395{
3396 typedef struct {
3397 CommandListHeader_struct CommandHeader;
3398 RequestBlock_struct Request;
3399 ErrDescriptor_struct ErrorDescriptor;
3400 } Command;
3401 static const size_t cmd_sz = sizeof(Command) + sizeof(ErrorInfo_struct);
3402 Command *cmd;
3403 dma_addr_t paddr64;
3404 uint32_t paddr32, tag;
3405 void __iomem *vaddr;
3406 int i, err;
3407
3408 vaddr = ioremap_nocache(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
3409 if (vaddr == NULL)
3410 return -ENOMEM;
3411
3412 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
3413 CCISS commands, so they must be allocated from the lower 4GiB of
3414 memory. */
3415 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
3416 if (err) {
3417 iounmap(vaddr);
3418 return -ENOMEM;
3419 }
3420
3421 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
3422 if (cmd == NULL) {
3423 iounmap(vaddr);
3424 return -ENOMEM;
3425 }
3426
3427 /* This must fit, because of the 32-bit consistent DMA mask. Also,
3428 although there's no guarantee, we assume that the address is at
3429 least 4-byte aligned (most likely, it's page-aligned). */
3430 paddr32 = paddr64;
3431
3432 cmd->CommandHeader.ReplyQueue = 0;
3433 cmd->CommandHeader.SGList = 0;
3434 cmd->CommandHeader.SGTotal = 0;
3435 cmd->CommandHeader.Tag.lower = paddr32;
3436 cmd->CommandHeader.Tag.upper = 0;
3437 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
3438
3439 cmd->Request.CDBLen = 16;
3440 cmd->Request.Type.Type = TYPE_MSG;
3441 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
3442 cmd->Request.Type.Direction = XFER_NONE;
3443 cmd->Request.Timeout = 0; /* Don't time out */
3444 cmd->Request.CDB[0] = opcode;
3445 cmd->Request.CDB[1] = type;
3446 memset(&cmd->Request.CDB[2], 0, 14); /* the rest of the CDB is reserved */
3447
3448 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(Command);
3449 cmd->ErrorDescriptor.Addr.upper = 0;
3450 cmd->ErrorDescriptor.Len = sizeof(ErrorInfo_struct);
3451
3452 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
3453
3454 for (i = 0; i < 10; i++) {
3455 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
3456 if ((tag & ~3) == paddr32)
3457 break;
3458 schedule_timeout_uninterruptible(HZ);
3459 }
3460
3461 iounmap(vaddr);
3462
3463 /* we leak the DMA buffer here ... no choice since the controller could
3464 still complete the command. */
3465 if (i == 10) {
3466 printk(KERN_ERR "cciss: controller message %02x:%02x timed out\n",
3467 opcode, type);
3468 return -ETIMEDOUT;
3469 }
3470
3471 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
3472
3473 if (tag & 2) {
3474 printk(KERN_ERR "cciss: controller message %02x:%02x failed\n",
3475 opcode, type);
3476 return -EIO;
3477 }
3478
3479 printk(KERN_INFO "cciss: controller message %02x:%02x succeeded\n",
3480 opcode, type);
3481 return 0;
3482}
3483
3484#define cciss_soft_reset_controller(p) cciss_message(p, 1, 0)
3485#define cciss_noop(p) cciss_message(p, 3, 0)
3486
3487static __devinit int cciss_reset_msi(struct pci_dev *pdev)
3488{
3489/* the #defines are stolen from drivers/pci/msi.h. */
3490#define msi_control_reg(base) (base + PCI_MSI_FLAGS)
3491#define PCI_MSIX_FLAGS_ENABLE (1 << 15)
3492
3493 int pos;
3494 u16 control = 0;
3495
3496 pos = pci_find_capability(pdev, PCI_CAP_ID_MSI);
3497 if (pos) {
3498 pci_read_config_word(pdev, msi_control_reg(pos), &control);
3499 if (control & PCI_MSI_FLAGS_ENABLE) {
3500 printk(KERN_INFO "cciss: resetting MSI\n");
3501 pci_write_config_word(pdev, msi_control_reg(pos), control & ~PCI_MSI_FLAGS_ENABLE);
3502 }
3503 }
3504
3505 pos = pci_find_capability(pdev, PCI_CAP_ID_MSIX);
3506 if (pos) {
3507 pci_read_config_word(pdev, msi_control_reg(pos), &control);
3508 if (control & PCI_MSIX_FLAGS_ENABLE) {
3509 printk(KERN_INFO "cciss: resetting MSI-X\n");
3510 pci_write_config_word(pdev, msi_control_reg(pos), control & ~PCI_MSIX_FLAGS_ENABLE);
3511 }
3512 }
3513
3514 return 0;
3515}
3516
3517/* This does a hard reset of the controller using PCI power management
3518 * states. */
3519static __devinit int cciss_hard_reset_controller(struct pci_dev *pdev)
3520{
3521 u16 pmcsr, saved_config_space[32];
3522 int i, pos;
3523
3524 printk(KERN_INFO "cciss: using PCI PM to reset controller\n");
3525
3526 /* This is very nearly the same thing as
3527
3528 pci_save_state(pci_dev);
3529 pci_set_power_state(pci_dev, PCI_D3hot);
3530 pci_set_power_state(pci_dev, PCI_D0);
3531 pci_restore_state(pci_dev);
3532
3533 but we can't use these nice canned kernel routines on
3534 kexec, because they also check the MSI/MSI-X state in PCI
3535 configuration space and do the wrong thing when it is
3536 set/cleared. Also, the pci_save/restore_state functions
3537 violate the ordering requirements for restoring the
3538 configuration space from the CCISS document (see the
3539 comment below). So we roll our own .... */
3540
3541 for (i = 0; i < 32; i++)
3542 pci_read_config_word(pdev, 2*i, &saved_config_space[i]);
3543
3544 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
3545 if (pos == 0) {
3546 printk(KERN_ERR "cciss_reset_controller: PCI PM not supported\n");
3547 return -ENODEV;
3548 }
3549
3550 /* Quoting from the Open CISS Specification: "The Power
3551 * Management Control/Status Register (CSR) controls the power
3552 * state of the device. The normal operating state is D0,
3553 * CSR=00h. The software off state is D3, CSR=03h. To reset
3554 * the controller, place the interface device in D3 then to
3555 * D0, this causes a secondary PCI reset which will reset the
3556 * controller." */
3557
3558 /* enter the D3hot power management state */
3559 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
3560 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3561 pmcsr |= PCI_D3hot;
3562 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
3563
3564 schedule_timeout_uninterruptible(HZ >> 1);
3565
3566 /* enter the D0 power management state */
3567 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3568 pmcsr |= PCI_D0;
3569 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
3570
3571 schedule_timeout_uninterruptible(HZ >> 1);
3572
3573 /* Restore the PCI configuration space. The Open CISS
3574 * Specification says, "Restore the PCI Configuration
3575 * Registers, offsets 00h through 60h. It is important to
3576 * restore the command register, 16-bits at offset 04h,
3577 * last. Do not restore the configuration status register,
3578 * 16-bits at offset 06h." Note that the offset is 2*i. */
3579 for (i = 0; i < 32; i++) {
3580 if (i == 2 || i == 3)
3581 continue;
3582 pci_write_config_word(pdev, 2*i, saved_config_space[i]);
3583 }
3584 wmb();
3585 pci_write_config_word(pdev, 4, saved_config_space[2]);
3586
3587 return 0;
3588}
3589
3393/* 3590/*
3394 * This is it. Find all the controllers and register them. I really hate 3591 * This is it. Find all the controllers and register them. I really hate
3395 * stealing all these major device numbers. 3592 * stealing all these major device numbers.
@@ -3404,6 +3601,26 @@ static int __devinit cciss_init_one(struct pci_dev *pdev,
3404 int dac, return_code; 3601 int dac, return_code;
3405 InquiryData_struct *inq_buff = NULL; 3602 InquiryData_struct *inq_buff = NULL;
3406 3603
3604 if (reset_devices) {
3605 /* Reset the controller with a PCI power-cycle */
3606 if (cciss_hard_reset_controller(pdev) || cciss_reset_msi(pdev))
3607 return -ENODEV;
3608
3609 /* Now try to get the controller to respond to a no-op. Some
3610 devices (notably the HP Smart Array 5i Controller) need
3611 up to 30 seconds to respond. */
3612 for (i=0; i<30; i++) {
3613 if (cciss_noop(pdev) == 0)
3614 break;
3615
3616 schedule_timeout_uninterruptible(HZ);
3617 }
3618 if (i == 30) {
3619 printk(KERN_ERR "cciss: controller seems dead\n");
3620 return -EBUSY;
3621 }
3622 }
3623
3407 i = alloc_cciss_hba(); 3624 i = alloc_cciss_hba();
3408 if (i < 0) 3625 if (i < 0)
3409 return -1; 3626 return -1;
diff --git a/drivers/block/floppy.c b/drivers/block/floppy.c
index cf29cc4e6ab7..83d8ed39433d 100644
--- a/drivers/block/floppy.c
+++ b/drivers/block/floppy.c
@@ -558,6 +558,8 @@ static void process_fd_request(void);
558static void recalibrate_floppy(void); 558static void recalibrate_floppy(void);
559static void floppy_shutdown(unsigned long); 559static void floppy_shutdown(unsigned long);
560 560
561static int floppy_request_regions(int);
562static void floppy_release_regions(int);
561static int floppy_grab_irq_and_dma(void); 563static int floppy_grab_irq_and_dma(void);
562static void floppy_release_irq_and_dma(void); 564static void floppy_release_irq_and_dma(void);
563 565
@@ -4274,8 +4276,7 @@ static int __init floppy_init(void)
4274 FDCS->rawcmd = 2; 4276 FDCS->rawcmd = 2;
4275 if (user_reset_fdc(-1, FD_RESET_ALWAYS, 0)) { 4277 if (user_reset_fdc(-1, FD_RESET_ALWAYS, 0)) {
4276 /* free ioports reserved by floppy_grab_irq_and_dma() */ 4278 /* free ioports reserved by floppy_grab_irq_and_dma() */
4277 release_region(FDCS->address + 2, 4); 4279 floppy_release_regions(fdc);
4278 release_region(FDCS->address + 7, 1);
4279 FDCS->address = -1; 4280 FDCS->address = -1;
4280 FDCS->version = FDC_NONE; 4281 FDCS->version = FDC_NONE;
4281 continue; 4282 continue;
@@ -4284,8 +4285,7 @@ static int __init floppy_init(void)
4284 FDCS->version = get_fdc_version(); 4285 FDCS->version = get_fdc_version();
4285 if (FDCS->version == FDC_NONE) { 4286 if (FDCS->version == FDC_NONE) {
4286 /* free ioports reserved by floppy_grab_irq_and_dma() */ 4287 /* free ioports reserved by floppy_grab_irq_and_dma() */
4287 release_region(FDCS->address + 2, 4); 4288 floppy_release_regions(fdc);
4288 release_region(FDCS->address + 7, 1);
4289 FDCS->address = -1; 4289 FDCS->address = -1;
4290 continue; 4290 continue;
4291 } 4291 }
@@ -4358,6 +4358,47 @@ out_put_disk:
4358 4358
4359static DEFINE_SPINLOCK(floppy_usage_lock); 4359static DEFINE_SPINLOCK(floppy_usage_lock);
4360 4360
4361static const struct io_region {
4362 int offset;
4363 int size;
4364} io_regions[] = {
4365 { 2, 1 },
4366 /* address + 3 is sometimes reserved by pnp bios for motherboard */
4367 { 4, 2 },
4368 /* address + 6 is reserved, and may be taken by IDE.
4369 * Unfortunately, Adaptec doesn't know this :-(, */
4370 { 7, 1 },
4371};
4372
4373static void floppy_release_allocated_regions(int fdc, const struct io_region *p)
4374{
4375 while (p != io_regions) {
4376 p--;
4377 release_region(FDCS->address + p->offset, p->size);
4378 }
4379}
4380
4381#define ARRAY_END(X) (&((X)[ARRAY_SIZE(X)]))
4382
4383static int floppy_request_regions(int fdc)
4384{
4385 const struct io_region *p;
4386
4387 for (p = io_regions; p < ARRAY_END(io_regions); p++) {
4388 if (!request_region(FDCS->address + p->offset, p->size, "floppy")) {
4389 DPRINT("Floppy io-port 0x%04lx in use\n", FDCS->address + p->offset);
4390 floppy_release_allocated_regions(fdc, p);
4391 return -EBUSY;
4392 }
4393 }
4394 return 0;
4395}
4396
4397static void floppy_release_regions(int fdc)
4398{
4399 floppy_release_allocated_regions(fdc, ARRAY_END(io_regions));
4400}
4401
4361static int floppy_grab_irq_and_dma(void) 4402static int floppy_grab_irq_and_dma(void)
4362{ 4403{
4363 unsigned long flags; 4404 unsigned long flags;
@@ -4399,18 +4440,8 @@ static int floppy_grab_irq_and_dma(void)
4399 4440
4400 for (fdc = 0; fdc < N_FDC; fdc++) { 4441 for (fdc = 0; fdc < N_FDC; fdc++) {
4401 if (FDCS->address != -1) { 4442 if (FDCS->address != -1) {
4402 if (!request_region(FDCS->address + 2, 4, "floppy")) { 4443 if (floppy_request_regions(fdc))
4403 DPRINT("Floppy io-port 0x%04lx in use\n", 4444 goto cleanup;
4404 FDCS->address + 2);
4405 goto cleanup1;
4406 }
4407 if (!request_region(FDCS->address + 7, 1, "floppy DIR")) {
4408 DPRINT("Floppy io-port 0x%04lx in use\n",
4409 FDCS->address + 7);
4410 goto cleanup2;
4411 }
4412 /* address + 6 is reserved, and may be taken by IDE.
4413 * Unfortunately, Adaptec doesn't know this :-(, */
4414 } 4445 }
4415 } 4446 }
4416 for (fdc = 0; fdc < N_FDC; fdc++) { 4447 for (fdc = 0; fdc < N_FDC; fdc++) {
@@ -4432,15 +4463,11 @@ static int floppy_grab_irq_and_dma(void)
4432 fdc = 0; 4463 fdc = 0;
4433 irqdma_allocated = 1; 4464 irqdma_allocated = 1;
4434 return 0; 4465 return 0;
4435cleanup2: 4466cleanup:
4436 release_region(FDCS->address + 2, 4);
4437cleanup1:
4438 fd_free_irq(); 4467 fd_free_irq();
4439 fd_free_dma(); 4468 fd_free_dma();
4440 while (--fdc >= 0) { 4469 while (--fdc >= 0)
4441 release_region(FDCS->address + 2, 4); 4470 floppy_release_regions(fdc);
4442 release_region(FDCS->address + 7, 1);
4443 }
4444 spin_lock_irqsave(&floppy_usage_lock, flags); 4471 spin_lock_irqsave(&floppy_usage_lock, flags);
4445 usage_count--; 4472 usage_count--;
4446 spin_unlock_irqrestore(&floppy_usage_lock, flags); 4473 spin_unlock_irqrestore(&floppy_usage_lock, flags);
@@ -4501,10 +4528,8 @@ static void floppy_release_irq_and_dma(void)
4501#endif 4528#endif
4502 old_fdc = fdc; 4529 old_fdc = fdc;
4503 for (fdc = 0; fdc < N_FDC; fdc++) 4530 for (fdc = 0; fdc < N_FDC; fdc++)
4504 if (FDCS->address != -1) { 4531 if (FDCS->address != -1)
4505 release_region(FDCS->address + 2, 4); 4532 floppy_release_regions(fdc);
4506 release_region(FDCS->address + 7, 1);
4507 }
4508 fdc = old_fdc; 4533 fdc = old_fdc;
4509} 4534}
4510 4535
diff --git a/drivers/block/loop.c b/drivers/block/loop.c
index edbaac6c0573..bf0345577672 100644
--- a/drivers/block/loop.c
+++ b/drivers/block/loop.c
@@ -392,8 +392,7 @@ lo_splice_actor(struct pipe_inode_info *pipe, struct pipe_buffer *buf,
392 struct loop_device *lo = p->lo; 392 struct loop_device *lo = p->lo;
393 struct page *page = buf->page; 393 struct page *page = buf->page;
394 sector_t IV; 394 sector_t IV;
395 size_t size; 395 int size, ret;
396 int ret;
397 396
398 ret = buf->ops->confirm(pipe, buf); 397 ret = buf->ops->confirm(pipe, buf);
399 if (unlikely(ret)) 398 if (unlikely(ret))
diff --git a/drivers/block/nbd.c b/drivers/block/nbd.c
index 34f80fa6fed1..8299e2d3b611 100644
--- a/drivers/block/nbd.c
+++ b/drivers/block/nbd.c
@@ -549,6 +549,15 @@ static void do_nbd_request(struct request_queue * q)
549 549
550 BUG_ON(lo->magic != LO_MAGIC); 550 BUG_ON(lo->magic != LO_MAGIC);
551 551
552 if (unlikely(!lo->sock)) {
553 printk(KERN_ERR "%s: Attempted send on closed socket\n",
554 lo->disk->disk_name);
555 req->errors++;
556 nbd_end_request(req);
557 spin_lock_irq(q->queue_lock);
558 continue;
559 }
560
552 spin_lock_irq(&lo->queue_lock); 561 spin_lock_irq(&lo->queue_lock);
553 list_add_tail(&req->queuelist, &lo->waiting_queue); 562 list_add_tail(&req->queuelist, &lo->waiting_queue);
554 spin_unlock_irq(&lo->queue_lock); 563 spin_unlock_irq(&lo->queue_lock);
diff --git a/drivers/block/paride/pg.c b/drivers/block/paride/pg.c
index 9dfa27163001..c397b3ddba9b 100644
--- a/drivers/block/paride/pg.c
+++ b/drivers/block/paride/pg.c
@@ -422,7 +422,7 @@ static void xs(char *buf, char *targ, int len)
422 422
423 for (k = 0; k < len; k++) { 423 for (k = 0; k < len; k++) {
424 char c = *buf++; 424 char c = *buf++;
425 if (c != ' ' || c != l) 425 if (c != ' ' && c != l)
426 l = *targ++ = c; 426 l = *targ++ = c;
427 } 427 }
428 if (l == ' ') 428 if (l == ' ')
diff --git a/drivers/block/ps3vram.c b/drivers/block/ps3vram.c
new file mode 100644
index 000000000000..393ed6760d78
--- /dev/null
+++ b/drivers/block/ps3vram.c
@@ -0,0 +1,865 @@
1/*
2 * ps3vram - Use extra PS3 video ram as MTD block device.
3 *
4 * Copyright 2009 Sony Corporation
5 *
6 * Based on the MTD ps3vram driver, which is
7 * Copyright (c) 2007-2008 Jim Paris <jim@jtan.com>
8 * Added support RSX DMA Vivien Chappelier <vivien.chappelier@free.fr>
9 */
10
11#include <linux/blkdev.h>
12#include <linux/delay.h>
13#include <linux/proc_fs.h>
14#include <linux/seq_file.h>
15
16#include <asm/firmware.h>
17#include <asm/lv1call.h>
18#include <asm/ps3.h>
19
20
21#define DEVICE_NAME "ps3vram"
22
23
24#define XDR_BUF_SIZE (2 * 1024 * 1024) /* XDR buffer (must be 1MiB aligned) */
25#define XDR_IOIF 0x0c000000
26
27#define FIFO_BASE XDR_IOIF
28#define FIFO_SIZE (64 * 1024)
29
30#define DMA_PAGE_SIZE (4 * 1024)
31
32#define CACHE_PAGE_SIZE (256 * 1024)
33#define CACHE_PAGE_COUNT ((XDR_BUF_SIZE - FIFO_SIZE) / CACHE_PAGE_SIZE)
34
35#define CACHE_OFFSET CACHE_PAGE_SIZE
36#define FIFO_OFFSET 0
37
38#define CTRL_PUT 0x10
39#define CTRL_GET 0x11
40#define CTRL_TOP 0x15
41
42#define UPLOAD_SUBCH 1
43#define DOWNLOAD_SUBCH 2
44
45#define NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN 0x0000030c
46#define NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY 0x00000104
47
48#define L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT 0x601
49
50#define CACHE_PAGE_PRESENT 1
51#define CACHE_PAGE_DIRTY 2
52
53struct ps3vram_tag {
54 unsigned int address;
55 unsigned int flags;
56};
57
58struct ps3vram_cache {
59 unsigned int page_count;
60 unsigned int page_size;
61 struct ps3vram_tag *tags;
62 unsigned int hit;
63 unsigned int miss;
64};
65
66struct ps3vram_priv {
67 struct request_queue *queue;
68 struct gendisk *gendisk;
69
70 u64 size;
71
72 u64 memory_handle;
73 u64 context_handle;
74 u32 *ctrl;
75 u32 *reports;
76 u8 __iomem *ddr_base;
77 u8 *xdr_buf;
78
79 u32 *fifo_base;
80 u32 *fifo_ptr;
81
82 struct ps3vram_cache cache;
83
84 /* Used to serialize cache/DMA operations */
85 struct mutex lock;
86};
87
88
89static int ps3vram_major;
90
91
92static struct block_device_operations ps3vram_fops = {
93 .owner = THIS_MODULE,
94};
95
96
97#define DMA_NOTIFIER_HANDLE_BASE 0x66604200 /* first DMA notifier handle */
98#define DMA_NOTIFIER_OFFSET_BASE 0x1000 /* first DMA notifier offset */
99#define DMA_NOTIFIER_SIZE 0x40
100#define NOTIFIER 7 /* notifier used for completion report */
101
102static char *size = "256M";
103module_param(size, charp, 0);
104MODULE_PARM_DESC(size, "memory size");
105
106static u32 *ps3vram_get_notifier(u32 *reports, int notifier)
107{
108 return (void *)reports + DMA_NOTIFIER_OFFSET_BASE +
109 DMA_NOTIFIER_SIZE * notifier;
110}
111
112static void ps3vram_notifier_reset(struct ps3_system_bus_device *dev)
113{
114 struct ps3vram_priv *priv = dev->core.driver_data;
115 u32 *notify = ps3vram_get_notifier(priv->reports, NOTIFIER);
116 int i;
117
118 for (i = 0; i < 4; i++)
119 notify[i] = 0xffffffff;
120}
121
122static int ps3vram_notifier_wait(struct ps3_system_bus_device *dev,
123 unsigned int timeout_ms)
124{
125 struct ps3vram_priv *priv = dev->core.driver_data;
126 u32 *notify = ps3vram_get_notifier(priv->reports, NOTIFIER);
127 unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
128
129 do {
130 if (!notify[3])
131 return 0;
132 msleep(1);
133 } while (time_before(jiffies, timeout));
134
135 return -ETIMEDOUT;
136}
137
138static void ps3vram_init_ring(struct ps3_system_bus_device *dev)
139{
140 struct ps3vram_priv *priv = dev->core.driver_data;
141
142 priv->ctrl[CTRL_PUT] = FIFO_BASE + FIFO_OFFSET;
143 priv->ctrl[CTRL_GET] = FIFO_BASE + FIFO_OFFSET;
144}
145
146static int ps3vram_wait_ring(struct ps3_system_bus_device *dev,
147 unsigned int timeout_ms)
148{
149 struct ps3vram_priv *priv = dev->core.driver_data;
150 unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
151
152 do {
153 if (priv->ctrl[CTRL_PUT] == priv->ctrl[CTRL_GET])
154 return 0;
155 msleep(1);
156 } while (time_before(jiffies, timeout));
157
158 dev_warn(&dev->core, "FIFO timeout (%08x/%08x/%08x)\n",
159 priv->ctrl[CTRL_PUT], priv->ctrl[CTRL_GET],
160 priv->ctrl[CTRL_TOP]);
161
162 return -ETIMEDOUT;
163}
164
165static void ps3vram_out_ring(struct ps3vram_priv *priv, u32 data)
166{
167 *(priv->fifo_ptr)++ = data;
168}
169
170static void ps3vram_begin_ring(struct ps3vram_priv *priv, u32 chan, u32 tag,
171 u32 size)
172{
173 ps3vram_out_ring(priv, (size << 18) | (chan << 13) | tag);
174}
175
176static void ps3vram_rewind_ring(struct ps3_system_bus_device *dev)
177{
178 struct ps3vram_priv *priv = dev->core.driver_data;
179 int status;
180
181 ps3vram_out_ring(priv, 0x20000000 | (FIFO_BASE + FIFO_OFFSET));
182
183 priv->ctrl[CTRL_PUT] = FIFO_BASE + FIFO_OFFSET;
184
185 /* asking the HV for a blit will kick the FIFO */
186 status = lv1_gpu_context_attribute(priv->context_handle,
187 L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT, 0,
188 0, 0, 0);
189 if (status)
190 dev_err(&dev->core,
191 "%s: lv1_gpu_context_attribute failed %d\n", __func__,
192 status);
193
194 priv->fifo_ptr = priv->fifo_base;
195}
196
197static void ps3vram_fire_ring(struct ps3_system_bus_device *dev)
198{
199 struct ps3vram_priv *priv = dev->core.driver_data;
200 int status;
201
202 mutex_lock(&ps3_gpu_mutex);
203
204 priv->ctrl[CTRL_PUT] = FIFO_BASE + FIFO_OFFSET +
205 (priv->fifo_ptr - priv->fifo_base) * sizeof(u32);
206
207 /* asking the HV for a blit will kick the FIFO */
208 status = lv1_gpu_context_attribute(priv->context_handle,
209 L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT, 0,
210 0, 0, 0);
211 if (status)
212 dev_err(&dev->core,
213 "%s: lv1_gpu_context_attribute failed %d\n", __func__,
214 status);
215
216 if ((priv->fifo_ptr - priv->fifo_base) * sizeof(u32) >
217 FIFO_SIZE - 1024) {
218 dev_dbg(&dev->core, "FIFO full, rewinding\n");
219 ps3vram_wait_ring(dev, 200);
220 ps3vram_rewind_ring(dev);
221 }
222
223 mutex_unlock(&ps3_gpu_mutex);
224}
225
226static void ps3vram_bind(struct ps3_system_bus_device *dev)
227{
228 struct ps3vram_priv *priv = dev->core.driver_data;
229
230 ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0, 1);
231 ps3vram_out_ring(priv, 0x31337303);
232 ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0x180, 3);
233 ps3vram_out_ring(priv, DMA_NOTIFIER_HANDLE_BASE + NOTIFIER);
234 ps3vram_out_ring(priv, 0xfeed0001); /* DMA system RAM instance */
235 ps3vram_out_ring(priv, 0xfeed0000); /* DMA video RAM instance */
236
237 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0, 1);
238 ps3vram_out_ring(priv, 0x3137c0de);
239 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0x180, 3);
240 ps3vram_out_ring(priv, DMA_NOTIFIER_HANDLE_BASE + NOTIFIER);
241 ps3vram_out_ring(priv, 0xfeed0000); /* DMA video RAM instance */
242 ps3vram_out_ring(priv, 0xfeed0001); /* DMA system RAM instance */
243
244 ps3vram_fire_ring(dev);
245}
246
247static int ps3vram_upload(struct ps3_system_bus_device *dev,
248 unsigned int src_offset, unsigned int dst_offset,
249 int len, int count)
250{
251 struct ps3vram_priv *priv = dev->core.driver_data;
252
253 ps3vram_begin_ring(priv, UPLOAD_SUBCH,
254 NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8);
255 ps3vram_out_ring(priv, XDR_IOIF + src_offset);
256 ps3vram_out_ring(priv, dst_offset);
257 ps3vram_out_ring(priv, len);
258 ps3vram_out_ring(priv, len);
259 ps3vram_out_ring(priv, len);
260 ps3vram_out_ring(priv, count);
261 ps3vram_out_ring(priv, (1 << 8) | 1);
262 ps3vram_out_ring(priv, 0);
263
264 ps3vram_notifier_reset(dev);
265 ps3vram_begin_ring(priv, UPLOAD_SUBCH,
266 NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY, 1);
267 ps3vram_out_ring(priv, 0);
268 ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0x100, 1);
269 ps3vram_out_ring(priv, 0);
270 ps3vram_fire_ring(dev);
271 if (ps3vram_notifier_wait(dev, 200) < 0) {
272 dev_warn(&dev->core, "%s: Notifier timeout\n", __func__);
273 return -1;
274 }
275
276 return 0;
277}
278
279static int ps3vram_download(struct ps3_system_bus_device *dev,
280 unsigned int src_offset, unsigned int dst_offset,
281 int len, int count)
282{
283 struct ps3vram_priv *priv = dev->core.driver_data;
284
285 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH,
286 NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8);
287 ps3vram_out_ring(priv, src_offset);
288 ps3vram_out_ring(priv, XDR_IOIF + dst_offset);
289 ps3vram_out_ring(priv, len);
290 ps3vram_out_ring(priv, len);
291 ps3vram_out_ring(priv, len);
292 ps3vram_out_ring(priv, count);
293 ps3vram_out_ring(priv, (1 << 8) | 1);
294 ps3vram_out_ring(priv, 0);
295
296 ps3vram_notifier_reset(dev);
297 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH,
298 NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY, 1);
299 ps3vram_out_ring(priv, 0);
300 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0x100, 1);
301 ps3vram_out_ring(priv, 0);
302 ps3vram_fire_ring(dev);
303 if (ps3vram_notifier_wait(dev, 200) < 0) {
304 dev_warn(&dev->core, "%s: Notifier timeout\n", __func__);
305 return -1;
306 }
307
308 return 0;
309}
310
311static void ps3vram_cache_evict(struct ps3_system_bus_device *dev, int entry)
312{
313 struct ps3vram_priv *priv = dev->core.driver_data;
314 struct ps3vram_cache *cache = &priv->cache;
315
316 if (!(cache->tags[entry].flags & CACHE_PAGE_DIRTY))
317 return;
318
319 dev_dbg(&dev->core, "Flushing %d: 0x%08x\n", entry,
320 cache->tags[entry].address);
321 if (ps3vram_upload(dev, CACHE_OFFSET + entry * cache->page_size,
322 cache->tags[entry].address, DMA_PAGE_SIZE,
323 cache->page_size / DMA_PAGE_SIZE) < 0) {
324 dev_err(&dev->core,
325 "Failed to upload from 0x%x to " "0x%x size 0x%x\n",
326 entry * cache->page_size, cache->tags[entry].address,
327 cache->page_size);
328 }
329 cache->tags[entry].flags &= ~CACHE_PAGE_DIRTY;
330}
331
332static void ps3vram_cache_load(struct ps3_system_bus_device *dev, int entry,
333 unsigned int address)
334{
335 struct ps3vram_priv *priv = dev->core.driver_data;
336 struct ps3vram_cache *cache = &priv->cache;
337
338 dev_dbg(&dev->core, "Fetching %d: 0x%08x\n", entry, address);
339 if (ps3vram_download(dev, address,
340 CACHE_OFFSET + entry * cache->page_size,
341 DMA_PAGE_SIZE,
342 cache->page_size / DMA_PAGE_SIZE) < 0) {
343 dev_err(&dev->core,
344 "Failed to download from 0x%x to 0x%x size 0x%x\n",
345 address, entry * cache->page_size, cache->page_size);
346 }
347
348 cache->tags[entry].address = address;
349 cache->tags[entry].flags |= CACHE_PAGE_PRESENT;
350}
351
352
353static void ps3vram_cache_flush(struct ps3_system_bus_device *dev)
354{
355 struct ps3vram_priv *priv = dev->core.driver_data;
356 struct ps3vram_cache *cache = &priv->cache;
357 int i;
358
359 dev_dbg(&dev->core, "FLUSH\n");
360 for (i = 0; i < cache->page_count; i++) {
361 ps3vram_cache_evict(dev, i);
362 cache->tags[i].flags = 0;
363 }
364}
365
366static unsigned int ps3vram_cache_match(struct ps3_system_bus_device *dev,
367 loff_t address)
368{
369 struct ps3vram_priv *priv = dev->core.driver_data;
370 struct ps3vram_cache *cache = &priv->cache;
371 unsigned int base;
372 unsigned int offset;
373 int i;
374 static int counter;
375
376 offset = (unsigned int) (address & (cache->page_size - 1));
377 base = (unsigned int) (address - offset);
378
379 /* fully associative check */
380 for (i = 0; i < cache->page_count; i++) {
381 if ((cache->tags[i].flags & CACHE_PAGE_PRESENT) &&
382 cache->tags[i].address == base) {
383 cache->hit++;
384 dev_dbg(&dev->core, "Found entry %d: 0x%08x\n", i,
385 cache->tags[i].address);
386 return i;
387 }
388 }
389
390 /* choose a random entry */
391 i = (jiffies + (counter++)) % cache->page_count;
392 dev_dbg(&dev->core, "Using entry %d\n", i);
393
394 ps3vram_cache_evict(dev, i);
395 ps3vram_cache_load(dev, i, base);
396
397 cache->miss++;
398 return i;
399}
400
401static int ps3vram_cache_init(struct ps3_system_bus_device *dev)
402{
403 struct ps3vram_priv *priv = dev->core.driver_data;
404
405 priv->cache.page_count = CACHE_PAGE_COUNT;
406 priv->cache.page_size = CACHE_PAGE_SIZE;
407 priv->cache.tags = kzalloc(sizeof(struct ps3vram_tag) *
408 CACHE_PAGE_COUNT, GFP_KERNEL);
409 if (priv->cache.tags == NULL) {
410 dev_err(&dev->core, "Could not allocate cache tags\n");
411 return -ENOMEM;
412 }
413
414 dev_info(&dev->core, "Created ram cache: %d entries, %d KiB each\n",
415 CACHE_PAGE_COUNT, CACHE_PAGE_SIZE / 1024);
416
417 return 0;
418}
419
420static void ps3vram_cache_cleanup(struct ps3_system_bus_device *dev)
421{
422 struct ps3vram_priv *priv = dev->core.driver_data;
423
424 ps3vram_cache_flush(dev);
425 kfree(priv->cache.tags);
426}
427
428static int ps3vram_read(struct ps3_system_bus_device *dev, loff_t from,
429 size_t len, size_t *retlen, u_char *buf)
430{
431 struct ps3vram_priv *priv = dev->core.driver_data;
432 unsigned int cached, count;
433
434 dev_dbg(&dev->core, "%s: from=0x%08x len=0x%zx\n", __func__,
435 (unsigned int)from, len);
436
437 if (from >= priv->size)
438 return -EIO;
439
440 if (len > priv->size - from)
441 len = priv->size - from;
442
443 /* Copy from vram to buf */
444 count = len;
445 while (count) {
446 unsigned int offset, avail;
447 unsigned int entry;
448
449 offset = (unsigned int) (from & (priv->cache.page_size - 1));
450 avail = priv->cache.page_size - offset;
451
452 mutex_lock(&priv->lock);
453
454 entry = ps3vram_cache_match(dev, from);
455 cached = CACHE_OFFSET + entry * priv->cache.page_size + offset;
456
457 dev_dbg(&dev->core, "%s: from=%08x cached=%08x offset=%08x "
458 "avail=%08x count=%08x\n", __func__,
459 (unsigned int)from, cached, offset, avail, count);
460
461 if (avail > count)
462 avail = count;
463 memcpy(buf, priv->xdr_buf + cached, avail);
464
465 mutex_unlock(&priv->lock);
466
467 buf += avail;
468 count -= avail;
469 from += avail;
470 }
471
472 *retlen = len;
473 return 0;
474}
475
476static int ps3vram_write(struct ps3_system_bus_device *dev, loff_t to,
477 size_t len, size_t *retlen, const u_char *buf)
478{
479 struct ps3vram_priv *priv = dev->core.driver_data;
480 unsigned int cached, count;
481
482 if (to >= priv->size)
483 return -EIO;
484
485 if (len > priv->size - to)
486 len = priv->size - to;
487
488 /* Copy from buf to vram */
489 count = len;
490 while (count) {
491 unsigned int offset, avail;
492 unsigned int entry;
493
494 offset = (unsigned int) (to & (priv->cache.page_size - 1));
495 avail = priv->cache.page_size - offset;
496
497 mutex_lock(&priv->lock);
498
499 entry = ps3vram_cache_match(dev, to);
500 cached = CACHE_OFFSET + entry * priv->cache.page_size + offset;
501
502 dev_dbg(&dev->core, "%s: to=%08x cached=%08x offset=%08x "
503 "avail=%08x count=%08x\n", __func__, (unsigned int)to,
504 cached, offset, avail, count);
505
506 if (avail > count)
507 avail = count;
508 memcpy(priv->xdr_buf + cached, buf, avail);
509
510 priv->cache.tags[entry].flags |= CACHE_PAGE_DIRTY;
511
512 mutex_unlock(&priv->lock);
513
514 buf += avail;
515 count -= avail;
516 to += avail;
517 }
518
519 *retlen = len;
520 return 0;
521}
522
523static int ps3vram_proc_show(struct seq_file *m, void *v)
524{
525 struct ps3vram_priv *priv = m->private;
526
527 seq_printf(m, "hit:%u\nmiss:%u\n", priv->cache.hit, priv->cache.miss);
528 return 0;
529}
530
531static int ps3vram_proc_open(struct inode *inode, struct file *file)
532{
533 return single_open(file, ps3vram_proc_show, PDE(inode)->data);
534}
535
536static const struct file_operations ps3vram_proc_fops = {
537 .owner = THIS_MODULE,
538 .open = ps3vram_proc_open,
539 .read = seq_read,
540 .llseek = seq_lseek,
541 .release = single_release,
542};
543
544static void __devinit ps3vram_proc_init(struct ps3_system_bus_device *dev)
545{
546 struct ps3vram_priv *priv = dev->core.driver_data;
547 struct proc_dir_entry *pde;
548
549 pde = proc_create(DEVICE_NAME, 0444, NULL, &ps3vram_proc_fops);
550 if (!pde) {
551 dev_warn(&dev->core, "failed to create /proc entry\n");
552 return;
553 }
554
555 pde->owner = THIS_MODULE;
556 pde->data = priv;
557}
558
559static int ps3vram_make_request(struct request_queue *q, struct bio *bio)
560{
561 struct ps3_system_bus_device *dev = q->queuedata;
562 int write = bio_data_dir(bio) == WRITE;
563 const char *op = write ? "write" : "read";
564 loff_t offset = bio->bi_sector << 9;
565 int error = 0;
566 struct bio_vec *bvec;
567 unsigned int i;
568
569 dev_dbg(&dev->core, "%s\n", __func__);
570
571 bio_for_each_segment(bvec, bio, i) {
572 /* PS3 is ppc64, so we don't handle highmem */
573 char *ptr = page_address(bvec->bv_page) + bvec->bv_offset;
574 size_t len = bvec->bv_len, retlen;
575
576 dev_dbg(&dev->core, " %s %zu bytes at offset %llu\n", op,
577 len, offset);
578 if (write)
579 error = ps3vram_write(dev, offset, len, &retlen, ptr);
580 else
581 error = ps3vram_read(dev, offset, len, &retlen, ptr);
582
583 if (error) {
584 dev_err(&dev->core, "%s failed\n", op);
585 goto out;
586 }
587
588 if (retlen != len) {
589 dev_err(&dev->core, "Short %s\n", op);
590 goto out;
591 }
592
593 offset += len;
594 }
595
596 dev_dbg(&dev->core, "%s completed\n", op);
597
598out:
599 bio_endio(bio, error);
600 return 0;
601}
602
603static int __devinit ps3vram_probe(struct ps3_system_bus_device *dev)
604{
605 struct ps3vram_priv *priv;
606 int error, status;
607 struct request_queue *queue;
608 struct gendisk *gendisk;
609 u64 ddr_lpar, ctrl_lpar, info_lpar, reports_lpar, ddr_size,
610 reports_size;
611 char *rest;
612
613 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
614 if (!priv) {
615 error = -ENOMEM;
616 goto fail;
617 }
618
619 mutex_init(&priv->lock);
620 dev->core.driver_data = priv;
621
622 priv = dev->core.driver_data;
623
624 /* Allocate XDR buffer (1MiB aligned) */
625 priv->xdr_buf = (void *)__get_free_pages(GFP_KERNEL,
626 get_order(XDR_BUF_SIZE));
627 if (priv->xdr_buf == NULL) {
628 dev_err(&dev->core, "Could not allocate XDR buffer\n");
629 error = -ENOMEM;
630 goto fail_free_priv;
631 }
632
633 /* Put FIFO at begginning of XDR buffer */
634 priv->fifo_base = (u32 *) (priv->xdr_buf + FIFO_OFFSET);
635 priv->fifo_ptr = priv->fifo_base;
636
637 /* XXX: Need to open GPU, in case ps3fb or snd_ps3 aren't loaded */
638 if (ps3_open_hv_device(dev)) {
639 dev_err(&dev->core, "ps3_open_hv_device failed\n");
640 error = -EAGAIN;
641 goto out_close_gpu;
642 }
643
644 /* Request memory */
645 status = -1;
646 ddr_size = ALIGN(memparse(size, &rest), 1024*1024);
647 if (!ddr_size) {
648 dev_err(&dev->core, "Specified size is too small\n");
649 error = -EINVAL;
650 goto out_close_gpu;
651 }
652
653 while (ddr_size > 0) {
654 status = lv1_gpu_memory_allocate(ddr_size, 0, 0, 0, 0,
655 &priv->memory_handle,
656 &ddr_lpar);
657 if (!status)
658 break;
659 ddr_size -= 1024*1024;
660 }
661 if (status) {
662 dev_err(&dev->core, "lv1_gpu_memory_allocate failed %d\n",
663 status);
664 error = -ENOMEM;
665 goto out_free_xdr_buf;
666 }
667
668 /* Request context */
669 status = lv1_gpu_context_allocate(priv->memory_handle, 0,
670 &priv->context_handle, &ctrl_lpar,
671 &info_lpar, &reports_lpar,
672 &reports_size);
673 if (status) {
674 dev_err(&dev->core, "lv1_gpu_context_allocate failed %d\n",
675 status);
676 error = -ENOMEM;
677 goto out_free_memory;
678 }
679
680 /* Map XDR buffer to RSX */
681 status = lv1_gpu_context_iomap(priv->context_handle, XDR_IOIF,
682 ps3_mm_phys_to_lpar(__pa(priv->xdr_buf)),
683 XDR_BUF_SIZE, 0);
684 if (status) {
685 dev_err(&dev->core, "lv1_gpu_context_iomap failed %d\n",
686 status);
687 error = -ENOMEM;
688 goto out_free_context;
689 }
690
691 priv->ddr_base = ioremap_flags(ddr_lpar, ddr_size, _PAGE_NO_CACHE);
692
693 if (!priv->ddr_base) {
694 dev_err(&dev->core, "ioremap DDR failed\n");
695 error = -ENOMEM;
696 goto out_free_context;
697 }
698
699 priv->ctrl = ioremap(ctrl_lpar, 64 * 1024);
700 if (!priv->ctrl) {
701 dev_err(&dev->core, "ioremap CTRL failed\n");
702 error = -ENOMEM;
703 goto out_unmap_vram;
704 }
705
706 priv->reports = ioremap(reports_lpar, reports_size);
707 if (!priv->reports) {
708 dev_err(&dev->core, "ioremap REPORTS failed\n");
709 error = -ENOMEM;
710 goto out_unmap_ctrl;
711 }
712
713 mutex_lock(&ps3_gpu_mutex);
714 ps3vram_init_ring(dev);
715 mutex_unlock(&ps3_gpu_mutex);
716
717 priv->size = ddr_size;
718
719 ps3vram_bind(dev);
720
721 mutex_lock(&ps3_gpu_mutex);
722 error = ps3vram_wait_ring(dev, 100);
723 mutex_unlock(&ps3_gpu_mutex);
724 if (error < 0) {
725 dev_err(&dev->core, "Failed to initialize channels\n");
726 error = -ETIMEDOUT;
727 goto out_unmap_reports;
728 }
729
730 ps3vram_cache_init(dev);
731 ps3vram_proc_init(dev);
732
733 queue = blk_alloc_queue(GFP_KERNEL);
734 if (!queue) {
735 dev_err(&dev->core, "blk_alloc_queue failed\n");
736 error = -ENOMEM;
737 goto out_cache_cleanup;
738 }
739
740 priv->queue = queue;
741 queue->queuedata = dev;
742 blk_queue_make_request(queue, ps3vram_make_request);
743 blk_queue_max_phys_segments(queue, MAX_PHYS_SEGMENTS);
744 blk_queue_max_hw_segments(queue, MAX_HW_SEGMENTS);
745 blk_queue_max_segment_size(queue, MAX_SEGMENT_SIZE);
746 blk_queue_max_sectors(queue, SAFE_MAX_SECTORS);
747
748 gendisk = alloc_disk(1);
749 if (!gendisk) {
750 dev_err(&dev->core, "alloc_disk failed\n");
751 error = -ENOMEM;
752 goto fail_cleanup_queue;
753 }
754
755 priv->gendisk = gendisk;
756 gendisk->major = ps3vram_major;
757 gendisk->first_minor = 0;
758 gendisk->fops = &ps3vram_fops;
759 gendisk->queue = queue;
760 gendisk->private_data = dev;
761 gendisk->driverfs_dev = &dev->core;
762 strlcpy(gendisk->disk_name, DEVICE_NAME, sizeof(gendisk->disk_name));
763 set_capacity(gendisk, priv->size >> 9);
764
765 dev_info(&dev->core, "%s: Using %lu MiB of GPU memory\n",
766 gendisk->disk_name, get_capacity(gendisk) >> 11);
767
768 add_disk(gendisk);
769 return 0;
770
771fail_cleanup_queue:
772 blk_cleanup_queue(queue);
773out_cache_cleanup:
774 remove_proc_entry(DEVICE_NAME, NULL);
775 ps3vram_cache_cleanup(dev);
776out_unmap_reports:
777 iounmap(priv->reports);
778out_unmap_ctrl:
779 iounmap(priv->ctrl);
780out_unmap_vram:
781 iounmap(priv->ddr_base);
782out_free_context:
783 lv1_gpu_context_free(priv->context_handle);
784out_free_memory:
785 lv1_gpu_memory_free(priv->memory_handle);
786out_close_gpu:
787 ps3_close_hv_device(dev);
788out_free_xdr_buf:
789 free_pages((unsigned long) priv->xdr_buf, get_order(XDR_BUF_SIZE));
790fail_free_priv:
791 kfree(priv);
792 dev->core.driver_data = NULL;
793fail:
794 return error;
795}
796
797static int ps3vram_remove(struct ps3_system_bus_device *dev)
798{
799 struct ps3vram_priv *priv = dev->core.driver_data;
800
801 del_gendisk(priv->gendisk);
802 put_disk(priv->gendisk);
803 blk_cleanup_queue(priv->queue);
804 remove_proc_entry(DEVICE_NAME, NULL);
805 ps3vram_cache_cleanup(dev);
806 iounmap(priv->reports);
807 iounmap(priv->ctrl);
808 iounmap(priv->ddr_base);
809 lv1_gpu_context_free(priv->context_handle);
810 lv1_gpu_memory_free(priv->memory_handle);
811 ps3_close_hv_device(dev);
812 free_pages((unsigned long) priv->xdr_buf, get_order(XDR_BUF_SIZE));
813 kfree(priv);
814 dev->core.driver_data = NULL;
815 return 0;
816}
817
818static struct ps3_system_bus_driver ps3vram = {
819 .match_id = PS3_MATCH_ID_GPU,
820 .match_sub_id = PS3_MATCH_SUB_ID_GPU_RAMDISK,
821 .core.name = DEVICE_NAME,
822 .core.owner = THIS_MODULE,
823 .probe = ps3vram_probe,
824 .remove = ps3vram_remove,
825 .shutdown = ps3vram_remove,
826};
827
828
829static int __init ps3vram_init(void)
830{
831 int error;
832
833 if (!firmware_has_feature(FW_FEATURE_PS3_LV1))
834 return -ENODEV;
835
836 error = register_blkdev(0, DEVICE_NAME);
837 if (error <= 0) {
838 pr_err("%s: register_blkdev failed %d\n", DEVICE_NAME, error);
839 return error;
840 }
841 ps3vram_major = error;
842
843 pr_info("%s: registered block device major %d\n", DEVICE_NAME,
844 ps3vram_major);
845
846 error = ps3_system_bus_driver_register(&ps3vram);
847 if (error)
848 unregister_blkdev(ps3vram_major, DEVICE_NAME);
849
850 return error;
851}
852
853static void __exit ps3vram_exit(void)
854{
855 ps3_system_bus_driver_unregister(&ps3vram);
856 unregister_blkdev(ps3vram_major, DEVICE_NAME);
857}
858
859module_init(ps3vram_init);
860module_exit(ps3vram_exit);
861
862MODULE_LICENSE("GPL");
863MODULE_DESCRIPTION("PS3 Video RAM Storage Driver");
864MODULE_AUTHOR("Sony Corporation");
865MODULE_ALIAS(PS3_MODULE_ALIAS_GPU_RAMDISK);
diff --git a/drivers/block/xen-blkfront.c b/drivers/block/xen-blkfront.c
index 918ef725de41..8f905089b72b 100644
--- a/drivers/block/xen-blkfront.c
+++ b/drivers/block/xen-blkfront.c
@@ -40,6 +40,7 @@
40#include <linux/hdreg.h> 40#include <linux/hdreg.h>
41#include <linux/cdrom.h> 41#include <linux/cdrom.h>
42#include <linux/module.h> 42#include <linux/module.h>
43#include <linux/scatterlist.h>
43 44
44#include <xen/xenbus.h> 45#include <xen/xenbus.h>
45#include <xen/grant_table.h> 46#include <xen/grant_table.h>
@@ -82,6 +83,7 @@ struct blkfront_info
82 enum blkif_state connected; 83 enum blkif_state connected;
83 int ring_ref; 84 int ring_ref;
84 struct blkif_front_ring ring; 85 struct blkif_front_ring ring;
86 struct scatterlist sg[BLKIF_MAX_SEGMENTS_PER_REQUEST];
85 unsigned int evtchn, irq; 87 unsigned int evtchn, irq;
86 struct request_queue *rq; 88 struct request_queue *rq;
87 struct work_struct work; 89 struct work_struct work;
@@ -204,12 +206,11 @@ static int blkif_queue_request(struct request *req)
204 struct blkfront_info *info = req->rq_disk->private_data; 206 struct blkfront_info *info = req->rq_disk->private_data;
205 unsigned long buffer_mfn; 207 unsigned long buffer_mfn;
206 struct blkif_request *ring_req; 208 struct blkif_request *ring_req;
207 struct req_iterator iter;
208 struct bio_vec *bvec;
209 unsigned long id; 209 unsigned long id;
210 unsigned int fsect, lsect; 210 unsigned int fsect, lsect;
211 int ref; 211 int i, ref;
212 grant_ref_t gref_head; 212 grant_ref_t gref_head;
213 struct scatterlist *sg;
213 214
214 if (unlikely(info->connected != BLKIF_STATE_CONNECTED)) 215 if (unlikely(info->connected != BLKIF_STATE_CONNECTED))
215 return 1; 216 return 1;
@@ -238,12 +239,13 @@ static int blkif_queue_request(struct request *req)
238 if (blk_barrier_rq(req)) 239 if (blk_barrier_rq(req))
239 ring_req->operation = BLKIF_OP_WRITE_BARRIER; 240 ring_req->operation = BLKIF_OP_WRITE_BARRIER;
240 241
241 ring_req->nr_segments = 0; 242 ring_req->nr_segments = blk_rq_map_sg(req->q, req, info->sg);
242 rq_for_each_segment(bvec, req, iter) { 243 BUG_ON(ring_req->nr_segments > BLKIF_MAX_SEGMENTS_PER_REQUEST);
243 BUG_ON(ring_req->nr_segments == BLKIF_MAX_SEGMENTS_PER_REQUEST); 244
244 buffer_mfn = pfn_to_mfn(page_to_pfn(bvec->bv_page)); 245 for_each_sg(info->sg, sg, ring_req->nr_segments, i) {
245 fsect = bvec->bv_offset >> 9; 246 buffer_mfn = pfn_to_mfn(page_to_pfn(sg_page(sg)));
246 lsect = fsect + (bvec->bv_len >> 9) - 1; 247 fsect = sg->offset >> 9;
248 lsect = fsect + (sg->length >> 9) - 1;
247 /* install a grant reference. */ 249 /* install a grant reference. */
248 ref = gnttab_claim_grant_reference(&gref_head); 250 ref = gnttab_claim_grant_reference(&gref_head);
249 BUG_ON(ref == -ENOSPC); 251 BUG_ON(ref == -ENOSPC);
@@ -254,16 +256,12 @@ static int blkif_queue_request(struct request *req)
254 buffer_mfn, 256 buffer_mfn,
255 rq_data_dir(req) ); 257 rq_data_dir(req) );
256 258
257 info->shadow[id].frame[ring_req->nr_segments] = 259 info->shadow[id].frame[i] = mfn_to_pfn(buffer_mfn);
258 mfn_to_pfn(buffer_mfn); 260 ring_req->seg[i] =
259
260 ring_req->seg[ring_req->nr_segments] =
261 (struct blkif_request_segment) { 261 (struct blkif_request_segment) {
262 .gref = ref, 262 .gref = ref,
263 .first_sect = fsect, 263 .first_sect = fsect,
264 .last_sect = lsect }; 264 .last_sect = lsect };
265
266 ring_req->nr_segments++;
267 } 265 }
268 266
269 info->ring.req_prod_pvt++; 267 info->ring.req_prod_pvt++;
@@ -622,6 +620,8 @@ static int setup_blkring(struct xenbus_device *dev,
622 SHARED_RING_INIT(sring); 620 SHARED_RING_INIT(sring);
623 FRONT_RING_INIT(&info->ring, sring, PAGE_SIZE); 621 FRONT_RING_INIT(&info->ring, sring, PAGE_SIZE);
624 622
623 sg_init_table(info->sg, BLKIF_MAX_SEGMENTS_PER_REQUEST);
624
625 err = xenbus_grant_ring(dev, virt_to_mfn(info->ring.sring)); 625 err = xenbus_grant_ring(dev, virt_to_mfn(info->ring.sring));
626 if (err < 0) { 626 if (err < 0) {
627 free_page((unsigned long)sring); 627 free_page((unsigned long)sring);
@@ -977,6 +977,8 @@ static void backend_changed(struct xenbus_device *dev,
977 break; 977 break;
978 978
979 case XenbusStateClosing: 979 case XenbusStateClosing:
980 if (info->gd == NULL)
981 xenbus_dev_fatal(dev, -ENODEV, "gd is NULL");
980 bd = bdget_disk(info->gd, 0); 982 bd = bdget_disk(info->gd, 0);
981 if (bd == NULL) 983 if (bd == NULL)
982 xenbus_dev_fatal(dev, -ENODEV, "bdget failed"); 984 xenbus_dev_fatal(dev, -ENODEV, "bdget failed");
diff --git a/drivers/block/xsysace.c b/drivers/block/xsysace.c
index 381d686fc1a3..119be3442f28 100644
--- a/drivers/block/xsysace.c
+++ b/drivers/block/xsysace.c
@@ -489,6 +489,28 @@ static void ace_fsm_dostate(struct ace_device *ace)
489 ace->fsm_state, ace->id_req_count); 489 ace->fsm_state, ace->id_req_count);
490#endif 490#endif
491 491
492 /* Verify that there is actually a CF in the slot. If not, then
493 * bail out back to the idle state and wake up all the waiters */
494 status = ace_in32(ace, ACE_STATUS);
495 if ((status & ACE_STATUS_CFDETECT) == 0) {
496 ace->fsm_state = ACE_FSM_STATE_IDLE;
497 ace->media_change = 1;
498 set_capacity(ace->gd, 0);
499 dev_info(ace->dev, "No CF in slot\n");
500
501 /* Drop all pending requests */
502 while ((req = elv_next_request(ace->queue)) != NULL)
503 end_request(req, 0);
504
505 /* Drop back to IDLE state and notify waiters */
506 ace->fsm_state = ACE_FSM_STATE_IDLE;
507 ace->id_result = -EIO;
508 while (ace->id_req_count) {
509 complete(&ace->id_completion);
510 ace->id_req_count--;
511 }
512 }
513
492 switch (ace->fsm_state) { 514 switch (ace->fsm_state) {
493 case ACE_FSM_STATE_IDLE: 515 case ACE_FSM_STATE_IDLE:
494 /* See if there is anything to do */ 516 /* See if there is anything to do */