diff options
Diffstat (limited to 'drivers/block')
-rw-r--r-- | drivers/block/aoe/aoe.h | 1 | ||||
-rw-r--r-- | drivers/block/aoe/aoenet.c | 2 | ||||
-rw-r--r-- | drivers/block/ataflop.c | 4 | ||||
-rw-r--r-- | drivers/block/cciss.c | 215 | ||||
-rw-r--r-- | drivers/block/floppy.c | 79 | ||||
-rw-r--r-- | drivers/block/nbd.c | 9 | ||||
-rw-r--r-- | drivers/block/paride/pg.c | 2 |
7 files changed, 282 insertions, 30 deletions
diff --git a/drivers/block/aoe/aoe.h b/drivers/block/aoe/aoe.h index c237527b1aa5..5e41e6dd657b 100644 --- a/drivers/block/aoe/aoe.h +++ b/drivers/block/aoe/aoe.h | |||
@@ -18,6 +18,7 @@ | |||
18 | enum { | 18 | enum { |
19 | AOECMD_ATA, | 19 | AOECMD_ATA, |
20 | AOECMD_CFG, | 20 | AOECMD_CFG, |
21 | AOECMD_VEND_MIN = 0xf0, | ||
21 | 22 | ||
22 | AOEFL_RSP = (1<<3), | 23 | AOEFL_RSP = (1<<3), |
23 | AOEFL_ERR = (1<<2), | 24 | AOEFL_ERR = (1<<2), |
diff --git a/drivers/block/aoe/aoenet.c b/drivers/block/aoe/aoenet.c index 30de5b1c647e..c6099ba9a4b8 100644 --- a/drivers/block/aoe/aoenet.c +++ b/drivers/block/aoe/aoenet.c | |||
@@ -142,6 +142,8 @@ aoenet_rcv(struct sk_buff *skb, struct net_device *ifp, struct packet_type *pt, | |||
142 | aoecmd_cfg_rsp(skb); | 142 | aoecmd_cfg_rsp(skb); |
143 | break; | 143 | break; |
144 | default: | 144 | default: |
145 | if (h->cmd >= AOECMD_VEND_MIN) | ||
146 | break; /* don't complain about vendor commands */ | ||
145 | printk(KERN_INFO "aoe: unknown cmd %d\n", h->cmd); | 147 | printk(KERN_INFO "aoe: unknown cmd %d\n", h->cmd); |
146 | } | 148 | } |
147 | exit: | 149 | exit: |
diff --git a/drivers/block/ataflop.c b/drivers/block/ataflop.c index 69e1df7dfa14..4234c11c1e4c 100644 --- a/drivers/block/ataflop.c +++ b/drivers/block/ataflop.c | |||
@@ -1730,7 +1730,7 @@ static int __init fd_test_drive_present( int drive ) | |||
1730 | 1730 | ||
1731 | timeout = jiffies + 2*HZ+HZ/2; | 1731 | timeout = jiffies + 2*HZ+HZ/2; |
1732 | while (time_before(jiffies, timeout)) | 1732 | while (time_before(jiffies, timeout)) |
1733 | if (!(mfp.par_dt_reg & 0x20)) | 1733 | if (!(st_mfp.par_dt_reg & 0x20)) |
1734 | break; | 1734 | break; |
1735 | 1735 | ||
1736 | status = FDC_READ( FDCREG_STATUS ); | 1736 | status = FDC_READ( FDCREG_STATUS ); |
@@ -1747,7 +1747,7 @@ static int __init fd_test_drive_present( int drive ) | |||
1747 | /* dummy seek command to make WP bit accessible */ | 1747 | /* dummy seek command to make WP bit accessible */ |
1748 | FDC_WRITE( FDCREG_DATA, 0 ); | 1748 | FDC_WRITE( FDCREG_DATA, 0 ); |
1749 | FDC_WRITE( FDCREG_CMD, FDCCMD_SEEK ); | 1749 | FDC_WRITE( FDCREG_CMD, FDCCMD_SEEK ); |
1750 | while( mfp.par_dt_reg & 0x20 ) | 1750 | while( st_mfp.par_dt_reg & 0x20 ) |
1751 | ; | 1751 | ; |
1752 | status = FDC_READ( FDCREG_STATUS ); | 1752 | status = FDC_READ( FDCREG_STATUS ); |
1753 | } | 1753 | } |
diff --git a/drivers/block/cciss.c b/drivers/block/cciss.c index 01e69383d9c0..d2cb67b61176 100644 --- a/drivers/block/cciss.c +++ b/drivers/block/cciss.c | |||
@@ -3390,6 +3390,203 @@ static void free_hba(int i) | |||
3390 | kfree(p); | 3390 | kfree(p); |
3391 | } | 3391 | } |
3392 | 3392 | ||
3393 | /* Send a message CDB to the firmware. */ | ||
3394 | static __devinit int cciss_message(struct pci_dev *pdev, unsigned char opcode, unsigned char type) | ||
3395 | { | ||
3396 | typedef struct { | ||
3397 | CommandListHeader_struct CommandHeader; | ||
3398 | RequestBlock_struct Request; | ||
3399 | ErrDescriptor_struct ErrorDescriptor; | ||
3400 | } Command; | ||
3401 | static const size_t cmd_sz = sizeof(Command) + sizeof(ErrorInfo_struct); | ||
3402 | Command *cmd; | ||
3403 | dma_addr_t paddr64; | ||
3404 | uint32_t paddr32, tag; | ||
3405 | void __iomem *vaddr; | ||
3406 | int i, err; | ||
3407 | |||
3408 | vaddr = ioremap_nocache(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0)); | ||
3409 | if (vaddr == NULL) | ||
3410 | return -ENOMEM; | ||
3411 | |||
3412 | /* The Inbound Post Queue only accepts 32-bit physical addresses for the | ||
3413 | CCISS commands, so they must be allocated from the lower 4GiB of | ||
3414 | memory. */ | ||
3415 | err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK); | ||
3416 | if (err) { | ||
3417 | iounmap(vaddr); | ||
3418 | return -ENOMEM; | ||
3419 | } | ||
3420 | |||
3421 | cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64); | ||
3422 | if (cmd == NULL) { | ||
3423 | iounmap(vaddr); | ||
3424 | return -ENOMEM; | ||
3425 | } | ||
3426 | |||
3427 | /* This must fit, because of the 32-bit consistent DMA mask. Also, | ||
3428 | although there's no guarantee, we assume that the address is at | ||
3429 | least 4-byte aligned (most likely, it's page-aligned). */ | ||
3430 | paddr32 = paddr64; | ||
3431 | |||
3432 | cmd->CommandHeader.ReplyQueue = 0; | ||
3433 | cmd->CommandHeader.SGList = 0; | ||
3434 | cmd->CommandHeader.SGTotal = 0; | ||
3435 | cmd->CommandHeader.Tag.lower = paddr32; | ||
3436 | cmd->CommandHeader.Tag.upper = 0; | ||
3437 | memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8); | ||
3438 | |||
3439 | cmd->Request.CDBLen = 16; | ||
3440 | cmd->Request.Type.Type = TYPE_MSG; | ||
3441 | cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE; | ||
3442 | cmd->Request.Type.Direction = XFER_NONE; | ||
3443 | cmd->Request.Timeout = 0; /* Don't time out */ | ||
3444 | cmd->Request.CDB[0] = opcode; | ||
3445 | cmd->Request.CDB[1] = type; | ||
3446 | memset(&cmd->Request.CDB[2], 0, 14); /* the rest of the CDB is reserved */ | ||
3447 | |||
3448 | cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(Command); | ||
3449 | cmd->ErrorDescriptor.Addr.upper = 0; | ||
3450 | cmd->ErrorDescriptor.Len = sizeof(ErrorInfo_struct); | ||
3451 | |||
3452 | writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET); | ||
3453 | |||
3454 | for (i = 0; i < 10; i++) { | ||
3455 | tag = readl(vaddr + SA5_REPLY_PORT_OFFSET); | ||
3456 | if ((tag & ~3) == paddr32) | ||
3457 | break; | ||
3458 | schedule_timeout_uninterruptible(HZ); | ||
3459 | } | ||
3460 | |||
3461 | iounmap(vaddr); | ||
3462 | |||
3463 | /* we leak the DMA buffer here ... no choice since the controller could | ||
3464 | still complete the command. */ | ||
3465 | if (i == 10) { | ||
3466 | printk(KERN_ERR "cciss: controller message %02x:%02x timed out\n", | ||
3467 | opcode, type); | ||
3468 | return -ETIMEDOUT; | ||
3469 | } | ||
3470 | |||
3471 | pci_free_consistent(pdev, cmd_sz, cmd, paddr64); | ||
3472 | |||
3473 | if (tag & 2) { | ||
3474 | printk(KERN_ERR "cciss: controller message %02x:%02x failed\n", | ||
3475 | opcode, type); | ||
3476 | return -EIO; | ||
3477 | } | ||
3478 | |||
3479 | printk(KERN_INFO "cciss: controller message %02x:%02x succeeded\n", | ||
3480 | opcode, type); | ||
3481 | return 0; | ||
3482 | } | ||
3483 | |||
3484 | #define cciss_soft_reset_controller(p) cciss_message(p, 1, 0) | ||
3485 | #define cciss_noop(p) cciss_message(p, 3, 0) | ||
3486 | |||
3487 | static __devinit int cciss_reset_msi(struct pci_dev *pdev) | ||
3488 | { | ||
3489 | /* the #defines are stolen from drivers/pci/msi.h. */ | ||
3490 | #define msi_control_reg(base) (base + PCI_MSI_FLAGS) | ||
3491 | #define PCI_MSIX_FLAGS_ENABLE (1 << 15) | ||
3492 | |||
3493 | int pos; | ||
3494 | u16 control = 0; | ||
3495 | |||
3496 | pos = pci_find_capability(pdev, PCI_CAP_ID_MSI); | ||
3497 | if (pos) { | ||
3498 | pci_read_config_word(pdev, msi_control_reg(pos), &control); | ||
3499 | if (control & PCI_MSI_FLAGS_ENABLE) { | ||
3500 | printk(KERN_INFO "cciss: resetting MSI\n"); | ||
3501 | pci_write_config_word(pdev, msi_control_reg(pos), control & ~PCI_MSI_FLAGS_ENABLE); | ||
3502 | } | ||
3503 | } | ||
3504 | |||
3505 | pos = pci_find_capability(pdev, PCI_CAP_ID_MSIX); | ||
3506 | if (pos) { | ||
3507 | pci_read_config_word(pdev, msi_control_reg(pos), &control); | ||
3508 | if (control & PCI_MSIX_FLAGS_ENABLE) { | ||
3509 | printk(KERN_INFO "cciss: resetting MSI-X\n"); | ||
3510 | pci_write_config_word(pdev, msi_control_reg(pos), control & ~PCI_MSIX_FLAGS_ENABLE); | ||
3511 | } | ||
3512 | } | ||
3513 | |||
3514 | return 0; | ||
3515 | } | ||
3516 | |||
3517 | /* This does a hard reset of the controller using PCI power management | ||
3518 | * states. */ | ||
3519 | static __devinit int cciss_hard_reset_controller(struct pci_dev *pdev) | ||
3520 | { | ||
3521 | u16 pmcsr, saved_config_space[32]; | ||
3522 | int i, pos; | ||
3523 | |||
3524 | printk(KERN_INFO "cciss: using PCI PM to reset controller\n"); | ||
3525 | |||
3526 | /* This is very nearly the same thing as | ||
3527 | |||
3528 | pci_save_state(pci_dev); | ||
3529 | pci_set_power_state(pci_dev, PCI_D3hot); | ||
3530 | pci_set_power_state(pci_dev, PCI_D0); | ||
3531 | pci_restore_state(pci_dev); | ||
3532 | |||
3533 | but we can't use these nice canned kernel routines on | ||
3534 | kexec, because they also check the MSI/MSI-X state in PCI | ||
3535 | configuration space and do the wrong thing when it is | ||
3536 | set/cleared. Also, the pci_save/restore_state functions | ||
3537 | violate the ordering requirements for restoring the | ||
3538 | configuration space from the CCISS document (see the | ||
3539 | comment below). So we roll our own .... */ | ||
3540 | |||
3541 | for (i = 0; i < 32; i++) | ||
3542 | pci_read_config_word(pdev, 2*i, &saved_config_space[i]); | ||
3543 | |||
3544 | pos = pci_find_capability(pdev, PCI_CAP_ID_PM); | ||
3545 | if (pos == 0) { | ||
3546 | printk(KERN_ERR "cciss_reset_controller: PCI PM not supported\n"); | ||
3547 | return -ENODEV; | ||
3548 | } | ||
3549 | |||
3550 | /* Quoting from the Open CISS Specification: "The Power | ||
3551 | * Management Control/Status Register (CSR) controls the power | ||
3552 | * state of the device. The normal operating state is D0, | ||
3553 | * CSR=00h. The software off state is D3, CSR=03h. To reset | ||
3554 | * the controller, place the interface device in D3 then to | ||
3555 | * D0, this causes a secondary PCI reset which will reset the | ||
3556 | * controller." */ | ||
3557 | |||
3558 | /* enter the D3hot power management state */ | ||
3559 | pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr); | ||
3560 | pmcsr &= ~PCI_PM_CTRL_STATE_MASK; | ||
3561 | pmcsr |= PCI_D3hot; | ||
3562 | pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr); | ||
3563 | |||
3564 | schedule_timeout_uninterruptible(HZ >> 1); | ||
3565 | |||
3566 | /* enter the D0 power management state */ | ||
3567 | pmcsr &= ~PCI_PM_CTRL_STATE_MASK; | ||
3568 | pmcsr |= PCI_D0; | ||
3569 | pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr); | ||
3570 | |||
3571 | schedule_timeout_uninterruptible(HZ >> 1); | ||
3572 | |||
3573 | /* Restore the PCI configuration space. The Open CISS | ||
3574 | * Specification says, "Restore the PCI Configuration | ||
3575 | * Registers, offsets 00h through 60h. It is important to | ||
3576 | * restore the command register, 16-bits at offset 04h, | ||
3577 | * last. Do not restore the configuration status register, | ||
3578 | * 16-bits at offset 06h." Note that the offset is 2*i. */ | ||
3579 | for (i = 0; i < 32; i++) { | ||
3580 | if (i == 2 || i == 3) | ||
3581 | continue; | ||
3582 | pci_write_config_word(pdev, 2*i, saved_config_space[i]); | ||
3583 | } | ||
3584 | wmb(); | ||
3585 | pci_write_config_word(pdev, 4, saved_config_space[2]); | ||
3586 | |||
3587 | return 0; | ||
3588 | } | ||
3589 | |||
3393 | /* | 3590 | /* |
3394 | * This is it. Find all the controllers and register them. I really hate | 3591 | * This is it. Find all the controllers and register them. I really hate |
3395 | * stealing all these major device numbers. | 3592 | * stealing all these major device numbers. |
@@ -3404,6 +3601,24 @@ static int __devinit cciss_init_one(struct pci_dev *pdev, | |||
3404 | int dac, return_code; | 3601 | int dac, return_code; |
3405 | InquiryData_struct *inq_buff = NULL; | 3602 | InquiryData_struct *inq_buff = NULL; |
3406 | 3603 | ||
3604 | if (reset_devices) { | ||
3605 | /* Reset the controller with a PCI power-cycle */ | ||
3606 | if (cciss_hard_reset_controller(pdev) || cciss_reset_msi(pdev)) | ||
3607 | return -ENODEV; | ||
3608 | |||
3609 | /* Some devices (notably the HP Smart Array 5i Controller) | ||
3610 | need a little pause here */ | ||
3611 | schedule_timeout_uninterruptible(30*HZ); | ||
3612 | |||
3613 | /* Now try to get the controller to respond to a no-op */ | ||
3614 | for (i=0; i<12; i++) { | ||
3615 | if (cciss_noop(pdev) == 0) | ||
3616 | break; | ||
3617 | else | ||
3618 | printk("cciss: no-op failed%s\n", (i < 11 ? "; re-trying" : "")); | ||
3619 | } | ||
3620 | } | ||
3621 | |||
3407 | i = alloc_cciss_hba(); | 3622 | i = alloc_cciss_hba(); |
3408 | if (i < 0) | 3623 | if (i < 0) |
3409 | return -1; | 3624 | return -1; |
diff --git a/drivers/block/floppy.c b/drivers/block/floppy.c index cf29cc4e6ab7..83d8ed39433d 100644 --- a/drivers/block/floppy.c +++ b/drivers/block/floppy.c | |||
@@ -558,6 +558,8 @@ static void process_fd_request(void); | |||
558 | static void recalibrate_floppy(void); | 558 | static void recalibrate_floppy(void); |
559 | static void floppy_shutdown(unsigned long); | 559 | static void floppy_shutdown(unsigned long); |
560 | 560 | ||
561 | static int floppy_request_regions(int); | ||
562 | static void floppy_release_regions(int); | ||
561 | static int floppy_grab_irq_and_dma(void); | 563 | static int floppy_grab_irq_and_dma(void); |
562 | static void floppy_release_irq_and_dma(void); | 564 | static void floppy_release_irq_and_dma(void); |
563 | 565 | ||
@@ -4274,8 +4276,7 @@ static int __init floppy_init(void) | |||
4274 | FDCS->rawcmd = 2; | 4276 | FDCS->rawcmd = 2; |
4275 | if (user_reset_fdc(-1, FD_RESET_ALWAYS, 0)) { | 4277 | if (user_reset_fdc(-1, FD_RESET_ALWAYS, 0)) { |
4276 | /* free ioports reserved by floppy_grab_irq_and_dma() */ | 4278 | /* free ioports reserved by floppy_grab_irq_and_dma() */ |
4277 | release_region(FDCS->address + 2, 4); | 4279 | floppy_release_regions(fdc); |
4278 | release_region(FDCS->address + 7, 1); | ||
4279 | FDCS->address = -1; | 4280 | FDCS->address = -1; |
4280 | FDCS->version = FDC_NONE; | 4281 | FDCS->version = FDC_NONE; |
4281 | continue; | 4282 | continue; |
@@ -4284,8 +4285,7 @@ static int __init floppy_init(void) | |||
4284 | FDCS->version = get_fdc_version(); | 4285 | FDCS->version = get_fdc_version(); |
4285 | if (FDCS->version == FDC_NONE) { | 4286 | if (FDCS->version == FDC_NONE) { |
4286 | /* free ioports reserved by floppy_grab_irq_and_dma() */ | 4287 | /* free ioports reserved by floppy_grab_irq_and_dma() */ |
4287 | release_region(FDCS->address + 2, 4); | 4288 | floppy_release_regions(fdc); |
4288 | release_region(FDCS->address + 7, 1); | ||
4289 | FDCS->address = -1; | 4289 | FDCS->address = -1; |
4290 | continue; | 4290 | continue; |
4291 | } | 4291 | } |
@@ -4358,6 +4358,47 @@ out_put_disk: | |||
4358 | 4358 | ||
4359 | static DEFINE_SPINLOCK(floppy_usage_lock); | 4359 | static DEFINE_SPINLOCK(floppy_usage_lock); |
4360 | 4360 | ||
4361 | static const struct io_region { | ||
4362 | int offset; | ||
4363 | int size; | ||
4364 | } io_regions[] = { | ||
4365 | { 2, 1 }, | ||
4366 | /* address + 3 is sometimes reserved by pnp bios for motherboard */ | ||
4367 | { 4, 2 }, | ||
4368 | /* address + 6 is reserved, and may be taken by IDE. | ||
4369 | * Unfortunately, Adaptec doesn't know this :-(, */ | ||
4370 | { 7, 1 }, | ||
4371 | }; | ||
4372 | |||
4373 | static void floppy_release_allocated_regions(int fdc, const struct io_region *p) | ||
4374 | { | ||
4375 | while (p != io_regions) { | ||
4376 | p--; | ||
4377 | release_region(FDCS->address + p->offset, p->size); | ||
4378 | } | ||
4379 | } | ||
4380 | |||
4381 | #define ARRAY_END(X) (&((X)[ARRAY_SIZE(X)])) | ||
4382 | |||
4383 | static int floppy_request_regions(int fdc) | ||
4384 | { | ||
4385 | const struct io_region *p; | ||
4386 | |||
4387 | for (p = io_regions; p < ARRAY_END(io_regions); p++) { | ||
4388 | if (!request_region(FDCS->address + p->offset, p->size, "floppy")) { | ||
4389 | DPRINT("Floppy io-port 0x%04lx in use\n", FDCS->address + p->offset); | ||
4390 | floppy_release_allocated_regions(fdc, p); | ||
4391 | return -EBUSY; | ||
4392 | } | ||
4393 | } | ||
4394 | return 0; | ||
4395 | } | ||
4396 | |||
4397 | static void floppy_release_regions(int fdc) | ||
4398 | { | ||
4399 | floppy_release_allocated_regions(fdc, ARRAY_END(io_regions)); | ||
4400 | } | ||
4401 | |||
4361 | static int floppy_grab_irq_and_dma(void) | 4402 | static int floppy_grab_irq_and_dma(void) |
4362 | { | 4403 | { |
4363 | unsigned long flags; | 4404 | unsigned long flags; |
@@ -4399,18 +4440,8 @@ static int floppy_grab_irq_and_dma(void) | |||
4399 | 4440 | ||
4400 | for (fdc = 0; fdc < N_FDC; fdc++) { | 4441 | for (fdc = 0; fdc < N_FDC; fdc++) { |
4401 | if (FDCS->address != -1) { | 4442 | if (FDCS->address != -1) { |
4402 | if (!request_region(FDCS->address + 2, 4, "floppy")) { | 4443 | if (floppy_request_regions(fdc)) |
4403 | DPRINT("Floppy io-port 0x%04lx in use\n", | 4444 | goto cleanup; |
4404 | FDCS->address + 2); | ||
4405 | goto cleanup1; | ||
4406 | } | ||
4407 | if (!request_region(FDCS->address + 7, 1, "floppy DIR")) { | ||
4408 | DPRINT("Floppy io-port 0x%04lx in use\n", | ||
4409 | FDCS->address + 7); | ||
4410 | goto cleanup2; | ||
4411 | } | ||
4412 | /* address + 6 is reserved, and may be taken by IDE. | ||
4413 | * Unfortunately, Adaptec doesn't know this :-(, */ | ||
4414 | } | 4445 | } |
4415 | } | 4446 | } |
4416 | for (fdc = 0; fdc < N_FDC; fdc++) { | 4447 | for (fdc = 0; fdc < N_FDC; fdc++) { |
@@ -4432,15 +4463,11 @@ static int floppy_grab_irq_and_dma(void) | |||
4432 | fdc = 0; | 4463 | fdc = 0; |
4433 | irqdma_allocated = 1; | 4464 | irqdma_allocated = 1; |
4434 | return 0; | 4465 | return 0; |
4435 | cleanup2: | 4466 | cleanup: |
4436 | release_region(FDCS->address + 2, 4); | ||
4437 | cleanup1: | ||
4438 | fd_free_irq(); | 4467 | fd_free_irq(); |
4439 | fd_free_dma(); | 4468 | fd_free_dma(); |
4440 | while (--fdc >= 0) { | 4469 | while (--fdc >= 0) |
4441 | release_region(FDCS->address + 2, 4); | 4470 | floppy_release_regions(fdc); |
4442 | release_region(FDCS->address + 7, 1); | ||
4443 | } | ||
4444 | spin_lock_irqsave(&floppy_usage_lock, flags); | 4471 | spin_lock_irqsave(&floppy_usage_lock, flags); |
4445 | usage_count--; | 4472 | usage_count--; |
4446 | spin_unlock_irqrestore(&floppy_usage_lock, flags); | 4473 | spin_unlock_irqrestore(&floppy_usage_lock, flags); |
@@ -4501,10 +4528,8 @@ static void floppy_release_irq_and_dma(void) | |||
4501 | #endif | 4528 | #endif |
4502 | old_fdc = fdc; | 4529 | old_fdc = fdc; |
4503 | for (fdc = 0; fdc < N_FDC; fdc++) | 4530 | for (fdc = 0; fdc < N_FDC; fdc++) |
4504 | if (FDCS->address != -1) { | 4531 | if (FDCS->address != -1) |
4505 | release_region(FDCS->address + 2, 4); | 4532 | floppy_release_regions(fdc); |
4506 | release_region(FDCS->address + 7, 1); | ||
4507 | } | ||
4508 | fdc = old_fdc; | 4533 | fdc = old_fdc; |
4509 | } | 4534 | } |
4510 | 4535 | ||
diff --git a/drivers/block/nbd.c b/drivers/block/nbd.c index 34f80fa6fed1..8299e2d3b611 100644 --- a/drivers/block/nbd.c +++ b/drivers/block/nbd.c | |||
@@ -549,6 +549,15 @@ static void do_nbd_request(struct request_queue * q) | |||
549 | 549 | ||
550 | BUG_ON(lo->magic != LO_MAGIC); | 550 | BUG_ON(lo->magic != LO_MAGIC); |
551 | 551 | ||
552 | if (unlikely(!lo->sock)) { | ||
553 | printk(KERN_ERR "%s: Attempted send on closed socket\n", | ||
554 | lo->disk->disk_name); | ||
555 | req->errors++; | ||
556 | nbd_end_request(req); | ||
557 | spin_lock_irq(q->queue_lock); | ||
558 | continue; | ||
559 | } | ||
560 | |||
552 | spin_lock_irq(&lo->queue_lock); | 561 | spin_lock_irq(&lo->queue_lock); |
553 | list_add_tail(&req->queuelist, &lo->waiting_queue); | 562 | list_add_tail(&req->queuelist, &lo->waiting_queue); |
554 | spin_unlock_irq(&lo->queue_lock); | 563 | spin_unlock_irq(&lo->queue_lock); |
diff --git a/drivers/block/paride/pg.c b/drivers/block/paride/pg.c index 9dfa27163001..c397b3ddba9b 100644 --- a/drivers/block/paride/pg.c +++ b/drivers/block/paride/pg.c | |||
@@ -422,7 +422,7 @@ static void xs(char *buf, char *targ, int len) | |||
422 | 422 | ||
423 | for (k = 0; k < len; k++) { | 423 | for (k = 0; k < len; k++) { |
424 | char c = *buf++; | 424 | char c = *buf++; |
425 | if (c != ' ' || c != l) | 425 | if (c != ' ' && c != l) |
426 | l = *targ++ = c; | 426 | l = *targ++ = c; |
427 | } | 427 | } |
428 | if (l == ' ') | 428 | if (l == ' ') |