aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/block
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/block')
-rw-r--r--drivers/block/cciss.c25
-rw-r--r--drivers/block/cciss_cmd.h1
2 files changed, 16 insertions, 10 deletions
diff --git a/drivers/block/cciss.c b/drivers/block/cciss.c
index 0a296c1eff4f..27b04a32b0c5 100644
--- a/drivers/block/cciss.c
+++ b/drivers/block/cciss.c
@@ -231,7 +231,7 @@ static const struct block_device_operations cciss_fops = {
231 */ 231 */
232static void set_performant_mode(ctlr_info_t *h, CommandList_struct *c) 232static void set_performant_mode(ctlr_info_t *h, CommandList_struct *c)
233{ 233{
234 if (likely(h->transMethod == CFGTBL_Trans_Performant)) 234 if (likely(h->transMethod & CFGTBL_Trans_Performant))
235 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1); 235 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
236} 236}
237 237
@@ -3175,10 +3175,13 @@ static inline u32 cciss_tag_to_index(u32 tag)
3175 return tag >> DIRECT_LOOKUP_SHIFT; 3175 return tag >> DIRECT_LOOKUP_SHIFT;
3176} 3176}
3177 3177
3178static inline u32 cciss_tag_discard_error_bits(u32 tag) 3178static inline u32 cciss_tag_discard_error_bits(ctlr_info_t *h, u32 tag)
3179{ 3179{
3180#define CCISS_ERROR_BITS 0x03 3180#define CCISS_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
3181 return tag & ~CCISS_ERROR_BITS; 3181#define CCISS_SIMPLE_ERROR_BITS 0x03
3182 if (likely(h->transMethod & CFGTBL_Trans_Performant))
3183 return tag & ~CCISS_PERF_ERROR_BITS;
3184 return tag & ~CCISS_SIMPLE_ERROR_BITS;
3182} 3185}
3183 3186
3184static inline void cciss_mark_tag_indexed(u32 *tag) 3187static inline void cciss_mark_tag_indexed(u32 *tag)
@@ -3398,7 +3401,7 @@ static inline u32 next_command(ctlr_info_t *h)
3398{ 3401{
3399 u32 a; 3402 u32 a;
3400 3403
3401 if (unlikely(h->transMethod != CFGTBL_Trans_Performant)) 3404 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
3402 return h->access.command_completed(h); 3405 return h->access.command_completed(h);
3403 3406
3404 if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) { 3407 if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
@@ -3436,9 +3439,9 @@ static inline u32 process_nonindexed_cmd(ctlr_info_t *h, u32 raw_tag)
3436 CommandList_struct *c = NULL; 3439 CommandList_struct *c = NULL;
3437 __u32 busaddr_masked, tag_masked; 3440 __u32 busaddr_masked, tag_masked;
3438 3441
3439 tag_masked = cciss_tag_discard_error_bits(raw_tag); 3442 tag_masked = cciss_tag_discard_error_bits(h, raw_tag);
3440 list_for_each_entry(c, &h->cmpQ, list) { 3443 list_for_each_entry(c, &h->cmpQ, list) {
3441 busaddr_masked = cciss_tag_discard_error_bits(c->busaddr); 3444 busaddr_masked = cciss_tag_discard_error_bits(h, c->busaddr);
3442 if (busaddr_masked == tag_masked) { 3445 if (busaddr_masked == tag_masked) {
3443 finish_cmd(h, c, raw_tag); 3446 finish_cmd(h, c, raw_tag);
3444 return next_command(h); 3447 return next_command(h);
@@ -3790,7 +3793,8 @@ static void __devinit cciss_wait_for_mode_change_ack(ctlr_info_t *h)
3790 } 3793 }
3791} 3794}
3792 3795
3793static __devinit void cciss_enter_performant_mode(ctlr_info_t *h) 3796static __devinit void cciss_enter_performant_mode(ctlr_info_t *h,
3797 u32 use_short_tags)
3794{ 3798{
3795 /* This is a bit complicated. There are 8 registers on 3799 /* This is a bit complicated. There are 8 registers on
3796 * the controller which we write to to tell it 8 different 3800 * the controller which we write to to tell it 8 different
@@ -3845,7 +3849,7 @@ static __devinit void cciss_enter_performant_mode(ctlr_info_t *h)
3845 writel(0, &h->transtable->RepQCtrAddrHigh32); 3849 writel(0, &h->transtable->RepQCtrAddrHigh32);
3846 writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32); 3850 writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
3847 writel(0, &h->transtable->RepQAddr0High32); 3851 writel(0, &h->transtable->RepQAddr0High32);
3848 writel(CFGTBL_Trans_Performant, 3852 writel(CFGTBL_Trans_Performant | use_short_tags,
3849 &(h->cfgtable->HostWrite.TransportRequest)); 3853 &(h->cfgtable->HostWrite.TransportRequest));
3850 3854
3851 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 3855 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
@@ -3892,7 +3896,8 @@ static void __devinit cciss_put_controller_into_performant_mode(ctlr_info_t *h)
3892 if ((h->reply_pool == NULL) || (h->blockFetchTable == NULL)) 3896 if ((h->reply_pool == NULL) || (h->blockFetchTable == NULL))
3893 goto clean_up; 3897 goto clean_up;
3894 3898
3895 cciss_enter_performant_mode(h); 3899 cciss_enter_performant_mode(h,
3900 trans_support & CFGTBL_Trans_use_short_tags);
3896 3901
3897 /* Change the access methods to the performant access methods */ 3902 /* Change the access methods to the performant access methods */
3898 h->access = SA5_performant_access; 3903 h->access = SA5_performant_access;
diff --git a/drivers/block/cciss_cmd.h b/drivers/block/cciss_cmd.h
index 35463d2f0ee7..cd441bef031f 100644
--- a/drivers/block/cciss_cmd.h
+++ b/drivers/block/cciss_cmd.h
@@ -56,6 +56,7 @@
56 56
57#define CFGTBL_Trans_Simple 0x00000002l 57#define CFGTBL_Trans_Simple 0x00000002l
58#define CFGTBL_Trans_Performant 0x00000004l 58#define CFGTBL_Trans_Performant 0x00000004l
59#define CFGTBL_Trans_use_short_tags 0x20000000l
59 60
60#define CFGTBL_BusType_Ultra2 0x00000001l 61#define CFGTBL_BusType_Ultra2 0x00000001l
61#define CFGTBL_BusType_Ultra3 0x00000002l 62#define CFGTBL_BusType_Ultra3 0x00000002l