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Diffstat (limited to 'drivers/block/rsxx/cregs.c')
-rw-r--r--drivers/block/rsxx/cregs.c13
1 files changed, 3 insertions, 10 deletions
diff --git a/drivers/block/rsxx/cregs.c b/drivers/block/rsxx/cregs.c
index 80bbe639fccd..224156435261 100644
--- a/drivers/block/rsxx/cregs.c
+++ b/drivers/block/rsxx/cregs.c
@@ -126,13 +126,6 @@ static void creg_issue_cmd(struct rsxx_cardinfo *card, struct creg_cmd *cmd)
126 cmd->buf, cmd->stream); 126 cmd->buf, cmd->stream);
127 } 127 }
128 128
129 /*
130 * Data copy must complete before initiating the command. This is
131 * needed for weakly ordered processors (i.e. PowerPC), so that all
132 * neccessary registers are written before we kick the hardware.
133 */
134 wmb();
135
136 /* Setting the valid bit will kick off the command. */ 129 /* Setting the valid bit will kick off the command. */
137 iowrite32(cmd->op, card->regmap + CREG_CMD); 130 iowrite32(cmd->op, card->regmap + CREG_CMD);
138} 131}
@@ -399,12 +392,12 @@ static int __issue_creg_rw(struct rsxx_cardinfo *card,
399 return st; 392 return st;
400 393
401 /* 394 /*
402 * This timeout is neccessary for unresponsive hardware. The additional 395 * This timeout is necessary for unresponsive hardware. The additional
403 * 20 seconds to used to guarantee that each cregs requests has time to 396 * 20 seconds to used to guarantee that each cregs requests has time to
404 * complete. 397 * complete.
405 */ 398 */
406 timeout = msecs_to_jiffies((CREG_TIMEOUT_MSEC * 399 timeout = msecs_to_jiffies(CREG_TIMEOUT_MSEC *
407 card->creg_ctrl.q_depth) + 20000); 400 card->creg_ctrl.q_depth + 20000);
408 401
409 /* 402 /*
410 * The creg interface is guaranteed to complete. It has a timeout 403 * The creg interface is guaranteed to complete. It has a timeout