diff options
Diffstat (limited to 'drivers/block/paride/frpw.c')
-rw-r--r-- | drivers/block/paride/frpw.c | 313 |
1 files changed, 313 insertions, 0 deletions
diff --git a/drivers/block/paride/frpw.c b/drivers/block/paride/frpw.c new file mode 100644 index 000000000000..56b3824b1538 --- /dev/null +++ b/drivers/block/paride/frpw.c | |||
@@ -0,0 +1,313 @@ | |||
1 | /* | ||
2 | frpw.c (c) 1996-8 Grant R. Guenther <grant@torque.net> | ||
3 | Under the terms of the GNU General Public License | ||
4 | |||
5 | frpw.c is a low-level protocol driver for the Freecom "Power" | ||
6 | parallel port IDE adapter. | ||
7 | |||
8 | Some applications of this adapter may require a "printer" reset | ||
9 | prior to loading the driver. This can be done by loading and | ||
10 | unloading the "lp" driver, or it can be done by this driver | ||
11 | if you define FRPW_HARD_RESET. The latter is not recommended | ||
12 | as it may upset devices on other ports. | ||
13 | |||
14 | */ | ||
15 | |||
16 | /* Changes: | ||
17 | |||
18 | 1.01 GRG 1998.05.06 init_proto, release_proto | ||
19 | fix chip detect | ||
20 | added EPP-16 and EPP-32 | ||
21 | 1.02 GRG 1998.09.23 added hard reset to initialisation process | ||
22 | 1.03 GRG 1998.12.14 made hard reset conditional | ||
23 | |||
24 | */ | ||
25 | |||
26 | #define FRPW_VERSION "1.03" | ||
27 | |||
28 | #include <linux/module.h> | ||
29 | #include <linux/init.h> | ||
30 | #include <linux/delay.h> | ||
31 | #include <linux/kernel.h> | ||
32 | #include <linux/types.h> | ||
33 | #include <linux/wait.h> | ||
34 | #include <asm/io.h> | ||
35 | |||
36 | #include "paride.h" | ||
37 | |||
38 | #define cec4 w2(0xc);w2(0xe);w2(0xe);w2(0xc);w2(4);w2(4);w2(4); | ||
39 | #define j44(l,h) (((l>>4)&0x0f)|(h&0xf0)) | ||
40 | |||
41 | /* cont = 0 - access the IDE register file | ||
42 | cont = 1 - access the IDE command set | ||
43 | */ | ||
44 | |||
45 | static int cont_map[2] = { 0x08, 0x10 }; | ||
46 | |||
47 | static int frpw_read_regr( PIA *pi, int cont, int regr ) | ||
48 | |||
49 | { int h,l,r; | ||
50 | |||
51 | r = regr + cont_map[cont]; | ||
52 | |||
53 | w2(4); | ||
54 | w0(r); cec4; | ||
55 | w2(6); l = r1(); | ||
56 | w2(4); h = r1(); | ||
57 | w2(4); | ||
58 | |||
59 | return j44(l,h); | ||
60 | |||
61 | } | ||
62 | |||
63 | static void frpw_write_regr( PIA *pi, int cont, int regr, int val) | ||
64 | |||
65 | { int r; | ||
66 | |||
67 | r = regr + cont_map[cont]; | ||
68 | |||
69 | w2(4); w0(r); cec4; | ||
70 | w0(val); | ||
71 | w2(5);w2(7);w2(5);w2(4); | ||
72 | } | ||
73 | |||
74 | static void frpw_read_block_int( PIA *pi, char * buf, int count, int regr ) | ||
75 | |||
76 | { int h, l, k, ph; | ||
77 | |||
78 | switch(pi->mode) { | ||
79 | |||
80 | case 0: w2(4); w0(regr); cec4; | ||
81 | for (k=0;k<count;k++) { | ||
82 | w2(6); l = r1(); | ||
83 | w2(4); h = r1(); | ||
84 | buf[k] = j44(l,h); | ||
85 | } | ||
86 | w2(4); | ||
87 | break; | ||
88 | |||
89 | case 1: ph = 2; | ||
90 | w2(4); w0(regr + 0xc0); cec4; | ||
91 | w0(0xff); | ||
92 | for (k=0;k<count;k++) { | ||
93 | w2(0xa4 + ph); | ||
94 | buf[k] = r0(); | ||
95 | ph = 2 - ph; | ||
96 | } | ||
97 | w2(0xac); w2(0xa4); w2(4); | ||
98 | break; | ||
99 | |||
100 | case 2: w2(4); w0(regr + 0x80); cec4; | ||
101 | for (k=0;k<count;k++) buf[k] = r4(); | ||
102 | w2(0xac); w2(0xa4); | ||
103 | w2(4); | ||
104 | break; | ||
105 | |||
106 | case 3: w2(4); w0(regr + 0x80); cec4; | ||
107 | for (k=0;k<count-2;k++) buf[k] = r4(); | ||
108 | w2(0xac); w2(0xa4); | ||
109 | buf[count-2] = r4(); | ||
110 | buf[count-1] = r4(); | ||
111 | w2(4); | ||
112 | break; | ||
113 | |||
114 | case 4: w2(4); w0(regr + 0x80); cec4; | ||
115 | for (k=0;k<(count/2)-1;k++) ((u16 *)buf)[k] = r4w(); | ||
116 | w2(0xac); w2(0xa4); | ||
117 | buf[count-2] = r4(); | ||
118 | buf[count-1] = r4(); | ||
119 | w2(4); | ||
120 | break; | ||
121 | |||
122 | case 5: w2(4); w0(regr + 0x80); cec4; | ||
123 | for (k=0;k<(count/4)-1;k++) ((u32 *)buf)[k] = r4l(); | ||
124 | buf[count-4] = r4(); | ||
125 | buf[count-3] = r4(); | ||
126 | w2(0xac); w2(0xa4); | ||
127 | buf[count-2] = r4(); | ||
128 | buf[count-1] = r4(); | ||
129 | w2(4); | ||
130 | break; | ||
131 | |||
132 | } | ||
133 | } | ||
134 | |||
135 | static void frpw_read_block( PIA *pi, char * buf, int count) | ||
136 | |||
137 | { frpw_read_block_int(pi,buf,count,0x08); | ||
138 | } | ||
139 | |||
140 | static void frpw_write_block( PIA *pi, char * buf, int count ) | ||
141 | |||
142 | { int k; | ||
143 | |||
144 | switch(pi->mode) { | ||
145 | |||
146 | case 0: | ||
147 | case 1: | ||
148 | case 2: w2(4); w0(8); cec4; w2(5); | ||
149 | for (k=0;k<count;k++) { | ||
150 | w0(buf[k]); | ||
151 | w2(7);w2(5); | ||
152 | } | ||
153 | w2(4); | ||
154 | break; | ||
155 | |||
156 | case 3: w2(4); w0(0xc8); cec4; w2(5); | ||
157 | for (k=0;k<count;k++) w4(buf[k]); | ||
158 | w2(4); | ||
159 | break; | ||
160 | |||
161 | case 4: w2(4); w0(0xc8); cec4; w2(5); | ||
162 | for (k=0;k<count/2;k++) w4w(((u16 *)buf)[k]); | ||
163 | w2(4); | ||
164 | break; | ||
165 | |||
166 | case 5: w2(4); w0(0xc8); cec4; w2(5); | ||
167 | for (k=0;k<count/4;k++) w4l(((u32 *)buf)[k]); | ||
168 | w2(4); | ||
169 | break; | ||
170 | } | ||
171 | } | ||
172 | |||
173 | static void frpw_connect ( PIA *pi ) | ||
174 | |||
175 | { pi->saved_r0 = r0(); | ||
176 | pi->saved_r2 = r2(); | ||
177 | w2(4); | ||
178 | } | ||
179 | |||
180 | static void frpw_disconnect ( PIA *pi ) | ||
181 | |||
182 | { w2(4); w0(0x20); cec4; | ||
183 | w0(pi->saved_r0); | ||
184 | w2(pi->saved_r2); | ||
185 | } | ||
186 | |||
187 | /* Stub logic to see if PNP string is available - used to distinguish | ||
188 | between the Xilinx and ASIC implementations of the Freecom adapter. | ||
189 | */ | ||
190 | |||
191 | static int frpw_test_pnp ( PIA *pi ) | ||
192 | |||
193 | /* returns chip_type: 0 = Xilinx, 1 = ASIC */ | ||
194 | |||
195 | { int olddelay, a, b; | ||
196 | |||
197 | #ifdef FRPW_HARD_RESET | ||
198 | w0(0); w2(8); udelay(50); w2(0xc); /* parallel bus reset */ | ||
199 | mdelay(1500); | ||
200 | #endif | ||
201 | |||
202 | olddelay = pi->delay; | ||
203 | pi->delay = 10; | ||
204 | |||
205 | pi->saved_r0 = r0(); | ||
206 | pi->saved_r2 = r2(); | ||
207 | |||
208 | w2(4); w0(4); w2(6); w2(7); | ||
209 | a = r1() & 0xff; w2(4); b = r1() & 0xff; | ||
210 | w2(0xc); w2(0xe); w2(4); | ||
211 | |||
212 | pi->delay = olddelay; | ||
213 | w0(pi->saved_r0); | ||
214 | w2(pi->saved_r2); | ||
215 | |||
216 | return ((~a&0x40) && (b&0x40)); | ||
217 | } | ||
218 | |||
219 | /* We use the pi->private to remember the result of the PNP test. | ||
220 | To make this work, private = port*2 + chip. Yes, I know it's | ||
221 | a hack :-( | ||
222 | */ | ||
223 | |||
224 | static int frpw_test_proto( PIA *pi, char * scratch, int verbose ) | ||
225 | |||
226 | { int j, k, r; | ||
227 | int e[2] = {0,0}; | ||
228 | |||
229 | if ((pi->private>>1) != pi->port) | ||
230 | pi->private = frpw_test_pnp(pi) + 2*pi->port; | ||
231 | |||
232 | if (((pi->private%2) == 0) && (pi->mode > 2)) { | ||
233 | if (verbose) | ||
234 | printk("%s: frpw: Xilinx does not support mode %d\n", | ||
235 | pi->device, pi->mode); | ||
236 | return 1; | ||
237 | } | ||
238 | |||
239 | if (((pi->private%2) == 1) && (pi->mode == 2)) { | ||
240 | if (verbose) | ||
241 | printk("%s: frpw: ASIC does not support mode 2\n", | ||
242 | pi->device); | ||
243 | return 1; | ||
244 | } | ||
245 | |||
246 | frpw_connect(pi); | ||
247 | for (j=0;j<2;j++) { | ||
248 | frpw_write_regr(pi,0,6,0xa0+j*0x10); | ||
249 | for (k=0;k<256;k++) { | ||
250 | frpw_write_regr(pi,0,2,k^0xaa); | ||
251 | frpw_write_regr(pi,0,3,k^0x55); | ||
252 | if (frpw_read_regr(pi,0,2) != (k^0xaa)) e[j]++; | ||
253 | } | ||
254 | } | ||
255 | frpw_disconnect(pi); | ||
256 | |||
257 | frpw_connect(pi); | ||
258 | frpw_read_block_int(pi,scratch,512,0x10); | ||
259 | r = 0; | ||
260 | for (k=0;k<128;k++) if (scratch[k] != k) r++; | ||
261 | frpw_disconnect(pi); | ||
262 | |||
263 | if (verbose) { | ||
264 | printk("%s: frpw: port 0x%x, chip %ld, mode %d, test=(%d,%d,%d)\n", | ||
265 | pi->device,pi->port,(pi->private%2),pi->mode,e[0],e[1],r); | ||
266 | } | ||
267 | |||
268 | return (r || (e[0] && e[1])); | ||
269 | } | ||
270 | |||
271 | |||
272 | static void frpw_log_adapter( PIA *pi, char * scratch, int verbose ) | ||
273 | |||
274 | { char *mode_string[6] = {"4-bit","8-bit","EPP", | ||
275 | "EPP-8","EPP-16","EPP-32"}; | ||
276 | |||
277 | printk("%s: frpw %s, Freecom (%s) adapter at 0x%x, ", pi->device, | ||
278 | FRPW_VERSION,((pi->private%2) == 0)?"Xilinx":"ASIC",pi->port); | ||
279 | printk("mode %d (%s), delay %d\n",pi->mode, | ||
280 | mode_string[pi->mode],pi->delay); | ||
281 | |||
282 | } | ||
283 | |||
284 | static struct pi_protocol frpw = { | ||
285 | .owner = THIS_MODULE, | ||
286 | .name = "frpw", | ||
287 | .max_mode = 6, | ||
288 | .epp_first = 2, | ||
289 | .default_delay = 2, | ||
290 | .max_units = 1, | ||
291 | .write_regr = frpw_write_regr, | ||
292 | .read_regr = frpw_read_regr, | ||
293 | .write_block = frpw_write_block, | ||
294 | .read_block = frpw_read_block, | ||
295 | .connect = frpw_connect, | ||
296 | .disconnect = frpw_disconnect, | ||
297 | .test_proto = frpw_test_proto, | ||
298 | .log_adapter = frpw_log_adapter, | ||
299 | }; | ||
300 | |||
301 | static int __init frpw_init(void) | ||
302 | { | ||
303 | return pi_register(&frpw)-1; | ||
304 | } | ||
305 | |||
306 | static void __exit frpw_exit(void) | ||
307 | { | ||
308 | pi_unregister(&frpw); | ||
309 | } | ||
310 | |||
311 | MODULE_LICENSE("GPL"); | ||
312 | module_init(frpw_init) | ||
313 | module_exit(frpw_exit) | ||