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-rw-r--r--drivers/block/paride/bpck.c477
1 files changed, 477 insertions, 0 deletions
diff --git a/drivers/block/paride/bpck.c b/drivers/block/paride/bpck.c
new file mode 100644
index 000000000000..d462ff6b139d
--- /dev/null
+++ b/drivers/block/paride/bpck.c
@@ -0,0 +1,477 @@
1/*
2 bpck.c (c) 1996-8 Grant R. Guenther <grant@torque.net>
3 Under the terms of the GNU General Public License.
4
5 bpck.c is a low-level protocol driver for the MicroSolutions
6 "backpack" parallel port IDE adapter.
7
8*/
9
10/* Changes:
11
12 1.01 GRG 1998.05.05 init_proto, release_proto, pi->delay
13 1.02 GRG 1998.08.15 default pi->delay returned to 4
14
15*/
16
17#define BPCK_VERSION "1.02"
18
19#include <linux/module.h>
20#include <linux/init.h>
21#include <linux/delay.h>
22#include <linux/kernel.h>
23#include <linux/types.h>
24#include <linux/wait.h>
25#include <asm/io.h>
26
27#include "paride.h"
28
29#undef r2
30#undef w2
31
32#define PC pi->private
33#define r2() (PC=(in_p(2) & 0xff))
34#define w2(byte) {out_p(2,byte); PC = byte;}
35#define t2(pat) {PC ^= pat; out_p(2,PC);}
36#define e2() {PC &= 0xfe; out_p(2,PC);}
37#define o2() {PC |= 1; out_p(2,PC);}
38
39#define j44(l,h) (((l>>3)&0x7)|((l>>4)&0x8)|((h<<1)&0x70)|(h&0x80))
40
41/* cont = 0 - access the IDE register file
42 cont = 1 - access the IDE command set
43 cont = 2 - use internal bpck register addressing
44*/
45
46static int cont_map[3] = { 0x40, 0x48, 0 };
47
48static int bpck_read_regr( PIA *pi, int cont, int regr )
49
50{ int r, l, h;
51
52 r = regr + cont_map[cont];
53
54 switch (pi->mode) {
55
56 case 0: w0(r & 0xf); w0(r); t2(2); t2(4);
57 l = r1();
58 t2(4);
59 h = r1();
60 return j44(l,h);
61
62 case 1: w0(r & 0xf); w0(r); t2(2);
63 e2(); t2(0x20);
64 t2(4); h = r0();
65 t2(1); t2(0x20);
66 return h;
67
68 case 2:
69 case 3:
70 case 4: w0(r); w2(9); w2(0); w2(0x20);
71 h = r4();
72 w2(0);
73 return h;
74
75 }
76 return -1;
77}
78
79static void bpck_write_regr( PIA *pi, int cont, int regr, int val )
80
81{ int r;
82
83 r = regr + cont_map[cont];
84
85 switch (pi->mode) {
86
87 case 0:
88 case 1: w0(r);
89 t2(2);
90 w0(val);
91 o2(); t2(4); t2(1);
92 break;
93
94 case 2:
95 case 3:
96 case 4: w0(r); w2(9); w2(0);
97 w0(val); w2(1); w2(3); w2(0);
98 break;
99
100 }
101}
102
103/* These macros access the bpck registers in native addressing */
104
105#define WR(r,v) bpck_write_regr(pi,2,r,v)
106#define RR(r) (bpck_read_regr(pi,2,r))
107
108static void bpck_write_block( PIA *pi, char * buf, int count )
109
110{ int i;
111
112 switch (pi->mode) {
113
114 case 0: WR(4,0x40);
115 w0(0x40); t2(2); t2(1);
116 for (i=0;i<count;i++) { w0(buf[i]); t2(4); }
117 WR(4,0);
118 break;
119
120 case 1: WR(4,0x50);
121 w0(0x40); t2(2); t2(1);
122 for (i=0;i<count;i++) { w0(buf[i]); t2(4); }
123 WR(4,0x10);
124 break;
125
126 case 2: WR(4,0x48);
127 w0(0x40); w2(9); w2(0); w2(1);
128 for (i=0;i<count;i++) w4(buf[i]);
129 w2(0);
130 WR(4,8);
131 break;
132
133 case 3: WR(4,0x48);
134 w0(0x40); w2(9); w2(0); w2(1);
135 for (i=0;i<count/2;i++) w4w(((u16 *)buf)[i]);
136 w2(0);
137 WR(4,8);
138 break;
139
140 case 4: WR(4,0x48);
141 w0(0x40); w2(9); w2(0); w2(1);
142 for (i=0;i<count/4;i++) w4l(((u32 *)buf)[i]);
143 w2(0);
144 WR(4,8);
145 break;
146 }
147}
148
149static void bpck_read_block( PIA *pi, char * buf, int count )
150
151{ int i, l, h;
152
153 switch (pi->mode) {
154
155 case 0: WR(4,0x40);
156 w0(0x40); t2(2);
157 for (i=0;i<count;i++) {
158 t2(4); l = r1();
159 t2(4); h = r1();
160 buf[i] = j44(l,h);
161 }
162 WR(4,0);
163 break;
164
165 case 1: WR(4,0x50);
166 w0(0x40); t2(2); t2(0x20);
167 for(i=0;i<count;i++) { t2(4); buf[i] = r0(); }
168 t2(1); t2(0x20);
169 WR(4,0x10);
170 break;
171
172 case 2: WR(4,0x48);
173 w0(0x40); w2(9); w2(0); w2(0x20);
174 for (i=0;i<count;i++) buf[i] = r4();
175 w2(0);
176 WR(4,8);
177 break;
178
179 case 3: WR(4,0x48);
180 w0(0x40); w2(9); w2(0); w2(0x20);
181 for (i=0;i<count/2;i++) ((u16 *)buf)[i] = r4w();
182 w2(0);
183 WR(4,8);
184 break;
185
186 case 4: WR(4,0x48);
187 w0(0x40); w2(9); w2(0); w2(0x20);
188 for (i=0;i<count/4;i++) ((u32 *)buf)[i] = r4l();
189 w2(0);
190 WR(4,8);
191 break;
192
193 }
194}
195
196static int bpck_probe_unit ( PIA *pi )
197
198{ int o1, o0, f7, id;
199 int t, s;
200
201 id = pi->unit;
202 s = 0;
203 w2(4); w2(0xe); r2(); t2(2);
204 o1 = r1()&0xf8;
205 o0 = r0();
206 w0(255-id); w2(4); w0(id);
207 t2(8); t2(8); t2(8);
208 t2(2); t = r1()&0xf8;
209 f7 = ((id % 8) == 7);
210 if ((f7) || (t != o1)) { t2(2); s = r1()&0xf8; }
211 if ((t == o1) && ((!f7) || (s == o1))) {
212 w2(0x4c); w0(o0);
213 return 0;
214 }
215 t2(8); w0(0); t2(2); w2(0x4c); w0(o0);
216 return 1;
217}
218
219static void bpck_connect ( PIA *pi )
220
221{ pi->saved_r0 = r0();
222 w0(0xff-pi->unit); w2(4); w0(pi->unit);
223 t2(8); t2(8); t2(8);
224 t2(2); t2(2);
225
226 switch (pi->mode) {
227
228 case 0: t2(8); WR(4,0);
229 break;
230
231 case 1: t2(8); WR(4,0x10);
232 break;
233
234 case 2:
235 case 3:
236 case 4: w2(0); WR(4,8);
237 break;
238
239 }
240
241 WR(5,8);
242
243 if (pi->devtype == PI_PCD) {
244 WR(0x46,0x10); /* fiddle with ESS logic ??? */
245 WR(0x4c,0x38);
246 WR(0x4d,0x88);
247 WR(0x46,0xa0);
248 WR(0x41,0);
249 WR(0x4e,8);
250 }
251}
252
253static void bpck_disconnect ( PIA *pi )
254
255{ w0(0);
256 if (pi->mode >= 2) { w2(9); w2(0); } else t2(2);
257 w2(0x4c); w0(pi->saved_r0);
258}
259
260static void bpck_force_spp ( PIA *pi )
261
262/* This fakes the EPP protocol to turn off EPP ... */
263
264{ pi->saved_r0 = r0();
265 w0(0xff-pi->unit); w2(4); w0(pi->unit);
266 t2(8); t2(8); t2(8);
267 t2(2); t2(2);
268
269 w2(0);
270 w0(4); w2(9); w2(0);
271 w0(0); w2(1); w2(3); w2(0);
272 w0(0); w2(9); w2(0);
273 w2(0x4c); w0(pi->saved_r0);
274}
275
276#define TEST_LEN 16
277
278static int bpck_test_proto( PIA *pi, char * scratch, int verbose )
279
280{ int i, e, l, h, om;
281 char buf[TEST_LEN];
282
283 bpck_force_spp(pi);
284
285 switch (pi->mode) {
286
287 case 0: bpck_connect(pi);
288 WR(0x13,0x7f);
289 w0(0x13); t2(2);
290 for(i=0;i<TEST_LEN;i++) {
291 t2(4); l = r1();
292 t2(4); h = r1();
293 buf[i] = j44(l,h);
294 }
295 bpck_disconnect(pi);
296 break;
297
298 case 1: bpck_connect(pi);
299 WR(0x13,0x7f);
300 w0(0x13); t2(2); t2(0x20);
301 for(i=0;i<TEST_LEN;i++) { t2(4); buf[i] = r0(); }
302 t2(1); t2(0x20);
303 bpck_disconnect(pi);
304 break;
305
306 case 2:
307 case 3:
308 case 4: om = pi->mode;
309 pi->mode = 0;
310 bpck_connect(pi);
311 WR(7,3);
312 WR(4,8);
313 bpck_disconnect(pi);
314
315 pi->mode = om;
316 bpck_connect(pi);
317 w0(0x13); w2(9); w2(1); w0(0); w2(3); w2(0); w2(0xe0);
318
319 switch (pi->mode) {
320 case 2: for (i=0;i<TEST_LEN;i++) buf[i] = r4();
321 break;
322 case 3: for (i=0;i<TEST_LEN/2;i++) ((u16 *)buf)[i] = r4w();
323 break;
324 case 4: for (i=0;i<TEST_LEN/4;i++) ((u32 *)buf)[i] = r4l();
325 break;
326 }
327
328 w2(0);
329 WR(7,0);
330 bpck_disconnect(pi);
331
332 break;
333
334 }
335
336 if (verbose) {
337 printk("%s: bpck: 0x%x unit %d mode %d: ",
338 pi->device,pi->port,pi->unit,pi->mode);
339 for (i=0;i<TEST_LEN;i++) printk("%3d",buf[i]);
340 printk("\n");
341 }
342
343 e = 0;
344 for (i=0;i<TEST_LEN;i++) if (buf[i] != (i+1)) e++;
345 return e;
346}
347
348static void bpck_read_eeprom ( PIA *pi, char * buf )
349
350{ int i,j,k,n,p,v,f, om, od;
351
352 bpck_force_spp(pi);
353
354 om = pi->mode; od = pi->delay;
355 pi->mode = 0; pi->delay = 6;
356
357 bpck_connect(pi);
358
359 n = 0;
360 WR(4,0);
361 for (i=0;i<64;i++) {
362 WR(6,8);
363 WR(6,0xc);
364 p = 0x100;
365 for (k=0;k<9;k++) {
366 f = (((i + 0x180) & p) != 0) * 2;
367 WR(6,f+0xc);
368 WR(6,f+0xd);
369 WR(6,f+0xc);
370 p = (p >> 1);
371 }
372 for (j=0;j<2;j++) {
373 v = 0;
374 for (k=0;k<8;k++) {
375 WR(6,0xc);
376 WR(6,0xd);
377 WR(6,0xc);
378 f = RR(0);
379 v = 2*v + (f == 0x84);
380 }
381 buf[2*i+1-j] = v;
382 }
383 }
384 WR(6,8);
385 WR(6,0);
386 WR(5,8);
387
388 bpck_disconnect(pi);
389
390 if (om >= 2) {
391 bpck_connect(pi);
392 WR(7,3);
393 WR(4,8);
394 bpck_disconnect(pi);
395 }
396
397 pi->mode = om; pi->delay = od;
398}
399
400static int bpck_test_port ( PIA *pi ) /* check for 8-bit port */
401
402{ int i, r, m;
403
404 w2(0x2c); i = r0(); w0(255-i); r = r0(); w0(i);
405 m = -1;
406 if (r == i) m = 2;
407 if (r == (255-i)) m = 0;
408
409 w2(0xc); i = r0(); w0(255-i); r = r0(); w0(i);
410 if (r != (255-i)) m = -1;
411
412 if (m == 0) { w2(6); w2(0xc); r = r0(); w0(0xaa); w0(r); w0(0xaa); }
413 if (m == 2) { w2(0x26); w2(0xc); }
414
415 if (m == -1) return 0;
416 return 5;
417}
418
419static void bpck_log_adapter( PIA *pi, char * scratch, int verbose )
420
421{ char *mode_string[5] = { "4-bit","8-bit","EPP-8",
422 "EPP-16","EPP-32" };
423
424#ifdef DUMP_EEPROM
425 int i;
426#endif
427
428 bpck_read_eeprom(pi,scratch);
429
430#ifdef DUMP_EEPROM
431 if (verbose) {
432 for(i=0;i<128;i++)
433 if ((scratch[i] < ' ') || (scratch[i] > '~'))
434 scratch[i] = '.';
435 printk("%s: bpck EEPROM: %64.64s\n",pi->device,scratch);
436 printk("%s: %64.64s\n",pi->device,&scratch[64]);
437 }
438#endif
439
440 printk("%s: bpck %s, backpack %8.8s unit %d",
441 pi->device,BPCK_VERSION,&scratch[110],pi->unit);
442 printk(" at 0x%x, mode %d (%s), delay %d\n",pi->port,
443 pi->mode,mode_string[pi->mode],pi->delay);
444}
445
446static struct pi_protocol bpck = {
447 .owner = THIS_MODULE,
448 .name = "bpck",
449 .max_mode = 5,
450 .epp_first = 2,
451 .default_delay = 4,
452 .max_units = 255,
453 .write_regr = bpck_write_regr,
454 .read_regr = bpck_read_regr,
455 .write_block = bpck_write_block,
456 .read_block = bpck_read_block,
457 .connect = bpck_connect,
458 .disconnect = bpck_disconnect,
459 .test_port = bpck_test_port,
460 .probe_unit = bpck_probe_unit,
461 .test_proto = bpck_test_proto,
462 .log_adapter = bpck_log_adapter,
463};
464
465static int __init bpck_init(void)
466{
467 return pi_register(&bpck)-1;
468}
469
470static void __exit bpck_exit(void)
471{
472 pi_unregister(&bpck);
473}
474
475MODULE_LICENSE("GPL");
476module_init(bpck_init)
477module_exit(bpck_exit)
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-29 03:46:38 -0500