diff options
Diffstat (limited to 'drivers/bcma')
-rw-r--r-- | drivers/bcma/Kconfig | 4 | ||||
-rw-r--r-- | drivers/bcma/bcma_private.h | 2 | ||||
-rw-r--r-- | drivers/bcma/core.c | 2 | ||||
-rw-r--r-- | drivers/bcma/driver_chipcommon_nflash.c | 28 | ||||
-rw-r--r-- | drivers/bcma/driver_chipcommon_pmu.c | 9 | ||||
-rw-r--r-- | drivers/bcma/driver_chipcommon_sflash.c | 123 | ||||
-rw-r--r-- | drivers/bcma/driver_pci.c | 6 | ||||
-rw-r--r-- | drivers/bcma/driver_pci_host.c | 8 | ||||
-rw-r--r-- | drivers/bcma/host_pci.c | 12 | ||||
-rw-r--r-- | drivers/bcma/host_soc.c | 2 | ||||
-rw-r--r-- | drivers/bcma/main.c | 27 | ||||
-rw-r--r-- | drivers/bcma/sprom.c | 2 |
12 files changed, 200 insertions, 25 deletions
diff --git a/drivers/bcma/Kconfig b/drivers/bcma/Kconfig index 06b3207adebd..a533af218368 100644 --- a/drivers/bcma/Kconfig +++ b/drivers/bcma/Kconfig | |||
@@ -48,12 +48,12 @@ config BCMA_DRIVER_MIPS | |||
48 | 48 | ||
49 | config BCMA_SFLASH | 49 | config BCMA_SFLASH |
50 | bool | 50 | bool |
51 | depends on BCMA_DRIVER_MIPS && BROKEN | 51 | depends on BCMA_DRIVER_MIPS |
52 | default y | 52 | default y |
53 | 53 | ||
54 | config BCMA_NFLASH | 54 | config BCMA_NFLASH |
55 | bool | 55 | bool |
56 | depends on BCMA_DRIVER_MIPS && BROKEN | 56 | depends on BCMA_DRIVER_MIPS |
57 | default y | 57 | default y |
58 | 58 | ||
59 | config BCMA_DRIVER_GMAC_CMN | 59 | config BCMA_DRIVER_GMAC_CMN |
diff --git a/drivers/bcma/bcma_private.h b/drivers/bcma/bcma_private.h index 3cf9cc923cd2..169fc58427d3 100644 --- a/drivers/bcma/bcma_private.h +++ b/drivers/bcma/bcma_private.h | |||
@@ -54,6 +54,7 @@ u32 bcma_pmu_get_clockcpu(struct bcma_drv_cc *cc); | |||
54 | #ifdef CONFIG_BCMA_SFLASH | 54 | #ifdef CONFIG_BCMA_SFLASH |
55 | /* driver_chipcommon_sflash.c */ | 55 | /* driver_chipcommon_sflash.c */ |
56 | int bcma_sflash_init(struct bcma_drv_cc *cc); | 56 | int bcma_sflash_init(struct bcma_drv_cc *cc); |
57 | extern struct platform_device bcma_sflash_dev; | ||
57 | #else | 58 | #else |
58 | static inline int bcma_sflash_init(struct bcma_drv_cc *cc) | 59 | static inline int bcma_sflash_init(struct bcma_drv_cc *cc) |
59 | { | 60 | { |
@@ -65,6 +66,7 @@ static inline int bcma_sflash_init(struct bcma_drv_cc *cc) | |||
65 | #ifdef CONFIG_BCMA_NFLASH | 66 | #ifdef CONFIG_BCMA_NFLASH |
66 | /* driver_chipcommon_nflash.c */ | 67 | /* driver_chipcommon_nflash.c */ |
67 | int bcma_nflash_init(struct bcma_drv_cc *cc); | 68 | int bcma_nflash_init(struct bcma_drv_cc *cc); |
69 | extern struct platform_device bcma_nflash_dev; | ||
68 | #else | 70 | #else |
69 | static inline int bcma_nflash_init(struct bcma_drv_cc *cc) | 71 | static inline int bcma_nflash_init(struct bcma_drv_cc *cc) |
70 | { | 72 | { |
diff --git a/drivers/bcma/core.c b/drivers/bcma/core.c index 63c8b470536f..03bbe104338f 100644 --- a/drivers/bcma/core.c +++ b/drivers/bcma/core.c | |||
@@ -65,7 +65,7 @@ void bcma_core_set_clockmode(struct bcma_device *core, | |||
65 | switch (clkmode) { | 65 | switch (clkmode) { |
66 | case BCMA_CLKMODE_FAST: | 66 | case BCMA_CLKMODE_FAST: |
67 | bcma_set32(core, BCMA_CLKCTLST, BCMA_CLKCTLST_FORCEHT); | 67 | bcma_set32(core, BCMA_CLKCTLST, BCMA_CLKCTLST_FORCEHT); |
68 | udelay(64); | 68 | usleep_range(64, 300); |
69 | for (i = 0; i < 1500; i++) { | 69 | for (i = 0; i < 1500; i++) { |
70 | if (bcma_read32(core, BCMA_CLKCTLST) & | 70 | if (bcma_read32(core, BCMA_CLKCTLST) & |
71 | BCMA_CLKCTLST_HAVEHT) { | 71 | BCMA_CLKCTLST_HAVEHT) { |
diff --git a/drivers/bcma/driver_chipcommon_nflash.c b/drivers/bcma/driver_chipcommon_nflash.c index 574d62435bc2..9042781edec3 100644 --- a/drivers/bcma/driver_chipcommon_nflash.c +++ b/drivers/bcma/driver_chipcommon_nflash.c | |||
@@ -5,15 +5,37 @@ | |||
5 | * Licensed under the GNU/GPL. See COPYING for details. | 5 | * Licensed under the GNU/GPL. See COPYING for details. |
6 | */ | 6 | */ |
7 | 7 | ||
8 | #include <linux/platform_device.h> | ||
8 | #include <linux/bcma/bcma.h> | 9 | #include <linux/bcma/bcma.h> |
9 | #include <linux/bcma/bcma_driver_chipcommon.h> | ||
10 | #include <linux/delay.h> | ||
11 | 10 | ||
12 | #include "bcma_private.h" | 11 | #include "bcma_private.h" |
13 | 12 | ||
13 | struct platform_device bcma_nflash_dev = { | ||
14 | .name = "bcma_nflash", | ||
15 | .num_resources = 0, | ||
16 | }; | ||
17 | |||
14 | /* Initialize NAND flash access */ | 18 | /* Initialize NAND flash access */ |
15 | int bcma_nflash_init(struct bcma_drv_cc *cc) | 19 | int bcma_nflash_init(struct bcma_drv_cc *cc) |
16 | { | 20 | { |
17 | bcma_err(cc->core->bus, "NAND flash support is broken\n"); | 21 | struct bcma_bus *bus = cc->core->bus; |
22 | |||
23 | if (bus->chipinfo.id != BCMA_CHIP_ID_BCM4706 && | ||
24 | cc->core->id.rev != 0x38) { | ||
25 | bcma_err(bus, "NAND flash on unsupported board!\n"); | ||
26 | return -ENOTSUPP; | ||
27 | } | ||
28 | |||
29 | if (!(cc->capabilities & BCMA_CC_CAP_NFLASH)) { | ||
30 | bcma_err(bus, "NAND flash not present according to ChipCommon\n"); | ||
31 | return -ENODEV; | ||
32 | } | ||
33 | |||
34 | cc->nflash.present = true; | ||
35 | |||
36 | /* Prepare platform device, but don't register it yet. It's too early, | ||
37 | * malloc (required by device_private_init) is not available yet. */ | ||
38 | bcma_nflash_dev.dev.platform_data = &cc->nflash; | ||
39 | |||
18 | return 0; | 40 | return 0; |
19 | } | 41 | } |
diff --git a/drivers/bcma/driver_chipcommon_pmu.c b/drivers/bcma/driver_chipcommon_pmu.c index c9a4f46c5143..201faf106b3f 100644 --- a/drivers/bcma/driver_chipcommon_pmu.c +++ b/drivers/bcma/driver_chipcommon_pmu.c | |||
@@ -76,7 +76,10 @@ static void bcma_pmu_resources_init(struct bcma_drv_cc *cc) | |||
76 | if (max_msk) | 76 | if (max_msk) |
77 | bcma_cc_write32(cc, BCMA_CC_PMU_MAXRES_MSK, max_msk); | 77 | bcma_cc_write32(cc, BCMA_CC_PMU_MAXRES_MSK, max_msk); |
78 | 78 | ||
79 | /* Add some delay; allow resources to come up and settle. */ | 79 | /* |
80 | * Add some delay; allow resources to come up and settle. | ||
81 | * Delay is required for SoC (early init). | ||
82 | */ | ||
80 | mdelay(2); | 83 | mdelay(2); |
81 | } | 84 | } |
82 | 85 | ||
@@ -101,7 +104,7 @@ void bcma_chipco_bcm4331_ext_pa_lines_ctl(struct bcma_drv_cc *cc, bool enable) | |||
101 | bcma_cc_write32(cc, BCMA_CC_CHIPCTL, val); | 104 | bcma_cc_write32(cc, BCMA_CC_CHIPCTL, val); |
102 | } | 105 | } |
103 | 106 | ||
104 | void bcma_pmu_workarounds(struct bcma_drv_cc *cc) | 107 | static void bcma_pmu_workarounds(struct bcma_drv_cc *cc) |
105 | { | 108 | { |
106 | struct bcma_bus *bus = cc->core->bus; | 109 | struct bcma_bus *bus = cc->core->bus; |
107 | 110 | ||
@@ -257,7 +260,7 @@ static u32 bcma_pmu_clock_bcm4706(struct bcma_drv_cc *cc, u32 pll0, u32 m) | |||
257 | } | 260 | } |
258 | 261 | ||
259 | /* query bus clock frequency for PMU-enabled chipcommon */ | 262 | /* query bus clock frequency for PMU-enabled chipcommon */ |
260 | u32 bcma_pmu_get_clockcontrol(struct bcma_drv_cc *cc) | 263 | static u32 bcma_pmu_get_clockcontrol(struct bcma_drv_cc *cc) |
261 | { | 264 | { |
262 | struct bcma_bus *bus = cc->core->bus; | 265 | struct bcma_bus *bus = cc->core->bus; |
263 | 266 | ||
diff --git a/drivers/bcma/driver_chipcommon_sflash.c b/drivers/bcma/driver_chipcommon_sflash.c index 6e157a58a1d7..2c4eec2ca5a0 100644 --- a/drivers/bcma/driver_chipcommon_sflash.c +++ b/drivers/bcma/driver_chipcommon_sflash.c | |||
@@ -5,15 +5,132 @@ | |||
5 | * Licensed under the GNU/GPL. See COPYING for details. | 5 | * Licensed under the GNU/GPL. See COPYING for details. |
6 | */ | 6 | */ |
7 | 7 | ||
8 | #include <linux/platform_device.h> | ||
8 | #include <linux/bcma/bcma.h> | 9 | #include <linux/bcma/bcma.h> |
9 | #include <linux/bcma/bcma_driver_chipcommon.h> | ||
10 | #include <linux/delay.h> | ||
11 | 10 | ||
12 | #include "bcma_private.h" | 11 | #include "bcma_private.h" |
13 | 12 | ||
13 | static struct resource bcma_sflash_resource = { | ||
14 | .name = "bcma_sflash", | ||
15 | .start = BCMA_SFLASH, | ||
16 | .end = 0, | ||
17 | .flags = IORESOURCE_MEM | IORESOURCE_READONLY, | ||
18 | }; | ||
19 | |||
20 | struct platform_device bcma_sflash_dev = { | ||
21 | .name = "bcma_sflash", | ||
22 | .resource = &bcma_sflash_resource, | ||
23 | .num_resources = 1, | ||
24 | }; | ||
25 | |||
26 | struct bcma_sflash_tbl_e { | ||
27 | char *name; | ||
28 | u32 id; | ||
29 | u32 blocksize; | ||
30 | u16 numblocks; | ||
31 | }; | ||
32 | |||
33 | static struct bcma_sflash_tbl_e bcma_sflash_st_tbl[] = { | ||
34 | { "", 0x14, 0x10000, 32, }, | ||
35 | { 0 }, | ||
36 | }; | ||
37 | |||
38 | static struct bcma_sflash_tbl_e bcma_sflash_sst_tbl[] = { | ||
39 | { 0 }, | ||
40 | }; | ||
41 | |||
42 | static struct bcma_sflash_tbl_e bcma_sflash_at_tbl[] = { | ||
43 | { 0 }, | ||
44 | }; | ||
45 | |||
46 | static void bcma_sflash_cmd(struct bcma_drv_cc *cc, u32 opcode) | ||
47 | { | ||
48 | int i; | ||
49 | bcma_cc_write32(cc, BCMA_CC_FLASHCTL, | ||
50 | BCMA_CC_FLASHCTL_START | opcode); | ||
51 | for (i = 0; i < 1000; i++) { | ||
52 | if (!(bcma_cc_read32(cc, BCMA_CC_FLASHCTL) & | ||
53 | BCMA_CC_FLASHCTL_BUSY)) | ||
54 | return; | ||
55 | cpu_relax(); | ||
56 | } | ||
57 | bcma_err(cc->core->bus, "SFLASH control command failed (timeout)!\n"); | ||
58 | } | ||
59 | |||
14 | /* Initialize serial flash access */ | 60 | /* Initialize serial flash access */ |
15 | int bcma_sflash_init(struct bcma_drv_cc *cc) | 61 | int bcma_sflash_init(struct bcma_drv_cc *cc) |
16 | { | 62 | { |
17 | bcma_err(cc->core->bus, "Serial flash support is broken\n"); | 63 | struct bcma_bus *bus = cc->core->bus; |
64 | struct bcma_sflash *sflash = &cc->sflash; | ||
65 | struct bcma_sflash_tbl_e *e; | ||
66 | u32 id, id2; | ||
67 | |||
68 | switch (cc->capabilities & BCMA_CC_CAP_FLASHT) { | ||
69 | case BCMA_CC_FLASHT_STSER: | ||
70 | bcma_sflash_cmd(cc, BCMA_CC_FLASHCTL_ST_DP); | ||
71 | |||
72 | bcma_cc_write32(cc, BCMA_CC_FLASHADDR, 0); | ||
73 | bcma_sflash_cmd(cc, BCMA_CC_FLASHCTL_ST_RES); | ||
74 | id = bcma_cc_read32(cc, BCMA_CC_FLASHDATA); | ||
75 | |||
76 | bcma_cc_write32(cc, BCMA_CC_FLASHADDR, 1); | ||
77 | bcma_sflash_cmd(cc, BCMA_CC_FLASHCTL_ST_RES); | ||
78 | id2 = bcma_cc_read32(cc, BCMA_CC_FLASHDATA); | ||
79 | |||
80 | switch (id) { | ||
81 | case 0xbf: | ||
82 | for (e = bcma_sflash_sst_tbl; e->name; e++) { | ||
83 | if (e->id == id2) | ||
84 | break; | ||
85 | } | ||
86 | break; | ||
87 | default: | ||
88 | for (e = bcma_sflash_st_tbl; e->name; e++) { | ||
89 | if (e->id == id) | ||
90 | break; | ||
91 | } | ||
92 | break; | ||
93 | } | ||
94 | if (!e->name) { | ||
95 | bcma_err(bus, "Unsupported ST serial flash (id: 0x%X, id2: 0x%X)\n", id, id2); | ||
96 | return -ENOTSUPP; | ||
97 | } | ||
98 | |||
99 | break; | ||
100 | case BCMA_CC_FLASHT_ATSER: | ||
101 | bcma_sflash_cmd(cc, BCMA_CC_FLASHCTL_AT_STATUS); | ||
102 | id = bcma_cc_read32(cc, BCMA_CC_FLASHDATA) & 0x3c; | ||
103 | |||
104 | for (e = bcma_sflash_at_tbl; e->name; e++) { | ||
105 | if (e->id == id) | ||
106 | break; | ||
107 | } | ||
108 | if (!e->name) { | ||
109 | bcma_err(bus, "Unsupported Atmel serial flash (id: 0x%X)\n", id); | ||
110 | return -ENOTSUPP; | ||
111 | } | ||
112 | |||
113 | break; | ||
114 | default: | ||
115 | bcma_err(bus, "Unsupported flash type\n"); | ||
116 | return -ENOTSUPP; | ||
117 | } | ||
118 | |||
119 | sflash->window = BCMA_SFLASH; | ||
120 | sflash->blocksize = e->blocksize; | ||
121 | sflash->numblocks = e->numblocks; | ||
122 | sflash->size = sflash->blocksize * sflash->numblocks; | ||
123 | sflash->present = true; | ||
124 | |||
125 | bcma_info(bus, "Found %s serial flash (size: %dKiB, blocksize: 0x%X, blocks: %d)\n", | ||
126 | e->name, sflash->size / 1024, sflash->blocksize, | ||
127 | sflash->numblocks); | ||
128 | |||
129 | /* Prepare platform device, but don't register it yet. It's too early, | ||
130 | * malloc (required by device_private_init) is not available yet. */ | ||
131 | bcma_sflash_dev.resource[0].end = bcma_sflash_dev.resource[0].start + | ||
132 | sflash->size; | ||
133 | bcma_sflash_dev.dev.platform_data = sflash; | ||
134 | |||
18 | return 0; | 135 | return 0; |
19 | } | 136 | } |
diff --git a/drivers/bcma/driver_pci.c b/drivers/bcma/driver_pci.c index c32ebd537abe..c39ee6d45850 100644 --- a/drivers/bcma/driver_pci.c +++ b/drivers/bcma/driver_pci.c | |||
@@ -51,7 +51,7 @@ static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u8 phy) | |||
51 | v = pcicore_read32(pc, BCMA_CORE_PCI_MDIO_CONTROL); | 51 | v = pcicore_read32(pc, BCMA_CORE_PCI_MDIO_CONTROL); |
52 | if (v & BCMA_CORE_PCI_MDIOCTL_ACCESS_DONE) | 52 | if (v & BCMA_CORE_PCI_MDIOCTL_ACCESS_DONE) |
53 | break; | 53 | break; |
54 | msleep(1); | 54 | usleep_range(1000, 2000); |
55 | } | 55 | } |
56 | } | 56 | } |
57 | 57 | ||
@@ -92,7 +92,7 @@ static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u8 device, u8 address) | |||
92 | ret = pcicore_read32(pc, BCMA_CORE_PCI_MDIO_DATA); | 92 | ret = pcicore_read32(pc, BCMA_CORE_PCI_MDIO_DATA); |
93 | break; | 93 | break; |
94 | } | 94 | } |
95 | msleep(1); | 95 | usleep_range(1000, 2000); |
96 | } | 96 | } |
97 | pcicore_write32(pc, BCMA_CORE_PCI_MDIO_CONTROL, 0); | 97 | pcicore_write32(pc, BCMA_CORE_PCI_MDIO_CONTROL, 0); |
98 | return ret; | 98 | return ret; |
@@ -132,7 +132,7 @@ static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u8 device, | |||
132 | v = pcicore_read32(pc, BCMA_CORE_PCI_MDIO_CONTROL); | 132 | v = pcicore_read32(pc, BCMA_CORE_PCI_MDIO_CONTROL); |
133 | if (v & BCMA_CORE_PCI_MDIOCTL_ACCESS_DONE) | 133 | if (v & BCMA_CORE_PCI_MDIOCTL_ACCESS_DONE) |
134 | break; | 134 | break; |
135 | msleep(1); | 135 | usleep_range(1000, 2000); |
136 | } | 136 | } |
137 | pcicore_write32(pc, BCMA_CORE_PCI_MDIO_CONTROL, 0); | 137 | pcicore_write32(pc, BCMA_CORE_PCI_MDIO_CONTROL, 0); |
138 | } | 138 | } |
diff --git a/drivers/bcma/driver_pci_host.c b/drivers/bcma/driver_pci_host.c index cbae2c231336..9baf886e82df 100644 --- a/drivers/bcma/driver_pci_host.c +++ b/drivers/bcma/driver_pci_host.c | |||
@@ -425,9 +425,9 @@ void __devinit bcma_core_pci_hostmode_init(struct bcma_drv_pci *pc) | |||
425 | pc_host->io_resource.flags = IORESOURCE_IO | IORESOURCE_PCI_FIXED; | 425 | pc_host->io_resource.flags = IORESOURCE_IO | IORESOURCE_PCI_FIXED; |
426 | 426 | ||
427 | /* Reset RC */ | 427 | /* Reset RC */ |
428 | udelay(3000); | 428 | usleep_range(3000, 5000); |
429 | pcicore_write32(pc, BCMA_CORE_PCI_CTL, BCMA_CORE_PCI_CTL_RST_OE); | 429 | pcicore_write32(pc, BCMA_CORE_PCI_CTL, BCMA_CORE_PCI_CTL_RST_OE); |
430 | udelay(1000); | 430 | usleep_range(1000, 2000); |
431 | pcicore_write32(pc, BCMA_CORE_PCI_CTL, BCMA_CORE_PCI_CTL_RST | | 431 | pcicore_write32(pc, BCMA_CORE_PCI_CTL, BCMA_CORE_PCI_CTL_RST | |
432 | BCMA_CORE_PCI_CTL_RST_OE); | 432 | BCMA_CORE_PCI_CTL_RST_OE); |
433 | 433 | ||
@@ -481,7 +481,7 @@ void __devinit bcma_core_pci_hostmode_init(struct bcma_drv_pci *pc) | |||
481 | * before issuing configuration requests to PCI Express | 481 | * before issuing configuration requests to PCI Express |
482 | * devices. | 482 | * devices. |
483 | */ | 483 | */ |
484 | udelay(100000); | 484 | msleep(100); |
485 | 485 | ||
486 | bcma_core_pci_enable_crs(pc); | 486 | bcma_core_pci_enable_crs(pc); |
487 | 487 | ||
@@ -501,7 +501,7 @@ void __devinit bcma_core_pci_hostmode_init(struct bcma_drv_pci *pc) | |||
501 | set_io_port_base(pc_host->pci_controller.io_map_base); | 501 | set_io_port_base(pc_host->pci_controller.io_map_base); |
502 | /* Give some time to the PCI controller to configure itself with the new | 502 | /* Give some time to the PCI controller to configure itself with the new |
503 | * values. Not waiting at this point causes crashes of the machine. */ | 503 | * values. Not waiting at this point causes crashes of the machine. */ |
504 | mdelay(10); | 504 | usleep_range(10000, 15000); |
505 | register_pci_controller(&pc_host->pci_controller); | 505 | register_pci_controller(&pc_host->pci_controller); |
506 | return; | 506 | return; |
507 | } | 507 | } |
diff --git a/drivers/bcma/host_pci.c b/drivers/bcma/host_pci.c index a6e5672c67e7..b6b4b5ebd4c2 100644 --- a/drivers/bcma/host_pci.c +++ b/drivers/bcma/host_pci.c | |||
@@ -77,8 +77,8 @@ static void bcma_host_pci_write32(struct bcma_device *core, u16 offset, | |||
77 | } | 77 | } |
78 | 78 | ||
79 | #ifdef CONFIG_BCMA_BLOCKIO | 79 | #ifdef CONFIG_BCMA_BLOCKIO |
80 | void bcma_host_pci_block_read(struct bcma_device *core, void *buffer, | 80 | static void bcma_host_pci_block_read(struct bcma_device *core, void *buffer, |
81 | size_t count, u16 offset, u8 reg_width) | 81 | size_t count, u16 offset, u8 reg_width) |
82 | { | 82 | { |
83 | void __iomem *addr = core->bus->mmio + offset; | 83 | void __iomem *addr = core->bus->mmio + offset; |
84 | if (core->bus->mapped_core != core) | 84 | if (core->bus->mapped_core != core) |
@@ -100,8 +100,9 @@ void bcma_host_pci_block_read(struct bcma_device *core, void *buffer, | |||
100 | } | 100 | } |
101 | } | 101 | } |
102 | 102 | ||
103 | void bcma_host_pci_block_write(struct bcma_device *core, const void *buffer, | 103 | static void bcma_host_pci_block_write(struct bcma_device *core, |
104 | size_t count, u16 offset, u8 reg_width) | 104 | const void *buffer, size_t count, |
105 | u16 offset, u8 reg_width) | ||
105 | { | 106 | { |
106 | void __iomem *addr = core->bus->mmio + offset; | 107 | void __iomem *addr = core->bus->mmio + offset; |
107 | if (core->bus->mapped_core != core) | 108 | if (core->bus->mapped_core != core) |
@@ -139,7 +140,7 @@ static void bcma_host_pci_awrite32(struct bcma_device *core, u16 offset, | |||
139 | iowrite32(value, core->bus->mmio + (1 * BCMA_CORE_SIZE) + offset); | 140 | iowrite32(value, core->bus->mmio + (1 * BCMA_CORE_SIZE) + offset); |
140 | } | 141 | } |
141 | 142 | ||
142 | const struct bcma_host_ops bcma_host_pci_ops = { | 143 | static const struct bcma_host_ops bcma_host_pci_ops = { |
143 | .read8 = bcma_host_pci_read8, | 144 | .read8 = bcma_host_pci_read8, |
144 | .read16 = bcma_host_pci_read16, | 145 | .read16 = bcma_host_pci_read16, |
145 | .read32 = bcma_host_pci_read32, | 146 | .read32 = bcma_host_pci_read32, |
@@ -272,6 +273,7 @@ static DEFINE_PCI_DEVICE_TABLE(bcma_pci_bridge_tbl) = { | |||
272 | { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4331) }, | 273 | { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4331) }, |
273 | { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4353) }, | 274 | { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4353) }, |
274 | { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4357) }, | 275 | { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4357) }, |
276 | { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4358) }, | ||
275 | { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4359) }, | 277 | { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4359) }, |
276 | { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4727) }, | 278 | { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4727) }, |
277 | { 0, }, | 279 | { 0, }, |
diff --git a/drivers/bcma/host_soc.c b/drivers/bcma/host_soc.c index 3c381fb8f9c4..3475e600011a 100644 --- a/drivers/bcma/host_soc.c +++ b/drivers/bcma/host_soc.c | |||
@@ -143,7 +143,7 @@ static void bcma_host_soc_awrite32(struct bcma_device *core, u16 offset, | |||
143 | writel(value, core->io_wrap + offset); | 143 | writel(value, core->io_wrap + offset); |
144 | } | 144 | } |
145 | 145 | ||
146 | const struct bcma_host_ops bcma_host_soc_ops = { | 146 | static const struct bcma_host_ops bcma_host_soc_ops = { |
147 | .read8 = bcma_host_soc_read8, | 147 | .read8 = bcma_host_soc_read8, |
148 | .read16 = bcma_host_soc_read16, | 148 | .read16 = bcma_host_soc_read16, |
149 | .read32 = bcma_host_soc_read32, | 149 | .read32 = bcma_host_soc_read32, |
diff --git a/drivers/bcma/main.c b/drivers/bcma/main.c index 758af9ccdef0..432aeeedfd5e 100644 --- a/drivers/bcma/main.c +++ b/drivers/bcma/main.c | |||
@@ -7,6 +7,7 @@ | |||
7 | 7 | ||
8 | #include "bcma_private.h" | 8 | #include "bcma_private.h" |
9 | #include <linux/module.h> | 9 | #include <linux/module.h> |
10 | #include <linux/platform_device.h> | ||
10 | #include <linux/bcma/bcma.h> | 11 | #include <linux/bcma/bcma.h> |
11 | #include <linux/slab.h> | 12 | #include <linux/slab.h> |
12 | 13 | ||
@@ -136,6 +137,22 @@ static int bcma_register_cores(struct bcma_bus *bus) | |||
136 | dev_id++; | 137 | dev_id++; |
137 | } | 138 | } |
138 | 139 | ||
140 | #ifdef CONFIG_BCMA_SFLASH | ||
141 | if (bus->drv_cc.sflash.present) { | ||
142 | err = platform_device_register(&bcma_sflash_dev); | ||
143 | if (err) | ||
144 | bcma_err(bus, "Error registering serial flash\n"); | ||
145 | } | ||
146 | #endif | ||
147 | |||
148 | #ifdef CONFIG_BCMA_NFLASH | ||
149 | if (bus->drv_cc.nflash.present) { | ||
150 | err = platform_device_register(&bcma_nflash_dev); | ||
151 | if (err) | ||
152 | bcma_err(bus, "Error registering NAND flash\n"); | ||
153 | } | ||
154 | #endif | ||
155 | |||
139 | return 0; | 156 | return 0; |
140 | } | 157 | } |
141 | 158 | ||
@@ -210,7 +227,17 @@ int __devinit bcma_bus_register(struct bcma_bus *bus) | |||
210 | 227 | ||
211 | void bcma_bus_unregister(struct bcma_bus *bus) | 228 | void bcma_bus_unregister(struct bcma_bus *bus) |
212 | { | 229 | { |
230 | struct bcma_device *cores[3]; | ||
231 | |||
232 | cores[0] = bcma_find_core(bus, BCMA_CORE_MIPS_74K); | ||
233 | cores[1] = bcma_find_core(bus, BCMA_CORE_PCIE); | ||
234 | cores[2] = bcma_find_core(bus, BCMA_CORE_4706_MAC_GBIT_COMMON); | ||
235 | |||
213 | bcma_unregister_cores(bus); | 236 | bcma_unregister_cores(bus); |
237 | |||
238 | kfree(cores[2]); | ||
239 | kfree(cores[1]); | ||
240 | kfree(cores[0]); | ||
214 | } | 241 | } |
215 | 242 | ||
216 | int __init bcma_bus_early_register(struct bcma_bus *bus, | 243 | int __init bcma_bus_early_register(struct bcma_bus *bus, |
diff --git a/drivers/bcma/sprom.c b/drivers/bcma/sprom.c index 9ea4627dc0c2..0d546b64be34 100644 --- a/drivers/bcma/sprom.c +++ b/drivers/bcma/sprom.c | |||
@@ -507,7 +507,9 @@ static bool bcma_sprom_onchip_available(struct bcma_bus *bus) | |||
507 | /* for these chips OTP is always available */ | 507 | /* for these chips OTP is always available */ |
508 | present = true; | 508 | present = true; |
509 | break; | 509 | break; |
510 | case BCMA_CHIP_ID_BCM43227: | ||
510 | case BCMA_CHIP_ID_BCM43228: | 511 | case BCMA_CHIP_ID_BCM43228: |
512 | case BCMA_CHIP_ID_BCM43428: | ||
511 | present = chip_status & BCMA_CC_CHIPST_43228_OTP_PRESENT; | 513 | present = chip_status & BCMA_CC_CHIPST_43228_OTP_PRESENT; |
512 | break; | 514 | break; |
513 | default: | 515 | default: |