diff options
Diffstat (limited to 'drivers/atm')
-rw-r--r-- | drivers/atm/Kconfig | 2 | ||||
-rw-r--r-- | drivers/atm/iphase.c | 23 |
2 files changed, 11 insertions, 14 deletions
diff --git a/drivers/atm/Kconfig b/drivers/atm/Kconfig index b554edac1ced..1c7ae30af15e 100644 --- a/drivers/atm/Kconfig +++ b/drivers/atm/Kconfig | |||
@@ -294,7 +294,7 @@ config ATM_HORIZON_DEBUG | |||
294 | 294 | ||
295 | config ATM_IA | 295 | config ATM_IA |
296 | tristate "Interphase ATM PCI x575/x525/x531" | 296 | tristate "Interphase ATM PCI x575/x525/x531" |
297 | depends on PCI && !64BIT | 297 | depends on PCI |
298 | ---help--- | 298 | ---help--- |
299 | This is a driver for the Interphase (i)ChipSAR adapter cards | 299 | This is a driver for the Interphase (i)ChipSAR adapter cards |
300 | which include a variety of variants in term of the size of the | 300 | which include a variety of variants in term of the size of the |
diff --git a/drivers/atm/iphase.c b/drivers/atm/iphase.c index 14e4638759a6..24df73ad326d 100644 --- a/drivers/atm/iphase.c +++ b/drivers/atm/iphase.c | |||
@@ -89,10 +89,6 @@ module_param(IADebugFlag, uint, 0644); | |||
89 | 89 | ||
90 | MODULE_LICENSE("GPL"); | 90 | MODULE_LICENSE("GPL"); |
91 | 91 | ||
92 | #if BITS_PER_LONG != 32 | ||
93 | # error FIXME: this driver only works on 32-bit platforms | ||
94 | #endif | ||
95 | |||
96 | /**************************** IA_LIB **********************************/ | 92 | /**************************** IA_LIB **********************************/ |
97 | 93 | ||
98 | static void ia_init_rtn_q (IARTN_Q *que) | 94 | static void ia_init_rtn_q (IARTN_Q *que) |
@@ -1406,7 +1402,6 @@ static int rx_init(struct atm_dev *dev) | |||
1406 | struct abr_vc_table *abr_vc_table; | 1402 | struct abr_vc_table *abr_vc_table; |
1407 | u16 *vc_table; | 1403 | u16 *vc_table; |
1408 | u16 *reass_table; | 1404 | u16 *reass_table; |
1409 | u16 *ptr16; | ||
1410 | int i,j, vcsize_sel; | 1405 | int i,j, vcsize_sel; |
1411 | u_short freeq_st_adr; | 1406 | u_short freeq_st_adr; |
1412 | u_short *freeq_start; | 1407 | u_short *freeq_start; |
@@ -1421,14 +1416,15 @@ static int rx_init(struct atm_dev *dev) | |||
1421 | printk(KERN_ERR DEV_LABEL "can't allocate DLEs\n"); | 1416 | printk(KERN_ERR DEV_LABEL "can't allocate DLEs\n"); |
1422 | goto err_out; | 1417 | goto err_out; |
1423 | } | 1418 | } |
1424 | iadev->rx_dle_q.start = (struct dle*)dle_addr; | 1419 | iadev->rx_dle_q.start = (struct dle *)dle_addr; |
1425 | iadev->rx_dle_q.read = iadev->rx_dle_q.start; | 1420 | iadev->rx_dle_q.read = iadev->rx_dle_q.start; |
1426 | iadev->rx_dle_q.write = iadev->rx_dle_q.start; | 1421 | iadev->rx_dle_q.write = iadev->rx_dle_q.start; |
1427 | iadev->rx_dle_q.end = (struct dle*)((u32)dle_addr+sizeof(struct dle)*DLE_ENTRIES); | 1422 | iadev->rx_dle_q.end = (struct dle*)((unsigned long)dle_addr+sizeof(struct dle)*DLE_ENTRIES); |
1428 | /* the end of the dle q points to the entry after the last | 1423 | /* the end of the dle q points to the entry after the last |
1429 | DLE that can be used. */ | 1424 | DLE that can be used. */ |
1430 | 1425 | ||
1431 | /* write the upper 20 bits of the start address to rx list address register */ | 1426 | /* write the upper 20 bits of the start address to rx list address register */ |
1427 | /* We know this is 32bit bus addressed so the following is safe */ | ||
1432 | writel(iadev->rx_dle_dma & 0xfffff000, | 1428 | writel(iadev->rx_dle_dma & 0xfffff000, |
1433 | iadev->dma + IPHASE5575_RX_LIST_ADDR); | 1429 | iadev->dma + IPHASE5575_RX_LIST_ADDR); |
1434 | IF_INIT(printk("Tx Dle list addr: 0x%08x value: 0x%0x\n", | 1430 | IF_INIT(printk("Tx Dle list addr: 0x%08x value: 0x%0x\n", |
@@ -1582,11 +1578,12 @@ static int rx_init(struct atm_dev *dev) | |||
1582 | Set Packet Aging Interval count register to overflow in about 4 us | 1578 | Set Packet Aging Interval count register to overflow in about 4 us |
1583 | */ | 1579 | */ |
1584 | writew(0xF6F8, iadev->reass_reg+PKT_TM_CNT ); | 1580 | writew(0xF6F8, iadev->reass_reg+PKT_TM_CNT ); |
1585 | ptr16 = (u16*)j; | 1581 | |
1586 | i = ((u32)ptr16 >> 6) & 0xff; | 1582 | i = (j >> 6) & 0xFF; |
1587 | ptr16 += j - 1; | 1583 | j += 2 * (j - 1); |
1588 | i |=(((u32)ptr16 << 2) & 0xff00); | 1584 | i |= ((j << 2) & 0xFF00); |
1589 | writew(i, iadev->reass_reg+TMOUT_RANGE); | 1585 | writew(i, iadev->reass_reg+TMOUT_RANGE); |
1586 | |||
1590 | /* initiate the desc_tble */ | 1587 | /* initiate the desc_tble */ |
1591 | for(i=0; i<iadev->num_tx_desc;i++) | 1588 | for(i=0; i<iadev->num_tx_desc;i++) |
1592 | iadev->desc_tbl[i].timestamp = 0; | 1589 | iadev->desc_tbl[i].timestamp = 0; |
@@ -1909,7 +1906,7 @@ static int tx_init(struct atm_dev *dev) | |||
1909 | iadev->tx_dle_q.start = (struct dle*)dle_addr; | 1906 | iadev->tx_dle_q.start = (struct dle*)dle_addr; |
1910 | iadev->tx_dle_q.read = iadev->tx_dle_q.start; | 1907 | iadev->tx_dle_q.read = iadev->tx_dle_q.start; |
1911 | iadev->tx_dle_q.write = iadev->tx_dle_q.start; | 1908 | iadev->tx_dle_q.write = iadev->tx_dle_q.start; |
1912 | iadev->tx_dle_q.end = (struct dle*)((u32)dle_addr+sizeof(struct dle)*DLE_ENTRIES); | 1909 | iadev->tx_dle_q.end = (struct dle*)((unsigned long)dle_addr+sizeof(struct dle)*DLE_ENTRIES); |
1913 | 1910 | ||
1914 | /* write the upper 20 bits of the start address to tx list address register */ | 1911 | /* write the upper 20 bits of the start address to tx list address register */ |
1915 | writel(iadev->tx_dle_dma & 0xfffff000, | 1912 | writel(iadev->tx_dle_dma & 0xfffff000, |
@@ -2902,7 +2899,7 @@ static int ia_pkt_tx (struct atm_vcc *vcc, struct sk_buff *skb) { | |||
2902 | dev_kfree_skb_any(skb); | 2899 | dev_kfree_skb_any(skb); |
2903 | return 0; | 2900 | return 0; |
2904 | } | 2901 | } |
2905 | if ((u32)skb->data & 3) { | 2902 | if ((unsigned long)skb->data & 3) { |
2906 | printk("Misaligned SKB\n"); | 2903 | printk("Misaligned SKB\n"); |
2907 | if (vcc->pop) | 2904 | if (vcc->pop) |
2908 | vcc->pop(vcc, skb); | 2905 | vcc->pop(vcc, skb); |