9 files changed, 89 insertions, 32 deletions

diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
index ae8494944c45..11c8c19f0fb7 100644
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -448,8 +448,10 @@ config PATA_MARVELL
         tristate "Marvell PATA support via legacy mode"
         depends on PCI
         help
-          This option enables limited support for the Marvell 88SE6145 ATA
-          controller.
+          This option enables limited support for the Marvell 88SE61xx ATA
+          controllers. If you wish to use only the SATA ports then select
+          the AHCI driver alone. If you wish to the use the PATA port or
+          both SATA and PATA include this driver.
 
           If unsure, say N.
 
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index c729e6988bbb..2e1a7cb2ed5f 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -420,7 +420,7 @@ static const struct ata_port_info ahci_port_info[] = {
         /* board_ahci_mv */
         {
                 AHCI_HFLAGS     (AHCI_HFLAG_NO_NCQ | AHCI_HFLAG_NO_MSI |
-                                 AHCI_HFLAG_MV_PATA),
+                                 AHCI_HFLAG_MV_PATA | AHCI_HFLAG_NO_PMP),
                 .flags          = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
                                   ATA_FLAG_MMIO | ATA_FLAG_PIO_DMA,
                 .pio_mask       = 0x1f, /* pio0-4 */
@@ -487,7 +487,9 @@ static const struct pci_device_id ahci_pci_tbl[] = {
         { PCI_VDEVICE(INTEL, 0x3a05), board_ahci }, /* ICH10 */
         { PCI_VDEVICE(INTEL, 0x3a25), board_ahci }, /* ICH10 */
         { PCI_VDEVICE(INTEL, 0x3b24), board_ahci }, /* PCH RAID */
+        { PCI_VDEVICE(INTEL, 0x3b25), board_ahci }, /* PCH RAID */
         { PCI_VDEVICE(INTEL, 0x3b2b), board_ahci }, /* PCH RAID */
+        { PCI_VDEVICE(INTEL, 0x3b2c), board_ahci }, /* PCH RAID */
 
         /* JMicron 360/1/3/5/6, match class to avoid IDE function */
         { PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
@@ -610,6 +612,15 @@ module_param(ahci_em_messages, int, 0444);
 MODULE_PARM_DESC(ahci_em_messages,
         "Set AHCI Enclosure Management Message type (0 = disabled, 1 = LED");
 
+#if defined(CONFIG_PATA_MARVELL) || defined(CONFIG_PATA_MARVELL_MODULE)
+static int marvell_enable;
+#else
+static int marvell_enable = 1;
+#endif
+module_param(marvell_enable, int, 0644);
+MODULE_PARM_DESC(marvell_enable, "Marvell SATA via AHCI (1 = enabled)");
+
+
 static inline int ahci_nr_ports(u32 cap)
 {
         return (cap & 0x1f) + 1;
@@ -732,6 +743,8 @@ static void ahci_save_initial_config(struct pci_dev *pdev,
                            "MV_AHCI HACK: port_map %x -> %x\n",
                            port_map,
                            port_map & mv);
+                dev_printk(KERN_ERR, &pdev->dev,
+                          "Disabling your PATA port. Use the boot option 'ahci.marvell_enable=0' to avoid this.\n");
 
                 port_map &= mv;
         }
@@ -2533,6 +2546,12 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
         if (!printed_version++)
                 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
 
+        /* The AHCI driver can only drive the SATA ports, the PATA driver
+           can drive them all so if both drivers are selected make sure
+           AHCI stays out of the way */
+        if (pdev->vendor == PCI_VENDOR_ID_MARVELL && !marvell_enable)
+                return -ENODEV;
+
         /* acquire resources */
         rc = pcim_enable_device(pdev);
         if (rc)
diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c
index b1d08a8f5003..e6b4606e36b6 100644
--- a/drivers/ata/ata_piix.c
+++ b/drivers/ata/ata_piix.c
@@ -1499,7 +1499,7 @@ static int __devinit piix_init_one(struct pci_dev *pdev,
          * off.
          */
         if (pdev->vendor == PCI_VENDOR_ID_INTEL && pdev->device == 0x2652) {
-                int rc = piix_disable_ahci(pdev);
+                rc = piix_disable_ahci(pdev);
                 if (rc)
                         return rc;
         }
diff --git a/drivers/ata/libata-sff.c b/drivers/ata/libata-sff.c
index 304fdc6f1dc2..2a4c516894f0 100644
--- a/drivers/ata/libata-sff.c
+++ b/drivers/ata/libata-sff.c
@@ -1315,11 +1315,6 @@ fsm_start:
                 break;
 
         case HSM_ST_ERR:
-                /* make sure qc->err_mask is available to
-                 * know what's wrong and recover
-                 */
-                WARN_ON(!(qc->err_mask & (AC_ERR_DEV | AC_ERR_HSM)));
-
                 ap->hsm_task_state = HSM_ST_IDLE;
 
                 /* complete taskfile transaction */
diff --git a/drivers/ata/pata_marvell.c b/drivers/ata/pata_marvell.c
index 24a011b25024..0d87eec84966 100644
--- a/drivers/ata/pata_marvell.c
+++ b/drivers/ata/pata_marvell.c
@@ -20,29 +20,30 @@
 #include <linux/ata.h>
 
 #define DRV_NAME        "pata_marvell"
-#define DRV_VERSION     "0.1.4"
+#define DRV_VERSION     "0.1.6"
 
 /**
- *      marvell_pre_reset       -       check for 40/80 pin
- *      @link: link
- *      @deadline: deadline jiffies for the operation
+ *      marvell_pata_active     -       check if PATA is active
+ *      @pdev: PCI device
  *
- *      Perform the PATA port setup we need.
+ *      Returns 1 if the PATA port may be active. We know how to check this
+ *      for the 6145 but not the other devices
  */
 
-static int marvell_pre_reset(struct ata_link *link, unsigned long deadline)
+static int marvell_pata_active(struct pci_dev *pdev)
 {
-        struct ata_port *ap = link->ap;
-        struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+        int i;
         u32 devices;
         void __iomem *barp;
-        int i;
 
-        /* Check if our port is enabled */
+        /* We don't yet know how to do this for other devices */
+        if (pdev->device != 0x6145)
+                return 1;       
 
         barp = pci_iomap(pdev, 5, 0x10);
         if (barp == NULL)
                 return -ENOMEM;
+
         printk("BAR5:");
         for(i = 0; i <= 0x0F; i++)
                 printk("%02X:%02X ", i, ioread8(barp + i));
@@ -51,9 +52,27 @@ static int marvell_pre_reset(struct ata_link *link, unsigned long deadline)
         devices = ioread32(barp + 0x0C);
         pci_iounmap(pdev, barp);
 
-        if ((pdev->device == 0x6145) && (ap->port_no == 0) &&
-            (!(devices & 0x10)))        /* PATA enable ? */
-                return -ENOENT;
+        if (devices & 0x10)
+                return 1;
+        return 0;
+}
+
+/**
+ *      marvell_pre_reset       -       check for 40/80 pin
+ *      @link: link
+ *      @deadline: deadline jiffies for the operation
+ *
+ *      Perform the PATA port setup we need.
+ */
+
+static int marvell_pre_reset(struct ata_link *link, unsigned long deadline)
+{
+        struct ata_port *ap = link->ap;
+        struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+
+        if (pdev->device == 0x6145 && ap->port_no == 0 &&
+                !marvell_pata_active(pdev))     /* PATA enable ? */
+                        return -ENOENT;
 
         return ata_sff_prereset(link, deadline);
 }
@@ -128,6 +147,12 @@ static int marvell_init_one (struct pci_dev *pdev, const struct pci_device_id *i
         if (pdev->device == 0x6101)
                 ppi[1] = &ata_dummy_port_info;
 
+#if defined(CONFIG_AHCI) || defined(CONFIG_AHCI_MODULE)
+        if (!marvell_pata_active(pdev)) {
+                printk(KERN_INFO DRV_NAME ": PATA port not active, deferring to AHCI driver.\n");
+                return -ENODEV;
+        }
+#endif
         return ata_pci_sff_init_one(pdev, ppi, &marvell_sht, NULL);
 }
 
diff --git a/drivers/ata/pata_sil680.c b/drivers/ata/pata_sil680.c
index 720b8645f58a..e970b227fbce 100644
--- a/drivers/ata/pata_sil680.c
+++ b/drivers/ata/pata_sil680.c
@@ -322,9 +322,6 @@ static int __devinit sil680_init_one(struct pci_dev *pdev,
         /* Try to acquire MMIO resources and fallback to PIO if
          * that fails
          */
-        rc = pcim_enable_device(pdev);
-        if (rc)
-                return rc;
         rc = pcim_iomap_regions(pdev, 1 << SIL680_MMIO_BAR, DRV_NAME);
         if (rc)
                 goto use_ioports;
diff --git a/drivers/ata/sata_inic162x.c b/drivers/ata/sata_inic162x.c
index 3ead02fe379e..5032c32fa505 100644
--- a/drivers/ata/sata_inic162x.c
+++ b/drivers/ata/sata_inic162x.c
@@ -96,6 +96,7 @@ enum {
         PORT_SCR                = 0x20,
 
         /* HOST_CTL bits */
+        HCTL_LEDEN              = (1 << 3),  /* enable LED operation */
         HCTL_IRQOFF             = (1 << 8),  /* global IRQ off */
         HCTL_FTHD0              = (1 << 10), /* fifo threshold 0 */
         HCTL_FTHD1              = (1 << 11), /* fifo threshold 1*/
@@ -540,7 +541,7 @@ static unsigned int inic_qc_issue(struct ata_queued_cmd *qc)
         void __iomem *port_base = inic_port_base(ap);
 
         /* fire up the ADMA engine */
-        writew(HCTL_FTHD0, port_base + HOST_CTL);
+        writew(HCTL_FTHD0 | HCTL_LEDEN, port_base + HOST_CTL);
         writew(IDMA_CTL_GO, port_base + PORT_IDMA_CTL);
         writeb(0, port_base + PORT_CPB_PTQFIFO);
 
diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c
index 13c1d2af18ac..c815f8ecf6e6 100644
--- a/drivers/ata/sata_mv.c
+++ b/drivers/ata/sata_mv.c
@@ -667,7 +667,8 @@ static const struct pci_device_id mv_pci_tbl[] = {
         { PCI_VDEVICE(MARVELL, 0x5041), chip_504x },
         { PCI_VDEVICE(MARVELL, 0x5080), chip_5080 },
         { PCI_VDEVICE(MARVELL, 0x5081), chip_508x },
-        /* RocketRAID 1740/174x have different identifiers */
+        /* RocketRAID 1720/174x have different identifiers */
+        { PCI_VDEVICE(TTI, 0x1720), chip_6042 },
         { PCI_VDEVICE(TTI, 0x1740), chip_508x },
         { PCI_VDEVICE(TTI, 0x1742), chip_508x },
 
diff --git a/drivers/ata/sata_nv.c b/drivers/ata/sata_nv.c
index 858f70610eda..14601dc05e41 100644
--- a/drivers/ata/sata_nv.c
+++ b/drivers/ata/sata_nv.c
@@ -405,28 +405,45 @@ static struct scsi_host_template nv_swncq_sht = {
         .slave_configure        = nv_swncq_slave_config,
 };
 
-static struct ata_port_operations nv_generic_ops = {
+/* OSDL bz3352 reports that some nv controllers can't determine device
+ * signature reliably and nv_hardreset is implemented to work around
+ * the problem.  This was reported on nf3 and it's unclear whether any
+ * other controllers are affected.  However, the workaround has been
+ * applied to all variants and there isn't much to gain by trying to
+ * find out exactly which ones are affected at this point especially
+ * because NV has moved over to ahci for newer controllers.
+ */
+static struct ata_port_operations nv_common_ops = {
         .inherits               = &ata_bmdma_port_ops,
         .hardreset              = nv_hardreset,
         .scr_read               = nv_scr_read,
         .scr_write              = nv_scr_write,
 };
 
+/* OSDL bz11195 reports that link doesn't come online after hardreset
+ * on generic nv's and there have been several other similar reports
+ * on linux-ide.  Disable hardreset for generic nv's.
+ */
+static struct ata_port_operations nv_generic_ops = {
+        .inherits               = &nv_common_ops,
+        .hardreset              = ATA_OP_NULL,
+};
+
 static struct ata_port_operations nv_nf2_ops = {
-        .inherits               = &nv_generic_ops,
+        .inherits               = &nv_common_ops,
         .freeze                 = nv_nf2_freeze,
         .thaw                   = nv_nf2_thaw,
 };
 
 static struct ata_port_operations nv_ck804_ops = {
-        .inherits               = &nv_generic_ops,
+        .inherits               = &nv_common_ops,
         .freeze                 = nv_ck804_freeze,
         .thaw                   = nv_ck804_thaw,
         .host_stop              = nv_ck804_host_stop,
 };
 
 static struct ata_port_operations nv_adma_ops = {
-        .inherits               = &nv_generic_ops,
+        .inherits               = &nv_common_ops,
 
         .check_atapi_dma        = nv_adma_check_atapi_dma,
         .sff_tf_read            = nv_adma_tf_read,
@@ -450,7 +467,7 @@ static struct ata_port_operations nv_adma_ops = {
 };
 
 static struct ata_port_operations nv_swncq_ops = {
-        .inherits               = &nv_generic_ops,
+        .inherits               = &nv_common_ops,
 
         .qc_defer               = ata_std_qc_defer,
         .qc_prep                = nv_swncq_qc_prep,