diff options
Diffstat (limited to 'drivers/ata')
32 files changed, 693 insertions, 988 deletions
diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig index 5987e0ba8c2d..6bdedd7cca2c 100644 --- a/drivers/ata/Kconfig +++ b/drivers/ata/Kconfig | |||
@@ -820,7 +820,7 @@ config PATA_PLATFORM | |||
820 | 820 | ||
821 | config PATA_OF_PLATFORM | 821 | config PATA_OF_PLATFORM |
822 | tristate "OpenFirmware platform device PATA support" | 822 | tristate "OpenFirmware platform device PATA support" |
823 | depends on PATA_PLATFORM && PPC_OF | 823 | depends on PATA_PLATFORM && OF |
824 | help | 824 | help |
825 | This option enables support for generic directly connected ATA | 825 | This option enables support for generic directly connected ATA |
826 | devices commonly found on embedded systems with OpenFirmware | 826 | devices commonly found on embedded systems with OpenFirmware |
@@ -831,6 +831,7 @@ config PATA_OF_PLATFORM | |||
831 | config PATA_QDI | 831 | config PATA_QDI |
832 | tristate "QDI VLB PATA support" | 832 | tristate "QDI VLB PATA support" |
833 | depends on ISA | 833 | depends on ISA |
834 | select PATA_LEGACY | ||
834 | help | 835 | help |
835 | Support for QDI 6500 and 6580 PATA controllers on VESA local bus. | 836 | Support for QDI 6500 and 6580 PATA controllers on VESA local bus. |
836 | 837 | ||
diff --git a/drivers/ata/Makefile b/drivers/ata/Makefile index 9550d691fd19..6ece5b7231a3 100644 --- a/drivers/ata/Makefile +++ b/drivers/ata/Makefile | |||
@@ -88,7 +88,6 @@ obj-$(CONFIG_PATA_PCMCIA) += pata_pcmcia.o | |||
88 | obj-$(CONFIG_PATA_PALMLD) += pata_palmld.o | 88 | obj-$(CONFIG_PATA_PALMLD) += pata_palmld.o |
89 | obj-$(CONFIG_PATA_PLATFORM) += pata_platform.o | 89 | obj-$(CONFIG_PATA_PLATFORM) += pata_platform.o |
90 | obj-$(CONFIG_PATA_OF_PLATFORM) += pata_of_platform.o | 90 | obj-$(CONFIG_PATA_OF_PLATFORM) += pata_of_platform.o |
91 | obj-$(CONFIG_PATA_QDI) += pata_qdi.o | ||
92 | obj-$(CONFIG_PATA_RB532) += pata_rb532_cf.o | 91 | obj-$(CONFIG_PATA_RB532) += pata_rb532_cf.o |
93 | obj-$(CONFIG_PATA_RZ1000) += pata_rz1000.o | 92 | obj-$(CONFIG_PATA_RZ1000) += pata_rz1000.o |
94 | obj-$(CONFIG_PATA_SAMSUNG_CF) += pata_samsung_cf.o | 93 | obj-$(CONFIG_PATA_SAMSUNG_CF) += pata_samsung_cf.o |
diff --git a/drivers/ata/ahci_platform.c b/drivers/ata/ahci_platform.c index 6fef1fa75c54..c03277d37748 100644 --- a/drivers/ata/ahci_platform.c +++ b/drivers/ata/ahci_platform.c | |||
@@ -23,6 +23,41 @@ | |||
23 | #include <linux/ahci_platform.h> | 23 | #include <linux/ahci_platform.h> |
24 | #include "ahci.h" | 24 | #include "ahci.h" |
25 | 25 | ||
26 | enum ahci_type { | ||
27 | AHCI, /* standard platform ahci */ | ||
28 | IMX53_AHCI, /* ahci on i.mx53 */ | ||
29 | }; | ||
30 | |||
31 | static struct platform_device_id ahci_devtype[] = { | ||
32 | { | ||
33 | .name = "ahci", | ||
34 | .driver_data = AHCI, | ||
35 | }, { | ||
36 | .name = "imx53-ahci", | ||
37 | .driver_data = IMX53_AHCI, | ||
38 | }, { | ||
39 | /* sentinel */ | ||
40 | } | ||
41 | }; | ||
42 | MODULE_DEVICE_TABLE(platform, ahci_devtype); | ||
43 | |||
44 | |||
45 | static const struct ata_port_info ahci_port_info[] = { | ||
46 | /* by features */ | ||
47 | [AHCI] = { | ||
48 | .flags = AHCI_FLAG_COMMON, | ||
49 | .pio_mask = ATA_PIO4, | ||
50 | .udma_mask = ATA_UDMA6, | ||
51 | .port_ops = &ahci_ops, | ||
52 | }, | ||
53 | [IMX53_AHCI] = { | ||
54 | .flags = AHCI_FLAG_COMMON, | ||
55 | .pio_mask = ATA_PIO4, | ||
56 | .udma_mask = ATA_UDMA6, | ||
57 | .port_ops = &ahci_pmp_retry_srst_ops, | ||
58 | }, | ||
59 | }; | ||
60 | |||
26 | static struct scsi_host_template ahci_platform_sht = { | 61 | static struct scsi_host_template ahci_platform_sht = { |
27 | AHCI_SHT("ahci_platform"), | 62 | AHCI_SHT("ahci_platform"), |
28 | }; | 63 | }; |
@@ -31,12 +66,8 @@ static int __init ahci_probe(struct platform_device *pdev) | |||
31 | { | 66 | { |
32 | struct device *dev = &pdev->dev; | 67 | struct device *dev = &pdev->dev; |
33 | struct ahci_platform_data *pdata = dev->platform_data; | 68 | struct ahci_platform_data *pdata = dev->platform_data; |
34 | struct ata_port_info pi = { | 69 | const struct platform_device_id *id = platform_get_device_id(pdev); |
35 | .flags = AHCI_FLAG_COMMON, | 70 | struct ata_port_info pi = ahci_port_info[id->driver_data]; |
36 | .pio_mask = ATA_PIO4, | ||
37 | .udma_mask = ATA_UDMA6, | ||
38 | .port_ops = &ahci_ops, | ||
39 | }; | ||
40 | const struct ata_port_info *ppi[] = { &pi, NULL }; | 71 | const struct ata_port_info *ppi[] = { &pi, NULL }; |
41 | struct ahci_host_priv *hpriv; | 72 | struct ahci_host_priv *hpriv; |
42 | struct ata_host *host; | 73 | struct ata_host *host; |
@@ -177,6 +208,7 @@ static struct platform_driver ahci_driver = { | |||
177 | .name = "ahci", | 208 | .name = "ahci", |
178 | .owner = THIS_MODULE, | 209 | .owner = THIS_MODULE, |
179 | }, | 210 | }, |
211 | .id_table = ahci_devtype, | ||
180 | }; | 212 | }; |
181 | 213 | ||
182 | static int __init ahci_init(void) | 214 | static int __init ahci_init(void) |
diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c index 43107e9415da..69ac373c72ab 100644 --- a/drivers/ata/ata_piix.c +++ b/drivers/ata/ata_piix.c | |||
@@ -113,6 +113,8 @@ enum { | |||
113 | PIIX_PATA_FLAGS = ATA_FLAG_SLAVE_POSS, | 113 | PIIX_PATA_FLAGS = ATA_FLAG_SLAVE_POSS, |
114 | PIIX_SATA_FLAGS = ATA_FLAG_SATA | PIIX_FLAG_CHECKINTR, | 114 | PIIX_SATA_FLAGS = ATA_FLAG_SATA | PIIX_FLAG_CHECKINTR, |
115 | 115 | ||
116 | PIIX_FLAG_PIO16 = (1 << 30), /*support 16bit PIO only*/ | ||
117 | |||
116 | PIIX_80C_PRI = (1 << 5) | (1 << 4), | 118 | PIIX_80C_PRI = (1 << 5) | (1 << 4), |
117 | PIIX_80C_SEC = (1 << 7) | (1 << 6), | 119 | PIIX_80C_SEC = (1 << 7) | (1 << 6), |
118 | 120 | ||
@@ -147,6 +149,7 @@ enum piix_controller_ids { | |||
147 | ich8m_apple_sata, /* locks up on second port enable */ | 149 | ich8m_apple_sata, /* locks up on second port enable */ |
148 | tolapai_sata, | 150 | tolapai_sata, |
149 | piix_pata_vmw, /* PIIX4 for VMware, spurious DMA_ERR */ | 151 | piix_pata_vmw, /* PIIX4 for VMware, spurious DMA_ERR */ |
152 | ich8_sata_snb, | ||
150 | }; | 153 | }; |
151 | 154 | ||
152 | struct piix_map_db { | 155 | struct piix_map_db { |
@@ -177,6 +180,7 @@ static int piix_sidpr_scr_write(struct ata_link *link, | |||
177 | static int piix_sidpr_set_lpm(struct ata_link *link, enum ata_lpm_policy policy, | 180 | static int piix_sidpr_set_lpm(struct ata_link *link, enum ata_lpm_policy policy, |
178 | unsigned hints); | 181 | unsigned hints); |
179 | static bool piix_irq_check(struct ata_port *ap); | 182 | static bool piix_irq_check(struct ata_port *ap); |
183 | static int piix_port_start(struct ata_port *ap); | ||
180 | #ifdef CONFIG_PM | 184 | #ifdef CONFIG_PM |
181 | static int piix_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg); | 185 | static int piix_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg); |
182 | static int piix_pci_device_resume(struct pci_dev *pdev); | 186 | static int piix_pci_device_resume(struct pci_dev *pdev); |
@@ -298,21 +302,21 @@ static const struct pci_device_id piix_pci_tbl[] = { | |||
298 | /* SATA Controller IDE (PCH) */ | 302 | /* SATA Controller IDE (PCH) */ |
299 | { 0x8086, 0x3b2e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata }, | 303 | { 0x8086, 0x3b2e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata }, |
300 | /* SATA Controller IDE (CPT) */ | 304 | /* SATA Controller IDE (CPT) */ |
301 | { 0x8086, 0x1c00, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata }, | 305 | { 0x8086, 0x1c00, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb }, |
302 | /* SATA Controller IDE (CPT) */ | 306 | /* SATA Controller IDE (CPT) */ |
303 | { 0x8086, 0x1c01, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata }, | 307 | { 0x8086, 0x1c01, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb }, |
304 | /* SATA Controller IDE (CPT) */ | 308 | /* SATA Controller IDE (CPT) */ |
305 | { 0x8086, 0x1c08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata }, | 309 | { 0x8086, 0x1c08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata }, |
306 | /* SATA Controller IDE (CPT) */ | 310 | /* SATA Controller IDE (CPT) */ |
307 | { 0x8086, 0x1c09, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata }, | 311 | { 0x8086, 0x1c09, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata }, |
308 | /* SATA Controller IDE (PBG) */ | 312 | /* SATA Controller IDE (PBG) */ |
309 | { 0x8086, 0x1d00, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata }, | 313 | { 0x8086, 0x1d00, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb }, |
310 | /* SATA Controller IDE (PBG) */ | 314 | /* SATA Controller IDE (PBG) */ |
311 | { 0x8086, 0x1d08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata }, | 315 | { 0x8086, 0x1d08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata }, |
312 | /* SATA Controller IDE (Panther Point) */ | 316 | /* SATA Controller IDE (Panther Point) */ |
313 | { 0x8086, 0x1e00, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata }, | 317 | { 0x8086, 0x1e00, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb }, |
314 | /* SATA Controller IDE (Panther Point) */ | 318 | /* SATA Controller IDE (Panther Point) */ |
315 | { 0x8086, 0x1e01, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata }, | 319 | { 0x8086, 0x1e01, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb }, |
316 | /* SATA Controller IDE (Panther Point) */ | 320 | /* SATA Controller IDE (Panther Point) */ |
317 | { 0x8086, 0x1e08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata }, | 321 | { 0x8086, 0x1e08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata }, |
318 | /* SATA Controller IDE (Panther Point) */ | 322 | /* SATA Controller IDE (Panther Point) */ |
@@ -338,6 +342,7 @@ static struct scsi_host_template piix_sht = { | |||
338 | static struct ata_port_operations piix_sata_ops = { | 342 | static struct ata_port_operations piix_sata_ops = { |
339 | .inherits = &ata_bmdma32_port_ops, | 343 | .inherits = &ata_bmdma32_port_ops, |
340 | .sff_irq_check = piix_irq_check, | 344 | .sff_irq_check = piix_irq_check, |
345 | .port_start = piix_port_start, | ||
341 | }; | 346 | }; |
342 | 347 | ||
343 | static struct ata_port_operations piix_pata_ops = { | 348 | static struct ata_port_operations piix_pata_ops = { |
@@ -478,6 +483,7 @@ static const struct piix_map_db *piix_map_db_table[] = { | |||
478 | [ich8_2port_sata] = &ich8_2port_map_db, | 483 | [ich8_2port_sata] = &ich8_2port_map_db, |
479 | [ich8m_apple_sata] = &ich8m_apple_map_db, | 484 | [ich8m_apple_sata] = &ich8m_apple_map_db, |
480 | [tolapai_sata] = &tolapai_map_db, | 485 | [tolapai_sata] = &tolapai_map_db, |
486 | [ich8_sata_snb] = &ich8_map_db, | ||
481 | }; | 487 | }; |
482 | 488 | ||
483 | static struct ata_port_info piix_port_info[] = { | 489 | static struct ata_port_info piix_port_info[] = { |
@@ -606,6 +612,19 @@ static struct ata_port_info piix_port_info[] = { | |||
606 | .port_ops = &piix_vmw_ops, | 612 | .port_ops = &piix_vmw_ops, |
607 | }, | 613 | }, |
608 | 614 | ||
615 | /* | ||
616 | * some Sandybridge chipsets have broken 32 mode up to now, | ||
617 | * see https://bugzilla.kernel.org/show_bug.cgi?id=40592 | ||
618 | */ | ||
619 | [ich8_sata_snb] = | ||
620 | { | ||
621 | .flags = PIIX_SATA_FLAGS | PIIX_FLAG_SIDPR | PIIX_FLAG_PIO16, | ||
622 | .pio_mask = ATA_PIO4, | ||
623 | .mwdma_mask = ATA_MWDMA2, | ||
624 | .udma_mask = ATA_UDMA6, | ||
625 | .port_ops = &piix_sata_ops, | ||
626 | }, | ||
627 | |||
609 | }; | 628 | }; |
610 | 629 | ||
611 | static struct pci_bits piix_enable_bits[] = { | 630 | static struct pci_bits piix_enable_bits[] = { |
@@ -649,6 +668,14 @@ static const struct ich_laptop ich_laptop[] = { | |||
649 | { 0, } | 668 | { 0, } |
650 | }; | 669 | }; |
651 | 670 | ||
671 | static int piix_port_start(struct ata_port *ap) | ||
672 | { | ||
673 | if (!(ap->flags & PIIX_FLAG_PIO16)) | ||
674 | ap->pflags |= ATA_PFLAG_PIO32 | ATA_PFLAG_PIO32CHANGE; | ||
675 | |||
676 | return ata_bmdma_port_start(ap); | ||
677 | } | ||
678 | |||
652 | /** | 679 | /** |
653 | * ich_pata_cable_detect - Probe host controller cable detect info | 680 | * ich_pata_cable_detect - Probe host controller cable detect info |
654 | * @ap: Port for which cable detect info is desired | 681 | * @ap: Port for which cable detect info is desired |
@@ -704,22 +731,11 @@ static int piix_pata_prereset(struct ata_link *link, unsigned long deadline) | |||
704 | 731 | ||
705 | static DEFINE_SPINLOCK(piix_lock); | 732 | static DEFINE_SPINLOCK(piix_lock); |
706 | 733 | ||
707 | /** | 734 | static void piix_set_timings(struct ata_port *ap, struct ata_device *adev, |
708 | * piix_set_piomode - Initialize host controller PATA PIO timings | 735 | u8 pio) |
709 | * @ap: Port whose timings we are configuring | ||
710 | * @adev: um | ||
711 | * | ||
712 | * Set PIO mode for device, in host controller PCI config space. | ||
713 | * | ||
714 | * LOCKING: | ||
715 | * None (inherited from caller). | ||
716 | */ | ||
717 | |||
718 | static void piix_set_piomode(struct ata_port *ap, struct ata_device *adev) | ||
719 | { | 736 | { |
720 | struct pci_dev *dev = to_pci_dev(ap->host->dev); | 737 | struct pci_dev *dev = to_pci_dev(ap->host->dev); |
721 | unsigned long flags; | 738 | unsigned long flags; |
722 | unsigned int pio = adev->pio_mode - XFER_PIO_0; | ||
723 | unsigned int is_slave = (adev->devno != 0); | 739 | unsigned int is_slave = (adev->devno != 0); |
724 | unsigned int master_port= ap->port_no ? 0x42 : 0x40; | 740 | unsigned int master_port= ap->port_no ? 0x42 : 0x40; |
725 | unsigned int slave_port = 0x44; | 741 | unsigned int slave_port = 0x44; |
@@ -744,10 +760,16 @@ static void piix_set_piomode(struct ata_port *ap, struct ata_device *adev) | |||
744 | control |= 1; /* TIME1 enable */ | 760 | control |= 1; /* TIME1 enable */ |
745 | if (ata_pio_need_iordy(adev)) | 761 | if (ata_pio_need_iordy(adev)) |
746 | control |= 2; /* IE enable */ | 762 | control |= 2; /* IE enable */ |
747 | |||
748 | /* Intel specifies that the PPE functionality is for disk only */ | 763 | /* Intel specifies that the PPE functionality is for disk only */ |
749 | if (adev->class == ATA_DEV_ATA) | 764 | if (adev->class == ATA_DEV_ATA) |
750 | control |= 4; /* PPE enable */ | 765 | control |= 4; /* PPE enable */ |
766 | /* | ||
767 | * If the drive MWDMA is faster than it can do PIO then | ||
768 | * we must force PIO into PIO0 | ||
769 | */ | ||
770 | if (adev->pio_mode < XFER_PIO_0 + pio) | ||
771 | /* Enable DMA timing only */ | ||
772 | control |= 8; /* PIO cycles in PIO0 */ | ||
751 | 773 | ||
752 | spin_lock_irqsave(&piix_lock, flags); | 774 | spin_lock_irqsave(&piix_lock, flags); |
753 | 775 | ||
@@ -759,8 +781,6 @@ static void piix_set_piomode(struct ata_port *ap, struct ata_device *adev) | |||
759 | if (is_slave) { | 781 | if (is_slave) { |
760 | /* clear TIME1|IE1|PPE1|DTE1 */ | 782 | /* clear TIME1|IE1|PPE1|DTE1 */ |
761 | master_data &= 0xff0f; | 783 | master_data &= 0xff0f; |
762 | /* Enable SITRE (separate slave timing register) */ | ||
763 | master_data |= 0x4000; | ||
764 | /* enable PPE1, IE1 and TIME1 as needed */ | 784 | /* enable PPE1, IE1 and TIME1 as needed */ |
765 | master_data |= (control << 4); | 785 | master_data |= (control << 4); |
766 | pci_read_config_byte(dev, slave_port, &slave_data); | 786 | pci_read_config_byte(dev, slave_port, &slave_data); |
@@ -778,6 +798,9 @@ static void piix_set_piomode(struct ata_port *ap, struct ata_device *adev) | |||
778 | (timings[pio][0] << 12) | | 798 | (timings[pio][0] << 12) | |
779 | (timings[pio][1] << 8); | 799 | (timings[pio][1] << 8); |
780 | } | 800 | } |
801 | |||
802 | /* Enable SITRE (separate slave timing register) */ | ||
803 | master_data |= 0x4000; | ||
781 | pci_write_config_word(dev, master_port, master_data); | 804 | pci_write_config_word(dev, master_port, master_data); |
782 | if (is_slave) | 805 | if (is_slave) |
783 | pci_write_config_byte(dev, slave_port, slave_data); | 806 | pci_write_config_byte(dev, slave_port, slave_data); |
@@ -795,6 +818,22 @@ static void piix_set_piomode(struct ata_port *ap, struct ata_device *adev) | |||
795 | } | 818 | } |
796 | 819 | ||
797 | /** | 820 | /** |
821 | * piix_set_piomode - Initialize host controller PATA PIO timings | ||
822 | * @ap: Port whose timings we are configuring | ||
823 | * @adev: Drive in question | ||
824 | * | ||
825 | * Set PIO mode for device, in host controller PCI config space. | ||
826 | * | ||
827 | * LOCKING: | ||
828 | * None (inherited from caller). | ||
829 | */ | ||
830 | |||
831 | static void piix_set_piomode(struct ata_port *ap, struct ata_device *adev) | ||
832 | { | ||
833 | piix_set_timings(ap, adev, adev->pio_mode - XFER_PIO_0); | ||
834 | } | ||
835 | |||
836 | /** | ||
798 | * do_pata_set_dmamode - Initialize host controller PATA PIO timings | 837 | * do_pata_set_dmamode - Initialize host controller PATA PIO timings |
799 | * @ap: Port whose timings we are configuring | 838 | * @ap: Port whose timings we are configuring |
800 | * @adev: Drive in question | 839 | * @adev: Drive in question |
@@ -810,31 +849,20 @@ static void do_pata_set_dmamode(struct ata_port *ap, struct ata_device *adev, in | |||
810 | { | 849 | { |
811 | struct pci_dev *dev = to_pci_dev(ap->host->dev); | 850 | struct pci_dev *dev = to_pci_dev(ap->host->dev); |
812 | unsigned long flags; | 851 | unsigned long flags; |
813 | u8 master_port = ap->port_no ? 0x42 : 0x40; | ||
814 | u16 master_data; | ||
815 | u8 speed = adev->dma_mode; | 852 | u8 speed = adev->dma_mode; |
816 | int devid = adev->devno + 2 * ap->port_no; | 853 | int devid = adev->devno + 2 * ap->port_no; |
817 | u8 udma_enable = 0; | 854 | u8 udma_enable = 0; |
818 | 855 | ||
819 | static const /* ISP RTC */ | ||
820 | u8 timings[][2] = { { 0, 0 }, | ||
821 | { 0, 0 }, | ||
822 | { 1, 0 }, | ||
823 | { 2, 1 }, | ||
824 | { 2, 3 }, }; | ||
825 | |||
826 | spin_lock_irqsave(&piix_lock, flags); | ||
827 | |||
828 | pci_read_config_word(dev, master_port, &master_data); | ||
829 | if (ap->udma_mask) | ||
830 | pci_read_config_byte(dev, 0x48, &udma_enable); | ||
831 | |||
832 | if (speed >= XFER_UDMA_0) { | 856 | if (speed >= XFER_UDMA_0) { |
833 | unsigned int udma = adev->dma_mode - XFER_UDMA_0; | 857 | unsigned int udma = speed - XFER_UDMA_0; |
834 | u16 udma_timing; | 858 | u16 udma_timing; |
835 | u16 ideconf; | 859 | u16 ideconf; |
836 | int u_clock, u_speed; | 860 | int u_clock, u_speed; |
837 | 861 | ||
862 | spin_lock_irqsave(&piix_lock, flags); | ||
863 | |||
864 | pci_read_config_byte(dev, 0x48, &udma_enable); | ||
865 | |||
838 | /* | 866 | /* |
839 | * UDMA is handled by a combination of clock switching and | 867 | * UDMA is handled by a combination of clock switching and |
840 | * selection of dividers | 868 | * selection of dividers |
@@ -867,56 +895,21 @@ static void do_pata_set_dmamode(struct ata_port *ap, struct ata_device *adev, in | |||
867 | performance (WR_PingPong_En) */ | 895 | performance (WR_PingPong_En) */ |
868 | pci_write_config_word(dev, 0x54, ideconf); | 896 | pci_write_config_word(dev, 0x54, ideconf); |
869 | } | 897 | } |
898 | |||
899 | pci_write_config_byte(dev, 0x48, udma_enable); | ||
900 | |||
901 | spin_unlock_irqrestore(&piix_lock, flags); | ||
870 | } else { | 902 | } else { |
871 | /* | 903 | /* MWDMA is driven by the PIO timings. */ |
872 | * MWDMA is driven by the PIO timings. We must also enable | 904 | unsigned int mwdma = speed - XFER_MW_DMA_0; |
873 | * IORDY unconditionally along with TIME1. PPE has already | ||
874 | * been set when the PIO timing was set. | ||
875 | */ | ||
876 | unsigned int mwdma = adev->dma_mode - XFER_MW_DMA_0; | ||
877 | unsigned int control; | ||
878 | u8 slave_data; | ||
879 | const unsigned int needed_pio[3] = { | 905 | const unsigned int needed_pio[3] = { |
880 | XFER_PIO_0, XFER_PIO_3, XFER_PIO_4 | 906 | XFER_PIO_0, XFER_PIO_3, XFER_PIO_4 |
881 | }; | 907 | }; |
882 | int pio = needed_pio[mwdma] - XFER_PIO_0; | 908 | int pio = needed_pio[mwdma] - XFER_PIO_0; |
883 | 909 | ||
884 | control = 3; /* IORDY|TIME1 */ | 910 | /* XFER_PIO_0 is never used currently */ |
885 | 911 | piix_set_timings(ap, adev, pio); | |
886 | /* If the drive MWDMA is faster than it can do PIO then | ||
887 | we must force PIO into PIO0 */ | ||
888 | |||
889 | if (adev->pio_mode < needed_pio[mwdma]) | ||
890 | /* Enable DMA timing only */ | ||
891 | control |= 8; /* PIO cycles in PIO0 */ | ||
892 | |||
893 | if (adev->devno) { /* Slave */ | ||
894 | master_data &= 0xFF4F; /* Mask out IORDY|TIME1|DMAONLY */ | ||
895 | master_data |= control << 4; | ||
896 | pci_read_config_byte(dev, 0x44, &slave_data); | ||
897 | slave_data &= (ap->port_no ? 0x0f : 0xf0); | ||
898 | /* Load the matching timing */ | ||
899 | slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << (ap->port_no ? 4 : 0); | ||
900 | pci_write_config_byte(dev, 0x44, slave_data); | ||
901 | } else { /* Master */ | ||
902 | master_data &= 0xCCF4; /* Mask out IORDY|TIME1|DMAONLY | ||
903 | and master timing bits */ | ||
904 | master_data |= control; | ||
905 | master_data |= | ||
906 | (timings[pio][0] << 12) | | ||
907 | (timings[pio][1] << 8); | ||
908 | } | ||
909 | |||
910 | if (ap->udma_mask) | ||
911 | udma_enable &= ~(1 << devid); | ||
912 | |||
913 | pci_write_config_word(dev, master_port, master_data); | ||
914 | } | 912 | } |
915 | /* Don't scribble on 0x48 if the controller does not support UDMA */ | ||
916 | if (ap->udma_mask) | ||
917 | pci_write_config_byte(dev, 0x48, udma_enable); | ||
918 | |||
919 | spin_unlock_irqrestore(&piix_lock, flags); | ||
920 | } | 913 | } |
921 | 914 | ||
922 | /** | 915 | /** |
diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c index d26c7f4c887b..c04ad68cb602 100644 --- a/drivers/ata/libata-core.c +++ b/drivers/ata/libata-core.c | |||
@@ -2938,7 +2938,7 @@ int ata_timing_compute(struct ata_device *adev, unsigned short speed, | |||
2938 | if (id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */ | 2938 | if (id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */ |
2939 | memset(&p, 0, sizeof(p)); | 2939 | memset(&p, 0, sizeof(p)); |
2940 | 2940 | ||
2941 | if (speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) { | 2941 | if (speed >= XFER_PIO_0 && speed < XFER_SW_DMA_0) { |
2942 | if (speed <= XFER_PIO_2) | 2942 | if (speed <= XFER_PIO_2) |
2943 | p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO]; | 2943 | p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO]; |
2944 | else if ((speed <= XFER_PIO_4) || | 2944 | else if ((speed <= XFER_PIO_4) || |
diff --git a/drivers/ata/libata-eh.c b/drivers/ata/libata-eh.c index ed16fbedaabd..c021186736e9 100644 --- a/drivers/ata/libata-eh.c +++ b/drivers/ata/libata-eh.c | |||
@@ -2532,8 +2532,7 @@ static int ata_do_reset(struct ata_link *link, ata_reset_fn_t reset, | |||
2532 | return reset(link, classes, deadline); | 2532 | return reset(link, classes, deadline); |
2533 | } | 2533 | } |
2534 | 2534 | ||
2535 | static int ata_eh_followup_srst_needed(struct ata_link *link, | 2535 | static int ata_eh_followup_srst_needed(struct ata_link *link, int rc) |
2536 | int rc, const unsigned int *classes) | ||
2537 | { | 2536 | { |
2538 | if ((link->flags & ATA_LFLAG_NO_SRST) || ata_link_offline(link)) | 2537 | if ((link->flags & ATA_LFLAG_NO_SRST) || ata_link_offline(link)) |
2539 | return 0; | 2538 | return 0; |
@@ -2726,7 +2725,7 @@ int ata_eh_reset(struct ata_link *link, int classify, | |||
2726 | 2725 | ||
2727 | /* perform follow-up SRST if necessary */ | 2726 | /* perform follow-up SRST if necessary */ |
2728 | if (reset == hardreset && | 2727 | if (reset == hardreset && |
2729 | ata_eh_followup_srst_needed(link, rc, classes)) { | 2728 | ata_eh_followup_srst_needed(link, rc)) { |
2730 | reset = softreset; | 2729 | reset = softreset; |
2731 | 2730 | ||
2732 | if (!reset) { | 2731 | if (!reset) { |
diff --git a/drivers/ata/libata-sff.c b/drivers/ata/libata-sff.c index c24127dd6ef2..239bfa67d032 100644 --- a/drivers/ata/libata-sff.c +++ b/drivers/ata/libata-sff.c | |||
@@ -569,7 +569,7 @@ unsigned int ata_sff_data_xfer(struct ata_device *dev, unsigned char *buf, | |||
569 | 569 | ||
570 | /* Transfer trailing byte, if any. */ | 570 | /* Transfer trailing byte, if any. */ |
571 | if (unlikely(buflen & 0x01)) { | 571 | if (unlikely(buflen & 0x01)) { |
572 | unsigned char pad[2]; | 572 | unsigned char pad[2] = { }; |
573 | 573 | ||
574 | /* Point buf to the tail of buffer */ | 574 | /* Point buf to the tail of buffer */ |
575 | buf += buflen - 1; | 575 | buf += buflen - 1; |
@@ -628,7 +628,7 @@ unsigned int ata_sff_data_xfer32(struct ata_device *dev, unsigned char *buf, | |||
628 | 628 | ||
629 | /* Transfer trailing bytes, if any */ | 629 | /* Transfer trailing bytes, if any */ |
630 | if (unlikely(slop)) { | 630 | if (unlikely(slop)) { |
631 | unsigned char pad[4]; | 631 | unsigned char pad[4] = { }; |
632 | 632 | ||
633 | /* Point buf to the tail of buffer */ | 633 | /* Point buf to the tail of buffer */ |
634 | buf += buflen - slop; | 634 | buf += buflen - slop; |
@@ -678,7 +678,7 @@ unsigned int ata_sff_data_xfer_noirq(struct ata_device *dev, unsigned char *buf, | |||
678 | unsigned int consumed; | 678 | unsigned int consumed; |
679 | 679 | ||
680 | local_irq_save(flags); | 680 | local_irq_save(flags); |
681 | consumed = ata_sff_data_xfer(dev, buf, buflen, rw); | 681 | consumed = ata_sff_data_xfer32(dev, buf, buflen, rw); |
682 | local_irq_restore(flags); | 682 | local_irq_restore(flags); |
683 | 683 | ||
684 | return consumed; | 684 | return consumed; |
@@ -2507,31 +2507,10 @@ static const struct ata_port_info *ata_sff_find_valid_pi( | |||
2507 | return NULL; | 2507 | return NULL; |
2508 | } | 2508 | } |
2509 | 2509 | ||
2510 | /** | 2510 | static int ata_pci_init_one(struct pci_dev *pdev, |
2511 | * ata_pci_sff_init_one - Initialize/register PIO-only PCI IDE controller | 2511 | const struct ata_port_info * const *ppi, |
2512 | * @pdev: Controller to be initialized | 2512 | struct scsi_host_template *sht, void *host_priv, |
2513 | * @ppi: array of port_info, must be enough for two ports | 2513 | int hflags, bool bmdma) |
2514 | * @sht: scsi_host_template to use when registering the host | ||
2515 | * @host_priv: host private_data | ||
2516 | * @hflag: host flags | ||
2517 | * | ||
2518 | * This is a helper function which can be called from a driver's | ||
2519 | * xxx_init_one() probe function if the hardware uses traditional | ||
2520 | * IDE taskfile registers and is PIO only. | ||
2521 | * | ||
2522 | * ASSUMPTION: | ||
2523 | * Nobody makes a single channel controller that appears solely as | ||
2524 | * the secondary legacy port on PCI. | ||
2525 | * | ||
2526 | * LOCKING: | ||
2527 | * Inherited from PCI layer (may sleep). | ||
2528 | * | ||
2529 | * RETURNS: | ||
2530 | * Zero on success, negative on errno-based value on error. | ||
2531 | */ | ||
2532 | int ata_pci_sff_init_one(struct pci_dev *pdev, | ||
2533 | const struct ata_port_info * const *ppi, | ||
2534 | struct scsi_host_template *sht, void *host_priv, int hflag) | ||
2535 | { | 2514 | { |
2536 | struct device *dev = &pdev->dev; | 2515 | struct device *dev = &pdev->dev; |
2537 | const struct ata_port_info *pi; | 2516 | const struct ata_port_info *pi; |
@@ -2553,14 +2532,22 @@ int ata_pci_sff_init_one(struct pci_dev *pdev, | |||
2553 | if (rc) | 2532 | if (rc) |
2554 | goto out; | 2533 | goto out; |
2555 | 2534 | ||
2556 | /* prepare and activate SFF host */ | 2535 | if (bmdma) |
2557 | rc = ata_pci_sff_prepare_host(pdev, ppi, &host); | 2536 | /* prepare and activate BMDMA host */ |
2537 | rc = ata_pci_bmdma_prepare_host(pdev, ppi, &host); | ||
2538 | else | ||
2539 | /* prepare and activate SFF host */ | ||
2540 | rc = ata_pci_sff_prepare_host(pdev, ppi, &host); | ||
2558 | if (rc) | 2541 | if (rc) |
2559 | goto out; | 2542 | goto out; |
2560 | host->private_data = host_priv; | 2543 | host->private_data = host_priv; |
2561 | host->flags |= hflag; | 2544 | host->flags |= hflags; |
2562 | 2545 | ||
2563 | rc = ata_pci_sff_activate_host(host, ata_sff_interrupt, sht); | 2546 | if (bmdma) { |
2547 | pci_set_master(pdev); | ||
2548 | rc = ata_pci_sff_activate_host(host, ata_bmdma_interrupt, sht); | ||
2549 | } else | ||
2550 | rc = ata_pci_sff_activate_host(host, ata_sff_interrupt, sht); | ||
2564 | out: | 2551 | out: |
2565 | if (rc == 0) | 2552 | if (rc == 0) |
2566 | devres_remove_group(&pdev->dev, NULL); | 2553 | devres_remove_group(&pdev->dev, NULL); |
@@ -2569,6 +2556,35 @@ out: | |||
2569 | 2556 | ||
2570 | return rc; | 2557 | return rc; |
2571 | } | 2558 | } |
2559 | |||
2560 | /** | ||
2561 | * ata_pci_sff_init_one - Initialize/register PIO-only PCI IDE controller | ||
2562 | * @pdev: Controller to be initialized | ||
2563 | * @ppi: array of port_info, must be enough for two ports | ||
2564 | * @sht: scsi_host_template to use when registering the host | ||
2565 | * @host_priv: host private_data | ||
2566 | * @hflag: host flags | ||
2567 | * | ||
2568 | * This is a helper function which can be called from a driver's | ||
2569 | * xxx_init_one() probe function if the hardware uses traditional | ||
2570 | * IDE taskfile registers and is PIO only. | ||
2571 | * | ||
2572 | * ASSUMPTION: | ||
2573 | * Nobody makes a single channel controller that appears solely as | ||
2574 | * the secondary legacy port on PCI. | ||
2575 | * | ||
2576 | * LOCKING: | ||
2577 | * Inherited from PCI layer (may sleep). | ||
2578 | * | ||
2579 | * RETURNS: | ||
2580 | * Zero on success, negative on errno-based value on error. | ||
2581 | */ | ||
2582 | int ata_pci_sff_init_one(struct pci_dev *pdev, | ||
2583 | const struct ata_port_info * const *ppi, | ||
2584 | struct scsi_host_template *sht, void *host_priv, int hflag) | ||
2585 | { | ||
2586 | return ata_pci_init_one(pdev, ppi, sht, host_priv, hflag, 0); | ||
2587 | } | ||
2572 | EXPORT_SYMBOL_GPL(ata_pci_sff_init_one); | 2588 | EXPORT_SYMBOL_GPL(ata_pci_sff_init_one); |
2573 | 2589 | ||
2574 | #endif /* CONFIG_PCI */ | 2590 | #endif /* CONFIG_PCI */ |
@@ -3286,42 +3302,7 @@ int ata_pci_bmdma_init_one(struct pci_dev *pdev, | |||
3286 | struct scsi_host_template *sht, void *host_priv, | 3302 | struct scsi_host_template *sht, void *host_priv, |
3287 | int hflags) | 3303 | int hflags) |
3288 | { | 3304 | { |
3289 | struct device *dev = &pdev->dev; | 3305 | return ata_pci_init_one(pdev, ppi, sht, host_priv, hflags, 1); |
3290 | const struct ata_port_info *pi; | ||
3291 | struct ata_host *host = NULL; | ||
3292 | int rc; | ||
3293 | |||
3294 | DPRINTK("ENTER\n"); | ||
3295 | |||
3296 | pi = ata_sff_find_valid_pi(ppi); | ||
3297 | if (!pi) { | ||
3298 | dev_err(&pdev->dev, "no valid port_info specified\n"); | ||
3299 | return -EINVAL; | ||
3300 | } | ||
3301 | |||
3302 | if (!devres_open_group(dev, NULL, GFP_KERNEL)) | ||
3303 | return -ENOMEM; | ||
3304 | |||
3305 | rc = pcim_enable_device(pdev); | ||
3306 | if (rc) | ||
3307 | goto out; | ||
3308 | |||
3309 | /* prepare and activate BMDMA host */ | ||
3310 | rc = ata_pci_bmdma_prepare_host(pdev, ppi, &host); | ||
3311 | if (rc) | ||
3312 | goto out; | ||
3313 | host->private_data = host_priv; | ||
3314 | host->flags |= hflags; | ||
3315 | |||
3316 | pci_set_master(pdev); | ||
3317 | rc = ata_pci_sff_activate_host(host, ata_bmdma_interrupt, sht); | ||
3318 | out: | ||
3319 | if (rc == 0) | ||
3320 | devres_remove_group(&pdev->dev, NULL); | ||
3321 | else | ||
3322 | devres_release_group(&pdev->dev, NULL); | ||
3323 | |||
3324 | return rc; | ||
3325 | } | 3306 | } |
3326 | EXPORT_SYMBOL_GPL(ata_pci_bmdma_init_one); | 3307 | EXPORT_SYMBOL_GPL(ata_pci_bmdma_init_one); |
3327 | 3308 | ||
diff --git a/drivers/ata/pata_ali.c b/drivers/ata/pata_ali.c index cadd67998bac..61da0694aecd 100644 --- a/drivers/ata/pata_ali.c +++ b/drivers/ata/pata_ali.c | |||
@@ -56,7 +56,7 @@ static const struct dmi_system_id cable_dmi_table[] = { | |||
56 | }, | 56 | }, |
57 | }, | 57 | }, |
58 | { | 58 | { |
59 | .ident = "Toshiba Satelite S1800-814", | 59 | .ident = "Toshiba Satellite S1800-814", |
60 | .matches = { | 60 | .matches = { |
61 | DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), | 61 | DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), |
62 | DMI_MATCH(DMI_PRODUCT_NAME, "S1800-814"), | 62 | DMI_MATCH(DMI_PRODUCT_NAME, "S1800-814"), |
diff --git a/drivers/ata/pata_arasan_cf.c b/drivers/ata/pata_arasan_cf.c index 719bb73a73e0..e8574bba3ee4 100644 --- a/drivers/ata/pata_arasan_cf.c +++ b/drivers/ata/pata_arasan_cf.c | |||
@@ -922,8 +922,7 @@ static int __devexit arasan_cf_remove(struct platform_device *pdev) | |||
922 | #ifdef CONFIG_PM | 922 | #ifdef CONFIG_PM |
923 | static int arasan_cf_suspend(struct device *dev) | 923 | static int arasan_cf_suspend(struct device *dev) |
924 | { | 924 | { |
925 | struct platform_device *pdev = to_platform_device(dev); | 925 | struct ata_host *host = dev_get_drvdata(dev); |
926 | struct ata_host *host = dev_get_drvdata(&pdev->dev); | ||
927 | struct arasan_cf_dev *acdev = host->ports[0]->private_data; | 926 | struct arasan_cf_dev *acdev = host->ports[0]->private_data; |
928 | 927 | ||
929 | if (acdev->dma_chan) { | 928 | if (acdev->dma_chan) { |
@@ -937,8 +936,7 @@ static int arasan_cf_suspend(struct device *dev) | |||
937 | 936 | ||
938 | static int arasan_cf_resume(struct device *dev) | 937 | static int arasan_cf_resume(struct device *dev) |
939 | { | 938 | { |
940 | struct platform_device *pdev = to_platform_device(dev); | 939 | struct ata_host *host = dev_get_drvdata(dev); |
941 | struct ata_host *host = dev_get_drvdata(&pdev->dev); | ||
942 | struct arasan_cf_dev *acdev = host->ports[0]->private_data; | 940 | struct arasan_cf_dev *acdev = host->ports[0]->private_data; |
943 | 941 | ||
944 | cf_init(acdev); | 942 | cf_init(acdev); |
diff --git a/drivers/ata/pata_artop.c b/drivers/ata/pata_artop.c index 78a93b690959..4b8b22efc00b 100644 --- a/drivers/ata/pata_artop.c +++ b/drivers/ata/pata_artop.c | |||
@@ -2,7 +2,7 @@ | |||
2 | * pata_artop.c - ARTOP ATA controller driver | 2 | * pata_artop.c - ARTOP ATA controller driver |
3 | * | 3 | * |
4 | * (C) 2006 Red Hat | 4 | * (C) 2006 Red Hat |
5 | * (C) 2007 Bartlomiej Zolnierkiewicz | 5 | * (C) 2007,2011 Bartlomiej Zolnierkiewicz |
6 | * | 6 | * |
7 | * Based in part on drivers/ide/pci/aec62xx.c | 7 | * Based in part on drivers/ide/pci/aec62xx.c |
8 | * Copyright (C) 1999-2002 Andre Hedrick <andre@linux-ide.org> | 8 | * Copyright (C) 1999-2002 Andre Hedrick <andre@linux-ide.org> |
@@ -28,7 +28,7 @@ | |||
28 | #include <linux/ata.h> | 28 | #include <linux/ata.h> |
29 | 29 | ||
30 | #define DRV_NAME "pata_artop" | 30 | #define DRV_NAME "pata_artop" |
31 | #define DRV_VERSION "0.4.5" | 31 | #define DRV_VERSION "0.4.6" |
32 | 32 | ||
33 | /* | 33 | /* |
34 | * The ARTOP has 33 Mhz and "over clocked" timing tables. Until we | 34 | * The ARTOP has 33 Mhz and "over clocked" timing tables. Until we |
@@ -39,31 +39,15 @@ | |||
39 | 39 | ||
40 | static int clock = 0; | 40 | static int clock = 0; |
41 | 41 | ||
42 | static int artop6210_pre_reset(struct ata_link *link, unsigned long deadline) | ||
43 | { | ||
44 | struct ata_port *ap = link->ap; | ||
45 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | ||
46 | const struct pci_bits artop_enable_bits[] = { | ||
47 | { 0x4AU, 1U, 0x02UL, 0x02UL }, /* port 0 */ | ||
48 | { 0x4AU, 1U, 0x04UL, 0x04UL }, /* port 1 */ | ||
49 | }; | ||
50 | |||
51 | if (!pci_test_config_bits(pdev, &artop_enable_bits[ap->port_no])) | ||
52 | return -ENOENT; | ||
53 | |||
54 | return ata_sff_prereset(link, deadline); | ||
55 | } | ||
56 | |||
57 | /** | 42 | /** |
58 | * artop6260_pre_reset - check for 40/80 pin | 43 | * artop62x0_pre_reset - probe begin |
59 | * @link: link | 44 | * @link: link |
60 | * @deadline: deadline jiffies for the operation | 45 | * @deadline: deadline jiffies for the operation |
61 | * | 46 | * |
62 | * The ARTOP hardware reports the cable detect bits in register 0x49. | ||
63 | * Nothing complicated needed here. | 47 | * Nothing complicated needed here. |
64 | */ | 48 | */ |
65 | 49 | ||
66 | static int artop6260_pre_reset(struct ata_link *link, unsigned long deadline) | 50 | static int artop62x0_pre_reset(struct ata_link *link, unsigned long deadline) |
67 | { | 51 | { |
68 | static const struct pci_bits artop_enable_bits[] = { | 52 | static const struct pci_bits artop_enable_bits[] = { |
69 | { 0x4AU, 1U, 0x02UL, 0x02UL }, /* port 0 */ | 53 | { 0x4AU, 1U, 0x02UL, 0x02UL }, /* port 0 */ |
@@ -73,7 +57,7 @@ static int artop6260_pre_reset(struct ata_link *link, unsigned long deadline) | |||
73 | struct ata_port *ap = link->ap; | 57 | struct ata_port *ap = link->ap; |
74 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 58 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
75 | 59 | ||
76 | /* Odd numbered device ids are the units with enable bits (the -R cards) */ | 60 | /* Odd numbered device ids are the units with enable bits. */ |
77 | if ((pdev->device & 1) && | 61 | if ((pdev->device & 1) && |
78 | !pci_test_config_bits(pdev, &artop_enable_bits[ap->port_no])) | 62 | !pci_test_config_bits(pdev, &artop_enable_bits[ap->port_no])) |
79 | return -ENOENT; | 63 | return -ENOENT; |
@@ -317,7 +301,7 @@ static struct ata_port_operations artop6210_ops = { | |||
317 | .cable_detect = ata_cable_40wire, | 301 | .cable_detect = ata_cable_40wire, |
318 | .set_piomode = artop6210_set_piomode, | 302 | .set_piomode = artop6210_set_piomode, |
319 | .set_dmamode = artop6210_set_dmamode, | 303 | .set_dmamode = artop6210_set_dmamode, |
320 | .prereset = artop6210_pre_reset, | 304 | .prereset = artop62x0_pre_reset, |
321 | .qc_defer = artop6210_qc_defer, | 305 | .qc_defer = artop6210_qc_defer, |
322 | }; | 306 | }; |
323 | 307 | ||
@@ -326,9 +310,36 @@ static struct ata_port_operations artop6260_ops = { | |||
326 | .cable_detect = artop6260_cable_detect, | 310 | .cable_detect = artop6260_cable_detect, |
327 | .set_piomode = artop6260_set_piomode, | 311 | .set_piomode = artop6260_set_piomode, |
328 | .set_dmamode = artop6260_set_dmamode, | 312 | .set_dmamode = artop6260_set_dmamode, |
329 | .prereset = artop6260_pre_reset, | 313 | .prereset = artop62x0_pre_reset, |
330 | }; | 314 | }; |
331 | 315 | ||
316 | static void atp8xx_fixup(struct pci_dev *pdev) | ||
317 | { | ||
318 | if (pdev->device == 0x0005) | ||
319 | /* BIOS may have left us in UDMA, clear it before libata probe */ | ||
320 | pci_write_config_byte(pdev, 0x54, 0); | ||
321 | else if (pdev->device == 0x0008 || pdev->device == 0x0009) { | ||
322 | u8 reg; | ||
323 | |||
324 | /* Mac systems come up with some registers not set as we | ||
325 | will need them */ | ||
326 | |||
327 | /* Clear reset & test bits */ | ||
328 | pci_read_config_byte(pdev, 0x49, ®); | ||
329 | pci_write_config_byte(pdev, 0x49, reg & ~0x30); | ||
330 | |||
331 | /* PCI latency must be > 0x80 for burst mode, tweak it | ||
332 | * if required. | ||
333 | */ | ||
334 | pci_read_config_byte(pdev, PCI_LATENCY_TIMER, ®); | ||
335 | if (reg <= 0x80) | ||
336 | pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x90); | ||
337 | |||
338 | /* Enable IRQ output and burst mode */ | ||
339 | pci_read_config_byte(pdev, 0x4a, ®); | ||
340 | pci_write_config_byte(pdev, 0x4a, (reg & ~0x01) | 0x80); | ||
341 | } | ||
342 | } | ||
332 | 343 | ||
333 | /** | 344 | /** |
334 | * artop_init_one - Register ARTOP ATA PCI device with kernel services | 345 | * artop_init_one - Register ARTOP ATA PCI device with kernel services |
@@ -383,42 +394,22 @@ static int artop_init_one (struct pci_dev *pdev, const struct pci_device_id *id) | |||
383 | if (rc) | 394 | if (rc) |
384 | return rc; | 395 | return rc; |
385 | 396 | ||
386 | if (id->driver_data == 0) { /* 6210 variant */ | 397 | if (id->driver_data == 0) /* 6210 variant */ |
387 | ppi[0] = &info_6210; | 398 | ppi[0] = &info_6210; |
388 | /* BIOS may have left us in UDMA, clear it before libata probe */ | ||
389 | pci_write_config_byte(pdev, 0x54, 0); | ||
390 | } | ||
391 | else if (id->driver_data == 1) /* 6260 */ | 399 | else if (id->driver_data == 1) /* 6260 */ |
392 | ppi[0] = &info_626x; | 400 | ppi[0] = &info_626x; |
393 | else if (id->driver_data == 2) { /* 6280 or 6280 + fast */ | 401 | else if (id->driver_data == 2) { /* 6280 or 6280 + fast */ |
394 | unsigned long io = pci_resource_start(pdev, 4); | 402 | unsigned long io = pci_resource_start(pdev, 4); |
395 | u8 reg; | ||
396 | 403 | ||
397 | ppi[0] = &info_628x; | 404 | ppi[0] = &info_628x; |
398 | if (inb(io) & 0x10) | 405 | if (inb(io) & 0x10) |
399 | ppi[0] = &info_628x_fast; | 406 | ppi[0] = &info_628x_fast; |
400 | /* Mac systems come up with some registers not set as we | ||
401 | will need them */ | ||
402 | |||
403 | /* Clear reset & test bits */ | ||
404 | pci_read_config_byte(pdev, 0x49, ®); | ||
405 | pci_write_config_byte(pdev, 0x49, reg & ~ 0x30); | ||
406 | |||
407 | /* PCI latency must be > 0x80 for burst mode, tweak it | ||
408 | * if required. | ||
409 | */ | ||
410 | pci_read_config_byte(pdev, PCI_LATENCY_TIMER, ®); | ||
411 | if (reg <= 0x80) | ||
412 | pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x90); | ||
413 | |||
414 | /* Enable IRQ output and burst mode */ | ||
415 | pci_read_config_byte(pdev, 0x4a, ®); | ||
416 | pci_write_config_byte(pdev, 0x4a, (reg & ~0x01) | 0x80); | ||
417 | |||
418 | } | 407 | } |
419 | 408 | ||
420 | BUG_ON(ppi[0] == NULL); | 409 | BUG_ON(ppi[0] == NULL); |
421 | 410 | ||
411 | atp8xx_fixup(pdev); | ||
412 | |||
422 | return ata_pci_bmdma_init_one(pdev, ppi, &artop_sht, NULL, 0); | 413 | return ata_pci_bmdma_init_one(pdev, ppi, &artop_sht, NULL, 0); |
423 | } | 414 | } |
424 | 415 | ||
@@ -432,11 +423,32 @@ static const struct pci_device_id artop_pci_tbl[] = { | |||
432 | { } /* terminate list */ | 423 | { } /* terminate list */ |
433 | }; | 424 | }; |
434 | 425 | ||
426 | #ifdef CONFIG_PM | ||
427 | static int atp8xx_reinit_one(struct pci_dev *pdev) | ||
428 | { | ||
429 | struct ata_host *host = dev_get_drvdata(&pdev->dev); | ||
430 | int rc; | ||
431 | |||
432 | rc = ata_pci_device_do_resume(pdev); | ||
433 | if (rc) | ||
434 | return rc; | ||
435 | |||
436 | atp8xx_fixup(pdev); | ||
437 | |||
438 | ata_host_resume(host); | ||
439 | return 0; | ||
440 | } | ||
441 | #endif | ||
442 | |||
435 | static struct pci_driver artop_pci_driver = { | 443 | static struct pci_driver artop_pci_driver = { |
436 | .name = DRV_NAME, | 444 | .name = DRV_NAME, |
437 | .id_table = artop_pci_tbl, | 445 | .id_table = artop_pci_tbl, |
438 | .probe = artop_init_one, | 446 | .probe = artop_init_one, |
439 | .remove = ata_pci_remove_one, | 447 | .remove = ata_pci_remove_one, |
448 | #ifdef CONFIG_PM | ||
449 | .suspend = ata_pci_device_suspend, | ||
450 | .resume = atp8xx_reinit_one, | ||
451 | #endif | ||
440 | }; | 452 | }; |
441 | 453 | ||
442 | static int __init artop_init(void) | 454 | static int __init artop_init(void) |
@@ -452,9 +464,8 @@ static void __exit artop_exit(void) | |||
452 | module_init(artop_init); | 464 | module_init(artop_init); |
453 | module_exit(artop_exit); | 465 | module_exit(artop_exit); |
454 | 466 | ||
455 | MODULE_AUTHOR("Alan Cox"); | 467 | MODULE_AUTHOR("Alan Cox, Bartlomiej Zolnierkiewicz"); |
456 | MODULE_DESCRIPTION("SCSI low-level driver for ARTOP PATA"); | 468 | MODULE_DESCRIPTION("SCSI low-level driver for ARTOP PATA"); |
457 | MODULE_LICENSE("GPL"); | 469 | MODULE_LICENSE("GPL"); |
458 | MODULE_DEVICE_TABLE(pci, artop_pci_tbl); | 470 | MODULE_DEVICE_TABLE(pci, artop_pci_tbl); |
459 | MODULE_VERSION(DRV_VERSION); | 471 | MODULE_VERSION(DRV_VERSION); |
460 | |||
diff --git a/drivers/ata/pata_at91.c b/drivers/ata/pata_at91.c index 960c72571395..a76f24a8e5db 100644 --- a/drivers/ata/pata_at91.c +++ b/drivers/ata/pata_at91.c | |||
@@ -30,7 +30,7 @@ | |||
30 | 30 | ||
31 | #include <mach/at91sam9_smc.h> | 31 | #include <mach/at91sam9_smc.h> |
32 | #include <mach/board.h> | 32 | #include <mach/board.h> |
33 | #include <mach/gpio.h> | 33 | #include <asm/gpio.h> |
34 | 34 | ||
35 | #define DRV_NAME "pata_at91" | 35 | #define DRV_NAME "pata_at91" |
36 | #define DRV_VERSION "0.3" | 36 | #define DRV_VERSION "0.3" |
@@ -414,10 +414,13 @@ static int __devinit pata_at91_probe(struct platform_device *pdev) | |||
414 | 414 | ||
415 | host->private_data = info; | 415 | host->private_data = info; |
416 | 416 | ||
417 | return ata_host_activate(host, irq ? gpio_to_irq(irq) : 0, | 417 | ret = ata_host_activate(host, irq ? gpio_to_irq(irq) : 0, |
418 | irq ? ata_sff_interrupt : NULL, | 418 | irq ? ata_sff_interrupt : NULL, |
419 | irq_flags, &pata_at91_sht); | 419 | irq_flags, &pata_at91_sht); |
420 | 420 | ||
421 | if (!ret) | ||
422 | return 0; | ||
423 | |||
421 | err_put: | 424 | err_put: |
422 | clk_put(info->mck); | 425 | clk_put(info->mck); |
423 | return ret; | 426 | return ret; |
diff --git a/drivers/ata/pata_atiixp.c b/drivers/ata/pata_atiixp.c index 43755616dc5a..be1aa1486d39 100644 --- a/drivers/ata/pata_atiixp.c +++ b/drivers/ata/pata_atiixp.c | |||
@@ -49,6 +49,31 @@ static int atiixp_cable_detect(struct ata_port *ap) | |||
49 | static DEFINE_SPINLOCK(atiixp_lock); | 49 | static DEFINE_SPINLOCK(atiixp_lock); |
50 | 50 | ||
51 | /** | 51 | /** |
52 | * atiixp_prereset - perform reset handling | ||
53 | * @link: ATA link | ||
54 | * @deadline: deadline jiffies for the operation | ||
55 | * | ||
56 | * Reset sequence checking enable bits to see which ports are | ||
57 | * active. | ||
58 | */ | ||
59 | |||
60 | static int atiixp_prereset(struct ata_link *link, unsigned long deadline) | ||
61 | { | ||
62 | static const struct pci_bits atiixp_enable_bits[] = { | ||
63 | { 0x48, 1, 0x01, 0x00 }, | ||
64 | { 0x48, 1, 0x08, 0x00 } | ||
65 | }; | ||
66 | |||
67 | struct ata_port *ap = link->ap; | ||
68 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | ||
69 | |||
70 | if (!pci_test_config_bits(pdev, &atiixp_enable_bits[ap->port_no])) | ||
71 | return -ENOENT; | ||
72 | |||
73 | return ata_sff_prereset(link, deadline); | ||
74 | } | ||
75 | |||
76 | /** | ||
52 | * atiixp_set_pio_timing - set initial PIO mode data | 77 | * atiixp_set_pio_timing - set initial PIO mode data |
53 | * @ap: ATA interface | 78 | * @ap: ATA interface |
54 | * @adev: ATA device | 79 | * @adev: ATA device |
@@ -221,6 +246,7 @@ static struct ata_port_operations atiixp_port_ops = { | |||
221 | .bmdma_start = atiixp_bmdma_start, | 246 | .bmdma_start = atiixp_bmdma_start, |
222 | .bmdma_stop = atiixp_bmdma_stop, | 247 | .bmdma_stop = atiixp_bmdma_stop, |
223 | 248 | ||
249 | .prereset = atiixp_prereset, | ||
224 | .cable_detect = atiixp_cable_detect, | 250 | .cable_detect = atiixp_cable_detect, |
225 | .set_piomode = atiixp_set_piomode, | 251 | .set_piomode = atiixp_set_piomode, |
226 | .set_dmamode = atiixp_set_dmamode, | 252 | .set_dmamode = atiixp_set_dmamode, |
@@ -235,16 +261,7 @@ static int atiixp_init_one(struct pci_dev *pdev, const struct pci_device_id *id) | |||
235 | .udma_mask = ATA_UDMA5, | 261 | .udma_mask = ATA_UDMA5, |
236 | .port_ops = &atiixp_port_ops | 262 | .port_ops = &atiixp_port_ops |
237 | }; | 263 | }; |
238 | static const struct pci_bits atiixp_enable_bits[] = { | ||
239 | { 0x48, 1, 0x01, 0x00 }, | ||
240 | { 0x48, 1, 0x08, 0x00 } | ||
241 | }; | ||
242 | const struct ata_port_info *ppi[] = { &info, &info }; | 264 | const struct ata_port_info *ppi[] = { &info, &info }; |
243 | int i; | ||
244 | |||
245 | for (i = 0; i < 2; i++) | ||
246 | if (!pci_test_config_bits(pdev, &atiixp_enable_bits[i])) | ||
247 | ppi[i] = &ata_dummy_port_info; | ||
248 | 265 | ||
249 | return ata_pci_bmdma_init_one(pdev, ppi, &atiixp_sht, NULL, | 266 | return ata_pci_bmdma_init_one(pdev, ppi, &atiixp_sht, NULL, |
250 | ATA_HOST_PARALLEL_SCAN); | 267 | ATA_HOST_PARALLEL_SCAN); |
diff --git a/drivers/ata/pata_cmd64x.c b/drivers/ata/pata_cmd64x.c index 7bafc16cf5e0..e1fb39a74ce1 100644 --- a/drivers/ata/pata_cmd64x.c +++ b/drivers/ata/pata_cmd64x.c | |||
@@ -82,7 +82,7 @@ static int cmd648_cable_detect(struct ata_port *ap) | |||
82 | } | 82 | } |
83 | 83 | ||
84 | /** | 84 | /** |
85 | * cmd64x_set_piomode - set PIO and MWDMA timing | 85 | * cmd64x_set_timing - set PIO and MWDMA timing |
86 | * @ap: ATA interface | 86 | * @ap: ATA interface |
87 | * @adev: ATA device | 87 | * @adev: ATA device |
88 | * @mode: mode | 88 | * @mode: mode |
@@ -288,6 +288,22 @@ static struct ata_port_operations cmd648_port_ops = { | |||
288 | .cable_detect = cmd648_cable_detect, | 288 | .cable_detect = cmd648_cable_detect, |
289 | }; | 289 | }; |
290 | 290 | ||
291 | static void cmd64x_fixup(struct pci_dev *pdev) | ||
292 | { | ||
293 | u8 mrdmode; | ||
294 | |||
295 | pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 64); | ||
296 | pci_read_config_byte(pdev, MRDMODE, &mrdmode); | ||
297 | mrdmode &= ~0x30; /* IRQ set up */ | ||
298 | mrdmode |= 0x02; /* Memory read line enable */ | ||
299 | pci_write_config_byte(pdev, MRDMODE, mrdmode); | ||
300 | |||
301 | /* PPC specific fixup copied from old driver */ | ||
302 | #ifdef CONFIG_PPC | ||
303 | pci_write_config_byte(pdev, UDIDETCR0, 0xF0); | ||
304 | #endif | ||
305 | } | ||
306 | |||
291 | static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id) | 307 | static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id) |
292 | { | 308 | { |
293 | static const struct ata_port_info cmd_info[6] = { | 309 | static const struct ata_port_info cmd_info[6] = { |
@@ -336,7 +352,7 @@ static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id) | |||
336 | &cmd_info[id->driver_data], | 352 | &cmd_info[id->driver_data], |
337 | NULL | 353 | NULL |
338 | }; | 354 | }; |
339 | u8 mrdmode, reg; | 355 | u8 reg; |
340 | int rc; | 356 | int rc; |
341 | struct pci_dev *bridge = pdev->bus->self; | 357 | struct pci_dev *bridge = pdev->bus->self; |
342 | /* mobility split bridges don't report enabled ports correctly */ | 358 | /* mobility split bridges don't report enabled ports correctly */ |
@@ -368,11 +384,7 @@ static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id) | |||
368 | cntrl_ch0_ok = 0; | 384 | cntrl_ch0_ok = 0; |
369 | } | 385 | } |
370 | 386 | ||
371 | pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 64); | 387 | cmd64x_fixup(pdev); |
372 | pci_read_config_byte(pdev, MRDMODE, &mrdmode); | ||
373 | mrdmode &= ~ 0x30; /* IRQ set up */ | ||
374 | mrdmode |= 0x02; /* Memory read line enable */ | ||
375 | pci_write_config_byte(pdev, MRDMODE, mrdmode); | ||
376 | 388 | ||
377 | /* check for enabled ports */ | 389 | /* check for enabled ports */ |
378 | pci_read_config_byte(pdev, CNTRL, ®); | 390 | pci_read_config_byte(pdev, CNTRL, ®); |
@@ -388,13 +400,6 @@ static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id) | |||
388 | ppi[1] = &ata_dummy_port_info; | 400 | ppi[1] = &ata_dummy_port_info; |
389 | } | 401 | } |
390 | 402 | ||
391 | /* Force PIO 0 here.. */ | ||
392 | |||
393 | /* PPC specific fixup copied from old driver */ | ||
394 | #ifdef CONFIG_PPC | ||
395 | pci_write_config_byte(pdev, UDIDETCR0, 0xF0); | ||
396 | #endif | ||
397 | |||
398 | return ata_pci_bmdma_init_one(pdev, ppi, &cmd64x_sht, NULL, 0); | 403 | return ata_pci_bmdma_init_one(pdev, ppi, &cmd64x_sht, NULL, 0); |
399 | } | 404 | } |
400 | 405 | ||
@@ -402,21 +407,14 @@ static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id) | |||
402 | static int cmd64x_reinit_one(struct pci_dev *pdev) | 407 | static int cmd64x_reinit_one(struct pci_dev *pdev) |
403 | { | 408 | { |
404 | struct ata_host *host = dev_get_drvdata(&pdev->dev); | 409 | struct ata_host *host = dev_get_drvdata(&pdev->dev); |
405 | u8 mrdmode; | ||
406 | int rc; | 410 | int rc; |
407 | 411 | ||
408 | rc = ata_pci_device_do_resume(pdev); | 412 | rc = ata_pci_device_do_resume(pdev); |
409 | if (rc) | 413 | if (rc) |
410 | return rc; | 414 | return rc; |
411 | 415 | ||
412 | pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 64); | 416 | cmd64x_fixup(pdev); |
413 | pci_read_config_byte(pdev, MRDMODE, &mrdmode); | 417 | |
414 | mrdmode &= ~ 0x30; /* IRQ set up */ | ||
415 | mrdmode |= 0x02; /* Memory read line enable */ | ||
416 | pci_write_config_byte(pdev, MRDMODE, mrdmode); | ||
417 | #ifdef CONFIG_PPC | ||
418 | pci_write_config_byte(pdev, UDIDETCR0, 0xF0); | ||
419 | #endif | ||
420 | ata_host_resume(host); | 418 | ata_host_resume(host); |
421 | return 0; | 419 | return 0; |
422 | } | 420 | } |
diff --git a/drivers/ata/pata_cs5535.c b/drivers/ata/pata_cs5535.c index 03a93186aa19..a0b4640125ae 100644 --- a/drivers/ata/pata_cs5535.c +++ b/drivers/ata/pata_cs5535.c | |||
@@ -38,7 +38,7 @@ | |||
38 | #include <linux/libata.h> | 38 | #include <linux/libata.h> |
39 | #include <asm/msr.h> | 39 | #include <asm/msr.h> |
40 | 40 | ||
41 | #define DRV_NAME "cs5535" | 41 | #define DRV_NAME "pata_cs5535" |
42 | #define DRV_VERSION "0.2.12" | 42 | #define DRV_VERSION "0.2.12" |
43 | 43 | ||
44 | /* | 44 | /* |
@@ -67,8 +67,6 @@ | |||
67 | 67 | ||
68 | #define CS5535_CABLE_DETECT 0x48 | 68 | #define CS5535_CABLE_DETECT 0x48 |
69 | 69 | ||
70 | #define CS5535_BAD_PIO(timings) ( (timings&~0x80000000UL)==0x00009172 ) | ||
71 | |||
72 | /** | 70 | /** |
73 | * cs5535_cable_detect - detect cable type | 71 | * cs5535_cable_detect - detect cable type |
74 | * @ap: Port to detect on | 72 | * @ap: Port to detect on |
@@ -188,16 +186,6 @@ static int cs5535_init_one(struct pci_dev *dev, const struct pci_device_id *id) | |||
188 | }; | 186 | }; |
189 | const struct ata_port_info *ppi[] = { &info, &ata_dummy_port_info }; | 187 | const struct ata_port_info *ppi[] = { &info, &ata_dummy_port_info }; |
190 | 188 | ||
191 | u32 timings, dummy; | ||
192 | |||
193 | /* Check the BIOS set the initial timing clock. If not set the | ||
194 | timings for PIO0 */ | ||
195 | rdmsr(ATAC_CH0D0_PIO, timings, dummy); | ||
196 | if (CS5535_BAD_PIO(timings)) | ||
197 | wrmsr(ATAC_CH0D0_PIO, 0xF7F4F7F4UL, 0); | ||
198 | rdmsr(ATAC_CH0D1_PIO, timings, dummy); | ||
199 | if (CS5535_BAD_PIO(timings)) | ||
200 | wrmsr(ATAC_CH0D1_PIO, 0xF7F4F7F4UL, 0); | ||
201 | return ata_pci_bmdma_init_one(dev, ppi, &cs5535_sht, NULL, 0); | 189 | return ata_pci_bmdma_init_one(dev, ppi, &cs5535_sht, NULL, 0); |
202 | } | 190 | } |
203 | 191 | ||
@@ -230,7 +218,7 @@ static void __exit cs5535_exit(void) | |||
230 | } | 218 | } |
231 | 219 | ||
232 | MODULE_AUTHOR("Alan Cox, Jens Altmann, Wolfgan Zuleger, Alexander Kiausch"); | 220 | MODULE_AUTHOR("Alan Cox, Jens Altmann, Wolfgan Zuleger, Alexander Kiausch"); |
233 | MODULE_DESCRIPTION("low-level driver for the NS/AMD 5530"); | 221 | MODULE_DESCRIPTION("low-level driver for the NS/AMD 5535"); |
234 | MODULE_LICENSE("GPL"); | 222 | MODULE_LICENSE("GPL"); |
235 | MODULE_DEVICE_TABLE(pci, cs5535); | 223 | MODULE_DEVICE_TABLE(pci, cs5535); |
236 | MODULE_VERSION(DRV_VERSION); | 224 | MODULE_VERSION(DRV_VERSION); |
diff --git a/drivers/ata/pata_efar.c b/drivers/ata/pata_efar.c index aca47e4e29ea..f0243ed206f7 100644 --- a/drivers/ata/pata_efar.c +++ b/drivers/ata/pata_efar.c | |||
@@ -73,7 +73,7 @@ static DEFINE_SPINLOCK(efar_lock); | |||
73 | /** | 73 | /** |
74 | * efar_set_piomode - Initialize host controller PATA PIO timings | 74 | * efar_set_piomode - Initialize host controller PATA PIO timings |
75 | * @ap: Port whose timings we are configuring | 75 | * @ap: Port whose timings we are configuring |
76 | * @adev: um | 76 | * @adev: Device to program |
77 | * | 77 | * |
78 | * Set PIO mode for device, in host controller PCI config space. | 78 | * Set PIO mode for device, in host controller PCI config space. |
79 | * | 79 | * |
@@ -85,9 +85,9 @@ static void efar_set_piomode (struct ata_port *ap, struct ata_device *adev) | |||
85 | { | 85 | { |
86 | unsigned int pio = adev->pio_mode - XFER_PIO_0; | 86 | unsigned int pio = adev->pio_mode - XFER_PIO_0; |
87 | struct pci_dev *dev = to_pci_dev(ap->host->dev); | 87 | struct pci_dev *dev = to_pci_dev(ap->host->dev); |
88 | unsigned int idetm_port= ap->port_no ? 0x42 : 0x40; | 88 | unsigned int master_port = ap->port_no ? 0x42 : 0x40; |
89 | unsigned long flags; | 89 | unsigned long flags; |
90 | u16 idetm_data; | 90 | u16 master_data; |
91 | u8 udma_enable; | 91 | u8 udma_enable; |
92 | int control = 0; | 92 | int control = 0; |
93 | 93 | ||
@@ -113,20 +113,20 @@ static void efar_set_piomode (struct ata_port *ap, struct ata_device *adev) | |||
113 | 113 | ||
114 | spin_lock_irqsave(&efar_lock, flags); | 114 | spin_lock_irqsave(&efar_lock, flags); |
115 | 115 | ||
116 | pci_read_config_word(dev, idetm_port, &idetm_data); | 116 | pci_read_config_word(dev, master_port, &master_data); |
117 | 117 | ||
118 | /* Set PPE, IE, and TIME as appropriate */ | 118 | /* Set PPE, IE, and TIME as appropriate */ |
119 | if (adev->devno == 0) { | 119 | if (adev->devno == 0) { |
120 | idetm_data &= 0xCCF0; | 120 | master_data &= 0xCCF0; |
121 | idetm_data |= control; | 121 | master_data |= control; |
122 | idetm_data |= (timings[pio][0] << 12) | | 122 | master_data |= (timings[pio][0] << 12) | |
123 | (timings[pio][1] << 8); | 123 | (timings[pio][1] << 8); |
124 | } else { | 124 | } else { |
125 | int shift = 4 * ap->port_no; | 125 | int shift = 4 * ap->port_no; |
126 | u8 slave_data; | 126 | u8 slave_data; |
127 | 127 | ||
128 | idetm_data &= 0xFF0F; | 128 | master_data &= 0xFF0F; |
129 | idetm_data |= (control << 4); | 129 | master_data |= (control << 4); |
130 | 130 | ||
131 | /* Slave timing in separate register */ | 131 | /* Slave timing in separate register */ |
132 | pci_read_config_byte(dev, 0x44, &slave_data); | 132 | pci_read_config_byte(dev, 0x44, &slave_data); |
@@ -135,8 +135,8 @@ static void efar_set_piomode (struct ata_port *ap, struct ata_device *adev) | |||
135 | pci_write_config_byte(dev, 0x44, slave_data); | 135 | pci_write_config_byte(dev, 0x44, slave_data); |
136 | } | 136 | } |
137 | 137 | ||
138 | idetm_data |= 0x4000; /* Ensure SITRE is set */ | 138 | master_data |= 0x4000; /* Ensure SITRE is set */ |
139 | pci_write_config_word(dev, idetm_port, idetm_data); | 139 | pci_write_config_word(dev, master_port, master_data); |
140 | 140 | ||
141 | pci_read_config_byte(dev, 0x48, &udma_enable); | 141 | pci_read_config_byte(dev, 0x48, &udma_enable); |
142 | udma_enable &= ~(1 << (2 * ap->port_no + adev->devno)); | 142 | udma_enable &= ~(1 << (2 * ap->port_no + adev->devno)); |
diff --git a/drivers/ata/pata_hpt366.c b/drivers/ata/pata_hpt366.c index 6c77d68dbd05..42cffd38910d 100644 --- a/drivers/ata/pata_hpt366.c +++ b/drivers/ata/pata_hpt366.c | |||
@@ -111,6 +111,28 @@ static const struct hpt_clock hpt366_25[] = { | |||
111 | { 0, 0x01208585 } | 111 | { 0, 0x01208585 } |
112 | }; | 112 | }; |
113 | 113 | ||
114 | /** | ||
115 | * hpt36x_find_mode - find the hpt36x timing | ||
116 | * @ap: ATA port | ||
117 | * @speed: transfer mode | ||
118 | * | ||
119 | * Return the 32bit register programming information for this channel | ||
120 | * that matches the speed provided. | ||
121 | */ | ||
122 | |||
123 | static u32 hpt36x_find_mode(struct ata_port *ap, int speed) | ||
124 | { | ||
125 | struct hpt_clock *clocks = ap->host->private_data; | ||
126 | |||
127 | while (clocks->xfer_mode) { | ||
128 | if (clocks->xfer_mode == speed) | ||
129 | return clocks->timing; | ||
130 | clocks++; | ||
131 | } | ||
132 | BUG(); | ||
133 | return 0xffffffffU; /* silence compiler warning */ | ||
134 | } | ||
135 | |||
114 | static const char * const bad_ata33[] = { | 136 | static const char * const bad_ata33[] = { |
115 | "Maxtor 92720U8", "Maxtor 92040U6", "Maxtor 91360U4", "Maxtor 91020U3", | 137 | "Maxtor 92720U8", "Maxtor 92040U6", "Maxtor 91360U4", "Maxtor 91020U3", |
116 | "Maxtor 90845U3", "Maxtor 90650U2", | 138 | "Maxtor 90845U3", "Maxtor 90650U2", |
@@ -210,10 +232,9 @@ static int hpt36x_cable_detect(struct ata_port *ap) | |||
210 | static void hpt366_set_mode(struct ata_port *ap, struct ata_device *adev, | 232 | static void hpt366_set_mode(struct ata_port *ap, struct ata_device *adev, |
211 | u8 mode) | 233 | u8 mode) |
212 | { | 234 | { |
213 | struct hpt_clock *clocks = ap->host->private_data; | ||
214 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 235 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
215 | u32 addr = 0x40 + 4 * adev->devno; | 236 | u32 addr = 0x40 + 4 * adev->devno; |
216 | u32 mask, reg; | 237 | u32 mask, reg, t; |
217 | 238 | ||
218 | /* determine timing mask and find matching clock entry */ | 239 | /* determine timing mask and find matching clock entry */ |
219 | if (mode < XFER_MW_DMA_0) | 240 | if (mode < XFER_MW_DMA_0) |
@@ -223,13 +244,7 @@ static void hpt366_set_mode(struct ata_port *ap, struct ata_device *adev, | |||
223 | else | 244 | else |
224 | mask = 0x30070000; | 245 | mask = 0x30070000; |
225 | 246 | ||
226 | while (clocks->xfer_mode) { | 247 | t = hpt36x_find_mode(ap, mode); |
227 | if (clocks->xfer_mode == mode) | ||
228 | break; | ||
229 | clocks++; | ||
230 | } | ||
231 | if (!clocks->xfer_mode) | ||
232 | BUG(); | ||
233 | 248 | ||
234 | /* | 249 | /* |
235 | * Combine new mode bits with old config bits and disable | 250 | * Combine new mode bits with old config bits and disable |
@@ -237,7 +252,7 @@ static void hpt366_set_mode(struct ata_port *ap, struct ata_device *adev, | |||
237 | * problems handling I/O errors later. | 252 | * problems handling I/O errors later. |
238 | */ | 253 | */ |
239 | pci_read_config_dword(pdev, addr, ®); | 254 | pci_read_config_dword(pdev, addr, ®); |
240 | reg = ((reg & ~mask) | (clocks->timing & mask)) & ~0xc0000000; | 255 | reg = ((reg & ~mask) | (t & mask)) & ~0xc0000000; |
241 | pci_write_config_dword(pdev, addr, reg); | 256 | pci_write_config_dword(pdev, addr, reg); |
242 | } | 257 | } |
243 | 258 | ||
diff --git a/drivers/ata/pata_it8213.c b/drivers/ata/pata_it8213.c index 998af0e629b1..cf9164d79f11 100644 --- a/drivers/ata/pata_it8213.c +++ b/drivers/ata/pata_it8213.c | |||
@@ -76,8 +76,8 @@ static void it8213_set_piomode (struct ata_port *ap, struct ata_device *adev) | |||
76 | { | 76 | { |
77 | unsigned int pio = adev->pio_mode - XFER_PIO_0; | 77 | unsigned int pio = adev->pio_mode - XFER_PIO_0; |
78 | struct pci_dev *dev = to_pci_dev(ap->host->dev); | 78 | struct pci_dev *dev = to_pci_dev(ap->host->dev); |
79 | unsigned int idetm_port= ap->port_no ? 0x42 : 0x40; | 79 | unsigned int master_port = ap->port_no ? 0x42 : 0x40; |
80 | u16 idetm_data; | 80 | u16 master_data; |
81 | int control = 0; | 81 | int control = 0; |
82 | 82 | ||
83 | /* | 83 | /* |
@@ -100,19 +100,19 @@ static void it8213_set_piomode (struct ata_port *ap, struct ata_device *adev) | |||
100 | if (adev->class != ATA_DEV_ATA) | 100 | if (adev->class != ATA_DEV_ATA) |
101 | control |= 4; /* PPE */ | 101 | control |= 4; /* PPE */ |
102 | 102 | ||
103 | pci_read_config_word(dev, idetm_port, &idetm_data); | 103 | pci_read_config_word(dev, master_port, &master_data); |
104 | 104 | ||
105 | /* Set PPE, IE, and TIME as appropriate */ | 105 | /* Set PPE, IE, and TIME as appropriate */ |
106 | if (adev->devno == 0) { | 106 | if (adev->devno == 0) { |
107 | idetm_data &= 0xCCF0; | 107 | master_data &= 0xCCF0; |
108 | idetm_data |= control; | 108 | master_data |= control; |
109 | idetm_data |= (timings[pio][0] << 12) | | 109 | master_data |= (timings[pio][0] << 12) | |
110 | (timings[pio][1] << 8); | 110 | (timings[pio][1] << 8); |
111 | } else { | 111 | } else { |
112 | u8 slave_data; | 112 | u8 slave_data; |
113 | 113 | ||
114 | idetm_data &= 0xFF0F; | 114 | master_data &= 0xFF0F; |
115 | idetm_data |= (control << 4); | 115 | master_data |= (control << 4); |
116 | 116 | ||
117 | /* Slave timing in separate register */ | 117 | /* Slave timing in separate register */ |
118 | pci_read_config_byte(dev, 0x44, &slave_data); | 118 | pci_read_config_byte(dev, 0x44, &slave_data); |
@@ -121,8 +121,8 @@ static void it8213_set_piomode (struct ata_port *ap, struct ata_device *adev) | |||
121 | pci_write_config_byte(dev, 0x44, slave_data); | 121 | pci_write_config_byte(dev, 0x44, slave_data); |
122 | } | 122 | } |
123 | 123 | ||
124 | idetm_data |= 0x4000; /* Ensure SITRE is set */ | 124 | master_data |= 0x4000; /* Ensure SITRE is set */ |
125 | pci_write_config_word(dev, idetm_port, idetm_data); | 125 | pci_write_config_word(dev, master_port, master_data); |
126 | } | 126 | } |
127 | 127 | ||
128 | /** | 128 | /** |
@@ -163,7 +163,7 @@ static void it8213_set_dmamode (struct ata_port *ap, struct ata_device *adev) | |||
163 | 163 | ||
164 | /* Clocks follow the PIIX style */ | 164 | /* Clocks follow the PIIX style */ |
165 | u_speed = min(2 - (udma & 1), udma); | 165 | u_speed = min(2 - (udma & 1), udma); |
166 | if (udma == 5) | 166 | if (udma > 4) |
167 | u_clock = 0x1000; /* 100Mhz */ | 167 | u_clock = 0x1000; /* 100Mhz */ |
168 | else if (udma > 2) | 168 | else if (udma > 2) |
169 | u_clock = 1; /* 66Mhz */ | 169 | u_clock = 1; /* 66Mhz */ |
@@ -262,7 +262,7 @@ static int it8213_init_one (struct pci_dev *pdev, const struct pci_device_id *en | |||
262 | .flags = ATA_FLAG_SLAVE_POSS, | 262 | .flags = ATA_FLAG_SLAVE_POSS, |
263 | .pio_mask = ATA_PIO4, | 263 | .pio_mask = ATA_PIO4, |
264 | .mwdma_mask = ATA_MWDMA12_ONLY, | 264 | .mwdma_mask = ATA_MWDMA12_ONLY, |
265 | .udma_mask = ATA_UDMA4, /* FIXME: want UDMA 100? */ | 265 | .udma_mask = ATA_UDMA6, |
266 | .port_ops = &it8213_ops, | 266 | .port_ops = &it8213_ops, |
267 | }; | 267 | }; |
268 | /* Current IT8213 stuff is single port */ | 268 | /* Current IT8213 stuff is single port */ |
diff --git a/drivers/ata/pata_legacy.c b/drivers/ata/pata_legacy.c index d960f8e9e8b1..35aca7d1a3eb 100644 --- a/drivers/ata/pata_legacy.c +++ b/drivers/ata/pata_legacy.c | |||
@@ -79,15 +79,6 @@ static int all; | |||
79 | module_param(all, int, 0444); | 79 | module_param(all, int, 0444); |
80 | MODULE_PARM_DESC(all, "Grab all legacy port devices, even if PCI(0=off, 1=on)"); | 80 | MODULE_PARM_DESC(all, "Grab all legacy port devices, even if PCI(0=off, 1=on)"); |
81 | 81 | ||
82 | struct legacy_data { | ||
83 | unsigned long timing; | ||
84 | u8 clock[2]; | ||
85 | u8 last; | ||
86 | int fast; | ||
87 | struct platform_device *platform_dev; | ||
88 | |||
89 | }; | ||
90 | |||
91 | enum controller { | 82 | enum controller { |
92 | BIOS = 0, | 83 | BIOS = 0, |
93 | SNOOP = 1, | 84 | SNOOP = 1, |
@@ -104,6 +95,14 @@ enum controller { | |||
104 | UNKNOWN = -1 | 95 | UNKNOWN = -1 |
105 | }; | 96 | }; |
106 | 97 | ||
98 | struct legacy_data { | ||
99 | unsigned long timing; | ||
100 | u8 clock[2]; | ||
101 | u8 last; | ||
102 | int fast; | ||
103 | enum controller type; | ||
104 | struct platform_device *platform_dev; | ||
105 | }; | ||
107 | 106 | ||
108 | struct legacy_probe { | 107 | struct legacy_probe { |
109 | unsigned char *name; | 108 | unsigned char *name; |
@@ -137,11 +136,17 @@ static int ht6560a; /* HT 6560A on primary 1, second 2, both 3 */ | |||
137 | static int ht6560b; /* HT 6560A on primary 1, second 2, both 3 */ | 136 | static int ht6560b; /* HT 6560A on primary 1, second 2, both 3 */ |
138 | static int opti82c611a; /* Opti82c611A on primary 1, sec 2, both 3 */ | 137 | static int opti82c611a; /* Opti82c611A on primary 1, sec 2, both 3 */ |
139 | static int opti82c46x; /* Opti 82c465MV present(pri/sec autodetect) */ | 138 | static int opti82c46x; /* Opti 82c465MV present(pri/sec autodetect) */ |
140 | static int qdi; /* Set to probe QDI controllers */ | ||
141 | static int autospeed; /* Chip present which snoops speed changes */ | 139 | static int autospeed; /* Chip present which snoops speed changes */ |
142 | static int pio_mask = ATA_PIO4; /* PIO range for autospeed devices */ | 140 | static int pio_mask = ATA_PIO4; /* PIO range for autospeed devices */ |
143 | static int iordy_mask = 0xFFFFFFFF; /* Use iordy if available */ | 141 | static int iordy_mask = 0xFFFFFFFF; /* Use iordy if available */ |
144 | 142 | ||
143 | /* Set to probe QDI controllers */ | ||
144 | #ifdef CONFIG_PATA_QDI_MODULE | ||
145 | static int qdi = 1; | ||
146 | #else | ||
147 | static int qdi; | ||
148 | #endif | ||
149 | |||
145 | #ifdef CONFIG_PATA_WINBOND_VLB_MODULE | 150 | #ifdef CONFIG_PATA_WINBOND_VLB_MODULE |
146 | static int winbond = 1; /* Set to probe Winbond controllers, | 151 | static int winbond = 1; /* Set to probe Winbond controllers, |
147 | give I/O port if non standard */ | 152 | give I/O port if non standard */ |
@@ -631,40 +636,20 @@ static struct ata_port_operations opti82c46x_port_ops = { | |||
631 | .qc_issue = opti82c46x_qc_issue, | 636 | .qc_issue = opti82c46x_qc_issue, |
632 | }; | 637 | }; |
633 | 638 | ||
634 | static void qdi6500_set_piomode(struct ata_port *ap, struct ata_device *adev) | ||
635 | { | ||
636 | struct ata_timing t; | ||
637 | struct legacy_data *ld_qdi = ap->host->private_data; | ||
638 | int active, recovery; | ||
639 | u8 timing; | ||
640 | |||
641 | /* Get the timing data in cycles */ | ||
642 | ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000); | ||
643 | |||
644 | if (ld_qdi->fast) { | ||
645 | active = 8 - clamp_val(t.active, 1, 8); | ||
646 | recovery = 18 - clamp_val(t.recover, 3, 18); | ||
647 | } else { | ||
648 | active = 9 - clamp_val(t.active, 2, 9); | ||
649 | recovery = 15 - clamp_val(t.recover, 0, 15); | ||
650 | } | ||
651 | timing = (recovery << 4) | active | 0x08; | ||
652 | |||
653 | ld_qdi->clock[adev->devno] = timing; | ||
654 | |||
655 | outb(timing, ld_qdi->timing); | ||
656 | } | ||
657 | |||
658 | /** | 639 | /** |
659 | * qdi6580dp_set_piomode - PIO setup for dual channel | 640 | * qdi65x0_set_piomode - PIO setup for QDI65x0 |
660 | * @ap: Port | 641 | * @ap: Port |
661 | * @adev: Device | 642 | * @adev: Device |
662 | * | 643 | * |
644 | * In single channel mode the 6580 has one clock per device and we can | ||
645 | * avoid the requirement to clock switch. We also have to load the timing | ||
646 | * into the right clock according to whether we are master or slave. | ||
647 | * | ||
663 | * In dual channel mode the 6580 has one clock per channel and we have | 648 | * In dual channel mode the 6580 has one clock per channel and we have |
664 | * to software clockswitch in qc_issue. | 649 | * to software clockswitch in qc_issue. |
665 | */ | 650 | */ |
666 | 651 | ||
667 | static void qdi6580dp_set_piomode(struct ata_port *ap, struct ata_device *adev) | 652 | static void qdi65x0_set_piomode(struct ata_port *ap, struct ata_device *adev) |
668 | { | 653 | { |
669 | struct ata_timing t; | 654 | struct ata_timing t; |
670 | struct legacy_data *ld_qdi = ap->host->private_data; | 655 | struct legacy_data *ld_qdi = ap->host->private_data; |
@@ -682,47 +667,15 @@ static void qdi6580dp_set_piomode(struct ata_port *ap, struct ata_device *adev) | |||
682 | recovery = 15 - clamp_val(t.recover, 0, 15); | 667 | recovery = 15 - clamp_val(t.recover, 0, 15); |
683 | } | 668 | } |
684 | timing = (recovery << 4) | active | 0x08; | 669 | timing = (recovery << 4) | active | 0x08; |
685 | |||
686 | ld_qdi->clock[adev->devno] = timing; | 670 | ld_qdi->clock[adev->devno] = timing; |
687 | 671 | ||
688 | outb(timing, ld_qdi->timing + 2 * ap->port_no); | 672 | if (ld_qdi->type == QDI6580) |
689 | /* Clear the FIFO */ | 673 | outb(timing, ld_qdi->timing + 2 * adev->devno); |
690 | if (adev->class != ATA_DEV_ATA) | 674 | else |
691 | outb(0x5F, (ld_qdi->timing & 0xFFF0) + 3); | 675 | outb(timing, ld_qdi->timing + 2 * ap->port_no); |
692 | } | ||
693 | |||
694 | /** | ||
695 | * qdi6580_set_piomode - PIO setup for single channel | ||
696 | * @ap: Port | ||
697 | * @adev: Device | ||
698 | * | ||
699 | * In single channel mode the 6580 has one clock per device and we can | ||
700 | * avoid the requirement to clock switch. We also have to load the timing | ||
701 | * into the right clock according to whether we are master or slave. | ||
702 | */ | ||
703 | |||
704 | static void qdi6580_set_piomode(struct ata_port *ap, struct ata_device *adev) | ||
705 | { | ||
706 | struct ata_timing t; | ||
707 | struct legacy_data *ld_qdi = ap->host->private_data; | ||
708 | int active, recovery; | ||
709 | u8 timing; | ||
710 | |||
711 | /* Get the timing data in cycles */ | ||
712 | ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000); | ||
713 | 676 | ||
714 | if (ld_qdi->fast) { | ||
715 | active = 8 - clamp_val(t.active, 1, 8); | ||
716 | recovery = 18 - clamp_val(t.recover, 3, 18); | ||
717 | } else { | ||
718 | active = 9 - clamp_val(t.active, 2, 9); | ||
719 | recovery = 15 - clamp_val(t.recover, 0, 15); | ||
720 | } | ||
721 | timing = (recovery << 4) | active | 0x08; | ||
722 | ld_qdi->clock[adev->devno] = timing; | ||
723 | outb(timing, ld_qdi->timing + 2 * adev->devno); | ||
724 | /* Clear the FIFO */ | 677 | /* Clear the FIFO */ |
725 | if (adev->class != ATA_DEV_ATA) | 678 | if (ld_qdi->type != QDI6500 && adev->class != ATA_DEV_ATA) |
726 | outb(0x5F, (ld_qdi->timing & 0xFFF0) + 3); | 679 | outb(0x5F, (ld_qdi->timing & 0xFFF0) + 3); |
727 | } | 680 | } |
728 | 681 | ||
@@ -789,20 +742,20 @@ static int qdi_port(struct platform_device *dev, | |||
789 | 742 | ||
790 | static struct ata_port_operations qdi6500_port_ops = { | 743 | static struct ata_port_operations qdi6500_port_ops = { |
791 | .inherits = &legacy_base_port_ops, | 744 | .inherits = &legacy_base_port_ops, |
792 | .set_piomode = qdi6500_set_piomode, | 745 | .set_piomode = qdi65x0_set_piomode, |
793 | .qc_issue = qdi_qc_issue, | 746 | .qc_issue = qdi_qc_issue, |
794 | .sff_data_xfer = vlb32_data_xfer, | 747 | .sff_data_xfer = vlb32_data_xfer, |
795 | }; | 748 | }; |
796 | 749 | ||
797 | static struct ata_port_operations qdi6580_port_ops = { | 750 | static struct ata_port_operations qdi6580_port_ops = { |
798 | .inherits = &legacy_base_port_ops, | 751 | .inherits = &legacy_base_port_ops, |
799 | .set_piomode = qdi6580_set_piomode, | 752 | .set_piomode = qdi65x0_set_piomode, |
800 | .sff_data_xfer = vlb32_data_xfer, | 753 | .sff_data_xfer = vlb32_data_xfer, |
801 | }; | 754 | }; |
802 | 755 | ||
803 | static struct ata_port_operations qdi6580dp_port_ops = { | 756 | static struct ata_port_operations qdi6580dp_port_ops = { |
804 | .inherits = &legacy_base_port_ops, | 757 | .inherits = &legacy_base_port_ops, |
805 | .set_piomode = qdi6580dp_set_piomode, | 758 | .set_piomode = qdi65x0_set_piomode, |
806 | .qc_issue = qdi_qc_issue, | 759 | .qc_issue = qdi_qc_issue, |
807 | .sff_data_xfer = vlb32_data_xfer, | 760 | .sff_data_xfer = vlb32_data_xfer, |
808 | }; | 761 | }; |
@@ -879,29 +832,29 @@ static struct ata_port_operations winbond_port_ops = { | |||
879 | }; | 832 | }; |
880 | 833 | ||
881 | static struct legacy_controller controllers[] = { | 834 | static struct legacy_controller controllers[] = { |
882 | {"BIOS", &legacy_port_ops, 0x1F, | 835 | {"BIOS", &legacy_port_ops, ATA_PIO4, |
883 | ATA_FLAG_NO_IORDY, 0, NULL }, | 836 | ATA_FLAG_NO_IORDY, 0, NULL }, |
884 | {"Snooping", &simple_port_ops, 0x1F, | 837 | {"Snooping", &simple_port_ops, ATA_PIO4, |
885 | 0, 0, NULL }, | 838 | 0, 0, NULL }, |
886 | {"PDC20230", &pdc20230_port_ops, 0x7, | 839 | {"PDC20230", &pdc20230_port_ops, ATA_PIO2, |
887 | ATA_FLAG_NO_IORDY, | 840 | ATA_FLAG_NO_IORDY, |
888 | ATA_PFLAG_PIO32 | ATA_PFLAG_PIO32CHANGE, NULL }, | 841 | ATA_PFLAG_PIO32 | ATA_PFLAG_PIO32CHANGE, NULL }, |
889 | {"HT6560A", &ht6560a_port_ops, 0x07, | 842 | {"HT6560A", &ht6560a_port_ops, ATA_PIO2, |
890 | ATA_FLAG_NO_IORDY, 0, NULL }, | 843 | ATA_FLAG_NO_IORDY, 0, NULL }, |
891 | {"HT6560B", &ht6560b_port_ops, 0x1F, | 844 | {"HT6560B", &ht6560b_port_ops, ATA_PIO4, |
892 | ATA_FLAG_NO_IORDY, 0, NULL }, | 845 | ATA_FLAG_NO_IORDY, 0, NULL }, |
893 | {"OPTI82C611A", &opti82c611a_port_ops, 0x0F, | 846 | {"OPTI82C611A", &opti82c611a_port_ops, ATA_PIO3, |
894 | 0, 0, NULL }, | 847 | 0, 0, NULL }, |
895 | {"OPTI82C46X", &opti82c46x_port_ops, 0x0F, | 848 | {"OPTI82C46X", &opti82c46x_port_ops, ATA_PIO3, |
896 | 0, 0, NULL }, | 849 | 0, 0, NULL }, |
897 | {"QDI6500", &qdi6500_port_ops, 0x07, | 850 | {"QDI6500", &qdi6500_port_ops, ATA_PIO2, |
898 | ATA_FLAG_NO_IORDY, | 851 | ATA_FLAG_NO_IORDY, |
899 | ATA_PFLAG_PIO32 | ATA_PFLAG_PIO32CHANGE, qdi_port }, | 852 | ATA_PFLAG_PIO32 | ATA_PFLAG_PIO32CHANGE, qdi_port }, |
900 | {"QDI6580", &qdi6580_port_ops, 0x1F, | 853 | {"QDI6580", &qdi6580_port_ops, ATA_PIO4, |
901 | 0, ATA_PFLAG_PIO32 | ATA_PFLAG_PIO32CHANGE, qdi_port }, | 854 | 0, ATA_PFLAG_PIO32 | ATA_PFLAG_PIO32CHANGE, qdi_port }, |
902 | {"QDI6580DP", &qdi6580dp_port_ops, 0x1F, | 855 | {"QDI6580DP", &qdi6580dp_port_ops, ATA_PIO4, |
903 | 0, ATA_PFLAG_PIO32 | ATA_PFLAG_PIO32CHANGE, qdi_port }, | 856 | 0, ATA_PFLAG_PIO32 | ATA_PFLAG_PIO32CHANGE, qdi_port }, |
904 | {"W83759A", &winbond_port_ops, 0x1F, | 857 | {"W83759A", &winbond_port_ops, ATA_PIO4, |
905 | 0, ATA_PFLAG_PIO32 | ATA_PFLAG_PIO32CHANGE, | 858 | 0, ATA_PFLAG_PIO32 | ATA_PFLAG_PIO32CHANGE, |
906 | winbond_port } | 859 | winbond_port } |
907 | }; | 860 | }; |
@@ -1022,6 +975,7 @@ static __init int legacy_init_one(struct legacy_probe *probe) | |||
1022 | ctrl_addr = devm_ioport_map(&pdev->dev, io + 0x0206, 1); | 975 | ctrl_addr = devm_ioport_map(&pdev->dev, io + 0x0206, 1); |
1023 | if (!io_addr || !ctrl_addr) | 976 | if (!io_addr || !ctrl_addr) |
1024 | goto fail; | 977 | goto fail; |
978 | ld->type = probe->type; | ||
1025 | if (controller->setup) | 979 | if (controller->setup) |
1026 | if (controller->setup(pdev, probe, ld) < 0) | 980 | if (controller->setup(pdev, probe, ld) < 0) |
1027 | goto fail; | 981 | goto fail; |
@@ -1306,6 +1260,7 @@ MODULE_AUTHOR("Alan Cox"); | |||
1306 | MODULE_DESCRIPTION("low-level driver for legacy ATA"); | 1260 | MODULE_DESCRIPTION("low-level driver for legacy ATA"); |
1307 | MODULE_LICENSE("GPL"); | 1261 | MODULE_LICENSE("GPL"); |
1308 | MODULE_VERSION(DRV_VERSION); | 1262 | MODULE_VERSION(DRV_VERSION); |
1263 | MODULE_ALIAS("pata_qdi"); | ||
1309 | MODULE_ALIAS("pata_winbond"); | 1264 | MODULE_ALIAS("pata_winbond"); |
1310 | 1265 | ||
1311 | module_param(probe_all, int, 0); | 1266 | module_param(probe_all, int, 0); |
diff --git a/drivers/ata/pata_mpc52xx.c b/drivers/ata/pata_mpc52xx.c index 2fcac511d39c..3e1746314f22 100644 --- a/drivers/ata/pata_mpc52xx.c +++ b/drivers/ata/pata_mpc52xx.c | |||
@@ -780,7 +780,7 @@ mpc52xx_ata_probe(struct platform_device *op) | |||
780 | } | 780 | } |
781 | 781 | ||
782 | task_irq = bcom_get_task_irq(dmatsk); | 782 | task_irq = bcom_get_task_irq(dmatsk); |
783 | ret = request_irq(task_irq, &mpc52xx_ata_task_irq, IRQF_DISABLED, | 783 | ret = request_irq(task_irq, &mpc52xx_ata_task_irq, 0, |
784 | "ATA task", priv); | 784 | "ATA task", priv); |
785 | if (ret) { | 785 | if (ret) { |
786 | dev_err(&op->dev, "error requesting DMA IRQ\n"); | 786 | dev_err(&op->dev, "error requesting DMA IRQ\n"); |
diff --git a/drivers/ata/pata_of_platform.c b/drivers/ata/pata_of_platform.c index f3054009bd25..a72ab0dde4e5 100644 --- a/drivers/ata/pata_of_platform.c +++ b/drivers/ata/pata_of_platform.c | |||
@@ -11,6 +11,8 @@ | |||
11 | 11 | ||
12 | #include <linux/kernel.h> | 12 | #include <linux/kernel.h> |
13 | #include <linux/module.h> | 13 | #include <linux/module.h> |
14 | #include <linux/of_address.h> | ||
15 | #include <linux/of_irq.h> | ||
14 | #include <linux/of_platform.h> | 16 | #include <linux/of_platform.h> |
15 | #include <linux/ata_platform.h> | 17 | #include <linux/ata_platform.h> |
16 | 18 | ||
@@ -57,11 +59,11 @@ static int __devinit pata_of_platform_probe(struct platform_device *ofdev) | |||
57 | 59 | ||
58 | prop = of_get_property(dn, "reg-shift", NULL); | 60 | prop = of_get_property(dn, "reg-shift", NULL); |
59 | if (prop) | 61 | if (prop) |
60 | reg_shift = *prop; | 62 | reg_shift = be32_to_cpup(prop); |
61 | 63 | ||
62 | prop = of_get_property(dn, "pio-mode", NULL); | 64 | prop = of_get_property(dn, "pio-mode", NULL); |
63 | if (prop) { | 65 | if (prop) { |
64 | pio_mode = *prop; | 66 | pio_mode = be32_to_cpup(prop); |
65 | if (pio_mode > 6) { | 67 | if (pio_mode > 6) { |
66 | dev_err(&ofdev->dev, "invalid pio-mode\n"); | 68 | dev_err(&ofdev->dev, "invalid pio-mode\n"); |
67 | return -EINVAL; | 69 | return -EINVAL; |
diff --git a/drivers/ata/pata_pdc2027x.c b/drivers/ata/pata_pdc2027x.c index b1511f38b0e8..7d63f24179c7 100644 --- a/drivers/ata/pata_pdc2027x.c +++ b/drivers/ata/pata_pdc2027x.c | |||
@@ -63,6 +63,7 @@ enum { | |||
63 | }; | 63 | }; |
64 | 64 | ||
65 | static int pdc2027x_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); | 65 | static int pdc2027x_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); |
66 | static int pdc2027x_reinit_one(struct pci_dev *pdev); | ||
66 | static int pdc2027x_prereset(struct ata_link *link, unsigned long deadline); | 67 | static int pdc2027x_prereset(struct ata_link *link, unsigned long deadline); |
67 | static void pdc2027x_set_piomode(struct ata_port *ap, struct ata_device *adev); | 68 | static void pdc2027x_set_piomode(struct ata_port *ap, struct ata_device *adev); |
68 | static void pdc2027x_set_dmamode(struct ata_port *ap, struct ata_device *adev); | 69 | static void pdc2027x_set_dmamode(struct ata_port *ap, struct ata_device *adev); |
@@ -126,6 +127,10 @@ static struct pci_driver pdc2027x_pci_driver = { | |||
126 | .id_table = pdc2027x_pci_tbl, | 127 | .id_table = pdc2027x_pci_tbl, |
127 | .probe = pdc2027x_init_one, | 128 | .probe = pdc2027x_init_one, |
128 | .remove = ata_pci_remove_one, | 129 | .remove = ata_pci_remove_one, |
130 | #ifdef CONFIG_PM | ||
131 | .suspend = ata_pci_device_suspend, | ||
132 | .resume = pdc2027x_reinit_one, | ||
133 | #endif | ||
129 | }; | 134 | }; |
130 | 135 | ||
131 | static struct scsi_host_template pdc2027x_sht = { | 136 | static struct scsi_host_template pdc2027x_sht = { |
@@ -754,6 +759,31 @@ static int __devinit pdc2027x_init_one(struct pci_dev *pdev, const struct pci_de | |||
754 | IRQF_SHARED, &pdc2027x_sht); | 759 | IRQF_SHARED, &pdc2027x_sht); |
755 | } | 760 | } |
756 | 761 | ||
762 | #ifdef CONFIG_PM | ||
763 | static int pdc2027x_reinit_one(struct pci_dev *pdev) | ||
764 | { | ||
765 | struct ata_host *host = dev_get_drvdata(&pdev->dev); | ||
766 | unsigned int board_idx; | ||
767 | int rc; | ||
768 | |||
769 | rc = ata_pci_device_do_resume(pdev); | ||
770 | if (rc) | ||
771 | return rc; | ||
772 | |||
773 | if (pdev->device == PCI_DEVICE_ID_PROMISE_20268 || | ||
774 | pdev->device == PCI_DEVICE_ID_PROMISE_20270) | ||
775 | board_idx = PDC_UDMA_100; | ||
776 | else | ||
777 | board_idx = PDC_UDMA_133; | ||
778 | |||
779 | if (pdc_hardware_init(host, board_idx)) | ||
780 | return -EIO; | ||
781 | |||
782 | ata_host_resume(host); | ||
783 | return 0; | ||
784 | } | ||
785 | #endif | ||
786 | |||
757 | /** | 787 | /** |
758 | * pdc2027x_init - Called after this module is loaded into the kernel. | 788 | * pdc2027x_init - Called after this module is loaded into the kernel. |
759 | */ | 789 | */ |
diff --git a/drivers/ata/pata_qdi.c b/drivers/ata/pata_qdi.c deleted file mode 100644 index 45879dc6fa41..000000000000 --- a/drivers/ata/pata_qdi.c +++ /dev/null | |||
@@ -1,366 +0,0 @@ | |||
1 | /* | ||
2 | * pata_qdi.c - QDI VLB ATA controllers | ||
3 | * (C) 2006 Red Hat | ||
4 | * | ||
5 | * This driver mostly exists as a proof of concept for non PCI devices under | ||
6 | * libata. While the QDI6580 was 'neat' in 1993 it is no longer terribly | ||
7 | * useful. | ||
8 | * | ||
9 | * Tuning code written from the documentation at | ||
10 | * http://www.ryston.cz/petr/vlb/qd6500.html | ||
11 | * http://www.ryston.cz/petr/vlb/qd6580.html | ||
12 | * | ||
13 | * Probe code based on drivers/ide/legacy/qd65xx.c | ||
14 | * Rewritten from the work of Colten Edwards <pje120@cs.usask.ca> by | ||
15 | * Samuel Thibault <samuel.thibault@ens-lyon.org> | ||
16 | */ | ||
17 | |||
18 | #include <linux/kernel.h> | ||
19 | #include <linux/module.h> | ||
20 | #include <linux/pci.h> | ||
21 | #include <linux/init.h> | ||
22 | #include <linux/blkdev.h> | ||
23 | #include <linux/delay.h> | ||
24 | #include <scsi/scsi_host.h> | ||
25 | #include <linux/libata.h> | ||
26 | #include <linux/platform_device.h> | ||
27 | |||
28 | #define DRV_NAME "pata_qdi" | ||
29 | #define DRV_VERSION "0.3.1" | ||
30 | |||
31 | #define NR_HOST 4 /* Two 6580s */ | ||
32 | |||
33 | struct qdi_data { | ||
34 | unsigned long timing; | ||
35 | u8 clock[2]; | ||
36 | u8 last; | ||
37 | int fast; | ||
38 | struct platform_device *platform_dev; | ||
39 | |||
40 | }; | ||
41 | |||
42 | static struct ata_host *qdi_host[NR_HOST]; | ||
43 | static struct qdi_data qdi_data[NR_HOST]; | ||
44 | static int nr_qdi_host; | ||
45 | |||
46 | #ifdef MODULE | ||
47 | static int probe_qdi = 1; | ||
48 | #else | ||
49 | static int probe_qdi; | ||
50 | #endif | ||
51 | |||
52 | static void qdi6500_set_piomode(struct ata_port *ap, struct ata_device *adev) | ||
53 | { | ||
54 | struct ata_timing t; | ||
55 | struct qdi_data *qdi = ap->host->private_data; | ||
56 | int active, recovery; | ||
57 | u8 timing; | ||
58 | |||
59 | /* Get the timing data in cycles */ | ||
60 | ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000); | ||
61 | |||
62 | if (qdi->fast) { | ||
63 | active = 8 - clamp_val(t.active, 1, 8); | ||
64 | recovery = 18 - clamp_val(t.recover, 3, 18); | ||
65 | } else { | ||
66 | active = 9 - clamp_val(t.active, 2, 9); | ||
67 | recovery = 15 - clamp_val(t.recover, 0, 15); | ||
68 | } | ||
69 | timing = (recovery << 4) | active | 0x08; | ||
70 | |||
71 | qdi->clock[adev->devno] = timing; | ||
72 | |||
73 | outb(timing, qdi->timing); | ||
74 | } | ||
75 | |||
76 | static void qdi6580_set_piomode(struct ata_port *ap, struct ata_device *adev) | ||
77 | { | ||
78 | struct ata_timing t; | ||
79 | struct qdi_data *qdi = ap->host->private_data; | ||
80 | int active, recovery; | ||
81 | u8 timing; | ||
82 | |||
83 | /* Get the timing data in cycles */ | ||
84 | ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000); | ||
85 | |||
86 | if (qdi->fast) { | ||
87 | active = 8 - clamp_val(t.active, 1, 8); | ||
88 | recovery = 18 - clamp_val(t.recover, 3, 18); | ||
89 | } else { | ||
90 | active = 9 - clamp_val(t.active, 2, 9); | ||
91 | recovery = 15 - clamp_val(t.recover, 0, 15); | ||
92 | } | ||
93 | timing = (recovery << 4) | active | 0x08; | ||
94 | |||
95 | qdi->clock[adev->devno] = timing; | ||
96 | |||
97 | outb(timing, qdi->timing); | ||
98 | |||
99 | /* Clear the FIFO */ | ||
100 | if (adev->class != ATA_DEV_ATA) | ||
101 | outb(0x5F, (qdi->timing & 0xFFF0) + 3); | ||
102 | } | ||
103 | |||
104 | /** | ||
105 | * qdi_qc_issue - command issue | ||
106 | * @qc: command pending | ||
107 | * | ||
108 | * Called when the libata layer is about to issue a command. We wrap | ||
109 | * this interface so that we can load the correct ATA timings. | ||
110 | */ | ||
111 | |||
112 | static unsigned int qdi_qc_issue(struct ata_queued_cmd *qc) | ||
113 | { | ||
114 | struct ata_port *ap = qc->ap; | ||
115 | struct ata_device *adev = qc->dev; | ||
116 | struct qdi_data *qdi = ap->host->private_data; | ||
117 | |||
118 | if (qdi->clock[adev->devno] != qdi->last) { | ||
119 | if (adev->pio_mode) { | ||
120 | qdi->last = qdi->clock[adev->devno]; | ||
121 | outb(qdi->clock[adev->devno], qdi->timing); | ||
122 | } | ||
123 | } | ||
124 | return ata_sff_qc_issue(qc); | ||
125 | } | ||
126 | |||
127 | static unsigned int qdi_data_xfer(struct ata_device *dev, unsigned char *buf, | ||
128 | unsigned int buflen, int rw) | ||
129 | { | ||
130 | if (ata_id_has_dword_io(dev->id)) { | ||
131 | struct ata_port *ap = dev->link->ap; | ||
132 | int slop = buflen & 3; | ||
133 | |||
134 | if (rw == READ) | ||
135 | ioread32_rep(ap->ioaddr.data_addr, buf, buflen >> 2); | ||
136 | else | ||
137 | iowrite32_rep(ap->ioaddr.data_addr, buf, buflen >> 2); | ||
138 | |||
139 | if (unlikely(slop)) { | ||
140 | __le32 pad; | ||
141 | if (rw == READ) { | ||
142 | pad = cpu_to_le32(ioread32(ap->ioaddr.data_addr)); | ||
143 | memcpy(buf + buflen - slop, &pad, slop); | ||
144 | } else { | ||
145 | memcpy(&pad, buf + buflen - slop, slop); | ||
146 | iowrite32(le32_to_cpu(pad), ap->ioaddr.data_addr); | ||
147 | } | ||
148 | buflen += 4 - slop; | ||
149 | } | ||
150 | } else | ||
151 | buflen = ata_sff_data_xfer(dev, buf, buflen, rw); | ||
152 | |||
153 | return buflen; | ||
154 | } | ||
155 | |||
156 | static struct scsi_host_template qdi_sht = { | ||
157 | ATA_PIO_SHT(DRV_NAME), | ||
158 | }; | ||
159 | |||
160 | static struct ata_port_operations qdi6500_port_ops = { | ||
161 | .inherits = &ata_sff_port_ops, | ||
162 | .qc_issue = qdi_qc_issue, | ||
163 | .sff_data_xfer = qdi_data_xfer, | ||
164 | .cable_detect = ata_cable_40wire, | ||
165 | .set_piomode = qdi6500_set_piomode, | ||
166 | }; | ||
167 | |||
168 | static struct ata_port_operations qdi6580_port_ops = { | ||
169 | .inherits = &qdi6500_port_ops, | ||
170 | .set_piomode = qdi6580_set_piomode, | ||
171 | }; | ||
172 | |||
173 | /** | ||
174 | * qdi_init_one - attach a qdi interface | ||
175 | * @type: Type to display | ||
176 | * @io: I/O port start | ||
177 | * @irq: interrupt line | ||
178 | * @fast: True if on a > 33Mhz VLB | ||
179 | * | ||
180 | * Register an ISA bus IDE interface. Such interfaces are PIO and we | ||
181 | * assume do not support IRQ sharing. | ||
182 | */ | ||
183 | |||
184 | static __init int qdi_init_one(unsigned long port, int type, unsigned long io, int irq, int fast) | ||
185 | { | ||
186 | unsigned long ctl = io + 0x206; | ||
187 | struct platform_device *pdev; | ||
188 | struct ata_host *host; | ||
189 | struct ata_port *ap; | ||
190 | void __iomem *io_addr, *ctl_addr; | ||
191 | int ret; | ||
192 | |||
193 | /* | ||
194 | * Fill in a probe structure first of all | ||
195 | */ | ||
196 | |||
197 | pdev = platform_device_register_simple(DRV_NAME, nr_qdi_host, NULL, 0); | ||
198 | if (IS_ERR(pdev)) | ||
199 | return PTR_ERR(pdev); | ||
200 | |||
201 | ret = -ENOMEM; | ||
202 | io_addr = devm_ioport_map(&pdev->dev, io, 8); | ||
203 | ctl_addr = devm_ioport_map(&pdev->dev, ctl, 1); | ||
204 | if (!io_addr || !ctl_addr) | ||
205 | goto fail; | ||
206 | |||
207 | ret = -ENOMEM; | ||
208 | host = ata_host_alloc(&pdev->dev, 1); | ||
209 | if (!host) | ||
210 | goto fail; | ||
211 | ap = host->ports[0]; | ||
212 | |||
213 | if (type == 6580) { | ||
214 | ap->ops = &qdi6580_port_ops; | ||
215 | ap->pio_mask = ATA_PIO4; | ||
216 | ap->flags |= ATA_FLAG_SLAVE_POSS; | ||
217 | } else { | ||
218 | ap->ops = &qdi6500_port_ops; | ||
219 | ap->pio_mask = ATA_PIO2; /* Actually PIO3 !IORDY is possible */ | ||
220 | ap->flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_NO_IORDY; | ||
221 | } | ||
222 | |||
223 | ap->ioaddr.cmd_addr = io_addr; | ||
224 | ap->ioaddr.altstatus_addr = ctl_addr; | ||
225 | ap->ioaddr.ctl_addr = ctl_addr; | ||
226 | ata_sff_std_ports(&ap->ioaddr); | ||
227 | |||
228 | ata_port_desc(ap, "cmd %lx ctl %lx", io, ctl); | ||
229 | |||
230 | /* | ||
231 | * Hook in a private data structure per channel | ||
232 | */ | ||
233 | ap->private_data = &qdi_data[nr_qdi_host]; | ||
234 | |||
235 | qdi_data[nr_qdi_host].timing = port; | ||
236 | qdi_data[nr_qdi_host].fast = fast; | ||
237 | qdi_data[nr_qdi_host].platform_dev = pdev; | ||
238 | |||
239 | printk(KERN_INFO DRV_NAME": qd%d at 0x%lx.\n", type, io); | ||
240 | |||
241 | /* activate */ | ||
242 | ret = ata_host_activate(host, irq, ata_sff_interrupt, 0, &qdi_sht); | ||
243 | if (ret) | ||
244 | goto fail; | ||
245 | |||
246 | qdi_host[nr_qdi_host++] = dev_get_drvdata(&pdev->dev); | ||
247 | return 0; | ||
248 | |||
249 | fail: | ||
250 | platform_device_unregister(pdev); | ||
251 | return ret; | ||
252 | } | ||
253 | |||
254 | /** | ||
255 | * qdi_init - attach qdi interfaces | ||
256 | * | ||
257 | * Attach qdi IDE interfaces by scanning the ports it may occupy. | ||
258 | */ | ||
259 | |||
260 | static __init int qdi_init(void) | ||
261 | { | ||
262 | unsigned long flags; | ||
263 | static const unsigned long qd_port[2] = { 0x30, 0xB0 }; | ||
264 | static const unsigned long ide_port[2] = { 0x170, 0x1F0 }; | ||
265 | static const int ide_irq[2] = { 14, 15 }; | ||
266 | |||
267 | int ct = 0; | ||
268 | int i; | ||
269 | |||
270 | if (probe_qdi == 0) | ||
271 | return -ENODEV; | ||
272 | |||
273 | /* | ||
274 | * Check each possible QD65xx base address | ||
275 | */ | ||
276 | |||
277 | for (i = 0; i < 2; i++) { | ||
278 | unsigned long port = qd_port[i]; | ||
279 | u8 r, res; | ||
280 | |||
281 | |||
282 | if (request_region(port, 2, "pata_qdi")) { | ||
283 | /* Check for a card */ | ||
284 | local_irq_save(flags); | ||
285 | r = inb_p(port); | ||
286 | outb_p(0x19, port); | ||
287 | res = inb_p(port); | ||
288 | outb_p(r, port); | ||
289 | local_irq_restore(flags); | ||
290 | |||
291 | /* Fail */ | ||
292 | if (res == 0x19) | ||
293 | { | ||
294 | release_region(port, 2); | ||
295 | continue; | ||
296 | } | ||
297 | |||
298 | /* Passes the presence test */ | ||
299 | r = inb_p(port + 1); /* Check port agrees with port set */ | ||
300 | if ((r & 2) >> 1 != i) { | ||
301 | release_region(port, 2); | ||
302 | continue; | ||
303 | } | ||
304 | |||
305 | /* Check card type */ | ||
306 | if ((r & 0xF0) == 0xC0) { | ||
307 | /* QD6500: single channel */ | ||
308 | if (r & 8) { | ||
309 | /* Disabled ? */ | ||
310 | release_region(port, 2); | ||
311 | continue; | ||
312 | } | ||
313 | if (qdi_init_one(port, 6500, ide_port[r & 0x01], ide_irq[r & 0x01], r & 0x04) == 0) | ||
314 | ct++; | ||
315 | } | ||
316 | if (((r & 0xF0) == 0xA0) || (r & 0xF0) == 0x50) { | ||
317 | /* QD6580: dual channel */ | ||
318 | if (!request_region(port + 2 , 2, "pata_qdi")) | ||
319 | { | ||
320 | release_region(port, 2); | ||
321 | continue; | ||
322 | } | ||
323 | res = inb(port + 3); | ||
324 | if (res & 1) { | ||
325 | /* Single channel mode */ | ||
326 | if (qdi_init_one(port, 6580, ide_port[r & 0x01], ide_irq[r & 0x01], r & 0x04) == 0) | ||
327 | ct++; | ||
328 | } else { | ||
329 | /* Dual channel mode */ | ||
330 | if (qdi_init_one(port, 6580, 0x1F0, 14, r & 0x04) == 0) | ||
331 | ct++; | ||
332 | if (qdi_init_one(port + 2, 6580, 0x170, 15, r & 0x04) == 0) | ||
333 | ct++; | ||
334 | } | ||
335 | } | ||
336 | } | ||
337 | } | ||
338 | if (ct != 0) | ||
339 | return 0; | ||
340 | return -ENODEV; | ||
341 | } | ||
342 | |||
343 | static __exit void qdi_exit(void) | ||
344 | { | ||
345 | int i; | ||
346 | |||
347 | for (i = 0; i < nr_qdi_host; i++) { | ||
348 | ata_host_detach(qdi_host[i]); | ||
349 | /* Free the control resource. The 6580 dual channel has the resources | ||
350 | * claimed as a pair of 2 byte resources so we need no special cases... | ||
351 | */ | ||
352 | release_region(qdi_data[i].timing, 2); | ||
353 | platform_device_unregister(qdi_data[i].platform_dev); | ||
354 | } | ||
355 | } | ||
356 | |||
357 | MODULE_AUTHOR("Alan Cox"); | ||
358 | MODULE_DESCRIPTION("low-level driver for qdi ATA"); | ||
359 | MODULE_LICENSE("GPL"); | ||
360 | MODULE_VERSION(DRV_VERSION); | ||
361 | |||
362 | module_init(qdi_init); | ||
363 | module_exit(qdi_exit); | ||
364 | |||
365 | module_param(probe_qdi, int, 0); | ||
366 | |||
diff --git a/drivers/ata/pata_rdc.c b/drivers/ata/pata_rdc.c index 4d318f86ae86..e6a2dd7809c1 100644 --- a/drivers/ata/pata_rdc.c +++ b/drivers/ata/pata_rdc.c | |||
@@ -86,6 +86,8 @@ static int rdc_pata_prereset(struct ata_link *link, unsigned long deadline) | |||
86 | return ata_sff_prereset(link, deadline); | 86 | return ata_sff_prereset(link, deadline); |
87 | } | 87 | } |
88 | 88 | ||
89 | static DEFINE_SPINLOCK(rdc_lock); | ||
90 | |||
89 | /** | 91 | /** |
90 | * rdc_set_piomode - Initialize host controller PATA PIO timings | 92 | * rdc_set_piomode - Initialize host controller PATA PIO timings |
91 | * @ap: Port whose timings we are configuring | 93 | * @ap: Port whose timings we are configuring |
@@ -101,6 +103,7 @@ static void rdc_set_piomode(struct ata_port *ap, struct ata_device *adev) | |||
101 | { | 103 | { |
102 | unsigned int pio = adev->pio_mode - XFER_PIO_0; | 104 | unsigned int pio = adev->pio_mode - XFER_PIO_0; |
103 | struct pci_dev *dev = to_pci_dev(ap->host->dev); | 105 | struct pci_dev *dev = to_pci_dev(ap->host->dev); |
106 | unsigned long flags; | ||
104 | unsigned int is_slave = (adev->devno != 0); | 107 | unsigned int is_slave = (adev->devno != 0); |
105 | unsigned int master_port= ap->port_no ? 0x42 : 0x40; | 108 | unsigned int master_port= ap->port_no ? 0x42 : 0x40; |
106 | unsigned int slave_port = 0x44; | 109 | unsigned int slave_port = 0x44; |
@@ -124,6 +127,8 @@ static void rdc_set_piomode(struct ata_port *ap, struct ata_device *adev) | |||
124 | if (adev->class == ATA_DEV_ATA) | 127 | if (adev->class == ATA_DEV_ATA) |
125 | control |= 4; /* PPE enable */ | 128 | control |= 4; /* PPE enable */ |
126 | 129 | ||
130 | spin_lock_irqsave(&rdc_lock, flags); | ||
131 | |||
127 | /* PIO configuration clears DTE unconditionally. It will be | 132 | /* PIO configuration clears DTE unconditionally. It will be |
128 | * programmed in set_dmamode which is guaranteed to be called | 133 | * programmed in set_dmamode which is guaranteed to be called |
129 | * after set_piomode if any DMA mode is available. | 134 | * after set_piomode if any DMA mode is available. |
@@ -161,6 +166,8 @@ static void rdc_set_piomode(struct ata_port *ap, struct ata_device *adev) | |||
161 | pci_read_config_byte(dev, 0x48, &udma_enable); | 166 | pci_read_config_byte(dev, 0x48, &udma_enable); |
162 | udma_enable &= ~(1 << (2 * ap->port_no + adev->devno)); | 167 | udma_enable &= ~(1 << (2 * ap->port_no + adev->devno)); |
163 | pci_write_config_byte(dev, 0x48, udma_enable); | 168 | pci_write_config_byte(dev, 0x48, udma_enable); |
169 | |||
170 | spin_unlock_irqrestore(&rdc_lock, flags); | ||
164 | } | 171 | } |
165 | 172 | ||
166 | /** | 173 | /** |
@@ -177,6 +184,7 @@ static void rdc_set_piomode(struct ata_port *ap, struct ata_device *adev) | |||
177 | static void rdc_set_dmamode(struct ata_port *ap, struct ata_device *adev) | 184 | static void rdc_set_dmamode(struct ata_port *ap, struct ata_device *adev) |
178 | { | 185 | { |
179 | struct pci_dev *dev = to_pci_dev(ap->host->dev); | 186 | struct pci_dev *dev = to_pci_dev(ap->host->dev); |
187 | unsigned long flags; | ||
180 | u8 master_port = ap->port_no ? 0x42 : 0x40; | 188 | u8 master_port = ap->port_no ? 0x42 : 0x40; |
181 | u16 master_data; | 189 | u16 master_data; |
182 | u8 speed = adev->dma_mode; | 190 | u8 speed = adev->dma_mode; |
@@ -190,6 +198,8 @@ static void rdc_set_dmamode(struct ata_port *ap, struct ata_device *adev) | |||
190 | { 2, 1 }, | 198 | { 2, 1 }, |
191 | { 2, 3 }, }; | 199 | { 2, 3 }, }; |
192 | 200 | ||
201 | spin_lock_irqsave(&rdc_lock, flags); | ||
202 | |||
193 | pci_read_config_word(dev, master_port, &master_data); | 203 | pci_read_config_word(dev, master_port, &master_data); |
194 | pci_read_config_byte(dev, 0x48, &udma_enable); | 204 | pci_read_config_byte(dev, 0x48, &udma_enable); |
195 | 205 | ||
@@ -271,6 +281,8 @@ static void rdc_set_dmamode(struct ata_port *ap, struct ata_device *adev) | |||
271 | pci_write_config_word(dev, master_port, master_data); | 281 | pci_write_config_word(dev, master_port, master_data); |
272 | } | 282 | } |
273 | pci_write_config_byte(dev, 0x48, udma_enable); | 283 | pci_write_config_byte(dev, 0x48, udma_enable); |
284 | |||
285 | spin_unlock_irqrestore(&rdc_lock, flags); | ||
274 | } | 286 | } |
275 | 287 | ||
276 | static struct ata_port_operations rdc_pata_ops = { | 288 | static struct ata_port_operations rdc_pata_ops = { |
@@ -375,6 +387,10 @@ static struct pci_driver rdc_pci_driver = { | |||
375 | .id_table = rdc_pci_tbl, | 387 | .id_table = rdc_pci_tbl, |
376 | .probe = rdc_init_one, | 388 | .probe = rdc_init_one, |
377 | .remove = rdc_remove_one, | 389 | .remove = rdc_remove_one, |
390 | #ifdef CONFIG_PM | ||
391 | .suspend = ata_pci_device_suspend, | ||
392 | .resume = ata_pci_device_resume, | ||
393 | #endif | ||
378 | }; | 394 | }; |
379 | 395 | ||
380 | 396 | ||
diff --git a/drivers/ata/pata_sc1200.c b/drivers/ata/pata_sc1200.c index e2c18257adff..c0e603a84f7f 100644 --- a/drivers/ata/pata_sc1200.c +++ b/drivers/ata/pata_sc1200.c | |||
@@ -38,7 +38,7 @@ | |||
38 | #include <scsi/scsi_host.h> | 38 | #include <scsi/scsi_host.h> |
39 | #include <linux/libata.h> | 39 | #include <linux/libata.h> |
40 | 40 | ||
41 | #define DRV_NAME "sc1200" | 41 | #define DRV_NAME "pata_sc1200" |
42 | #define DRV_VERSION "0.2.6" | 42 | #define DRV_VERSION "0.2.6" |
43 | 43 | ||
44 | #define SC1200_REV_A 0x00 | 44 | #define SC1200_REV_A 0x00 |
@@ -86,10 +86,14 @@ static int sc1200_clock(void) | |||
86 | static void sc1200_set_piomode(struct ata_port *ap, struct ata_device *adev) | 86 | static void sc1200_set_piomode(struct ata_port *ap, struct ata_device *adev) |
87 | { | 87 | { |
88 | static const u32 pio_timings[4][5] = { | 88 | static const u32 pio_timings[4][5] = { |
89 | {0x00009172, 0x00012171, 0x00020080, 0x00032010, 0x00040010}, // format0 33Mhz | 89 | /* format0, 33Mhz */ |
90 | {0xd1329172, 0x71212171, 0x30200080, 0x20102010, 0x00100010}, // format1, 33Mhz | 90 | { 0x00009172, 0x00012171, 0x00020080, 0x00032010, 0x00040010 }, |
91 | {0xfaa3f4f3, 0xc23232b2, 0x513101c1, 0x31213121, 0x10211021}, // format1, 48Mhz | 91 | /* format1, 33Mhz */ |
92 | {0xfff4fff4, 0xf35353d3, 0x814102f1, 0x42314231, 0x11311131} // format1, 66Mhz | 92 | { 0xd1329172, 0x71212171, 0x30200080, 0x20102010, 0x00100010 }, |
93 | /* format1, 48Mhz */ | ||
94 | { 0xfaa3f4f3, 0xc23232b2, 0x513101c1, 0x31213121, 0x10211021 }, | ||
95 | /* format1, 66Mhz */ | ||
96 | { 0xfff4fff4, 0xf35353d3, 0x814102f1, 0x42314231, 0x11311131 } | ||
93 | }; | 97 | }; |
94 | 98 | ||
95 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 99 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
diff --git a/drivers/ata/pata_scc.c b/drivers/ata/pata_scc.c index eb748e327143..e265f835c95d 100644 --- a/drivers/ata/pata_scc.c +++ b/drivers/ata/pata_scc.c | |||
@@ -826,18 +826,6 @@ static unsigned int scc_data_xfer (struct ata_device *dev, unsigned char *buf, | |||
826 | } | 826 | } |
827 | 827 | ||
828 | /** | 828 | /** |
829 | * scc_pata_prereset - prepare for reset | ||
830 | * @ap: ATA port to be reset | ||
831 | * @deadline: deadline jiffies for the operation | ||
832 | */ | ||
833 | |||
834 | static int scc_pata_prereset(struct ata_link *link, unsigned long deadline) | ||
835 | { | ||
836 | link->ap->cbl = ATA_CBL_PATA80; | ||
837 | return ata_sff_prereset(link, deadline); | ||
838 | } | ||
839 | |||
840 | /** | ||
841 | * scc_postreset - standard postreset callback | 829 | * scc_postreset - standard postreset callback |
842 | * @ap: the target ata_port | 830 | * @ap: the target ata_port |
843 | * @classes: classes of attached devices | 831 | * @classes: classes of attached devices |
@@ -946,7 +934,7 @@ static struct ata_port_operations scc_pata_ops = { | |||
946 | .bmdma_status = scc_bmdma_status, | 934 | .bmdma_status = scc_bmdma_status, |
947 | .sff_data_xfer = scc_data_xfer, | 935 | .sff_data_xfer = scc_data_xfer, |
948 | 936 | ||
949 | .prereset = scc_pata_prereset, | 937 | .cable_detect = ata_cable_80wire, |
950 | .softreset = scc_softreset, | 938 | .softreset = scc_softreset, |
951 | .postreset = scc_postreset, | 939 | .postreset = scc_postreset, |
952 | 940 | ||
diff --git a/drivers/ata/pata_serverworks.c b/drivers/ata/pata_serverworks.c index 86dd714e3e1d..71eaf385e970 100644 --- a/drivers/ata/pata_serverworks.c +++ b/drivers/ata/pata_serverworks.c | |||
@@ -58,31 +58,15 @@ static const char *csb_bad_ata100[] = { | |||
58 | }; | 58 | }; |
59 | 59 | ||
60 | /** | 60 | /** |
61 | * dell_cable - Dell serverworks cable detection | 61 | * oem_cable - Dell/Sun serverworks cable detection |
62 | * @ap: ATA port to do cable detect | 62 | * @ap: ATA port to do cable detect |
63 | * | 63 | * |
64 | * Dell hide the 40/80 pin select for their interfaces in the top two | 64 | * Dell PowerEdge and Sun Cobalt 'Alpine' hide the 40/80 pin select |
65 | * bits of the subsystem ID. | 65 | * for their interfaces in the top two bits of the subsystem ID. |
66 | */ | 66 | */ |
67 | 67 | ||
68 | static int dell_cable(struct ata_port *ap) { | 68 | static int oem_cable(struct ata_port *ap) |
69 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 69 | { |
70 | |||
71 | if (pdev->subsystem_device & (1 << (ap->port_no + 14))) | ||
72 | return ATA_CBL_PATA80; | ||
73 | return ATA_CBL_PATA40; | ||
74 | } | ||
75 | |||
76 | /** | ||
77 | * sun_cable - Sun Cobalt 'Alpine' cable detection | ||
78 | * @ap: ATA port to do cable select | ||
79 | * | ||
80 | * Cobalt CSB5 IDE hides the 40/80pin in the top two bits of the | ||
81 | * subsystem ID the same as dell. We could use one function but we may | ||
82 | * need to extend the Dell one in future | ||
83 | */ | ||
84 | |||
85 | static int sun_cable(struct ata_port *ap) { | ||
86 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 70 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
87 | 71 | ||
88 | if (pdev->subsystem_device & (1 << (ap->port_no + 14))) | 72 | if (pdev->subsystem_device & (1 << (ap->port_no + 14))) |
@@ -90,49 +74,21 @@ static int sun_cable(struct ata_port *ap) { | |||
90 | return ATA_CBL_PATA40; | 74 | return ATA_CBL_PATA40; |
91 | } | 75 | } |
92 | 76 | ||
93 | /** | ||
94 | * osb4_cable - OSB4 cable detect | ||
95 | * @ap: ATA port to check | ||
96 | * | ||
97 | * The OSB4 isn't UDMA66 capable so this is easy | ||
98 | */ | ||
99 | |||
100 | static int osb4_cable(struct ata_port *ap) { | ||
101 | return ATA_CBL_PATA40; | ||
102 | } | ||
103 | |||
104 | /** | ||
105 | * csb_cable - CSB5/6 cable detect | ||
106 | * @ap: ATA port to check | ||
107 | * | ||
108 | * Serverworks default arrangement is to use the drive side detection | ||
109 | * only. | ||
110 | */ | ||
111 | |||
112 | static int csb_cable(struct ata_port *ap) { | ||
113 | return ATA_CBL_PATA_UNK; | ||
114 | } | ||
115 | |||
116 | struct sv_cable_table { | 77 | struct sv_cable_table { |
117 | int device; | 78 | int device; |
118 | int subvendor; | 79 | int subvendor; |
119 | int (*cable_detect)(struct ata_port *ap); | 80 | int (*cable_detect)(struct ata_port *ap); |
120 | }; | 81 | }; |
121 | 82 | ||
122 | /* | ||
123 | * Note that we don't copy the old serverworks code because the old | ||
124 | * code contains obvious mistakes | ||
125 | */ | ||
126 | |||
127 | static struct sv_cable_table cable_detect[] = { | 83 | static struct sv_cable_table cable_detect[] = { |
128 | { PCI_DEVICE_ID_SERVERWORKS_CSB5IDE, PCI_VENDOR_ID_DELL, dell_cable }, | 84 | { PCI_DEVICE_ID_SERVERWORKS_CSB5IDE, PCI_VENDOR_ID_DELL, oem_cable }, |
129 | { PCI_DEVICE_ID_SERVERWORKS_CSB6IDE, PCI_VENDOR_ID_DELL, dell_cable }, | 85 | { PCI_DEVICE_ID_SERVERWORKS_CSB6IDE, PCI_VENDOR_ID_DELL, oem_cable }, |
130 | { PCI_DEVICE_ID_SERVERWORKS_CSB5IDE, PCI_VENDOR_ID_SUN, sun_cable }, | 86 | { PCI_DEVICE_ID_SERVERWORKS_CSB5IDE, PCI_VENDOR_ID_SUN, oem_cable }, |
131 | { PCI_DEVICE_ID_SERVERWORKS_OSB4IDE, PCI_ANY_ID, osb4_cable }, | 87 | { PCI_DEVICE_ID_SERVERWORKS_OSB4IDE, PCI_ANY_ID, ata_cable_40wire }, |
132 | { PCI_DEVICE_ID_SERVERWORKS_CSB5IDE, PCI_ANY_ID, csb_cable }, | 88 | { PCI_DEVICE_ID_SERVERWORKS_CSB5IDE, PCI_ANY_ID, ata_cable_unknown }, |
133 | { PCI_DEVICE_ID_SERVERWORKS_CSB6IDE, PCI_ANY_ID, csb_cable }, | 89 | { PCI_DEVICE_ID_SERVERWORKS_CSB6IDE, PCI_ANY_ID, ata_cable_unknown }, |
134 | { PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2, PCI_ANY_ID, csb_cable }, | 90 | { PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2, PCI_ANY_ID, ata_cable_unknown }, |
135 | { PCI_DEVICE_ID_SERVERWORKS_HT1000IDE, PCI_ANY_ID, csb_cable }, | 91 | { PCI_DEVICE_ID_SERVERWORKS_HT1000IDE, PCI_ANY_ID, ata_cable_unknown }, |
136 | { } | 92 | { } |
137 | }; | 93 | }; |
138 | 94 | ||
@@ -393,6 +349,31 @@ static void serverworks_fixup_ht1000(struct pci_dev *pdev) | |||
393 | pci_write_config_byte(pdev, 0x5A, btr); | 349 | pci_write_config_byte(pdev, 0x5A, btr); |
394 | } | 350 | } |
395 | 351 | ||
352 | static int serverworks_fixup(struct pci_dev *pdev) | ||
353 | { | ||
354 | int rc = 0; | ||
355 | |||
356 | /* Force master latency timer to 64 PCI clocks */ | ||
357 | pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x40); | ||
358 | |||
359 | switch (pdev->device) { | ||
360 | case PCI_DEVICE_ID_SERVERWORKS_OSB4IDE: | ||
361 | rc = serverworks_fixup_osb4(pdev); | ||
362 | break; | ||
363 | case PCI_DEVICE_ID_SERVERWORKS_CSB5IDE: | ||
364 | ata_pci_bmdma_clear_simplex(pdev); | ||
365 | /* fall through */ | ||
366 | case PCI_DEVICE_ID_SERVERWORKS_CSB6IDE: | ||
367 | case PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2: | ||
368 | rc = serverworks_fixup_csb(pdev); | ||
369 | break; | ||
370 | case PCI_DEVICE_ID_SERVERWORKS_HT1000IDE: | ||
371 | serverworks_fixup_ht1000(pdev); | ||
372 | break; | ||
373 | } | ||
374 | |||
375 | return rc; | ||
376 | } | ||
396 | 377 | ||
397 | static int serverworks_init_one(struct pci_dev *pdev, const struct pci_device_id *id) | 378 | static int serverworks_init_one(struct pci_dev *pdev, const struct pci_device_id *id) |
398 | { | 379 | { |
@@ -430,13 +411,12 @@ static int serverworks_init_one(struct pci_dev *pdev, const struct pci_device_id | |||
430 | if (rc) | 411 | if (rc) |
431 | return rc; | 412 | return rc; |
432 | 413 | ||
433 | /* Force master latency timer to 64 PCI clocks */ | 414 | rc = serverworks_fixup(pdev); |
434 | pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x40); | ||
435 | 415 | ||
436 | /* OSB4 : South Bridge and IDE */ | 416 | /* OSB4 : South Bridge and IDE */ |
437 | if (pdev->device == PCI_DEVICE_ID_SERVERWORKS_OSB4IDE) { | 417 | if (pdev->device == PCI_DEVICE_ID_SERVERWORKS_OSB4IDE) { |
438 | /* Select non UDMA capable OSB4 if we can't do fixups */ | 418 | /* Select non UDMA capable OSB4 if we can't do fixups */ |
439 | if ( serverworks_fixup_osb4(pdev) < 0) | 419 | if (rc < 0) |
440 | ppi[0] = &info[1]; | 420 | ppi[0] = &info[1]; |
441 | } | 421 | } |
442 | /* setup CSB5/CSB6 : South Bridge and IDE option RAID */ | 422 | /* setup CSB5/CSB6 : South Bridge and IDE option RAID */ |
@@ -446,19 +426,13 @@ static int serverworks_init_one(struct pci_dev *pdev, const struct pci_device_id | |||
446 | 426 | ||
447 | /* If the returned btr is the newer revision then | 427 | /* If the returned btr is the newer revision then |
448 | select the right info block */ | 428 | select the right info block */ |
449 | if (serverworks_fixup_csb(pdev) == 3) | 429 | if (rc == 3) |
450 | ppi[0] = &info[3]; | 430 | ppi[0] = &info[3]; |
451 | 431 | ||
452 | /* Is this the 3rd channel CSB6 IDE ? */ | 432 | /* Is this the 3rd channel CSB6 IDE ? */ |
453 | if (pdev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2) | 433 | if (pdev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2) |
454 | ppi[1] = &ata_dummy_port_info; | 434 | ppi[1] = &ata_dummy_port_info; |
455 | } | 435 | } |
456 | /* setup HT1000E */ | ||
457 | else if (pdev->device == PCI_DEVICE_ID_SERVERWORKS_HT1000IDE) | ||
458 | serverworks_fixup_ht1000(pdev); | ||
459 | |||
460 | if (pdev->device == PCI_DEVICE_ID_SERVERWORKS_CSB5IDE) | ||
461 | ata_pci_bmdma_clear_simplex(pdev); | ||
462 | 436 | ||
463 | return ata_pci_bmdma_init_one(pdev, ppi, &serverworks_sht, NULL, 0); | 437 | return ata_pci_bmdma_init_one(pdev, ppi, &serverworks_sht, NULL, 0); |
464 | } | 438 | } |
@@ -473,24 +447,7 @@ static int serverworks_reinit_one(struct pci_dev *pdev) | |||
473 | if (rc) | 447 | if (rc) |
474 | return rc; | 448 | return rc; |
475 | 449 | ||
476 | /* Force master latency timer to 64 PCI clocks */ | 450 | (void)serverworks_fixup(pdev); |
477 | pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x40); | ||
478 | |||
479 | switch (pdev->device) { | ||
480 | case PCI_DEVICE_ID_SERVERWORKS_OSB4IDE: | ||
481 | serverworks_fixup_osb4(pdev); | ||
482 | break; | ||
483 | case PCI_DEVICE_ID_SERVERWORKS_CSB5IDE: | ||
484 | ata_pci_bmdma_clear_simplex(pdev); | ||
485 | /* fall through */ | ||
486 | case PCI_DEVICE_ID_SERVERWORKS_CSB6IDE: | ||
487 | case PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2: | ||
488 | serverworks_fixup_csb(pdev); | ||
489 | break; | ||
490 | case PCI_DEVICE_ID_SERVERWORKS_HT1000IDE: | ||
491 | serverworks_fixup_ht1000(pdev); | ||
492 | break; | ||
493 | } | ||
494 | 451 | ||
495 | ata_host_resume(host); | 452 | ata_host_resume(host); |
496 | return 0; | 453 | return 0; |
diff --git a/drivers/ata/pata_sil680.c b/drivers/ata/pata_sil680.c index 31f759b0ab71..b92eacf8dd3c 100644 --- a/drivers/ata/pata_sil680.c +++ b/drivers/ata/pata_sil680.c | |||
@@ -38,11 +38,12 @@ | |||
38 | 38 | ||
39 | /** | 39 | /** |
40 | * sil680_selreg - return register base | 40 | * sil680_selreg - return register base |
41 | * @hwif: interface | 41 | * @ap: ATA interface |
42 | * @r: config offset | 42 | * @r: config offset |
43 | * | 43 | * |
44 | * Turn a config register offset into the right address in either | 44 | * Turn a config register offset into the right address in PCI space |
45 | * PCI space or MMIO space to access the control register in question | 45 | * to access the control register in question. |
46 | * | ||
46 | * Thankfully this is a configuration operation so isn't performance | 47 | * Thankfully this is a configuration operation so isn't performance |
47 | * criticial. | 48 | * criticial. |
48 | */ | 49 | */ |
@@ -56,12 +57,12 @@ static unsigned long sil680_selreg(struct ata_port *ap, int r) | |||
56 | 57 | ||
57 | /** | 58 | /** |
58 | * sil680_seldev - return register base | 59 | * sil680_seldev - return register base |
59 | * @hwif: interface | 60 | * @ap: ATA interface |
60 | * @r: config offset | 61 | * @r: config offset |
61 | * | 62 | * |
62 | * Turn a config register offset into the right address in either | 63 | * Turn a config register offset into the right address in PCI space |
63 | * PCI space or MMIO space to access the control register in question | 64 | * to access the control register in question including accounting for |
64 | * including accounting for the unit shift. | 65 | * the unit shift. |
65 | */ | 66 | */ |
66 | 67 | ||
67 | static unsigned long sil680_seldev(struct ata_port *ap, struct ata_device *adev, int r) | 68 | static unsigned long sil680_seldev(struct ata_port *ap, struct ata_device *adev, int r) |
@@ -81,7 +82,8 @@ static unsigned long sil680_seldev(struct ata_port *ap, struct ata_device *adev, | |||
81 | * space for us. | 82 | * space for us. |
82 | */ | 83 | */ |
83 | 84 | ||
84 | static int sil680_cable_detect(struct ata_port *ap) { | 85 | static int sil680_cable_detect(struct ata_port *ap) |
86 | { | ||
85 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 87 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
86 | unsigned long addr = sil680_selreg(ap, 0); | 88 | unsigned long addr = sil680_selreg(ap, 0); |
87 | u8 ata66; | 89 | u8 ata66; |
@@ -93,7 +95,7 @@ static int sil680_cable_detect(struct ata_port *ap) { | |||
93 | } | 95 | } |
94 | 96 | ||
95 | /** | 97 | /** |
96 | * sil680_set_piomode - set initial PIO mode data | 98 | * sil680_set_piomode - set PIO mode data |
97 | * @ap: ATA interface | 99 | * @ap: ATA interface |
98 | * @adev: ATA device | 100 | * @adev: ATA device |
99 | * | 101 | * |
@@ -104,8 +106,12 @@ static int sil680_cable_detect(struct ata_port *ap) { | |||
104 | 106 | ||
105 | static void sil680_set_piomode(struct ata_port *ap, struct ata_device *adev) | 107 | static void sil680_set_piomode(struct ata_port *ap, struct ata_device *adev) |
106 | { | 108 | { |
107 | static u16 speed_p[5] = { 0x328A, 0x2283, 0x1104, 0x10C3, 0x10C1 }; | 109 | static const u16 speed_p[5] = { |
108 | static u16 speed_t[5] = { 0x328A, 0x2283, 0x1281, 0x10C3, 0x10C1 }; | 110 | 0x328A, 0x2283, 0x1104, 0x10C3, 0x10C1 |
111 | }; | ||
112 | static const u16 speed_t[5] = { | ||
113 | 0x328A, 0x2283, 0x1281, 0x10C3, 0x10C1 | ||
114 | }; | ||
109 | 115 | ||
110 | unsigned long tfaddr = sil680_selreg(ap, 0x02); | 116 | unsigned long tfaddr = sil680_selreg(ap, 0x02); |
111 | unsigned long addr = sil680_seldev(ap, adev, 0x04); | 117 | unsigned long addr = sil680_seldev(ap, adev, 0x04); |
@@ -140,22 +146,23 @@ static void sil680_set_piomode(struct ata_port *ap, struct ata_device *adev) | |||
140 | } | 146 | } |
141 | 147 | ||
142 | /** | 148 | /** |
143 | * sil680_set_dmamode - set initial DMA mode data | 149 | * sil680_set_dmamode - set DMA mode data |
144 | * @ap: ATA interface | 150 | * @ap: ATA interface |
145 | * @adev: ATA device | 151 | * @adev: ATA device |
146 | * | 152 | * |
147 | * Program the MWDMA/UDMA modes for the sil680 k | 153 | * Program the MWDMA/UDMA modes for the sil680 chipset. |
148 | * chipset. The MWDMA mode values are pulled from a lookup table | 154 | * |
155 | * The MWDMA mode values are pulled from a lookup table | ||
149 | * while the chipset uses mode number for UDMA. | 156 | * while the chipset uses mode number for UDMA. |
150 | */ | 157 | */ |
151 | 158 | ||
152 | static void sil680_set_dmamode(struct ata_port *ap, struct ata_device *adev) | 159 | static void sil680_set_dmamode(struct ata_port *ap, struct ata_device *adev) |
153 | { | 160 | { |
154 | static u8 ultra_table[2][7] = { | 161 | static const u8 ultra_table[2][7] = { |
155 | { 0x0C, 0x07, 0x05, 0x04, 0x02, 0x01, 0xFF }, /* 100MHz */ | 162 | { 0x0C, 0x07, 0x05, 0x04, 0x02, 0x01, 0xFF }, /* 100MHz */ |
156 | { 0x0F, 0x0B, 0x07, 0x05, 0x03, 0x02, 0x01 }, /* 133Mhz */ | 163 | { 0x0F, 0x0B, 0x07, 0x05, 0x03, 0x02, 0x01 }, /* 133Mhz */ |
157 | }; | 164 | }; |
158 | static u16 dma_table[3] = { 0x2208, 0x10C2, 0x10C1 }; | 165 | static const u16 dma_table[3] = { 0x2208, 0x10C2, 0x10C1 }; |
159 | 166 | ||
160 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 167 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
161 | unsigned long ma = sil680_seldev(ap, adev, 0x08); | 168 | unsigned long ma = sil680_seldev(ap, adev, 0x08); |
@@ -175,7 +182,7 @@ static void sil680_set_dmamode(struct ata_port *ap, struct ata_device *adev) | |||
175 | mode &= ~(0x03 << port_shift); | 182 | mode &= ~(0x03 << port_shift); |
176 | 183 | ||
177 | /* Extract scsc */ | 184 | /* Extract scsc */ |
178 | scsc = (scsc & 0x30) ? 1: 0; | 185 | scsc = (scsc & 0x30) ? 1 : 0; |
179 | 186 | ||
180 | if (adev->dma_mode >= XFER_UDMA_0) { | 187 | if (adev->dma_mode >= XFER_UDMA_0) { |
181 | multi = 0x10C1; | 188 | multi = 0x10C1; |
@@ -248,7 +255,7 @@ static u8 sil680_init_chip(struct pci_dev *pdev, int *try_mmio) | |||
248 | { | 255 | { |
249 | u8 tmpbyte = 0; | 256 | u8 tmpbyte = 0; |
250 | 257 | ||
251 | /* FIXME: double check */ | 258 | /* FIXME: double check */ |
252 | pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, | 259 | pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, |
253 | pdev->revision ? 1 : 255); | 260 | pdev->revision ? 1 : 255); |
254 | 261 | ||
@@ -266,22 +273,22 @@ static u8 sil680_init_chip(struct pci_dev *pdev, int *try_mmio) | |||
266 | *try_mmio = (tmpbyte & 1) || pci_resource_start(pdev, 5); | 273 | *try_mmio = (tmpbyte & 1) || pci_resource_start(pdev, 5); |
267 | #endif | 274 | #endif |
268 | 275 | ||
269 | switch(tmpbyte & 0x30) { | 276 | switch (tmpbyte & 0x30) { |
270 | case 0x00: | 277 | case 0x00: |
271 | /* 133 clock attempt to force it on */ | 278 | /* 133 clock attempt to force it on */ |
272 | pci_write_config_byte(pdev, 0x8A, tmpbyte|0x10); | 279 | pci_write_config_byte(pdev, 0x8A, tmpbyte|0x10); |
273 | break; | 280 | break; |
274 | case 0x30: | 281 | case 0x30: |
275 | /* if clocking is disabled */ | 282 | /* if clocking is disabled */ |
276 | /* 133 clock attempt to force it on */ | 283 | /* 133 clock attempt to force it on */ |
277 | pci_write_config_byte(pdev, 0x8A, tmpbyte & ~0x20); | 284 | pci_write_config_byte(pdev, 0x8A, tmpbyte & ~0x20); |
278 | break; | 285 | break; |
279 | case 0x10: | 286 | case 0x10: |
280 | /* 133 already */ | 287 | /* 133 already */ |
281 | break; | 288 | break; |
282 | case 0x20: | 289 | case 0x20: |
283 | /* BIOS set PCI x2 clocking */ | 290 | /* BIOS set PCI x2 clocking */ |
284 | break; | 291 | break; |
285 | } | 292 | } |
286 | 293 | ||
287 | pci_read_config_byte(pdev, 0x8A, &tmpbyte); | 294 | pci_read_config_byte(pdev, 0x8A, &tmpbyte); |
@@ -299,12 +306,19 @@ static u8 sil680_init_chip(struct pci_dev *pdev, int *try_mmio) | |||
299 | pci_write_config_dword(pdev, 0xB8, 0x43924392); | 306 | pci_write_config_dword(pdev, 0xB8, 0x43924392); |
300 | pci_write_config_dword(pdev, 0xBC, 0x40094009); | 307 | pci_write_config_dword(pdev, 0xBC, 0x40094009); |
301 | 308 | ||
302 | switch(tmpbyte & 0x30) { | 309 | switch (tmpbyte & 0x30) { |
303 | case 0x00: printk(KERN_INFO "sil680: 100MHz clock.\n");break; | 310 | case 0x00: |
304 | case 0x10: printk(KERN_INFO "sil680: 133MHz clock.\n");break; | 311 | printk(KERN_INFO "sil680: 100MHz clock.\n"); |
305 | case 0x20: printk(KERN_INFO "sil680: Using PCI clock.\n");break; | 312 | break; |
306 | /* This last case is _NOT_ ok */ | 313 | case 0x10: |
307 | case 0x30: printk(KERN_ERR "sil680: Clock disabled ?\n"); | 314 | printk(KERN_INFO "sil680: 133MHz clock.\n"); |
315 | break; | ||
316 | case 0x20: | ||
317 | printk(KERN_INFO "sil680: Using PCI clock.\n"); | ||
318 | break; | ||
319 | /* This last case is _NOT_ ok */ | ||
320 | case 0x30: | ||
321 | printk(KERN_ERR "sil680: Clock disabled ?\n"); | ||
308 | } | 322 | } |
309 | return tmpbyte & 0x30; | 323 | return tmpbyte & 0x30; |
310 | } | 324 | } |
diff --git a/drivers/ata/pata_sis.c b/drivers/ata/pata_sis.c index 533f2aefab87..b0edc7de7b2d 100644 --- a/drivers/ata/pata_sis.c +++ b/drivers/ata/pata_sis.c | |||
@@ -55,7 +55,7 @@ static const struct sis_laptop sis_laptop[] = { | |||
55 | /* devid, subvendor, subdev */ | 55 | /* devid, subvendor, subdev */ |
56 | { 0x5513, 0x1043, 0x1107 }, /* ASUS A6K */ | 56 | { 0x5513, 0x1043, 0x1107 }, /* ASUS A6K */ |
57 | { 0x5513, 0x1734, 0x105F }, /* FSC Amilo A1630 */ | 57 | { 0x5513, 0x1734, 0x105F }, /* FSC Amilo A1630 */ |
58 | { 0x5513, 0x1071, 0x8640 }, /* EasyNote K5305 */ | 58 | { 0x5513, 0x1071, 0x8640 }, /* EasyNote K5305 */ |
59 | /* end marker */ | 59 | /* end marker */ |
60 | { 0, } | 60 | { 0, } |
61 | }; | 61 | }; |
@@ -76,7 +76,7 @@ static int sis_short_ata40(struct pci_dev *dev) | |||
76 | } | 76 | } |
77 | 77 | ||
78 | /** | 78 | /** |
79 | * sis_old_port_base - return PCI configuration base for dev | 79 | * sis_old_port_base - return PCI configuration base for dev |
80 | * @adev: device | 80 | * @adev: device |
81 | * | 81 | * |
82 | * Returns the base of the PCI configuration registers for this port | 82 | * Returns the base of the PCI configuration registers for this port |
@@ -85,11 +85,34 @@ static int sis_short_ata40(struct pci_dev *dev) | |||
85 | 85 | ||
86 | static int sis_old_port_base(struct ata_device *adev) | 86 | static int sis_old_port_base(struct ata_device *adev) |
87 | { | 87 | { |
88 | return 0x40 + (4 * adev->link->ap->port_no) + (2 * adev->devno); | 88 | return 0x40 + (4 * adev->link->ap->port_no) + (2 * adev->devno); |
89 | } | 89 | } |
90 | 90 | ||
91 | /** | 91 | /** |
92 | * sis_133_cable_detect - check for 40/80 pin | 92 | * sis_port_base - return PCI configuration base for dev |
93 | * @adev: device | ||
94 | * | ||
95 | * Returns the base of the PCI configuration registers for this port | ||
96 | * number. | ||
97 | */ | ||
98 | |||
99 | static int sis_port_base(struct ata_device *adev) | ||
100 | { | ||
101 | struct ata_port *ap = adev->link->ap; | ||
102 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | ||
103 | int port = 0x40; | ||
104 | u32 reg54; | ||
105 | |||
106 | /* If bit 30 is set then the registers are mapped at 0x70 not 0x40 */ | ||
107 | pci_read_config_dword(pdev, 0x54, ®54); | ||
108 | if (reg54 & 0x40000000) | ||
109 | port = 0x70; | ||
110 | |||
111 | return port + (8 * ap->port_no) + (4 * adev->devno); | ||
112 | } | ||
113 | |||
114 | /** | ||
115 | * sis_133_cable_detect - check for 40/80 pin | ||
93 | * @ap: Port | 116 | * @ap: Port |
94 | * @deadline: deadline jiffies for the operation | 117 | * @deadline: deadline jiffies for the operation |
95 | * | 118 | * |
@@ -110,7 +133,7 @@ static int sis_133_cable_detect(struct ata_port *ap) | |||
110 | } | 133 | } |
111 | 134 | ||
112 | /** | 135 | /** |
113 | * sis_66_cable_detect - check for 40/80 pin | 136 | * sis_66_cable_detect - check for 40/80 pin |
114 | * @ap: Port | 137 | * @ap: Port |
115 | * | 138 | * |
116 | * Perform cable detection on the UDMA66, UDMA100 and early UDMA133 | 139 | * Perform cable detection on the UDMA66, UDMA100 and early UDMA133 |
@@ -132,7 +155,7 @@ static int sis_66_cable_detect(struct ata_port *ap) | |||
132 | 155 | ||
133 | 156 | ||
134 | /** | 157 | /** |
135 | * sis_pre_reset - probe begin | 158 | * sis_pre_reset - probe begin |
136 | * @link: ATA link | 159 | * @link: ATA link |
137 | * @deadline: deadline jiffies for the operation | 160 | * @deadline: deadline jiffies for the operation |
138 | * | 161 | * |
@@ -160,7 +183,7 @@ static int sis_pre_reset(struct ata_link *link, unsigned long deadline) | |||
160 | 183 | ||
161 | 184 | ||
162 | /** | 185 | /** |
163 | * sis_set_fifo - Set RWP fifo bits for this device | 186 | * sis_set_fifo - Set RWP fifo bits for this device |
164 | * @ap: Port | 187 | * @ap: Port |
165 | * @adev: Device | 188 | * @adev: Device |
166 | * | 189 | * |
@@ -203,13 +226,13 @@ static void sis_set_fifo(struct ata_port *ap, struct ata_device *adev) | |||
203 | 226 | ||
204 | static void sis_old_set_piomode (struct ata_port *ap, struct ata_device *adev) | 227 | static void sis_old_set_piomode (struct ata_port *ap, struct ata_device *adev) |
205 | { | 228 | { |
206 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 229 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
207 | int port = sis_old_port_base(adev); | 230 | int port = sis_old_port_base(adev); |
208 | u8 t1, t2; | 231 | u8 t1, t2; |
209 | int speed = adev->pio_mode - XFER_PIO_0; | 232 | int speed = adev->pio_mode - XFER_PIO_0; |
210 | 233 | ||
211 | const u8 active[] = { 0x00, 0x07, 0x04, 0x03, 0x01 }; | 234 | static const u8 active[] = { 0x00, 0x07, 0x04, 0x03, 0x01 }; |
212 | const u8 recovery[] = { 0x00, 0x06, 0x04, 0x03, 0x03 }; | 235 | static const u8 recovery[] = { 0x00, 0x06, 0x04, 0x03, 0x03 }; |
213 | 236 | ||
214 | sis_set_fifo(ap, adev); | 237 | sis_set_fifo(ap, adev); |
215 | 238 | ||
@@ -240,11 +263,11 @@ static void sis_old_set_piomode (struct ata_port *ap, struct ata_device *adev) | |||
240 | 263 | ||
241 | static void sis_100_set_piomode (struct ata_port *ap, struct ata_device *adev) | 264 | static void sis_100_set_piomode (struct ata_port *ap, struct ata_device *adev) |
242 | { | 265 | { |
243 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 266 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
244 | int port = sis_old_port_base(adev); | 267 | int port = sis_old_port_base(adev); |
245 | int speed = adev->pio_mode - XFER_PIO_0; | 268 | int speed = adev->pio_mode - XFER_PIO_0; |
246 | 269 | ||
247 | const u8 actrec[] = { 0x00, 0x67, 0x44, 0x33, 0x31 }; | 270 | static const u8 actrec[] = { 0x00, 0x67, 0x44, 0x33, 0x31 }; |
248 | 271 | ||
249 | sis_set_fifo(ap, adev); | 272 | sis_set_fifo(ap, adev); |
250 | 273 | ||
@@ -265,20 +288,19 @@ static void sis_100_set_piomode (struct ata_port *ap, struct ata_device *adev) | |||
265 | 288 | ||
266 | static void sis_133_set_piomode (struct ata_port *ap, struct ata_device *adev) | 289 | static void sis_133_set_piomode (struct ata_port *ap, struct ata_device *adev) |
267 | { | 290 | { |
268 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 291 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
269 | int port = 0x40; | 292 | int port; |
270 | u32 t1; | 293 | u32 t1; |
271 | u32 reg54; | ||
272 | int speed = adev->pio_mode - XFER_PIO_0; | 294 | int speed = adev->pio_mode - XFER_PIO_0; |
273 | 295 | ||
274 | const u32 timing133[] = { | 296 | static const u32 timing133[] = { |
275 | 0x28269000, /* Recovery << 24 | Act << 16 | Ini << 12 */ | 297 | 0x28269000, /* Recovery << 24 | Act << 16 | Ini << 12 */ |
276 | 0x0C266000, | 298 | 0x0C266000, |
277 | 0x04263000, | 299 | 0x04263000, |
278 | 0x0C0A3000, | 300 | 0x0C0A3000, |
279 | 0x05093000 | 301 | 0x05093000 |
280 | }; | 302 | }; |
281 | const u32 timing100[] = { | 303 | static const u32 timing100[] = { |
282 | 0x1E1C6000, /* Recovery << 24 | Act << 16 | Ini << 12 */ | 304 | 0x1E1C6000, /* Recovery << 24 | Act << 16 | Ini << 12 */ |
283 | 0x091C4000, | 305 | 0x091C4000, |
284 | 0x031C2000, | 306 | 0x031C2000, |
@@ -288,12 +310,7 @@ static void sis_133_set_piomode (struct ata_port *ap, struct ata_device *adev) | |||
288 | 310 | ||
289 | sis_set_fifo(ap, adev); | 311 | sis_set_fifo(ap, adev); |
290 | 312 | ||
291 | /* If bit 14 is set then the registers are mapped at 0x70 not 0x40 */ | 313 | port = sis_port_base(adev); |
292 | pci_read_config_dword(pdev, 0x54, ®54); | ||
293 | if (reg54 & 0x40000000) | ||
294 | port = 0x70; | ||
295 | port += 8 * ap->port_no + 4 * adev->devno; | ||
296 | |||
297 | pci_read_config_dword(pdev, port, &t1); | 314 | pci_read_config_dword(pdev, port, &t1); |
298 | t1 &= 0xC0C00FFF; /* Mask out timing */ | 315 | t1 &= 0xC0C00FFF; /* Mask out timing */ |
299 | 316 | ||
@@ -319,13 +336,13 @@ static void sis_133_set_piomode (struct ata_port *ap, struct ata_device *adev) | |||
319 | 336 | ||
320 | static void sis_old_set_dmamode (struct ata_port *ap, struct ata_device *adev) | 337 | static void sis_old_set_dmamode (struct ata_port *ap, struct ata_device *adev) |
321 | { | 338 | { |
322 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 339 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
323 | int speed = adev->dma_mode - XFER_MW_DMA_0; | 340 | int speed = adev->dma_mode - XFER_MW_DMA_0; |
324 | int drive_pci = sis_old_port_base(adev); | 341 | int drive_pci = sis_old_port_base(adev); |
325 | u16 timing; | 342 | u16 timing; |
326 | 343 | ||
327 | const u16 mwdma_bits[] = { 0x008, 0x302, 0x301 }; | 344 | static const u16 mwdma_bits[] = { 0x008, 0x302, 0x301 }; |
328 | const u16 udma_bits[] = { 0xE000, 0xC000, 0xA000 }; | 345 | static const u16 udma_bits[] = { 0xE000, 0xC000, 0xA000 }; |
329 | 346 | ||
330 | pci_read_config_word(pdev, drive_pci, &timing); | 347 | pci_read_config_word(pdev, drive_pci, &timing); |
331 | 348 | ||
@@ -358,14 +375,14 @@ static void sis_old_set_dmamode (struct ata_port *ap, struct ata_device *adev) | |||
358 | 375 | ||
359 | static void sis_66_set_dmamode (struct ata_port *ap, struct ata_device *adev) | 376 | static void sis_66_set_dmamode (struct ata_port *ap, struct ata_device *adev) |
360 | { | 377 | { |
361 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 378 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
362 | int speed = adev->dma_mode - XFER_MW_DMA_0; | 379 | int speed = adev->dma_mode - XFER_MW_DMA_0; |
363 | int drive_pci = sis_old_port_base(adev); | 380 | int drive_pci = sis_old_port_base(adev); |
364 | u16 timing; | 381 | u16 timing; |
365 | 382 | ||
366 | /* MWDMA 0-2 and UDMA 0-5 */ | 383 | /* MWDMA 0-2 and UDMA 0-5 */ |
367 | const u16 mwdma_bits[] = { 0x008, 0x302, 0x301 }; | 384 | static const u16 mwdma_bits[] = { 0x008, 0x302, 0x301 }; |
368 | const u16 udma_bits[] = { 0xF000, 0xD000, 0xB000, 0xA000, 0x9000, 0x8000 }; | 385 | static const u16 udma_bits[] = { 0xF000, 0xD000, 0xB000, 0xA000, 0x9000, 0x8000 }; |
369 | 386 | ||
370 | pci_read_config_word(pdev, drive_pci, &timing); | 387 | pci_read_config_word(pdev, drive_pci, &timing); |
371 | 388 | ||
@@ -397,12 +414,12 @@ static void sis_66_set_dmamode (struct ata_port *ap, struct ata_device *adev) | |||
397 | 414 | ||
398 | static void sis_100_set_dmamode (struct ata_port *ap, struct ata_device *adev) | 415 | static void sis_100_set_dmamode (struct ata_port *ap, struct ata_device *adev) |
399 | { | 416 | { |
400 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 417 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
401 | int speed = adev->dma_mode - XFER_MW_DMA_0; | 418 | int speed = adev->dma_mode - XFER_MW_DMA_0; |
402 | int drive_pci = sis_old_port_base(adev); | 419 | int drive_pci = sis_old_port_base(adev); |
403 | u8 timing; | 420 | u8 timing; |
404 | 421 | ||
405 | const u8 udma_bits[] = { 0x8B, 0x87, 0x85, 0x83, 0x82, 0x81}; | 422 | static const u8 udma_bits[] = { 0x8B, 0x87, 0x85, 0x83, 0x82, 0x81}; |
406 | 423 | ||
407 | pci_read_config_byte(pdev, drive_pci + 1, &timing); | 424 | pci_read_config_byte(pdev, drive_pci + 1, &timing); |
408 | 425 | ||
@@ -431,7 +448,7 @@ static void sis_100_set_dmamode (struct ata_port *ap, struct ata_device *adev) | |||
431 | 448 | ||
432 | static void sis_133_early_set_dmamode (struct ata_port *ap, struct ata_device *adev) | 449 | static void sis_133_early_set_dmamode (struct ata_port *ap, struct ata_device *adev) |
433 | { | 450 | { |
434 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 451 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
435 | int speed = adev->dma_mode - XFER_MW_DMA_0; | 452 | int speed = adev->dma_mode - XFER_MW_DMA_0; |
436 | int drive_pci = sis_old_port_base(adev); | 453 | int drive_pci = sis_old_port_base(adev); |
437 | u8 timing; | 454 | u8 timing; |
@@ -464,32 +481,34 @@ static void sis_133_early_set_dmamode (struct ata_port *ap, struct ata_device *a | |||
464 | 481 | ||
465 | static void sis_133_set_dmamode (struct ata_port *ap, struct ata_device *adev) | 482 | static void sis_133_set_dmamode (struct ata_port *ap, struct ata_device *adev) |
466 | { | 483 | { |
467 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 484 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
468 | int speed = adev->dma_mode - XFER_MW_DMA_0; | 485 | int port; |
469 | int port = 0x40; | ||
470 | u32 t1; | 486 | u32 t1; |
471 | u32 reg54; | ||
472 | |||
473 | /* bits 4- cycle time 8 - cvs time */ | ||
474 | static const u32 timing_u100[] = { 0x6B0, 0x470, 0x350, 0x140, 0x120, 0x110, 0x000 }; | ||
475 | static const u32 timing_u133[] = { 0x9F0, 0x6A0, 0x470, 0x250, 0x230, 0x220, 0x210 }; | ||
476 | |||
477 | /* If bit 14 is set then the registers are mapped at 0x70 not 0x40 */ | ||
478 | pci_read_config_dword(pdev, 0x54, ®54); | ||
479 | if (reg54 & 0x40000000) | ||
480 | port = 0x70; | ||
481 | port += (8 * ap->port_no) + (4 * adev->devno); | ||
482 | 487 | ||
488 | port = sis_port_base(adev); | ||
483 | pci_read_config_dword(pdev, port, &t1); | 489 | pci_read_config_dword(pdev, port, &t1); |
484 | 490 | ||
485 | if (adev->dma_mode < XFER_UDMA_0) { | 491 | if (adev->dma_mode < XFER_UDMA_0) { |
492 | /* Recovery << 24 | Act << 16 | Ini << 12, like PIO modes */ | ||
493 | static const u32 timing_u100[] = { 0x19154000, 0x06072000, 0x04062000 }; | ||
494 | static const u32 timing_u133[] = { 0x221C6000, 0x0C0A3000, 0x05093000 }; | ||
495 | int speed = adev->dma_mode - XFER_MW_DMA_0; | ||
496 | |||
497 | t1 &= 0xC0C00FFF; | ||
498 | /* disable UDMA */ | ||
486 | t1 &= ~0x00000004; | 499 | t1 &= ~0x00000004; |
487 | /* FIXME: need data sheet to add MWDMA here. Also lacking on | 500 | if (t1 & 0x08) |
488 | ide/pci driver */ | 501 | t1 |= timing_u133[speed]; |
502 | else | ||
503 | t1 |= timing_u100[speed]; | ||
489 | } else { | 504 | } else { |
490 | speed = adev->dma_mode - XFER_UDMA_0; | 505 | /* bits 4- cycle time 8 - cvs time */ |
491 | /* if & 8 no UDMA133 - need info for ... */ | 506 | static const u32 timing_u100[] = { 0x6B0, 0x470, 0x350, 0x140, 0x120, 0x110, 0x000 }; |
507 | static const u32 timing_u133[] = { 0x9F0, 0x6A0, 0x470, 0x250, 0x230, 0x220, 0x210 }; | ||
508 | int speed = adev->dma_mode - XFER_UDMA_0; | ||
509 | |||
492 | t1 &= ~0x00000FF0; | 510 | t1 &= ~0x00000FF0; |
511 | /* enable UDMA */ | ||
493 | t1 |= 0x00000004; | 512 | t1 |= 0x00000004; |
494 | if (t1 & 0x08) | 513 | if (t1 & 0x08) |
495 | t1 |= timing_u133[speed]; | 514 | t1 |= timing_u133[speed]; |
@@ -499,6 +518,27 @@ static void sis_133_set_dmamode (struct ata_port *ap, struct ata_device *adev) | |||
499 | pci_write_config_dword(pdev, port, t1); | 518 | pci_write_config_dword(pdev, port, t1); |
500 | } | 519 | } |
501 | 520 | ||
521 | /** | ||
522 | * sis_133_mode_filter - mode selection filter | ||
523 | * @adev: ATA device | ||
524 | * | ||
525 | * Block UDMA6 on devices that do not support it. | ||
526 | */ | ||
527 | |||
528 | static unsigned long sis_133_mode_filter(struct ata_device *adev, unsigned long mask) | ||
529 | { | ||
530 | struct ata_port *ap = adev->link->ap; | ||
531 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | ||
532 | int port = sis_port_base(adev); | ||
533 | u32 t1; | ||
534 | |||
535 | pci_read_config_dword(pdev, port, &t1); | ||
536 | /* if ATA133 is disabled, mask it out */ | ||
537 | if (!(t1 & 0x08)) | ||
538 | mask &= ~(0xC0 << ATA_SHIFT_UDMA); | ||
539 | return mask; | ||
540 | } | ||
541 | |||
502 | static struct scsi_host_template sis_sht = { | 542 | static struct scsi_host_template sis_sht = { |
503 | ATA_BMDMA_SHT(DRV_NAME), | 543 | ATA_BMDMA_SHT(DRV_NAME), |
504 | }; | 544 | }; |
@@ -520,6 +560,7 @@ static struct ata_port_operations sis_133_ops = { | |||
520 | .set_piomode = sis_133_set_piomode, | 560 | .set_piomode = sis_133_set_piomode, |
521 | .set_dmamode = sis_133_set_dmamode, | 561 | .set_dmamode = sis_133_set_dmamode, |
522 | .cable_detect = sis_133_cable_detect, | 562 | .cable_detect = sis_133_cable_detect, |
563 | .mode_filter = sis_133_mode_filter, | ||
523 | }; | 564 | }; |
524 | 565 | ||
525 | static struct ata_port_operations sis_133_early_ops = { | 566 | static struct ata_port_operations sis_133_early_ops = { |
@@ -588,7 +629,7 @@ static const struct ata_port_info sis_info100_early = { | |||
588 | static const struct ata_port_info sis_info133 = { | 629 | static const struct ata_port_info sis_info133 = { |
589 | .flags = ATA_FLAG_SLAVE_POSS, | 630 | .flags = ATA_FLAG_SLAVE_POSS, |
590 | .pio_mask = ATA_PIO4, | 631 | .pio_mask = ATA_PIO4, |
591 | /* No MWDMA */ | 632 | .mwdma_mask = ATA_MWDMA2, |
592 | .udma_mask = ATA_UDMA6, | 633 | .udma_mask = ATA_UDMA6, |
593 | .port_ops = &sis_133_ops, | 634 | .port_ops = &sis_133_ops, |
594 | }; | 635 | }; |
@@ -669,7 +710,7 @@ static void sis_fixup(struct pci_dev *pdev, struct sis_chipset *sis) | |||
669 | * @pdev: PCI device to register | 710 | * @pdev: PCI device to register |
670 | * @ent: Entry in sis_pci_tbl matching with @pdev | 711 | * @ent: Entry in sis_pci_tbl matching with @pdev |
671 | * | 712 | * |
672 | * Called from kernel PCI layer. We probe for combined mode (sigh), | 713 | * Called from kernel PCI layer. We probe for combined mode (sigh), |
673 | * and then hand over control to libata, for it to do the rest. | 714 | * and then hand over control to libata, for it to do the rest. |
674 | * | 715 | * |
675 | * LOCKING: | 716 | * LOCKING: |
@@ -769,17 +810,20 @@ static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | |||
769 | 810 | ||
770 | switch(trueid) { | 811 | switch(trueid) { |
771 | case 0x5518: /* SIS 962/963 */ | 812 | case 0x5518: /* SIS 962/963 */ |
813 | dev_info(&pdev->dev, | ||
814 | "SiS 962/963 MuTIOL IDE UDMA133 controller\n"); | ||
772 | chipset = &sis133; | 815 | chipset = &sis133; |
773 | if ((idemisc & 0x40000000) == 0) { | 816 | if ((idemisc & 0x40000000) == 0) { |
774 | pci_write_config_dword(pdev, 0x54, idemisc | 0x40000000); | 817 | pci_write_config_dword(pdev, 0x54, idemisc | 0x40000000); |
775 | printk(KERN_INFO "SIS5513: Switching to 5513 register mapping\n"); | 818 | dev_info(&pdev->dev, |
819 | "Switching to 5513 register mapping\n"); | ||
776 | } | 820 | } |
777 | break; | 821 | break; |
778 | case 0x0180: /* SIS 965/965L */ | 822 | case 0x0180: /* SIS 965/965L */ |
779 | chipset = &sis133; | 823 | chipset = &sis133; |
780 | break; | 824 | break; |
781 | case 0x1180: /* SIS 966/966L */ | 825 | case 0x1180: /* SIS 966/966L */ |
782 | chipset = &sis133; | 826 | chipset = &sis133; |
783 | break; | 827 | break; |
784 | } | 828 | } |
785 | } | 829 | } |
diff --git a/drivers/ata/pata_sl82c105.c b/drivers/ata/pata_sl82c105.c index c06ce8ced566..24cf200dd1c9 100644 --- a/drivers/ata/pata_sl82c105.c +++ b/drivers/ata/pata_sl82c105.c | |||
@@ -1,6 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * pata_sl82c105.c - SL82C105 PATA for new ATA layer | 2 | * pata_sl82c105.c - SL82C105 PATA for new ATA layer |
3 | * (C) 2005 Red Hat Inc | 3 | * (C) 2005 Red Hat Inc |
4 | * (C) 2011 Bartlomiej Zolnierkiewicz | ||
4 | * | 5 | * |
5 | * Based in part on linux/drivers/ide/pci/sl82c105.c | 6 | * Based in part on linux/drivers/ide/pci/sl82c105.c |
6 | * SL82C105/Winbond 553 IDE driver | 7 | * SL82C105/Winbond 553 IDE driver |
@@ -289,6 +290,14 @@ static int sl82c105_bridge_revision(struct pci_dev *pdev) | |||
289 | return bridge->revision; | 290 | return bridge->revision; |
290 | } | 291 | } |
291 | 292 | ||
293 | static void sl82c105_fixup(struct pci_dev *pdev) | ||
294 | { | ||
295 | u32 val; | ||
296 | |||
297 | pci_read_config_dword(pdev, 0x40, &val); | ||
298 | val |= CTRL_P0EN | CTRL_P0F16 | CTRL_P1F16; | ||
299 | pci_write_config_dword(pdev, 0x40, val); | ||
300 | } | ||
292 | 301 | ||
293 | static int sl82c105_init_one(struct pci_dev *dev, const struct pci_device_id *id) | 302 | static int sl82c105_init_one(struct pci_dev *dev, const struct pci_device_id *id) |
294 | { | 303 | { |
@@ -306,7 +315,6 @@ static int sl82c105_init_one(struct pci_dev *dev, const struct pci_device_id *id | |||
306 | /* for now use only the first port */ | 315 | /* for now use only the first port */ |
307 | const struct ata_port_info *ppi[] = { &info_early, | 316 | const struct ata_port_info *ppi[] = { &info_early, |
308 | NULL }; | 317 | NULL }; |
309 | u32 val; | ||
310 | int rev; | 318 | int rev; |
311 | int rc; | 319 | int rc; |
312 | 320 | ||
@@ -325,13 +333,28 @@ static int sl82c105_init_one(struct pci_dev *dev, const struct pci_device_id *id | |||
325 | else | 333 | else |
326 | ppi[0] = &info_dma; | 334 | ppi[0] = &info_dma; |
327 | 335 | ||
328 | pci_read_config_dword(dev, 0x40, &val); | 336 | sl82c105_fixup(dev); |
329 | val |= CTRL_P0EN | CTRL_P0F16 | CTRL_P1F16; | ||
330 | pci_write_config_dword(dev, 0x40, val); | ||
331 | 337 | ||
332 | return ata_pci_bmdma_init_one(dev, ppi, &sl82c105_sht, NULL, 0); | 338 | return ata_pci_bmdma_init_one(dev, ppi, &sl82c105_sht, NULL, 0); |
333 | } | 339 | } |
334 | 340 | ||
341 | #ifdef CONFIG_PM | ||
342 | static int sl82c105_reinit_one(struct pci_dev *pdev) | ||
343 | { | ||
344 | struct ata_host *host = dev_get_drvdata(&pdev->dev); | ||
345 | int rc; | ||
346 | |||
347 | rc = ata_pci_device_do_resume(pdev); | ||
348 | if (rc) | ||
349 | return rc; | ||
350 | |||
351 | sl82c105_fixup(pdev); | ||
352 | |||
353 | ata_host_resume(host); | ||
354 | return 0; | ||
355 | } | ||
356 | #endif | ||
357 | |||
335 | static const struct pci_device_id sl82c105[] = { | 358 | static const struct pci_device_id sl82c105[] = { |
336 | { PCI_VDEVICE(WINBOND, PCI_DEVICE_ID_WINBOND_82C105), }, | 359 | { PCI_VDEVICE(WINBOND, PCI_DEVICE_ID_WINBOND_82C105), }, |
337 | 360 | ||
@@ -342,7 +365,11 @@ static struct pci_driver sl82c105_pci_driver = { | |||
342 | .name = DRV_NAME, | 365 | .name = DRV_NAME, |
343 | .id_table = sl82c105, | 366 | .id_table = sl82c105, |
344 | .probe = sl82c105_init_one, | 367 | .probe = sl82c105_init_one, |
345 | .remove = ata_pci_remove_one | 368 | .remove = ata_pci_remove_one, |
369 | #ifdef CONFIG_PM | ||
370 | .suspend = ata_pci_device_suspend, | ||
371 | .resume = sl82c105_reinit_one, | ||
372 | #endif | ||
346 | }; | 373 | }; |
347 | 374 | ||
348 | static int __init sl82c105_init(void) | 375 | static int __init sl82c105_init(void) |
diff --git a/drivers/ata/pata_via.c b/drivers/ata/pata_via.c index 8e9f5048a10a..255f336cd7ea 100644 --- a/drivers/ata/pata_via.c +++ b/drivers/ata/pata_via.c | |||
@@ -509,6 +509,27 @@ static void via_config_fifo(struct pci_dev *pdev, unsigned int flags) | |||
509 | } | 509 | } |
510 | } | 510 | } |
511 | 511 | ||
512 | static void via_fixup(struct pci_dev *pdev, const struct via_isa_bridge *config) | ||
513 | { | ||
514 | u32 timing; | ||
515 | |||
516 | /* Initialise the FIFO for the enabled channels. */ | ||
517 | via_config_fifo(pdev, config->flags); | ||
518 | |||
519 | if (config->udma_mask == ATA_UDMA4) { | ||
520 | /* The 66 MHz devices require we enable the clock */ | ||
521 | pci_read_config_dword(pdev, 0x50, &timing); | ||
522 | timing |= 0x80008; | ||
523 | pci_write_config_dword(pdev, 0x50, timing); | ||
524 | } | ||
525 | if (config->flags & VIA_BAD_CLK66) { | ||
526 | /* Disable the 66MHz clock on problem devices */ | ||
527 | pci_read_config_dword(pdev, 0x50, &timing); | ||
528 | timing &= ~0x80008; | ||
529 | pci_write_config_dword(pdev, 0x50, timing); | ||
530 | } | ||
531 | } | ||
532 | |||
512 | /** | 533 | /** |
513 | * via_init_one - discovery callback | 534 | * via_init_one - discovery callback |
514 | * @pdev: PCI device | 535 | * @pdev: PCI device |
@@ -570,7 +591,6 @@ static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id) | |||
570 | struct pci_dev *isa; | 591 | struct pci_dev *isa; |
571 | const struct via_isa_bridge *config; | 592 | const struct via_isa_bridge *config; |
572 | u8 enable; | 593 | u8 enable; |
573 | u32 timing; | ||
574 | unsigned long flags = id->driver_data; | 594 | unsigned long flags = id->driver_data; |
575 | int rc; | 595 | int rc; |
576 | 596 | ||
@@ -609,9 +629,6 @@ static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id) | |||
609 | return -ENODEV; | 629 | return -ENODEV; |
610 | } | 630 | } |
611 | 631 | ||
612 | /* Initialise the FIFO for the enabled channels. */ | ||
613 | via_config_fifo(pdev, config->flags); | ||
614 | |||
615 | /* Clock set up */ | 632 | /* Clock set up */ |
616 | switch (config->udma_mask) { | 633 | switch (config->udma_mask) { |
617 | case 0x00: | 634 | case 0x00: |
@@ -637,12 +654,7 @@ static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id) | |||
637 | return -ENODEV; | 654 | return -ENODEV; |
638 | } | 655 | } |
639 | 656 | ||
640 | if (config->flags & VIA_BAD_CLK66) { | 657 | via_fixup(pdev, config); |
641 | /* Disable the 66MHz clock on problem devices */ | ||
642 | pci_read_config_dword(pdev, 0x50, &timing); | ||
643 | timing &= ~0x80008; | ||
644 | pci_write_config_dword(pdev, 0x50, timing); | ||
645 | } | ||
646 | 658 | ||
647 | /* We have established the device type, now fire it up */ | 659 | /* We have established the device type, now fire it up */ |
648 | return ata_pci_bmdma_init_one(pdev, ppi, &via_sht, (void *)config, 0); | 660 | return ata_pci_bmdma_init_one(pdev, ppi, &via_sht, (void *)config, 0); |
@@ -661,29 +673,14 @@ static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id) | |||
661 | 673 | ||
662 | static int via_reinit_one(struct pci_dev *pdev) | 674 | static int via_reinit_one(struct pci_dev *pdev) |
663 | { | 675 | { |
664 | u32 timing; | ||
665 | struct ata_host *host = dev_get_drvdata(&pdev->dev); | 676 | struct ata_host *host = dev_get_drvdata(&pdev->dev); |
666 | const struct via_isa_bridge *config = host->private_data; | ||
667 | int rc; | 677 | int rc; |
668 | 678 | ||
669 | rc = ata_pci_device_do_resume(pdev); | 679 | rc = ata_pci_device_do_resume(pdev); |
670 | if (rc) | 680 | if (rc) |
671 | return rc; | 681 | return rc; |
672 | 682 | ||
673 | via_config_fifo(pdev, config->flags); | 683 | via_fixup(pdev, host->private_data); |
674 | |||
675 | if (config->udma_mask == ATA_UDMA4) { | ||
676 | /* The 66 MHz devices require we enable the clock */ | ||
677 | pci_read_config_dword(pdev, 0x50, &timing); | ||
678 | timing |= 0x80008; | ||
679 | pci_write_config_dword(pdev, 0x50, timing); | ||
680 | } | ||
681 | if (config->flags & VIA_BAD_CLK66) { | ||
682 | /* Disable the 66MHz clock on problem devices */ | ||
683 | pci_read_config_dword(pdev, 0x50, &timing); | ||
684 | timing &= ~0x80008; | ||
685 | pci_write_config_dword(pdev, 0x50, timing); | ||
686 | } | ||
687 | 684 | ||
688 | ata_host_resume(host); | 685 | ata_host_resume(host); |
689 | return 0; | 686 | return 0; |
diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c index 4b6b2090784b..0b8b8b488ee8 100644 --- a/drivers/ata/sata_mv.c +++ b/drivers/ata/sata_mv.c | |||
@@ -4087,8 +4087,11 @@ static int mv_platform_probe(struct platform_device *pdev) | |||
4087 | dev_info(&pdev->dev, "slots %u ports %d\n", | 4087 | dev_info(&pdev->dev, "slots %u ports %d\n", |
4088 | (unsigned)MV_MAX_Q_DEPTH, host->n_ports); | 4088 | (unsigned)MV_MAX_Q_DEPTH, host->n_ports); |
4089 | 4089 | ||
4090 | return ata_host_activate(host, platform_get_irq(pdev, 0), mv_interrupt, | 4090 | rc = ata_host_activate(host, platform_get_irq(pdev, 0), mv_interrupt, |
4091 | IRQF_SHARED, &mv6_sht); | 4091 | IRQF_SHARED, &mv6_sht); |
4092 | if (!rc) | ||
4093 | return 0; | ||
4094 | |||
4092 | err: | 4095 | err: |
4093 | #if defined(CONFIG_HAVE_CLK) | 4096 | #if defined(CONFIG_HAVE_CLK) |
4094 | if (!IS_ERR(hpriv->clk)) { | 4097 | if (!IS_ERR(hpriv->clk)) { |
@@ -4110,8 +4113,7 @@ err: | |||
4110 | */ | 4113 | */ |
4111 | static int __devexit mv_platform_remove(struct platform_device *pdev) | 4114 | static int __devexit mv_platform_remove(struct platform_device *pdev) |
4112 | { | 4115 | { |
4113 | struct device *dev = &pdev->dev; | 4116 | struct ata_host *host = platform_get_drvdata(pdev); |
4114 | struct ata_host *host = dev_get_drvdata(dev); | ||
4115 | #if defined(CONFIG_HAVE_CLK) | 4117 | #if defined(CONFIG_HAVE_CLK) |
4116 | struct mv_host_priv *hpriv = host->private_data; | 4118 | struct mv_host_priv *hpriv = host->private_data; |
4117 | #endif | 4119 | #endif |
@@ -4129,7 +4131,7 @@ static int __devexit mv_platform_remove(struct platform_device *pdev) | |||
4129 | #ifdef CONFIG_PM | 4131 | #ifdef CONFIG_PM |
4130 | static int mv_platform_suspend(struct platform_device *pdev, pm_message_t state) | 4132 | static int mv_platform_suspend(struct platform_device *pdev, pm_message_t state) |
4131 | { | 4133 | { |
4132 | struct ata_host *host = dev_get_drvdata(&pdev->dev); | 4134 | struct ata_host *host = platform_get_drvdata(pdev); |
4133 | if (host) | 4135 | if (host) |
4134 | return ata_host_suspend(host, state); | 4136 | return ata_host_suspend(host, state); |
4135 | else | 4137 | else |
@@ -4138,7 +4140,7 @@ static int mv_platform_suspend(struct platform_device *pdev, pm_message_t state) | |||
4138 | 4140 | ||
4139 | static int mv_platform_resume(struct platform_device *pdev) | 4141 | static int mv_platform_resume(struct platform_device *pdev) |
4140 | { | 4142 | { |
4141 | struct ata_host *host = dev_get_drvdata(&pdev->dev); | 4143 | struct ata_host *host = platform_get_drvdata(pdev); |
4142 | int ret; | 4144 | int ret; |
4143 | 4145 | ||
4144 | if (host) { | 4146 | if (host) { |
@@ -4353,7 +4355,7 @@ static int mv_pci_init_one(struct pci_dev *pdev, | |||
4353 | #ifdef CONFIG_PM | 4355 | #ifdef CONFIG_PM |
4354 | static int mv_pci_device_resume(struct pci_dev *pdev) | 4356 | static int mv_pci_device_resume(struct pci_dev *pdev) |
4355 | { | 4357 | { |
4356 | struct ata_host *host = dev_get_drvdata(&pdev->dev); | 4358 | struct ata_host *host = pci_get_drvdata(pdev); |
4357 | int rc; | 4359 | int rc; |
4358 | 4360 | ||
4359 | rc = ata_pci_device_do_resume(pdev); | 4361 | rc = ata_pci_device_do_resume(pdev); |
diff --git a/drivers/ata/sata_sil24.c b/drivers/ata/sata_sil24.c index 55470f337e51..1e9140626a83 100644 --- a/drivers/ata/sata_sil24.c +++ b/drivers/ata/sata_sil24.c | |||
@@ -268,7 +268,7 @@ union sil24_cmd_block { | |||
268 | struct sil24_atapi_block atapi; | 268 | struct sil24_atapi_block atapi; |
269 | }; | 269 | }; |
270 | 270 | ||
271 | static struct sil24_cerr_info { | 271 | static const struct sil24_cerr_info { |
272 | unsigned int err_mask, action; | 272 | unsigned int err_mask, action; |
273 | const char *desc; | 273 | const char *desc; |
274 | } sil24_cerr_db[] = { | 274 | } sil24_cerr_db[] = { |
@@ -1019,7 +1019,7 @@ static void sil24_error_intr(struct ata_port *ap) | |||
1019 | 1019 | ||
1020 | /* deal with command error */ | 1020 | /* deal with command error */ |
1021 | if (irq_stat & PORT_IRQ_ERROR) { | 1021 | if (irq_stat & PORT_IRQ_ERROR) { |
1022 | struct sil24_cerr_info *ci = NULL; | 1022 | const struct sil24_cerr_info *ci = NULL; |
1023 | unsigned int err_mask = 0, action = 0; | 1023 | unsigned int err_mask = 0, action = 0; |
1024 | u32 context, cerr; | 1024 | u32 context, cerr; |
1025 | int pmp; | 1025 | int pmp; |