diff options
Diffstat (limited to 'drivers/ata')
35 files changed, 853 insertions, 305 deletions
diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig index 51eea3000b55..85844d053846 100644 --- a/drivers/ata/Kconfig +++ b/drivers/ata/Kconfig | |||
@@ -3,7 +3,7 @@ | |||
3 | # | 3 | # |
4 | 4 | ||
5 | menuconfig ATA | 5 | menuconfig ATA |
6 | tristate "Serial ATA (prod) and Parallel ATA (experimental) drivers" | 6 | tristate "Serial ATA and Parallel ATA drivers" |
7 | depends on HAS_IOMEM | 7 | depends on HAS_IOMEM |
8 | depends on BLOCK | 8 | depends on BLOCK |
9 | depends on !(M32R || M68K) || BROKEN | 9 | depends on !(M32R || M68K) || BROKEN |
@@ -374,8 +374,8 @@ config PATA_HPT366 | |||
374 | If unsure, say N. | 374 | If unsure, say N. |
375 | 375 | ||
376 | config PATA_HPT37X | 376 | config PATA_HPT37X |
377 | tristate "HPT 370/370A/371/372/374/302 PATA support (Experimental)" | 377 | tristate "HPT 370/370A/371/372/374/302 PATA support" |
378 | depends on PCI && EXPERIMENTAL | 378 | depends on PCI |
379 | help | 379 | help |
380 | This option enables support for the majority of the later HPT | 380 | This option enables support for the majority of the later HPT |
381 | PATA controllers via the new ATA layer. | 381 | PATA controllers via the new ATA layer. |
@@ -383,8 +383,8 @@ config PATA_HPT37X | |||
383 | If unsure, say N. | 383 | If unsure, say N. |
384 | 384 | ||
385 | config PATA_HPT3X2N | 385 | config PATA_HPT3X2N |
386 | tristate "HPT 372N/302N PATA support (Experimental)" | 386 | tristate "HPT 372N/302N PATA support" |
387 | depends on PCI && EXPERIMENTAL | 387 | depends on PCI |
388 | help | 388 | help |
389 | This option enables support for the N variant HPT PATA | 389 | This option enables support for the N variant HPT PATA |
390 | controllers via the new ATA layer | 390 | controllers via the new ATA layer |
@@ -401,7 +401,7 @@ config PATA_HPT3X3 | |||
401 | If unsure, say N. | 401 | If unsure, say N. |
402 | 402 | ||
403 | config PATA_HPT3X3_DMA | 403 | config PATA_HPT3X3_DMA |
404 | bool "HPT 343/363 DMA support (Experimental)" | 404 | bool "HPT 343/363 DMA support" |
405 | depends on PATA_HPT3X3 | 405 | depends on PATA_HPT3X3 |
406 | help | 406 | help |
407 | This option enables DMA support for the HPT343/363 | 407 | This option enables DMA support for the HPT343/363 |
@@ -510,8 +510,8 @@ config PATA_NETCELL | |||
510 | If unsure, say N. | 510 | If unsure, say N. |
511 | 511 | ||
512 | config PATA_NINJA32 | 512 | config PATA_NINJA32 |
513 | tristate "Ninja32/Delkin Cardbus ATA support (Experimental)" | 513 | tristate "Ninja32/Delkin Cardbus ATA support" |
514 | depends on PCI && EXPERIMENTAL | 514 | depends on PCI |
515 | help | 515 | help |
516 | This option enables support for the Ninja32, Delkin and | 516 | This option enables support for the Ninja32, Delkin and |
517 | possibly other brands of Cardbus ATA adapter | 517 | possibly other brands of Cardbus ATA adapter |
@@ -573,6 +573,14 @@ config PATA_PCMCIA | |||
573 | 573 | ||
574 | If unsure, say N. | 574 | If unsure, say N. |
575 | 575 | ||
576 | config PATA_PDC2027X | ||
577 | tristate "Promise PATA 2027x support" | ||
578 | depends on PCI | ||
579 | help | ||
580 | This option enables support for Promise PATA pdc20268 to pdc20277 host adapters. | ||
581 | |||
582 | If unsure, say N. | ||
583 | |||
576 | config PATA_PDC_OLD | 584 | config PATA_PDC_OLD |
577 | tristate "Older Promise PATA controller support" | 585 | tristate "Older Promise PATA controller support" |
578 | depends on PCI | 586 | depends on PCI |
@@ -643,14 +651,6 @@ config PATA_SERVERWORKS | |||
643 | 651 | ||
644 | If unsure, say N. | 652 | If unsure, say N. |
645 | 653 | ||
646 | config PATA_PDC2027X | ||
647 | tristate "Promise PATA 2027x support" | ||
648 | depends on PCI | ||
649 | help | ||
650 | This option enables support for Promise PATA pdc20268 to pdc20277 host adapters. | ||
651 | |||
652 | If unsure, say N. | ||
653 | |||
654 | config PATA_SIL680 | 654 | config PATA_SIL680 |
655 | tristate "CMD / Silicon Image 680 PATA support" | 655 | tristate "CMD / Silicon Image 680 PATA support" |
656 | depends on PCI | 656 | depends on PCI |
@@ -667,6 +667,15 @@ config PATA_SIS | |||
667 | 667 | ||
668 | If unsure, say N. | 668 | If unsure, say N. |
669 | 669 | ||
670 | config PATA_TOSHIBA | ||
671 | tristate "Toshiba Piccolo support (Experimental)" | ||
672 | depends on PCI && EXPERIMENTAL | ||
673 | help | ||
674 | Support for the Toshiba Piccolo controllers. Currently only the | ||
675 | primary channel is supported by this driver. | ||
676 | |||
677 | If unsure, say N. | ||
678 | |||
670 | config PATA_VIA | 679 | config PATA_VIA |
671 | tristate "VIA PATA support" | 680 | tristate "VIA PATA support" |
672 | depends on PCI | 681 | depends on PCI |
diff --git a/drivers/ata/Makefile b/drivers/ata/Makefile index e439141d423e..fc936d4471d6 100644 --- a/drivers/ata/Makefile +++ b/drivers/ata/Makefile | |||
@@ -64,6 +64,7 @@ obj-$(CONFIG_PATA_RZ1000) += pata_rz1000.o | |||
64 | obj-$(CONFIG_PATA_SC1200) += pata_sc1200.o | 64 | obj-$(CONFIG_PATA_SC1200) += pata_sc1200.o |
65 | obj-$(CONFIG_PATA_SERVERWORKS) += pata_serverworks.o | 65 | obj-$(CONFIG_PATA_SERVERWORKS) += pata_serverworks.o |
66 | obj-$(CONFIG_PATA_SIL680) += pata_sil680.o | 66 | obj-$(CONFIG_PATA_SIL680) += pata_sil680.o |
67 | obj-$(CONFIG_PATA_TOSHIBA) += pata_piccolo.o | ||
67 | obj-$(CONFIG_PATA_VIA) += pata_via.o | 68 | obj-$(CONFIG_PATA_VIA) += pata_via.o |
68 | obj-$(CONFIG_PATA_WINBOND) += pata_sl82c105.o | 69 | obj-$(CONFIG_PATA_WINBOND) += pata_sl82c105.o |
69 | obj-$(CONFIG_PATA_WINBOND_VLB) += pata_winbond.o | 70 | obj-$(CONFIG_PATA_WINBOND_VLB) += pata_winbond.o |
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c index a3241a1a710b..b8bea100a160 100644 --- a/drivers/ata/ahci.c +++ b/drivers/ata/ahci.c | |||
@@ -113,6 +113,7 @@ enum { | |||
113 | board_ahci_mcp65 = 6, | 113 | board_ahci_mcp65 = 6, |
114 | board_ahci_nopmp = 7, | 114 | board_ahci_nopmp = 7, |
115 | board_ahci_yesncq = 8, | 115 | board_ahci_yesncq = 8, |
116 | board_ahci_nosntf = 9, | ||
116 | 117 | ||
117 | /* global controller registers */ | 118 | /* global controller registers */ |
118 | HOST_CAP = 0x00, /* host capabilities */ | 119 | HOST_CAP = 0x00, /* host capabilities */ |
@@ -235,6 +236,7 @@ enum { | |||
235 | AHCI_HFLAG_NO_SUSPEND = (1 << 10), /* don't suspend */ | 236 | AHCI_HFLAG_NO_SUSPEND = (1 << 10), /* don't suspend */ |
236 | AHCI_HFLAG_SRST_TOUT_IS_OFFLINE = (1 << 11), /* treat SRST timeout as | 237 | AHCI_HFLAG_SRST_TOUT_IS_OFFLINE = (1 << 11), /* treat SRST timeout as |
237 | link offline */ | 238 | link offline */ |
239 | AHCI_HFLAG_NO_SNTF = (1 << 12), /* no sntf */ | ||
238 | 240 | ||
239 | /* ap->flags bits */ | 241 | /* ap->flags bits */ |
240 | 242 | ||
@@ -508,7 +510,7 @@ static const struct ata_port_info ahci_port_info[] = { | |||
508 | .udma_mask = ATA_UDMA6, | 510 | .udma_mask = ATA_UDMA6, |
509 | .port_ops = &ahci_ops, | 511 | .port_ops = &ahci_ops, |
510 | }, | 512 | }, |
511 | /* board_ahci_yesncq */ | 513 | [board_ahci_yesncq] = |
512 | { | 514 | { |
513 | AHCI_HFLAGS (AHCI_HFLAG_YES_NCQ), | 515 | AHCI_HFLAGS (AHCI_HFLAG_YES_NCQ), |
514 | .flags = AHCI_FLAG_COMMON, | 516 | .flags = AHCI_FLAG_COMMON, |
@@ -516,6 +518,14 @@ static const struct ata_port_info ahci_port_info[] = { | |||
516 | .udma_mask = ATA_UDMA6, | 518 | .udma_mask = ATA_UDMA6, |
517 | .port_ops = &ahci_ops, | 519 | .port_ops = &ahci_ops, |
518 | }, | 520 | }, |
521 | [board_ahci_nosntf] = | ||
522 | { | ||
523 | AHCI_HFLAGS (AHCI_HFLAG_NO_SNTF), | ||
524 | .flags = AHCI_FLAG_COMMON, | ||
525 | .pio_mask = ATA_PIO4, | ||
526 | .udma_mask = ATA_UDMA6, | ||
527 | .port_ops = &ahci_ops, | ||
528 | }, | ||
519 | }; | 529 | }; |
520 | 530 | ||
521 | static const struct pci_device_id ahci_pci_tbl[] = { | 531 | static const struct pci_device_id ahci_pci_tbl[] = { |
@@ -531,7 +541,7 @@ static const struct pci_device_id ahci_pci_tbl[] = { | |||
531 | { PCI_VDEVICE(INTEL, 0x2683), board_ahci }, /* ESB2 */ | 541 | { PCI_VDEVICE(INTEL, 0x2683), board_ahci }, /* ESB2 */ |
532 | { PCI_VDEVICE(INTEL, 0x27c6), board_ahci }, /* ICH7-M DH */ | 542 | { PCI_VDEVICE(INTEL, 0x27c6), board_ahci }, /* ICH7-M DH */ |
533 | { PCI_VDEVICE(INTEL, 0x2821), board_ahci }, /* ICH8 */ | 543 | { PCI_VDEVICE(INTEL, 0x2821), board_ahci }, /* ICH8 */ |
534 | { PCI_VDEVICE(INTEL, 0x2822), board_ahci }, /* ICH8 */ | 544 | { PCI_VDEVICE(INTEL, 0x2822), board_ahci_nosntf }, /* ICH8 */ |
535 | { PCI_VDEVICE(INTEL, 0x2824), board_ahci }, /* ICH8 */ | 545 | { PCI_VDEVICE(INTEL, 0x2824), board_ahci }, /* ICH8 */ |
536 | { PCI_VDEVICE(INTEL, 0x2829), board_ahci }, /* ICH8M */ | 546 | { PCI_VDEVICE(INTEL, 0x2829), board_ahci }, /* ICH8M */ |
537 | { PCI_VDEVICE(INTEL, 0x282a), board_ahci }, /* ICH8M */ | 547 | { PCI_VDEVICE(INTEL, 0x282a), board_ahci }, /* ICH8M */ |
@@ -849,6 +859,12 @@ static void ahci_save_initial_config(struct pci_dev *pdev, | |||
849 | cap &= ~HOST_CAP_PMP; | 859 | cap &= ~HOST_CAP_PMP; |
850 | } | 860 | } |
851 | 861 | ||
862 | if ((cap & HOST_CAP_SNTF) && (hpriv->flags & AHCI_HFLAG_NO_SNTF)) { | ||
863 | dev_printk(KERN_INFO, &pdev->dev, | ||
864 | "controller can't do SNTF, turning off CAP_SNTF\n"); | ||
865 | cap &= ~HOST_CAP_SNTF; | ||
866 | } | ||
867 | |||
852 | if (pdev->vendor == PCI_VENDOR_ID_JMICRON && pdev->device == 0x2361 && | 868 | if (pdev->vendor == PCI_VENDOR_ID_JMICRON && pdev->device == 0x2361 && |
853 | port_map != 1) { | 869 | port_map != 1) { |
854 | dev_printk(KERN_INFO, &pdev->dev, | 870 | dev_printk(KERN_INFO, &pdev->dev, |
@@ -2988,6 +3004,14 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
2988 | if (pdev->vendor == PCI_VENDOR_ID_MARVELL && !marvell_enable) | 3004 | if (pdev->vendor == PCI_VENDOR_ID_MARVELL && !marvell_enable) |
2989 | return -ENODEV; | 3005 | return -ENODEV; |
2990 | 3006 | ||
3007 | /* Promise's PDC42819 is a SAS/SATA controller that has an AHCI mode. | ||
3008 | * At the moment, we can only use the AHCI mode. Let the users know | ||
3009 | * that for SAS drives they're out of luck. | ||
3010 | */ | ||
3011 | if (pdev->vendor == PCI_VENDOR_ID_PROMISE) | ||
3012 | dev_printk(KERN_INFO, &pdev->dev, "PDC42819 " | ||
3013 | "can only drive SATA devices with this driver\n"); | ||
3014 | |||
2991 | /* acquire resources */ | 3015 | /* acquire resources */ |
2992 | rc = pcim_enable_device(pdev); | 3016 | rc = pcim_enable_device(pdev); |
2993 | if (rc) | 3017 | if (rc) |
diff --git a/drivers/ata/ata_generic.c b/drivers/ata/ata_generic.c index ecfd22b4f1ce..12e26c3c68e3 100644 --- a/drivers/ata/ata_generic.c +++ b/drivers/ata/ata_generic.c | |||
@@ -168,9 +168,12 @@ static struct pci_device_id ata_generic[] = { | |||
168 | { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C561), }, | 168 | { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C561), }, |
169 | { PCI_DEVICE(PCI_VENDOR_ID_OPTI, PCI_DEVICE_ID_OPTI_82C558), }, | 169 | { PCI_DEVICE(PCI_VENDOR_ID_OPTI, PCI_DEVICE_ID_OPTI_82C558), }, |
170 | { PCI_DEVICE(PCI_VENDOR_ID_CENATEK,PCI_DEVICE_ID_CENATEK_IDE), }, | 170 | { PCI_DEVICE(PCI_VENDOR_ID_CENATEK,PCI_DEVICE_ID_CENATEK_IDE), }, |
171 | { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO), }, | 171 | #if !defined(CONFIG_PATA_TOSHIBA) && !defined(CONFIG_PATA_TOSHIBA_MODULE) |
172 | { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_1), }, | 172 | { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_1), }, |
173 | { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_2), }, | 173 | { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_2), }, |
174 | { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_3), }, | ||
175 | { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_5), }, | ||
176 | #endif | ||
174 | /* Must come last. If you add entries adjust this table appropriately */ | 177 | /* Must come last. If you add entries adjust this table appropriately */ |
175 | { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_STORAGE_IDE << 8, 0xFFFFFF00UL, 1}, | 178 | { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_STORAGE_IDE << 8, 0xFFFFFF00UL, 1}, |
176 | { 0, }, | 179 | { 0, }, |
diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c index 9ac4e378992e..0c6155f51173 100644 --- a/drivers/ata/ata_piix.c +++ b/drivers/ata/ata_piix.c | |||
@@ -869,10 +869,10 @@ static void do_pata_set_dmamode(struct ata_port *ap, struct ata_device *adev, in | |||
869 | (timings[pio][1] << 8); | 869 | (timings[pio][1] << 8); |
870 | } | 870 | } |
871 | 871 | ||
872 | if (ap->udma_mask) { | 872 | if (ap->udma_mask) |
873 | udma_enable &= ~(1 << devid); | 873 | udma_enable &= ~(1 << devid); |
874 | pci_write_config_word(dev, master_port, master_data); | 874 | |
875 | } | 875 | pci_write_config_word(dev, master_port, master_data); |
876 | } | 876 | } |
877 | /* Don't scribble on 0x48 if the controller does not support UDMA */ | 877 | /* Don't scribble on 0x48 if the controller does not support UDMA */ |
878 | if (ap->udma_mask) | 878 | if (ap->udma_mask) |
diff --git a/drivers/ata/libata-acpi.c b/drivers/ata/libata-acpi.c index b0882cddfd4c..1245838ac13d 100644 --- a/drivers/ata/libata-acpi.c +++ b/drivers/ata/libata-acpi.c | |||
@@ -807,12 +807,11 @@ static int ata_acpi_exec_tfs(struct ata_device *dev, int *nr_executed) | |||
807 | * EH context. | 807 | * EH context. |
808 | * | 808 | * |
809 | * RETURNS: | 809 | * RETURNS: |
810 | * 0 on success, -errno on failure. | 810 | * 0 on success, -ENOENT if _SDD doesn't exist, -errno on failure. |
811 | */ | 811 | */ |
812 | static int ata_acpi_push_id(struct ata_device *dev) | 812 | static int ata_acpi_push_id(struct ata_device *dev) |
813 | { | 813 | { |
814 | struct ata_port *ap = dev->link->ap; | 814 | struct ata_port *ap = dev->link->ap; |
815 | int err; | ||
816 | acpi_status status; | 815 | acpi_status status; |
817 | struct acpi_object_list input; | 816 | struct acpi_object_list input; |
818 | union acpi_object in_params[1]; | 817 | union acpi_object in_params[1]; |
@@ -835,12 +834,16 @@ static int ata_acpi_push_id(struct ata_device *dev) | |||
835 | status = acpi_evaluate_object(dev->acpi_handle, "_SDD", &input, NULL); | 834 | status = acpi_evaluate_object(dev->acpi_handle, "_SDD", &input, NULL); |
836 | swap_buf_le16(dev->id, ATA_ID_WORDS); | 835 | swap_buf_le16(dev->id, ATA_ID_WORDS); |
837 | 836 | ||
838 | err = ACPI_FAILURE(status) ? -EIO : 0; | 837 | if (status == AE_NOT_FOUND) |
839 | if (err < 0) | 838 | return -ENOENT; |
839 | |||
840 | if (ACPI_FAILURE(status)) { | ||
840 | ata_dev_printk(dev, KERN_WARNING, | 841 | ata_dev_printk(dev, KERN_WARNING, |
841 | "ACPI _SDD failed (AE 0x%x)\n", status); | 842 | "ACPI _SDD failed (AE 0x%x)\n", status); |
843 | return -EIO; | ||
844 | } | ||
842 | 845 | ||
843 | return err; | 846 | return 0; |
844 | } | 847 | } |
845 | 848 | ||
846 | /** | 849 | /** |
@@ -971,7 +974,7 @@ int ata_acpi_on_devcfg(struct ata_device *dev) | |||
971 | /* do _SDD if SATA */ | 974 | /* do _SDD if SATA */ |
972 | if (acpi_sata) { | 975 | if (acpi_sata) { |
973 | rc = ata_acpi_push_id(dev); | 976 | rc = ata_acpi_push_id(dev); |
974 | if (rc) | 977 | if (rc && rc != -ENOENT) |
975 | goto acpi_err; | 978 | goto acpi_err; |
976 | } | 979 | } |
977 | 980 | ||
diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c index dc72690ed5db..22ff51bdbc8a 100644 --- a/drivers/ata/libata-core.c +++ b/drivers/ata/libata-core.c | |||
@@ -6616,6 +6616,13 @@ static int __init ata_init(void) | |||
6616 | { | 6616 | { |
6617 | ata_parse_force_param(); | 6617 | ata_parse_force_param(); |
6618 | 6618 | ||
6619 | /* | ||
6620 | * FIXME: In UP case, there is only one workqueue thread and if you | ||
6621 | * have more than one PIO device, latency is bloody awful, with | ||
6622 | * occasional multi-second "hiccups" as one PIO device waits for | ||
6623 | * another. It's an ugly wart that users DO occasionally complain | ||
6624 | * about; luckily most users have at most one PIO polled device. | ||
6625 | */ | ||
6619 | ata_wq = create_workqueue("ata"); | 6626 | ata_wq = create_workqueue("ata"); |
6620 | if (!ata_wq) | 6627 | if (!ata_wq) |
6621 | goto free_force_tbl; | 6628 | goto free_force_tbl; |
diff --git a/drivers/ata/libata-eh.c b/drivers/ata/libata-eh.c index bba2ae5df1c2..0ea97c942ced 100644 --- a/drivers/ata/libata-eh.c +++ b/drivers/ata/libata-eh.c | |||
@@ -110,6 +110,13 @@ static const unsigned long ata_eh_identify_timeouts[] = { | |||
110 | ULONG_MAX, | 110 | ULONG_MAX, |
111 | }; | 111 | }; |
112 | 112 | ||
113 | static const unsigned long ata_eh_flush_timeouts[] = { | ||
114 | 15000, /* be generous with flush */ | ||
115 | 15000, /* ditto */ | ||
116 | 30000, /* and even more generous */ | ||
117 | ULONG_MAX, | ||
118 | }; | ||
119 | |||
113 | static const unsigned long ata_eh_other_timeouts[] = { | 120 | static const unsigned long ata_eh_other_timeouts[] = { |
114 | 5000, /* same rationale as identify timeout */ | 121 | 5000, /* same rationale as identify timeout */ |
115 | 10000, /* ditto */ | 122 | 10000, /* ditto */ |
@@ -147,6 +154,8 @@ ata_eh_cmd_timeout_table[ATA_EH_CMD_TIMEOUT_TABLE_SIZE] = { | |||
147 | .timeouts = ata_eh_other_timeouts, }, | 154 | .timeouts = ata_eh_other_timeouts, }, |
148 | { .commands = CMDS(ATA_CMD_INIT_DEV_PARAMS), | 155 | { .commands = CMDS(ATA_CMD_INIT_DEV_PARAMS), |
149 | .timeouts = ata_eh_other_timeouts, }, | 156 | .timeouts = ata_eh_other_timeouts, }, |
157 | { .commands = CMDS(ATA_CMD_FLUSH, ATA_CMD_FLUSH_EXT), | ||
158 | .timeouts = ata_eh_flush_timeouts }, | ||
150 | }; | 159 | }; |
151 | #undef CMDS | 160 | #undef CMDS |
152 | 161 | ||
@@ -3112,6 +3121,82 @@ static int atapi_eh_clear_ua(struct ata_device *dev) | |||
3112 | return 0; | 3121 | return 0; |
3113 | } | 3122 | } |
3114 | 3123 | ||
3124 | /** | ||
3125 | * ata_eh_maybe_retry_flush - Retry FLUSH if necessary | ||
3126 | * @dev: ATA device which may need FLUSH retry | ||
3127 | * | ||
3128 | * If @dev failed FLUSH, it needs to be reported upper layer | ||
3129 | * immediately as it means that @dev failed to remap and already | ||
3130 | * lost at least a sector and further FLUSH retrials won't make | ||
3131 | * any difference to the lost sector. However, if FLUSH failed | ||
3132 | * for other reasons, for example transmission error, FLUSH needs | ||
3133 | * to be retried. | ||
3134 | * | ||
3135 | * This function determines whether FLUSH failure retry is | ||
3136 | * necessary and performs it if so. | ||
3137 | * | ||
3138 | * RETURNS: | ||
3139 | * 0 if EH can continue, -errno if EH needs to be repeated. | ||
3140 | */ | ||
3141 | static int ata_eh_maybe_retry_flush(struct ata_device *dev) | ||
3142 | { | ||
3143 | struct ata_link *link = dev->link; | ||
3144 | struct ata_port *ap = link->ap; | ||
3145 | struct ata_queued_cmd *qc; | ||
3146 | struct ata_taskfile tf; | ||
3147 | unsigned int err_mask; | ||
3148 | int rc = 0; | ||
3149 | |||
3150 | /* did flush fail for this device? */ | ||
3151 | if (!ata_tag_valid(link->active_tag)) | ||
3152 | return 0; | ||
3153 | |||
3154 | qc = __ata_qc_from_tag(ap, link->active_tag); | ||
3155 | if (qc->dev != dev || (qc->tf.command != ATA_CMD_FLUSH_EXT && | ||
3156 | qc->tf.command != ATA_CMD_FLUSH)) | ||
3157 | return 0; | ||
3158 | |||
3159 | /* if the device failed it, it should be reported to upper layers */ | ||
3160 | if (qc->err_mask & AC_ERR_DEV) | ||
3161 | return 0; | ||
3162 | |||
3163 | /* flush failed for some other reason, give it another shot */ | ||
3164 | ata_tf_init(dev, &tf); | ||
3165 | |||
3166 | tf.command = qc->tf.command; | ||
3167 | tf.flags |= ATA_TFLAG_DEVICE; | ||
3168 | tf.protocol = ATA_PROT_NODATA; | ||
3169 | |||
3170 | ata_dev_printk(dev, KERN_WARNING, "retrying FLUSH 0x%x Emask 0x%x\n", | ||
3171 | tf.command, qc->err_mask); | ||
3172 | |||
3173 | err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0); | ||
3174 | if (!err_mask) { | ||
3175 | /* | ||
3176 | * FLUSH is complete but there's no way to | ||
3177 | * successfully complete a failed command from EH. | ||
3178 | * Making sure retry is allowed at least once and | ||
3179 | * retrying it should do the trick - whatever was in | ||
3180 | * the cache is already on the platter and this won't | ||
3181 | * cause infinite loop. | ||
3182 | */ | ||
3183 | qc->scsicmd->allowed = max(qc->scsicmd->allowed, 1); | ||
3184 | } else { | ||
3185 | ata_dev_printk(dev, KERN_WARNING, "FLUSH failed Emask 0x%x\n", | ||
3186 | err_mask); | ||
3187 | rc = -EIO; | ||
3188 | |||
3189 | /* if device failed it, report it to upper layers */ | ||
3190 | if (err_mask & AC_ERR_DEV) { | ||
3191 | qc->err_mask |= AC_ERR_DEV; | ||
3192 | qc->result_tf = tf; | ||
3193 | if (!(ap->pflags & ATA_PFLAG_FROZEN)) | ||
3194 | rc = 0; | ||
3195 | } | ||
3196 | } | ||
3197 | return rc; | ||
3198 | } | ||
3199 | |||
3115 | static int ata_link_nr_enabled(struct ata_link *link) | 3200 | static int ata_link_nr_enabled(struct ata_link *link) |
3116 | { | 3201 | { |
3117 | struct ata_device *dev; | 3202 | struct ata_device *dev; |
@@ -3455,6 +3540,15 @@ int ata_eh_recover(struct ata_port *ap, ata_prereset_fn_t prereset, | |||
3455 | } | 3540 | } |
3456 | } | 3541 | } |
3457 | 3542 | ||
3543 | /* retry flush if necessary */ | ||
3544 | ata_for_each_dev(dev, link, ALL) { | ||
3545 | if (dev->class != ATA_DEV_ATA) | ||
3546 | continue; | ||
3547 | rc = ata_eh_maybe_retry_flush(dev); | ||
3548 | if (rc) | ||
3549 | goto dev_fail; | ||
3550 | } | ||
3551 | |||
3458 | /* configure link power saving */ | 3552 | /* configure link power saving */ |
3459 | if (ehc->i.action & ATA_EH_LPM) | 3553 | if (ehc->i.action & ATA_EH_LPM) |
3460 | ata_for_each_dev(dev, link, ALL) | 3554 | ata_for_each_dev(dev, link, ALL) |
diff --git a/drivers/ata/libata-scsi.c b/drivers/ata/libata-scsi.c index b4ee28dec521..62e6b9ea96af 100644 --- a/drivers/ata/libata-scsi.c +++ b/drivers/ata/libata-scsi.c | |||
@@ -47,6 +47,7 @@ | |||
47 | #include <linux/hdreg.h> | 47 | #include <linux/hdreg.h> |
48 | #include <linux/uaccess.h> | 48 | #include <linux/uaccess.h> |
49 | #include <linux/suspend.h> | 49 | #include <linux/suspend.h> |
50 | #include <asm/unaligned.h> | ||
50 | 51 | ||
51 | #include "libata.h" | 52 | #include "libata.h" |
52 | 53 | ||
@@ -154,8 +155,7 @@ static ssize_t ata_scsi_lpm_put(struct device *dev, | |||
154 | */ | 155 | */ |
155 | for (i = 1; i < ARRAY_SIZE(link_pm_policy); i++) { | 156 | for (i = 1; i < ARRAY_SIZE(link_pm_policy); i++) { |
156 | const int len = strlen(link_pm_policy[i].name); | 157 | const int len = strlen(link_pm_policy[i].name); |
157 | if (strncmp(link_pm_policy[i].name, buf, len) == 0 && | 158 | if (strncmp(link_pm_policy[i].name, buf, len) == 0) { |
158 | buf[len] == '\n') { | ||
159 | policy = link_pm_policy[i].value; | 159 | policy = link_pm_policy[i].value; |
160 | break; | 160 | break; |
161 | } | 161 | } |
@@ -1964,6 +1964,7 @@ static unsigned int ata_scsiop_inq_00(struct ata_scsi_args *args, u8 *rbuf) | |||
1964 | 0x80, /* page 0x80, unit serial no page */ | 1964 | 0x80, /* page 0x80, unit serial no page */ |
1965 | 0x83, /* page 0x83, device ident page */ | 1965 | 0x83, /* page 0x83, device ident page */ |
1966 | 0x89, /* page 0x89, ata info page */ | 1966 | 0x89, /* page 0x89, ata info page */ |
1967 | 0xb0, /* page 0xb0, block limits page */ | ||
1967 | 0xb1, /* page 0xb1, block device characteristics page */ | 1968 | 0xb1, /* page 0xb1, block device characteristics page */ |
1968 | }; | 1969 | }; |
1969 | 1970 | ||
@@ -2085,6 +2086,43 @@ static unsigned int ata_scsiop_inq_89(struct ata_scsi_args *args, u8 *rbuf) | |||
2085 | return 0; | 2086 | return 0; |
2086 | } | 2087 | } |
2087 | 2088 | ||
2089 | static unsigned int ata_scsiop_inq_b0(struct ata_scsi_args *args, u8 *rbuf) | ||
2090 | { | ||
2091 | u32 min_io_sectors; | ||
2092 | |||
2093 | rbuf[1] = 0xb0; | ||
2094 | rbuf[3] = 0x3c; /* required VPD size with unmap support */ | ||
2095 | |||
2096 | /* | ||
2097 | * Optimal transfer length granularity. | ||
2098 | * | ||
2099 | * This is always one physical block, but for disks with a smaller | ||
2100 | * logical than physical sector size we need to figure out what the | ||
2101 | * latter is. | ||
2102 | */ | ||
2103 | if (ata_id_has_large_logical_sectors(args->id)) | ||
2104 | min_io_sectors = ata_id_logical_per_physical_sectors(args->id); | ||
2105 | else | ||
2106 | min_io_sectors = 1; | ||
2107 | put_unaligned_be16(min_io_sectors, &rbuf[6]); | ||
2108 | |||
2109 | /* | ||
2110 | * Optimal unmap granularity. | ||
2111 | * | ||
2112 | * The ATA spec doesn't even know about a granularity or alignment | ||
2113 | * for the TRIM command. We can leave away most of the unmap related | ||
2114 | * VPD page entries, but we have specifify a granularity to signal | ||
2115 | * that we support some form of unmap - in thise case via WRITE SAME | ||
2116 | * with the unmap bit set. | ||
2117 | */ | ||
2118 | if (ata_id_has_trim(args->id)) { | ||
2119 | put_unaligned_be32(65535 * 512 / 8, &rbuf[20]); | ||
2120 | put_unaligned_be32(1, &rbuf[28]); | ||
2121 | } | ||
2122 | |||
2123 | return 0; | ||
2124 | } | ||
2125 | |||
2088 | static unsigned int ata_scsiop_inq_b1(struct ata_scsi_args *args, u8 *rbuf) | 2126 | static unsigned int ata_scsiop_inq_b1(struct ata_scsi_args *args, u8 *rbuf) |
2089 | { | 2127 | { |
2090 | int form_factor = ata_id_form_factor(args->id); | 2128 | int form_factor = ata_id_form_factor(args->id); |
@@ -2374,6 +2412,13 @@ static unsigned int ata_scsiop_read_cap(struct ata_scsi_args *args, u8 *rbuf) | |||
2374 | rbuf[13] = log_per_phys; | 2412 | rbuf[13] = log_per_phys; |
2375 | rbuf[14] = (lowest_aligned >> 8) & 0x3f; | 2413 | rbuf[14] = (lowest_aligned >> 8) & 0x3f; |
2376 | rbuf[15] = lowest_aligned; | 2414 | rbuf[15] = lowest_aligned; |
2415 | |||
2416 | if (ata_id_has_trim(args->id)) { | ||
2417 | rbuf[14] |= 0x80; /* TPE */ | ||
2418 | |||
2419 | if (ata_id_has_zero_after_trim(args->id)) | ||
2420 | rbuf[14] |= 0x40; /* TPRZ */ | ||
2421 | } | ||
2377 | } | 2422 | } |
2378 | 2423 | ||
2379 | return 0; | 2424 | return 0; |
@@ -2896,6 +2941,58 @@ static unsigned int ata_scsi_pass_thru(struct ata_queued_cmd *qc) | |||
2896 | return 1; | 2941 | return 1; |
2897 | } | 2942 | } |
2898 | 2943 | ||
2944 | static unsigned int ata_scsi_write_same_xlat(struct ata_queued_cmd *qc) | ||
2945 | { | ||
2946 | struct ata_taskfile *tf = &qc->tf; | ||
2947 | struct scsi_cmnd *scmd = qc->scsicmd; | ||
2948 | struct ata_device *dev = qc->dev; | ||
2949 | const u8 *cdb = scmd->cmnd; | ||
2950 | u64 block; | ||
2951 | u32 n_block; | ||
2952 | u32 size; | ||
2953 | void *buf; | ||
2954 | |||
2955 | /* we may not issue DMA commands if no DMA mode is set */ | ||
2956 | if (unlikely(!dev->dma_mode)) | ||
2957 | goto invalid_fld; | ||
2958 | |||
2959 | if (unlikely(scmd->cmd_len < 16)) | ||
2960 | goto invalid_fld; | ||
2961 | scsi_16_lba_len(cdb, &block, &n_block); | ||
2962 | |||
2963 | /* for now we only support WRITE SAME with the unmap bit set */ | ||
2964 | if (unlikely(!(cdb[1] & 0x8))) | ||
2965 | goto invalid_fld; | ||
2966 | |||
2967 | /* | ||
2968 | * WRITE SAME always has a sector sized buffer as payload, this | ||
2969 | * should never be a multiple entry S/G list. | ||
2970 | */ | ||
2971 | if (!scsi_sg_count(scmd)) | ||
2972 | goto invalid_fld; | ||
2973 | |||
2974 | buf = page_address(sg_page(scsi_sglist(scmd))); | ||
2975 | size = ata_set_lba_range_entries(buf, 512, block, n_block); | ||
2976 | |||
2977 | tf->protocol = ATA_PROT_DMA; | ||
2978 | tf->hob_feature = 0; | ||
2979 | tf->feature = ATA_DSM_TRIM; | ||
2980 | tf->hob_nsect = (size / 512) >> 8; | ||
2981 | tf->nsect = size / 512; | ||
2982 | tf->command = ATA_CMD_DSM; | ||
2983 | tf->flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE | ATA_TFLAG_LBA48 | | ||
2984 | ATA_TFLAG_WRITE; | ||
2985 | |||
2986 | ata_qc_set_pc_nbytes(qc); | ||
2987 | |||
2988 | return 0; | ||
2989 | |||
2990 | invalid_fld: | ||
2991 | ata_scsi_set_sense(scmd, ILLEGAL_REQUEST, 0x24, 0x00); | ||
2992 | /* "Invalid field in cdb" */ | ||
2993 | return 1; | ||
2994 | } | ||
2995 | |||
2899 | /** | 2996 | /** |
2900 | * ata_get_xlat_func - check if SCSI to ATA translation is possible | 2997 | * ata_get_xlat_func - check if SCSI to ATA translation is possible |
2901 | * @dev: ATA device | 2998 | * @dev: ATA device |
@@ -2920,6 +3017,9 @@ static inline ata_xlat_func_t ata_get_xlat_func(struct ata_device *dev, u8 cmd) | |||
2920 | case WRITE_16: | 3017 | case WRITE_16: |
2921 | return ata_scsi_rw_xlat; | 3018 | return ata_scsi_rw_xlat; |
2922 | 3019 | ||
3020 | case 0x93 /*WRITE_SAME_16*/: | ||
3021 | return ata_scsi_write_same_xlat; | ||
3022 | |||
2923 | case SYNCHRONIZE_CACHE: | 3023 | case SYNCHRONIZE_CACHE: |
2924 | if (ata_try_flush_cache(dev)) | 3024 | if (ata_try_flush_cache(dev)) |
2925 | return ata_scsi_flush_xlat; | 3025 | return ata_scsi_flush_xlat; |
@@ -3109,6 +3209,9 @@ void ata_scsi_simulate(struct ata_device *dev, struct scsi_cmnd *cmd, | |||
3109 | case 0x89: | 3209 | case 0x89: |
3110 | ata_scsi_rbuf_fill(&args, ata_scsiop_inq_89); | 3210 | ata_scsi_rbuf_fill(&args, ata_scsiop_inq_89); |
3111 | break; | 3211 | break; |
3212 | case 0xb0: | ||
3213 | ata_scsi_rbuf_fill(&args, ata_scsiop_inq_b0); | ||
3214 | break; | ||
3112 | case 0xb1: | 3215 | case 0xb1: |
3113 | ata_scsi_rbuf_fill(&args, ata_scsiop_inq_b1); | 3216 | ata_scsi_rbuf_fill(&args, ata_scsiop_inq_b1); |
3114 | break; | 3217 | break; |
diff --git a/drivers/ata/pata_ali.c b/drivers/ata/pata_ali.c index 1432dc9d0ab8..9434114b2ca8 100644 --- a/drivers/ata/pata_ali.c +++ b/drivers/ata/pata_ali.c | |||
@@ -453,7 +453,9 @@ static void ali_init_chipset(struct pci_dev *pdev) | |||
453 | /* Clear CD-ROM DMA write bit */ | 453 | /* Clear CD-ROM DMA write bit */ |
454 | tmp &= 0x7F; | 454 | tmp &= 0x7F; |
455 | /* Cable and UDMA */ | 455 | /* Cable and UDMA */ |
456 | pci_write_config_byte(pdev, 0x4B, tmp | 0x09); | 456 | if (pdev->revision >= 0xc2) |
457 | tmp |= 0x01; | ||
458 | pci_write_config_byte(pdev, 0x4B, tmp | 0x08); | ||
457 | /* | 459 | /* |
458 | * CD_ROM DMA on (0x53 bit 0). Enable this even if we want | 460 | * CD_ROM DMA on (0x53 bit 0). Enable this even if we want |
459 | * to use PIO. 0x53 bit 1 (rev 20 only) - enable FIFO control | 461 | * to use PIO. 0x53 bit 1 (rev 20 only) - enable FIFO control |
diff --git a/drivers/ata/pata_cmd64x.c b/drivers/ata/pata_cmd64x.c index f98dffedf4bc..dadfc358ba1c 100644 --- a/drivers/ata/pata_cmd64x.c +++ b/drivers/ata/pata_cmd64x.c | |||
@@ -31,7 +31,7 @@ | |||
31 | #include <linux/libata.h> | 31 | #include <linux/libata.h> |
32 | 32 | ||
33 | #define DRV_NAME "pata_cmd64x" | 33 | #define DRV_NAME "pata_cmd64x" |
34 | #define DRV_VERSION "0.2.5" | 34 | #define DRV_VERSION "0.3.1" |
35 | 35 | ||
36 | /* | 36 | /* |
37 | * CMD64x specific registers definition. | 37 | * CMD64x specific registers definition. |
@@ -254,17 +254,109 @@ static void cmd648_bmdma_stop(struct ata_queued_cmd *qc) | |||
254 | } | 254 | } |
255 | 255 | ||
256 | /** | 256 | /** |
257 | * cmd646r1_dma_stop - DMA stop callback | 257 | * cmd64x_bmdma_stop - DMA stop callback |
258 | * @qc: Command in progress | 258 | * @qc: Command in progress |
259 | * | 259 | * |
260 | * Stub for now while investigating the r1 quirk in the old driver. | 260 | * Track the completion of live DMA commands and clear the |
261 | * host->private_data DMA tracking flag as we do. | ||
261 | */ | 262 | */ |
262 | 263 | ||
263 | static void cmd646r1_bmdma_stop(struct ata_queued_cmd *qc) | 264 | static void cmd64x_bmdma_stop(struct ata_queued_cmd *qc) |
264 | { | 265 | { |
266 | struct ata_port *ap = qc->ap; | ||
265 | ata_bmdma_stop(qc); | 267 | ata_bmdma_stop(qc); |
268 | WARN_ON(ap->host->private_data != ap); | ||
269 | ap->host->private_data = NULL; | ||
266 | } | 270 | } |
267 | 271 | ||
272 | /** | ||
273 | * cmd64x_qc_defer - Defer logic for chip limits | ||
274 | * @qc: queued command | ||
275 | * | ||
276 | * Decide whether we can issue the command. Called under the host lock. | ||
277 | */ | ||
278 | |||
279 | static int cmd64x_qc_defer(struct ata_queued_cmd *qc) | ||
280 | { | ||
281 | struct ata_host *host = qc->ap->host; | ||
282 | struct ata_port *alt = host->ports[1 ^ qc->ap->port_no]; | ||
283 | int rc; | ||
284 | int dma = 0; | ||
285 | |||
286 | /* Apply the ATA rules first */ | ||
287 | rc = ata_std_qc_defer(qc); | ||
288 | if (rc) | ||
289 | return rc; | ||
290 | |||
291 | if (qc->tf.protocol == ATAPI_PROT_DMA || | ||
292 | qc->tf.protocol == ATA_PROT_DMA) | ||
293 | dma = 1; | ||
294 | |||
295 | /* If the other port is not live then issue the command */ | ||
296 | if (alt == NULL || !alt->qc_active) { | ||
297 | if (dma) | ||
298 | host->private_data = qc->ap; | ||
299 | return 0; | ||
300 | } | ||
301 | /* If there is a live DMA command then wait */ | ||
302 | if (host->private_data != NULL) | ||
303 | return ATA_DEFER_PORT; | ||
304 | if (dma) | ||
305 | /* Cannot overlap our DMA command */ | ||
306 | return ATA_DEFER_PORT; | ||
307 | return 0; | ||
308 | } | ||
309 | |||
310 | /** | ||
311 | * cmd64x_interrupt - ATA host interrupt handler | ||
312 | * @irq: irq line (unused) | ||
313 | * @dev_instance: pointer to our ata_host information structure | ||
314 | * | ||
315 | * Our interrupt handler for PCI IDE devices. Calls | ||
316 | * ata_sff_host_intr() for each port that is flagging an IRQ. We cannot | ||
317 | * use the defaults as we need to avoid touching status/altstatus during | ||
318 | * a DMA. | ||
319 | * | ||
320 | * LOCKING: | ||
321 | * Obtains host lock during operation. | ||
322 | * | ||
323 | * RETURNS: | ||
324 | * IRQ_NONE or IRQ_HANDLED. | ||
325 | */ | ||
326 | irqreturn_t cmd64x_interrupt(int irq, void *dev_instance) | ||
327 | { | ||
328 | struct ata_host *host = dev_instance; | ||
329 | struct pci_dev *pdev = to_pci_dev(host->dev); | ||
330 | unsigned int i; | ||
331 | unsigned int handled = 0; | ||
332 | unsigned long flags; | ||
333 | static const u8 irq_reg[2] = { CFR, ARTTIM23 }; | ||
334 | static const u8 irq_mask[2] = { 1 << 2, 1 << 4 }; | ||
335 | |||
336 | /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */ | ||
337 | spin_lock_irqsave(&host->lock, flags); | ||
338 | |||
339 | for (i = 0; i < host->n_ports; i++) { | ||
340 | struct ata_port *ap; | ||
341 | u8 reg; | ||
342 | |||
343 | pci_read_config_byte(pdev, irq_reg[i], ®); | ||
344 | ap = host->ports[i]; | ||
345 | if (ap && (reg & irq_mask[i]) && | ||
346 | !(ap->flags & ATA_FLAG_DISABLED)) { | ||
347 | struct ata_queued_cmd *qc; | ||
348 | |||
349 | qc = ata_qc_from_tag(ap, ap->link.active_tag); | ||
350 | if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) && | ||
351 | (qc->flags & ATA_QCFLAG_ACTIVE)) | ||
352 | handled |= ata_sff_host_intr(ap, qc); | ||
353 | } | ||
354 | } | ||
355 | |||
356 | spin_unlock_irqrestore(&host->lock, flags); | ||
357 | |||
358 | return IRQ_RETVAL(handled); | ||
359 | } | ||
268 | static struct scsi_host_template cmd64x_sht = { | 360 | static struct scsi_host_template cmd64x_sht = { |
269 | ATA_BMDMA_SHT(DRV_NAME), | 361 | ATA_BMDMA_SHT(DRV_NAME), |
270 | }; | 362 | }; |
@@ -273,6 +365,8 @@ static const struct ata_port_operations cmd64x_base_ops = { | |||
273 | .inherits = &ata_bmdma_port_ops, | 365 | .inherits = &ata_bmdma_port_ops, |
274 | .set_piomode = cmd64x_set_piomode, | 366 | .set_piomode = cmd64x_set_piomode, |
275 | .set_dmamode = cmd64x_set_dmamode, | 367 | .set_dmamode = cmd64x_set_dmamode, |
368 | .bmdma_stop = cmd64x_bmdma_stop, | ||
369 | .qc_defer = cmd64x_qc_defer, | ||
276 | }; | 370 | }; |
277 | 371 | ||
278 | static struct ata_port_operations cmd64x_port_ops = { | 372 | static struct ata_port_operations cmd64x_port_ops = { |
@@ -282,7 +376,6 @@ static struct ata_port_operations cmd64x_port_ops = { | |||
282 | 376 | ||
283 | static struct ata_port_operations cmd646r1_port_ops = { | 377 | static struct ata_port_operations cmd646r1_port_ops = { |
284 | .inherits = &cmd64x_base_ops, | 378 | .inherits = &cmd64x_base_ops, |
285 | .bmdma_stop = cmd646r1_bmdma_stop, | ||
286 | .cable_detect = ata_cable_40wire, | 379 | .cable_detect = ata_cable_40wire, |
287 | }; | 380 | }; |
288 | 381 | ||
@@ -290,12 +383,11 @@ static struct ata_port_operations cmd648_port_ops = { | |||
290 | .inherits = &cmd64x_base_ops, | 383 | .inherits = &cmd64x_base_ops, |
291 | .bmdma_stop = cmd648_bmdma_stop, | 384 | .bmdma_stop = cmd648_bmdma_stop, |
292 | .cable_detect = cmd648_cable_detect, | 385 | .cable_detect = cmd648_cable_detect, |
386 | .qc_defer = ata_std_qc_defer | ||
293 | }; | 387 | }; |
294 | 388 | ||
295 | static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id) | 389 | static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id) |
296 | { | 390 | { |
297 | u32 class_rev; | ||
298 | |||
299 | static const struct ata_port_info cmd_info[6] = { | 391 | static const struct ata_port_info cmd_info[6] = { |
300 | { /* CMD 643 - no UDMA */ | 392 | { /* CMD 643 - no UDMA */ |
301 | .flags = ATA_FLAG_SLAVE_POSS, | 393 | .flags = ATA_FLAG_SLAVE_POSS, |
@@ -340,40 +432,43 @@ static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id) | |||
340 | const struct ata_port_info *ppi[] = { &cmd_info[id->driver_data], NULL }; | 432 | const struct ata_port_info *ppi[] = { &cmd_info[id->driver_data], NULL }; |
341 | u8 mrdmode; | 433 | u8 mrdmode; |
342 | int rc; | 434 | int rc; |
435 | struct ata_host *host; | ||
343 | 436 | ||
344 | rc = pcim_enable_device(pdev); | 437 | rc = pcim_enable_device(pdev); |
345 | if (rc) | 438 | if (rc) |
346 | return rc; | 439 | return rc; |
347 | 440 | ||
348 | pci_read_config_dword(pdev, PCI_CLASS_REVISION, &class_rev); | ||
349 | class_rev &= 0xFF; | ||
350 | |||
351 | if (id->driver_data == 0) /* 643 */ | 441 | if (id->driver_data == 0) /* 643 */ |
352 | ata_pci_bmdma_clear_simplex(pdev); | 442 | ata_pci_bmdma_clear_simplex(pdev); |
353 | 443 | ||
354 | if (pdev->device == PCI_DEVICE_ID_CMD_646) { | 444 | if (pdev->device == PCI_DEVICE_ID_CMD_646) { |
355 | /* Does UDMA work ? */ | 445 | /* Does UDMA work ? */ |
356 | if (class_rev > 4) | 446 | if (pdev->revision > 4) |
357 | ppi[0] = &cmd_info[2]; | 447 | ppi[0] = &cmd_info[2]; |
358 | /* Early rev with other problems ? */ | 448 | /* Early rev with other problems ? */ |
359 | else if (class_rev == 1) | 449 | else if (pdev->revision == 1) |
360 | ppi[0] = &cmd_info[3]; | 450 | ppi[0] = &cmd_info[3]; |
361 | } | 451 | } |
362 | 452 | ||
453 | |||
363 | pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 64); | 454 | pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 64); |
364 | pci_read_config_byte(pdev, MRDMODE, &mrdmode); | 455 | pci_read_config_byte(pdev, MRDMODE, &mrdmode); |
365 | mrdmode &= ~ 0x30; /* IRQ set up */ | 456 | mrdmode &= ~ 0x30; /* IRQ set up */ |
366 | mrdmode |= 0x02; /* Memory read line enable */ | 457 | mrdmode |= 0x02; /* Memory read line enable */ |
367 | pci_write_config_byte(pdev, MRDMODE, mrdmode); | 458 | pci_write_config_byte(pdev, MRDMODE, mrdmode); |
368 | 459 | ||
369 | /* Force PIO 0 here.. */ | ||
370 | |||
371 | /* PPC specific fixup copied from old driver */ | 460 | /* PPC specific fixup copied from old driver */ |
372 | #ifdef CONFIG_PPC | 461 | #ifdef CONFIG_PPC |
373 | pci_write_config_byte(pdev, UDIDETCR0, 0xF0); | 462 | pci_write_config_byte(pdev, UDIDETCR0, 0xF0); |
374 | #endif | 463 | #endif |
464 | rc = ata_pci_sff_prepare_host(pdev, ppi, &host); | ||
465 | if (rc) | ||
466 | return rc; | ||
467 | /* We use this pointer to track the AP which has DMA running */ | ||
468 | host->private_data = NULL; | ||
375 | 469 | ||
376 | return ata_pci_sff_init_one(pdev, ppi, &cmd64x_sht, NULL); | 470 | pci_set_master(pdev); |
471 | return ata_pci_sff_activate_host(host, cmd64x_interrupt, &cmd64x_sht); | ||
377 | } | 472 | } |
378 | 473 | ||
379 | #ifdef CONFIG_PM | 474 | #ifdef CONFIG_PM |
diff --git a/drivers/ata/pata_cs5520.c b/drivers/ata/pata_cs5520.c index 0df83cf74233..95ebdac517f2 100644 --- a/drivers/ata/pata_cs5520.c +++ b/drivers/ata/pata_cs5520.c | |||
@@ -90,48 +90,12 @@ static void cs5520_set_timings(struct ata_port *ap, struct ata_device *adev, int | |||
90 | } | 90 | } |
91 | 91 | ||
92 | /** | 92 | /** |
93 | * cs5520_enable_dma - turn on DMA bits | ||
94 | * | ||
95 | * Turn on the DMA bits for this disk. Needed because the BIOS probably | ||
96 | * has not done the work for us. Belongs in the core SATA code. | ||
97 | */ | ||
98 | |||
99 | static void cs5520_enable_dma(struct ata_port *ap, struct ata_device *adev) | ||
100 | { | ||
101 | /* Set the DMA enable/disable flag */ | ||
102 | u8 reg = ioread8(ap->ioaddr.bmdma_addr + 0x02); | ||
103 | reg |= 1<<(adev->devno + 5); | ||
104 | iowrite8(reg, ap->ioaddr.bmdma_addr + 0x02); | ||
105 | } | ||
106 | |||
107 | /** | ||
108 | * cs5520_set_dmamode - program DMA timings | ||
109 | * @ap: ATA port | ||
110 | * @adev: ATA device | ||
111 | * | ||
112 | * Program the DMA mode timings for the controller according to the pio | ||
113 | * clocking table. Note that this device sets the DMA timings to PIO | ||
114 | * mode values. This may seem bizarre but the 5520 architecture talks | ||
115 | * PIO mode to the disk and DMA mode to the controller so the underlying | ||
116 | * transfers are PIO timed. | ||
117 | */ | ||
118 | |||
119 | static void cs5520_set_dmamode(struct ata_port *ap, struct ata_device *adev) | ||
120 | { | ||
121 | static const int dma_xlate[3] = { XFER_PIO_0, XFER_PIO_3, XFER_PIO_4 }; | ||
122 | cs5520_set_timings(ap, adev, dma_xlate[adev->dma_mode]); | ||
123 | cs5520_enable_dma(ap, adev); | ||
124 | } | ||
125 | |||
126 | /** | ||
127 | * cs5520_set_piomode - program PIO timings | 93 | * cs5520_set_piomode - program PIO timings |
128 | * @ap: ATA port | 94 | * @ap: ATA port |
129 | * @adev: ATA device | 95 | * @adev: ATA device |
130 | * | 96 | * |
131 | * Program the PIO mode timings for the controller according to the pio | 97 | * Program the PIO mode timings for the controller according to the pio |
132 | * clocking table. We know pio_mode will equal dma_mode because of the | 98 | * clocking table. |
133 | * CS5520 architecture. At least once we turned DMA on and wrote a | ||
134 | * mode setter. | ||
135 | */ | 99 | */ |
136 | 100 | ||
137 | static void cs5520_set_piomode(struct ata_port *ap, struct ata_device *adev) | 101 | static void cs5520_set_piomode(struct ata_port *ap, struct ata_device *adev) |
@@ -149,7 +113,6 @@ static struct ata_port_operations cs5520_port_ops = { | |||
149 | .qc_prep = ata_sff_dumb_qc_prep, | 113 | .qc_prep = ata_sff_dumb_qc_prep, |
150 | .cable_detect = ata_cable_40wire, | 114 | .cable_detect = ata_cable_40wire, |
151 | .set_piomode = cs5520_set_piomode, | 115 | .set_piomode = cs5520_set_piomode, |
152 | .set_dmamode = cs5520_set_dmamode, | ||
153 | }; | 116 | }; |
154 | 117 | ||
155 | static int __devinit cs5520_init_one(struct pci_dev *pdev, const struct pci_device_id *id) | 118 | static int __devinit cs5520_init_one(struct pci_dev *pdev, const struct pci_device_id *id) |
diff --git a/drivers/ata/pata_cs5536.c b/drivers/ata/pata_cs5536.c index 6da4cb486c8d..ffee3978ec83 100644 --- a/drivers/ata/pata_cs5536.c +++ b/drivers/ata/pata_cs5536.c | |||
@@ -224,7 +224,7 @@ static struct scsi_host_template cs5536_sht = { | |||
224 | }; | 224 | }; |
225 | 225 | ||
226 | static struct ata_port_operations cs5536_port_ops = { | 226 | static struct ata_port_operations cs5536_port_ops = { |
227 | .inherits = &ata_bmdma_port_ops, | 227 | .inherits = &ata_bmdma32_port_ops, |
228 | .cable_detect = cs5536_cable_detect, | 228 | .cable_detect = cs5536_cable_detect, |
229 | .set_piomode = cs5536_set_piomode, | 229 | .set_piomode = cs5536_set_piomode, |
230 | .set_dmamode = cs5536_set_dmamode, | 230 | .set_dmamode = cs5536_set_dmamode, |
diff --git a/drivers/ata/pata_efar.c b/drivers/ata/pata_efar.c index 2a6412f5d117..b2e71e6473ed 100644 --- a/drivers/ata/pata_efar.c +++ b/drivers/ata/pata_efar.c | |||
@@ -2,6 +2,7 @@ | |||
2 | * pata_efar.c - EFAR PIIX clone controller driver | 2 | * pata_efar.c - EFAR PIIX clone controller driver |
3 | * | 3 | * |
4 | * (C) 2005 Red Hat | 4 | * (C) 2005 Red Hat |
5 | * (C) 2009 Bartlomiej Zolnierkiewicz | ||
5 | * | 6 | * |
6 | * Some parts based on ata_piix.c by Jeff Garzik and others. | 7 | * Some parts based on ata_piix.c by Jeff Garzik and others. |
7 | * | 8 | * |
@@ -118,12 +119,12 @@ static void efar_set_piomode (struct ata_port *ap, struct ata_device *adev) | |||
118 | int shift = 4 * ap->port_no; | 119 | int shift = 4 * ap->port_no; |
119 | u8 slave_data; | 120 | u8 slave_data; |
120 | 121 | ||
121 | idetm_data &= 0xCC0F; | 122 | idetm_data &= 0xFF0F; |
122 | idetm_data |= (control << 4); | 123 | idetm_data |= (control << 4); |
123 | 124 | ||
124 | /* Slave timing in separate register */ | 125 | /* Slave timing in separate register */ |
125 | pci_read_config_byte(dev, 0x44, &slave_data); | 126 | pci_read_config_byte(dev, 0x44, &slave_data); |
126 | slave_data &= 0x0F << shift; | 127 | slave_data &= ap->port_no ? 0x0F : 0xF0; |
127 | slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << shift; | 128 | slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << shift; |
128 | pci_write_config_byte(dev, 0x44, slave_data); | 129 | pci_write_config_byte(dev, 0x44, slave_data); |
129 | } | 130 | } |
@@ -200,7 +201,7 @@ static void efar_set_dmamode (struct ata_port *ap, struct ata_device *adev) | |||
200 | master_data &= 0xFF4F; /* Mask out IORDY|TIME1|DMAONLY */ | 201 | master_data &= 0xFF4F; /* Mask out IORDY|TIME1|DMAONLY */ |
201 | master_data |= control << 4; | 202 | master_data |= control << 4; |
202 | pci_read_config_byte(dev, 0x44, &slave_data); | 203 | pci_read_config_byte(dev, 0x44, &slave_data); |
203 | slave_data &= (0x0F + 0xE1 * ap->port_no); | 204 | slave_data &= ap->port_no ? 0x0F : 0xF0; |
204 | /* Load the matching timing */ | 205 | /* Load the matching timing */ |
205 | slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << (ap->port_no ? 4 : 0); | 206 | slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << (ap->port_no ? 4 : 0); |
206 | pci_write_config_byte(dev, 0x44, slave_data); | 207 | pci_write_config_byte(dev, 0x44, slave_data); |
@@ -251,7 +252,7 @@ static int efar_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | |||
251 | static const struct ata_port_info info = { | 252 | static const struct ata_port_info info = { |
252 | .flags = ATA_FLAG_SLAVE_POSS, | 253 | .flags = ATA_FLAG_SLAVE_POSS, |
253 | .pio_mask = ATA_PIO4, | 254 | .pio_mask = ATA_PIO4, |
254 | .mwdma_mask = ATA_MWDMA2, | 255 | .mwdma_mask = ATA_MWDMA12_ONLY, |
255 | .udma_mask = ATA_UDMA4, | 256 | .udma_mask = ATA_UDMA4, |
256 | .port_ops = &efar_ops, | 257 | .port_ops = &efar_ops, |
257 | }; | 258 | }; |
diff --git a/drivers/ata/pata_hpt366.c b/drivers/ata/pata_hpt366.c index d7f2da127d13..0bd48e8f21bd 100644 --- a/drivers/ata/pata_hpt366.c +++ b/drivers/ata/pata_hpt366.c | |||
@@ -27,7 +27,7 @@ | |||
27 | #include <linux/libata.h> | 27 | #include <linux/libata.h> |
28 | 28 | ||
29 | #define DRV_NAME "pata_hpt366" | 29 | #define DRV_NAME "pata_hpt366" |
30 | #define DRV_VERSION "0.6.2" | 30 | #define DRV_VERSION "0.6.7" |
31 | 31 | ||
32 | struct hpt_clock { | 32 | struct hpt_clock { |
33 | u8 xfer_mode; | 33 | u8 xfer_mode; |
@@ -36,24 +36,22 @@ struct hpt_clock { | |||
36 | 36 | ||
37 | /* key for bus clock timings | 37 | /* key for bus clock timings |
38 | * bit | 38 | * bit |
39 | * 0:3 data_high_time. inactive time of DIOW_/DIOR_ for PIO and MW | 39 | * 0:3 data_high_time. Inactive time of DIOW_/DIOR_ for PIO and MW DMA. |
40 | * DMA. cycles = value + 1 | 40 | * cycles = value + 1 |
41 | * 4:8 data_low_time. active time of DIOW_/DIOR_ for PIO and MW | 41 | * 4:7 data_low_time. Active time of DIOW_/DIOR_ for PIO and MW DMA. |
42 | * DMA. cycles = value + 1 | 42 | * cycles = value + 1 |
43 | * 9:12 cmd_high_time. inactive time of DIOW_/DIOR_ during task file | 43 | * 8:11 cmd_high_time. Inactive time of DIOW_/DIOR_ during task file |
44 | * register access. | 44 | * register access. |
45 | * 13:17 cmd_low_time. active time of DIOW_/DIOR_ during task file | 45 | * 12:15 cmd_low_time. Active time of DIOW_/DIOR_ during task file |
46 | * register access. | 46 | * register access. |
47 | * 18:21 udma_cycle_time. clock freq and clock cycles for UDMA xfer. | 47 | * 16:18 udma_cycle_time. Clock cycles for UDMA xfer? |
48 | * during task file register access. | 48 | * 19:21 pre_high_time. Time to initialize 1st cycle for PIO and MW DMA xfer. |
49 | * 22:24 pre_high_time. time to initialize 1st cycle for PIO and MW DMA | 49 | * 22:24 cmd_pre_high_time. Time to initialize 1st PIO cycle for task file |
50 | * xfer. | ||
51 | * 25:27 cmd_pre_high_time. time to initialize 1st PIO cycle for task | ||
52 | * register access. | 50 | * register access. |
53 | * 28 UDMA enable | 51 | * 28 UDMA enable. |
54 | * 29 DMA enable | 52 | * 29 DMA enable. |
55 | * 30 PIO_MST enable. if set, the chip is in bus master mode during | 53 | * 30 PIO_MST enable. If set, the chip is in bus master mode during |
56 | * PIO. | 54 | * PIO xfer. |
57 | * 31 FIFO enable. | 55 | * 31 FIFO enable. |
58 | */ | 56 | */ |
59 | 57 | ||
@@ -344,7 +342,6 @@ static int hpt36x_init_one(struct pci_dev *dev, const struct pci_device_id *id) | |||
344 | const struct ata_port_info *ppi[] = { &info_hpt366, NULL }; | 342 | const struct ata_port_info *ppi[] = { &info_hpt366, NULL }; |
345 | 343 | ||
346 | void *hpriv = NULL; | 344 | void *hpriv = NULL; |
347 | u32 class_rev; | ||
348 | u32 reg1; | 345 | u32 reg1; |
349 | int rc; | 346 | int rc; |
350 | 347 | ||
@@ -352,13 +349,10 @@ static int hpt36x_init_one(struct pci_dev *dev, const struct pci_device_id *id) | |||
352 | if (rc) | 349 | if (rc) |
353 | return rc; | 350 | return rc; |
354 | 351 | ||
355 | pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev); | ||
356 | class_rev &= 0xFF; | ||
357 | |||
358 | /* May be a later chip in disguise. Check */ | 352 | /* May be a later chip in disguise. Check */ |
359 | /* Newer chips are not in the HPT36x driver. Ignore them */ | 353 | /* Newer chips are not in the HPT36x driver. Ignore them */ |
360 | if (class_rev > 2) | 354 | if (dev->revision > 2) |
361 | return -ENODEV; | 355 | return -ENODEV; |
362 | 356 | ||
363 | hpt36x_init_chipset(dev); | 357 | hpt36x_init_chipset(dev); |
364 | 358 | ||
diff --git a/drivers/ata/pata_hpt37x.c b/drivers/ata/pata_hpt37x.c index d0a7df2e5ca7..4224cfccedef 100644 --- a/drivers/ata/pata_hpt37x.c +++ b/drivers/ata/pata_hpt37x.c | |||
@@ -24,7 +24,7 @@ | |||
24 | #include <linux/libata.h> | 24 | #include <linux/libata.h> |
25 | 25 | ||
26 | #define DRV_NAME "pata_hpt37x" | 26 | #define DRV_NAME "pata_hpt37x" |
27 | #define DRV_VERSION "0.6.12" | 27 | #define DRV_VERSION "0.6.14" |
28 | 28 | ||
29 | struct hpt_clock { | 29 | struct hpt_clock { |
30 | u8 xfer_speed; | 30 | u8 xfer_speed; |
@@ -303,72 +303,79 @@ static unsigned long hpt370a_filter(struct ata_device *adev, unsigned long mask) | |||
303 | } | 303 | } |
304 | 304 | ||
305 | /** | 305 | /** |
306 | * hpt37x_pre_reset - reset the hpt37x bus | 306 | * hpt37x_cable_detect - Detect the cable type |
307 | * @link: ATA link to reset | 307 | * @ap: ATA port to detect on |
308 | * @deadline: deadline jiffies for the operation | ||
309 | * | 308 | * |
310 | * Perform the initial reset handling for the 370/372 and 374 func 0 | 309 | * Return the cable type attached to this port |
311 | */ | 310 | */ |
312 | 311 | ||
313 | static int hpt37x_pre_reset(struct ata_link *link, unsigned long deadline) | 312 | static int hpt37x_cable_detect(struct ata_port *ap) |
314 | { | 313 | { |
315 | u8 scr2, ata66; | ||
316 | struct ata_port *ap = link->ap; | ||
317 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 314 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
318 | static const struct pci_bits hpt37x_enable_bits[] = { | 315 | u8 scr2, ata66; |
319 | { 0x50, 1, 0x04, 0x04 }, | ||
320 | { 0x54, 1, 0x04, 0x04 } | ||
321 | }; | ||
322 | if (!pci_test_config_bits(pdev, &hpt37x_enable_bits[ap->port_no])) | ||
323 | return -ENOENT; | ||
324 | 316 | ||
325 | pci_read_config_byte(pdev, 0x5B, &scr2); | 317 | pci_read_config_byte(pdev, 0x5B, &scr2); |
326 | pci_write_config_byte(pdev, 0x5B, scr2 & ~0x01); | 318 | pci_write_config_byte(pdev, 0x5B, scr2 & ~0x01); |
319 | |||
320 | udelay(10); /* debounce */ | ||
321 | |||
327 | /* Cable register now active */ | 322 | /* Cable register now active */ |
328 | pci_read_config_byte(pdev, 0x5A, &ata66); | 323 | pci_read_config_byte(pdev, 0x5A, &ata66); |
329 | /* Restore state */ | 324 | /* Restore state */ |
330 | pci_write_config_byte(pdev, 0x5B, scr2); | 325 | pci_write_config_byte(pdev, 0x5B, scr2); |
331 | 326 | ||
332 | if (ata66 & (2 >> ap->port_no)) | 327 | if (ata66 & (2 >> ap->port_no)) |
333 | ap->cbl = ATA_CBL_PATA40; | 328 | return ATA_CBL_PATA40; |
334 | else | 329 | else |
335 | ap->cbl = ATA_CBL_PATA80; | 330 | return ATA_CBL_PATA80; |
336 | |||
337 | /* Reset the state machine */ | ||
338 | pci_write_config_byte(pdev, 0x50 + 4 * ap->port_no, 0x37); | ||
339 | udelay(100); | ||
340 | |||
341 | return ata_sff_prereset(link, deadline); | ||
342 | } | 331 | } |
343 | 332 | ||
344 | static int hpt374_fn1_pre_reset(struct ata_link *link, unsigned long deadline) | 333 | /** |
334 | * hpt374_fn1_cable_detect - Detect the cable type | ||
335 | * @ap: ATA port to detect on | ||
336 | * | ||
337 | * Return the cable type attached to this port | ||
338 | */ | ||
339 | |||
340 | static int hpt374_fn1_cable_detect(struct ata_port *ap) | ||
345 | { | 341 | { |
346 | static const struct pci_bits hpt37x_enable_bits[] = { | ||
347 | { 0x50, 1, 0x04, 0x04 }, | ||
348 | { 0x54, 1, 0x04, 0x04 } | ||
349 | }; | ||
350 | u16 mcr3; | ||
351 | u8 ata66; | ||
352 | struct ata_port *ap = link->ap; | ||
353 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 342 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
354 | unsigned int mcrbase = 0x50 + 4 * ap->port_no; | 343 | unsigned int mcrbase = 0x50 + 4 * ap->port_no; |
355 | 344 | u16 mcr3; | |
356 | if (!pci_test_config_bits(pdev, &hpt37x_enable_bits[ap->port_no])) | 345 | u8 ata66; |
357 | return -ENOENT; | ||
358 | 346 | ||
359 | /* Do the extra channel work */ | 347 | /* Do the extra channel work */ |
360 | pci_read_config_word(pdev, mcrbase + 2, &mcr3); | 348 | pci_read_config_word(pdev, mcrbase + 2, &mcr3); |
361 | /* Set bit 15 of 0x52 to enable TCBLID as input | 349 | /* Set bit 15 of 0x52 to enable TCBLID as input */ |
362 | */ | ||
363 | pci_write_config_word(pdev, mcrbase + 2, mcr3 | 0x8000); | 350 | pci_write_config_word(pdev, mcrbase + 2, mcr3 | 0x8000); |
364 | pci_read_config_byte(pdev, 0x5A, &ata66); | 351 | pci_read_config_byte(pdev, 0x5A, &ata66); |
365 | /* Reset TCBLID/FCBLID to output */ | 352 | /* Reset TCBLID/FCBLID to output */ |
366 | pci_write_config_word(pdev, mcrbase + 2, mcr3); | 353 | pci_write_config_word(pdev, mcrbase + 2, mcr3); |
367 | 354 | ||
368 | if (ata66 & (2 >> ap->port_no)) | 355 | if (ata66 & (2 >> ap->port_no)) |
369 | ap->cbl = ATA_CBL_PATA40; | 356 | return ATA_CBL_PATA40; |
370 | else | 357 | else |
371 | ap->cbl = ATA_CBL_PATA80; | 358 | return ATA_CBL_PATA80; |
359 | } | ||
360 | |||
361 | /** | ||
362 | * hpt37x_pre_reset - reset the hpt37x bus | ||
363 | * @link: ATA link to reset | ||
364 | * @deadline: deadline jiffies for the operation | ||
365 | * | ||
366 | * Perform the initial reset handling for the HPT37x. | ||
367 | */ | ||
368 | |||
369 | static int hpt37x_pre_reset(struct ata_link *link, unsigned long deadline) | ||
370 | { | ||
371 | struct ata_port *ap = link->ap; | ||
372 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | ||
373 | static const struct pci_bits hpt37x_enable_bits[] = { | ||
374 | { 0x50, 1, 0x04, 0x04 }, | ||
375 | { 0x54, 1, 0x04, 0x04 } | ||
376 | }; | ||
377 | if (!pci_test_config_bits(pdev, &hpt37x_enable_bits[ap->port_no])) | ||
378 | return -ENOENT; | ||
372 | 379 | ||
373 | /* Reset the state machine */ | 380 | /* Reset the state machine */ |
374 | pci_write_config_byte(pdev, 0x50 + 4 * ap->port_no, 0x37); | 381 | pci_write_config_byte(pdev, 0x50 + 4 * ap->port_no, 0x37); |
@@ -404,9 +411,8 @@ static void hpt370_set_piomode(struct ata_port *ap, struct ata_device *adev) | |||
404 | 411 | ||
405 | pci_read_config_dword(pdev, addr1, ®); | 412 | pci_read_config_dword(pdev, addr1, ®); |
406 | mode = hpt37x_find_mode(ap, adev->pio_mode); | 413 | mode = hpt37x_find_mode(ap, adev->pio_mode); |
407 | mode &= ~0x8000000; /* No FIFO in PIO */ | 414 | mode &= 0xCFC3FFFF; /* Leave DMA bits alone */ |
408 | mode &= ~0x30070000; /* Leave config bits alone */ | 415 | reg &= ~0xCFC3FFFF; /* Strip timing bits */ |
409 | reg &= 0x30070000; /* Strip timing bits */ | ||
410 | pci_write_config_dword(pdev, addr1, reg | mode); | 416 | pci_write_config_dword(pdev, addr1, reg | mode); |
411 | } | 417 | } |
412 | 418 | ||
@@ -423,8 +429,7 @@ static void hpt370_set_dmamode(struct ata_port *ap, struct ata_device *adev) | |||
423 | { | 429 | { |
424 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 430 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
425 | u32 addr1, addr2; | 431 | u32 addr1, addr2; |
426 | u32 reg; | 432 | u32 reg, mode, mask; |
427 | u32 mode; | ||
428 | u8 fast; | 433 | u8 fast; |
429 | 434 | ||
430 | addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no); | 435 | addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no); |
@@ -436,11 +441,12 @@ static void hpt370_set_dmamode(struct ata_port *ap, struct ata_device *adev) | |||
436 | fast |= 0x01; | 441 | fast |= 0x01; |
437 | pci_write_config_byte(pdev, addr2, fast); | 442 | pci_write_config_byte(pdev, addr2, fast); |
438 | 443 | ||
444 | mask = adev->dma_mode < XFER_UDMA_0 ? 0x31C001FF : 0x303C0000; | ||
445 | |||
439 | pci_read_config_dword(pdev, addr1, ®); | 446 | pci_read_config_dword(pdev, addr1, ®); |
440 | mode = hpt37x_find_mode(ap, adev->dma_mode); | 447 | mode = hpt37x_find_mode(ap, adev->dma_mode); |
441 | mode |= 0x8000000; /* FIFO in MWDMA or UDMA */ | 448 | mode &= mask; |
442 | mode &= ~0xC0000000; /* Leave config bits alone */ | 449 | reg &= ~mask; |
443 | reg &= 0xC0000000; /* Strip timing bits */ | ||
444 | pci_write_config_dword(pdev, addr1, reg | mode); | 450 | pci_write_config_dword(pdev, addr1, reg | mode); |
445 | } | 451 | } |
446 | 452 | ||
@@ -508,9 +514,8 @@ static void hpt372_set_piomode(struct ata_port *ap, struct ata_device *adev) | |||
508 | mode = hpt37x_find_mode(ap, adev->pio_mode); | 514 | mode = hpt37x_find_mode(ap, adev->pio_mode); |
509 | 515 | ||
510 | printk("Find mode for %d reports %X\n", adev->pio_mode, mode); | 516 | printk("Find mode for %d reports %X\n", adev->pio_mode, mode); |
511 | mode &= ~0x80000000; /* No FIFO in PIO */ | 517 | mode &= 0xCFC3FFFF; /* Leave DMA bits alone */ |
512 | mode &= ~0x30070000; /* Leave config bits alone */ | 518 | reg &= ~0xCFC3FFFF; /* Strip timing bits */ |
513 | reg &= 0x30070000; /* Strip timing bits */ | ||
514 | pci_write_config_dword(pdev, addr1, reg | mode); | 519 | pci_write_config_dword(pdev, addr1, reg | mode); |
515 | } | 520 | } |
516 | 521 | ||
@@ -527,8 +532,7 @@ static void hpt372_set_dmamode(struct ata_port *ap, struct ata_device *adev) | |||
527 | { | 532 | { |
528 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 533 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
529 | u32 addr1, addr2; | 534 | u32 addr1, addr2; |
530 | u32 reg; | 535 | u32 reg, mode, mask; |
531 | u32 mode; | ||
532 | u8 fast; | 536 | u8 fast; |
533 | 537 | ||
534 | addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no); | 538 | addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no); |
@@ -539,12 +543,13 @@ static void hpt372_set_dmamode(struct ata_port *ap, struct ata_device *adev) | |||
539 | fast &= ~0x07; | 543 | fast &= ~0x07; |
540 | pci_write_config_byte(pdev, addr2, fast); | 544 | pci_write_config_byte(pdev, addr2, fast); |
541 | 545 | ||
546 | mask = adev->dma_mode < XFER_UDMA_0 ? 0x31C001FF : 0x303C0000; | ||
547 | |||
542 | pci_read_config_dword(pdev, addr1, ®); | 548 | pci_read_config_dword(pdev, addr1, ®); |
543 | mode = hpt37x_find_mode(ap, adev->dma_mode); | 549 | mode = hpt37x_find_mode(ap, adev->dma_mode); |
544 | printk("Find mode for DMA %d reports %X\n", adev->dma_mode, mode); | 550 | printk("Find mode for DMA %d reports %X\n", adev->dma_mode, mode); |
545 | mode &= ~0xC0000000; /* Leave config bits alone */ | 551 | mode &= mask; |
546 | mode |= 0x80000000; /* FIFO in MWDMA or UDMA */ | 552 | reg &= ~mask; |
547 | reg &= 0xC0000000; /* Strip timing bits */ | ||
548 | pci_write_config_dword(pdev, addr1, reg | mode); | 553 | pci_write_config_dword(pdev, addr1, reg | mode); |
549 | } | 554 | } |
550 | 555 | ||
@@ -584,6 +589,7 @@ static struct ata_port_operations hpt370_port_ops = { | |||
584 | .bmdma_stop = hpt370_bmdma_stop, | 589 | .bmdma_stop = hpt370_bmdma_stop, |
585 | 590 | ||
586 | .mode_filter = hpt370_filter, | 591 | .mode_filter = hpt370_filter, |
592 | .cable_detect = hpt37x_cable_detect, | ||
587 | .set_piomode = hpt370_set_piomode, | 593 | .set_piomode = hpt370_set_piomode, |
588 | .set_dmamode = hpt370_set_dmamode, | 594 | .set_dmamode = hpt370_set_dmamode, |
589 | .prereset = hpt37x_pre_reset, | 595 | .prereset = hpt37x_pre_reset, |
@@ -608,6 +614,7 @@ static struct ata_port_operations hpt372_port_ops = { | |||
608 | 614 | ||
609 | .bmdma_stop = hpt37x_bmdma_stop, | 615 | .bmdma_stop = hpt37x_bmdma_stop, |
610 | 616 | ||
617 | .cable_detect = hpt37x_cable_detect, | ||
611 | .set_piomode = hpt372_set_piomode, | 618 | .set_piomode = hpt372_set_piomode, |
612 | .set_dmamode = hpt372_set_dmamode, | 619 | .set_dmamode = hpt372_set_dmamode, |
613 | .prereset = hpt37x_pre_reset, | 620 | .prereset = hpt37x_pre_reset, |
@@ -620,7 +627,8 @@ static struct ata_port_operations hpt372_port_ops = { | |||
620 | 627 | ||
621 | static struct ata_port_operations hpt374_fn1_port_ops = { | 628 | static struct ata_port_operations hpt374_fn1_port_ops = { |
622 | .inherits = &hpt372_port_ops, | 629 | .inherits = &hpt372_port_ops, |
623 | .prereset = hpt374_fn1_pre_reset, | 630 | .cable_detect = hpt374_fn1_cable_detect, |
631 | .prereset = hpt37x_pre_reset, | ||
624 | }; | 632 | }; |
625 | 633 | ||
626 | /** | 634 | /** |
@@ -791,9 +799,8 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id) | |||
791 | static const int MHz[4] = { 33, 40, 50, 66 }; | 799 | static const int MHz[4] = { 33, 40, 50, 66 }; |
792 | void *private_data = NULL; | 800 | void *private_data = NULL; |
793 | const struct ata_port_info *ppi[] = { NULL, NULL }; | 801 | const struct ata_port_info *ppi[] = { NULL, NULL }; |
794 | 802 | u8 rev = dev->revision; | |
795 | u8 irqmask; | 803 | u8 irqmask; |
796 | u32 class_rev; | ||
797 | u8 mcr1; | 804 | u8 mcr1; |
798 | u32 freq; | 805 | u32 freq; |
799 | int prefer_dpll = 1; | 806 | int prefer_dpll = 1; |
@@ -808,19 +815,16 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id) | |||
808 | if (rc) | 815 | if (rc) |
809 | return rc; | 816 | return rc; |
810 | 817 | ||
811 | pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev); | ||
812 | class_rev &= 0xFF; | ||
813 | |||
814 | if (dev->device == PCI_DEVICE_ID_TTI_HPT366) { | 818 | if (dev->device == PCI_DEVICE_ID_TTI_HPT366) { |
815 | /* May be a later chip in disguise. Check */ | 819 | /* May be a later chip in disguise. Check */ |
816 | /* Older chips are in the HPT366 driver. Ignore them */ | 820 | /* Older chips are in the HPT366 driver. Ignore them */ |
817 | if (class_rev < 3) | 821 | if (rev < 3) |
818 | return -ENODEV; | 822 | return -ENODEV; |
819 | /* N series chips have their own driver. Ignore */ | 823 | /* N series chips have their own driver. Ignore */ |
820 | if (class_rev == 6) | 824 | if (rev == 6) |
821 | return -ENODEV; | 825 | return -ENODEV; |
822 | 826 | ||
823 | switch(class_rev) { | 827 | switch(rev) { |
824 | case 3: | 828 | case 3: |
825 | ppi[0] = &info_hpt370; | 829 | ppi[0] = &info_hpt370; |
826 | chip_table = &hpt370; | 830 | chip_table = &hpt370; |
@@ -836,28 +840,29 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id) | |||
836 | chip_table = &hpt372; | 840 | chip_table = &hpt372; |
837 | break; | 841 | break; |
838 | default: | 842 | default: |
839 | printk(KERN_ERR "pata_hpt37x: Unknown HPT366 subtype please report (%d).\n", class_rev); | 843 | printk(KERN_ERR "pata_hpt37x: Unknown HPT366 " |
844 | "subtype, please report (%d).\n", rev); | ||
840 | return -ENODEV; | 845 | return -ENODEV; |
841 | } | 846 | } |
842 | } else { | 847 | } else { |
843 | switch(dev->device) { | 848 | switch(dev->device) { |
844 | case PCI_DEVICE_ID_TTI_HPT372: | 849 | case PCI_DEVICE_ID_TTI_HPT372: |
845 | /* 372N if rev >= 2*/ | 850 | /* 372N if rev >= 2*/ |
846 | if (class_rev >= 2) | 851 | if (rev >= 2) |
847 | return -ENODEV; | 852 | return -ENODEV; |
848 | ppi[0] = &info_hpt372; | 853 | ppi[0] = &info_hpt372; |
849 | chip_table = &hpt372a; | 854 | chip_table = &hpt372a; |
850 | break; | 855 | break; |
851 | case PCI_DEVICE_ID_TTI_HPT302: | 856 | case PCI_DEVICE_ID_TTI_HPT302: |
852 | /* 302N if rev > 1 */ | 857 | /* 302N if rev > 1 */ |
853 | if (class_rev > 1) | 858 | if (rev > 1) |
854 | return -ENODEV; | 859 | return -ENODEV; |
855 | ppi[0] = &info_hpt372; | 860 | ppi[0] = &info_hpt372; |
856 | /* Check this */ | 861 | /* Check this */ |
857 | chip_table = &hpt302; | 862 | chip_table = &hpt302; |
858 | break; | 863 | break; |
859 | case PCI_DEVICE_ID_TTI_HPT371: | 864 | case PCI_DEVICE_ID_TTI_HPT371: |
860 | if (class_rev > 1) | 865 | if (rev > 1) |
861 | return -ENODEV; | 866 | return -ENODEV; |
862 | ppi[0] = &info_hpt372; | 867 | ppi[0] = &info_hpt372; |
863 | chip_table = &hpt371; | 868 | chip_table = &hpt371; |
diff --git a/drivers/ata/pata_hpt3x2n.c b/drivers/ata/pata_hpt3x2n.c index 3d59fe0a408d..9a09a1b11ca5 100644 --- a/drivers/ata/pata_hpt3x2n.c +++ b/drivers/ata/pata_hpt3x2n.c | |||
@@ -25,7 +25,7 @@ | |||
25 | #include <linux/libata.h> | 25 | #include <linux/libata.h> |
26 | 26 | ||
27 | #define DRV_NAME "pata_hpt3x2n" | 27 | #define DRV_NAME "pata_hpt3x2n" |
28 | #define DRV_VERSION "0.3.4" | 28 | #define DRV_VERSION "0.3.7" |
29 | 29 | ||
30 | enum { | 30 | enum { |
31 | HPT_PCI_FAST = (1 << 31), | 31 | HPT_PCI_FAST = (1 << 31), |
@@ -80,14 +80,13 @@ static struct hpt_clock hpt3x2n_clocks[] = { | |||
80 | 80 | ||
81 | { XFER_MW_DMA_2, 0x2c829c62 }, | 81 | { XFER_MW_DMA_2, 0x2c829c62 }, |
82 | { XFER_MW_DMA_1, 0x2c829c66 }, | 82 | { XFER_MW_DMA_1, 0x2c829c66 }, |
83 | { XFER_MW_DMA_0, 0x2c829d2c }, | 83 | { XFER_MW_DMA_0, 0x2c829d2e }, |
84 | 84 | ||
85 | { XFER_PIO_4, 0x0c829c62 }, | 85 | { XFER_PIO_4, 0x0c829c62 }, |
86 | { XFER_PIO_3, 0x0c829c84 }, | 86 | { XFER_PIO_3, 0x0c829c84 }, |
87 | { XFER_PIO_2, 0x0c829ca6 }, | 87 | { XFER_PIO_2, 0x0c829ca6 }, |
88 | { XFER_PIO_1, 0x0d029d26 }, | 88 | { XFER_PIO_1, 0x0d029d26 }, |
89 | { XFER_PIO_0, 0x0d029d5e }, | 89 | { XFER_PIO_0, 0x0d029d5e }, |
90 | { 0, 0x0d029d5e } | ||
91 | }; | 90 | }; |
92 | 91 | ||
93 | /** | 92 | /** |
@@ -128,12 +127,15 @@ static int hpt3x2n_cable_detect(struct ata_port *ap) | |||
128 | 127 | ||
129 | pci_read_config_byte(pdev, 0x5B, &scr2); | 128 | pci_read_config_byte(pdev, 0x5B, &scr2); |
130 | pci_write_config_byte(pdev, 0x5B, scr2 & ~0x01); | 129 | pci_write_config_byte(pdev, 0x5B, scr2 & ~0x01); |
130 | |||
131 | udelay(10); /* debounce */ | ||
132 | |||
131 | /* Cable register now active */ | 133 | /* Cable register now active */ |
132 | pci_read_config_byte(pdev, 0x5A, &ata66); | 134 | pci_read_config_byte(pdev, 0x5A, &ata66); |
133 | /* Restore state */ | 135 | /* Restore state */ |
134 | pci_write_config_byte(pdev, 0x5B, scr2); | 136 | pci_write_config_byte(pdev, 0x5B, scr2); |
135 | 137 | ||
136 | if (ata66 & (1 << ap->port_no)) | 138 | if (ata66 & (2 >> ap->port_no)) |
137 | return ATA_CBL_PATA40; | 139 | return ATA_CBL_PATA40; |
138 | else | 140 | else |
139 | return ATA_CBL_PATA80; | 141 | return ATA_CBL_PATA80; |
@@ -185,9 +187,8 @@ static void hpt3x2n_set_piomode(struct ata_port *ap, struct ata_device *adev) | |||
185 | 187 | ||
186 | pci_read_config_dword(pdev, addr1, ®); | 188 | pci_read_config_dword(pdev, addr1, ®); |
187 | mode = hpt3x2n_find_mode(ap, adev->pio_mode); | 189 | mode = hpt3x2n_find_mode(ap, adev->pio_mode); |
188 | mode &= ~0x8000000; /* No FIFO in PIO */ | 190 | mode &= 0xCFC3FFFF; /* Leave DMA bits alone */ |
189 | mode &= ~0x30070000; /* Leave config bits alone */ | 191 | reg &= ~0xCFC3FFFF; /* Strip timing bits */ |
190 | reg &= 0x30070000; /* Strip timing bits */ | ||
191 | pci_write_config_dword(pdev, addr1, reg | mode); | 192 | pci_write_config_dword(pdev, addr1, reg | mode); |
192 | } | 193 | } |
193 | 194 | ||
@@ -204,8 +205,7 @@ static void hpt3x2n_set_dmamode(struct ata_port *ap, struct ata_device *adev) | |||
204 | { | 205 | { |
205 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 206 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
206 | u32 addr1, addr2; | 207 | u32 addr1, addr2; |
207 | u32 reg; | 208 | u32 reg, mode, mask; |
208 | u32 mode; | ||
209 | u8 fast; | 209 | u8 fast; |
210 | 210 | ||
211 | addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no); | 211 | addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no); |
@@ -216,11 +216,12 @@ static void hpt3x2n_set_dmamode(struct ata_port *ap, struct ata_device *adev) | |||
216 | fast &= ~0x07; | 216 | fast &= ~0x07; |
217 | pci_write_config_byte(pdev, addr2, fast); | 217 | pci_write_config_byte(pdev, addr2, fast); |
218 | 218 | ||
219 | mask = adev->dma_mode < XFER_UDMA_0 ? 0x31C001FF : 0x303C0000; | ||
220 | |||
219 | pci_read_config_dword(pdev, addr1, ®); | 221 | pci_read_config_dword(pdev, addr1, ®); |
220 | mode = hpt3x2n_find_mode(ap, adev->dma_mode); | 222 | mode = hpt3x2n_find_mode(ap, adev->dma_mode); |
221 | mode |= 0x8000000; /* FIFO in MWDMA or UDMA */ | 223 | mode &= mask; |
222 | mode &= ~0xC0000000; /* Leave config bits alone */ | 224 | reg &= ~mask; |
223 | reg &= 0xC0000000; /* Strip timing bits */ | ||
224 | pci_write_config_dword(pdev, addr1, reg | mode); | 225 | pci_write_config_dword(pdev, addr1, reg | mode); |
225 | } | 226 | } |
226 | 227 | ||
@@ -447,10 +448,8 @@ static int hpt3x2n_init_one(struct pci_dev *dev, const struct pci_device_id *id) | |||
447 | .port_ops = &hpt3x2n_port_ops | 448 | .port_ops = &hpt3x2n_port_ops |
448 | }; | 449 | }; |
449 | const struct ata_port_info *ppi[] = { &info, NULL }; | 450 | const struct ata_port_info *ppi[] = { &info, NULL }; |
450 | 451 | u8 rev = dev->revision; | |
451 | u8 irqmask; | 452 | u8 irqmask; |
452 | u32 class_rev; | ||
453 | |||
454 | unsigned int pci_mhz; | 453 | unsigned int pci_mhz; |
455 | unsigned int f_low, f_high; | 454 | unsigned int f_low, f_high; |
456 | int adjust; | 455 | int adjust; |
@@ -462,26 +461,23 @@ static int hpt3x2n_init_one(struct pci_dev *dev, const struct pci_device_id *id) | |||
462 | if (rc) | 461 | if (rc) |
463 | return rc; | 462 | return rc; |
464 | 463 | ||
465 | pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev); | ||
466 | class_rev &= 0xFF; | ||
467 | |||
468 | switch(dev->device) { | 464 | switch(dev->device) { |
469 | case PCI_DEVICE_ID_TTI_HPT366: | 465 | case PCI_DEVICE_ID_TTI_HPT366: |
470 | if (class_rev < 6) | 466 | if (rev < 6) |
471 | return -ENODEV; | 467 | return -ENODEV; |
472 | break; | 468 | break; |
473 | case PCI_DEVICE_ID_TTI_HPT371: | 469 | case PCI_DEVICE_ID_TTI_HPT371: |
474 | if (class_rev < 2) | 470 | if (rev < 2) |
475 | return -ENODEV; | 471 | return -ENODEV; |
476 | /* 371N if rev > 1 */ | 472 | /* 371N if rev > 1 */ |
477 | break; | 473 | break; |
478 | case PCI_DEVICE_ID_TTI_HPT372: | 474 | case PCI_DEVICE_ID_TTI_HPT372: |
479 | /* 372N if rev >= 2*/ | 475 | /* 372N if rev >= 2*/ |
480 | if (class_rev < 2) | 476 | if (rev < 2) |
481 | return -ENODEV; | 477 | return -ENODEV; |
482 | break; | 478 | break; |
483 | case PCI_DEVICE_ID_TTI_HPT302: | 479 | case PCI_DEVICE_ID_TTI_HPT302: |
484 | if (class_rev < 2) | 480 | if (rev < 2) |
485 | return -ENODEV; | 481 | return -ENODEV; |
486 | break; | 482 | break; |
487 | case PCI_DEVICE_ID_TTI_HPT372N: | 483 | case PCI_DEVICE_ID_TTI_HPT372N: |
diff --git a/drivers/ata/pata_hpt3x3.c b/drivers/ata/pata_hpt3x3.c index 7e310253b36b..c86c71639a95 100644 --- a/drivers/ata/pata_hpt3x3.c +++ b/drivers/ata/pata_hpt3x3.c | |||
@@ -255,8 +255,17 @@ static int hpt3x3_init_one(struct pci_dev *pdev, const struct pci_device_id *id) | |||
255 | #ifdef CONFIG_PM | 255 | #ifdef CONFIG_PM |
256 | static int hpt3x3_reinit_one(struct pci_dev *dev) | 256 | static int hpt3x3_reinit_one(struct pci_dev *dev) |
257 | { | 257 | { |
258 | struct ata_host *host = dev_get_drvdata(&dev->dev); | ||
259 | int rc; | ||
260 | |||
261 | rc = ata_pci_device_do_resume(dev); | ||
262 | if (rc) | ||
263 | return rc; | ||
264 | |||
258 | hpt3x3_init_chipset(dev); | 265 | hpt3x3_init_chipset(dev); |
259 | return ata_pci_device_resume(dev); | 266 | |
267 | ata_host_resume(host); | ||
268 | return 0; | ||
260 | } | 269 | } |
261 | #endif | 270 | #endif |
262 | 271 | ||
diff --git a/drivers/ata/pata_it8213.c b/drivers/ata/pata_it8213.c index f156da8076f7..8f3325adceb3 100644 --- a/drivers/ata/pata_it8213.c +++ b/drivers/ata/pata_it8213.c | |||
@@ -22,7 +22,7 @@ | |||
22 | #define DRV_VERSION "0.0.3" | 22 | #define DRV_VERSION "0.0.3" |
23 | 23 | ||
24 | /** | 24 | /** |
25 | * it8213_pre_reset - check for 40/80 pin | 25 | * it8213_pre_reset - probe begin |
26 | * @link: link | 26 | * @link: link |
27 | * @deadline: deadline jiffies for the operation | 27 | * @deadline: deadline jiffies for the operation |
28 | * | 28 | * |
@@ -92,18 +92,17 @@ static void it8213_set_piomode (struct ata_port *ap, struct ata_device *adev) | |||
92 | { 2, 1 }, | 92 | { 2, 1 }, |
93 | { 2, 3 }, }; | 93 | { 2, 3 }, }; |
94 | 94 | ||
95 | if (pio > 2) | 95 | if (pio > 1) |
96 | control |= 1; /* TIME1 enable */ | 96 | control |= 1; /* TIME */ |
97 | if (ata_pio_need_iordy(adev)) /* PIO 3/4 require IORDY */ | 97 | if (ata_pio_need_iordy(adev)) /* PIO 3/4 require IORDY */ |
98 | control |= 2; /* IORDY enable */ | 98 | control |= 2; /* IE */ |
99 | /* Bit 2 is set for ATAPI on the IT8213 - reverse of ICH/PIIX */ | 99 | /* Bit 2 is set for ATAPI on the IT8213 - reverse of ICH/PIIX */ |
100 | if (adev->class != ATA_DEV_ATA) | 100 | if (adev->class != ATA_DEV_ATA) |
101 | control |= 4; | 101 | control |= 4; /* PPE */ |
102 | 102 | ||
103 | pci_read_config_word(dev, idetm_port, &idetm_data); | 103 | pci_read_config_word(dev, idetm_port, &idetm_data); |
104 | 104 | ||
105 | /* Enable PPE, IE and TIME as appropriate */ | 105 | /* Set PPE, IE, and TIME as appropriate */ |
106 | |||
107 | if (adev->devno == 0) { | 106 | if (adev->devno == 0) { |
108 | idetm_data &= 0xCCF0; | 107 | idetm_data &= 0xCCF0; |
109 | idetm_data |= control; | 108 | idetm_data |= control; |
@@ -112,17 +111,17 @@ static void it8213_set_piomode (struct ata_port *ap, struct ata_device *adev) | |||
112 | } else { | 111 | } else { |
113 | u8 slave_data; | 112 | u8 slave_data; |
114 | 113 | ||
115 | idetm_data &= 0xCC0F; | 114 | idetm_data &= 0xFF0F; |
116 | idetm_data |= (control << 4); | 115 | idetm_data |= (control << 4); |
117 | 116 | ||
118 | /* Slave timing in separate register */ | 117 | /* Slave timing in separate register */ |
119 | pci_read_config_byte(dev, 0x44, &slave_data); | 118 | pci_read_config_byte(dev, 0x44, &slave_data); |
120 | slave_data &= 0xF0; | 119 | slave_data &= 0xF0; |
121 | slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << 4; | 120 | slave_data |= (timings[pio][0] << 2) | timings[pio][1]; |
122 | pci_write_config_byte(dev, 0x44, slave_data); | 121 | pci_write_config_byte(dev, 0x44, slave_data); |
123 | } | 122 | } |
124 | 123 | ||
125 | idetm_data |= 0x4000; /* Ensure SITRE is enabled */ | 124 | idetm_data |= 0x4000; /* Ensure SITRE is set */ |
126 | pci_write_config_word(dev, idetm_port, idetm_data); | 125 | pci_write_config_word(dev, idetm_port, idetm_data); |
127 | } | 126 | } |
128 | 127 | ||
@@ -173,10 +172,10 @@ static void it8213_set_dmamode (struct ata_port *ap, struct ata_device *adev) | |||
173 | 172 | ||
174 | udma_enable |= (1 << devid); | 173 | udma_enable |= (1 << devid); |
175 | 174 | ||
176 | /* Load the UDMA mode number */ | 175 | /* Load the UDMA cycle time */ |
177 | pci_read_config_word(dev, 0x4A, &udma_timing); | 176 | pci_read_config_word(dev, 0x4A, &udma_timing); |
178 | udma_timing &= ~(3 << (4 * devid)); | 177 | udma_timing &= ~(3 << (4 * devid)); |
179 | udma_timing |= (udma & 3) << (4 * devid); | 178 | udma_timing |= u_speed << (4 * devid); |
180 | pci_write_config_word(dev, 0x4A, udma_timing); | 179 | pci_write_config_word(dev, 0x4A, udma_timing); |
181 | 180 | ||
182 | /* Load the clock selection */ | 181 | /* Load the clock selection */ |
@@ -211,7 +210,7 @@ static void it8213_set_dmamode (struct ata_port *ap, struct ata_device *adev) | |||
211 | master_data &= 0xFF4F; /* Mask out IORDY|TIME1|DMAONLY */ | 210 | master_data &= 0xFF4F; /* Mask out IORDY|TIME1|DMAONLY */ |
212 | master_data |= control << 4; | 211 | master_data |= control << 4; |
213 | pci_read_config_byte(dev, 0x44, &slave_data); | 212 | pci_read_config_byte(dev, 0x44, &slave_data); |
214 | slave_data &= (0x0F + 0xE1 * ap->port_no); | 213 | slave_data &= 0xF0; |
215 | /* Load the matching timing */ | 214 | /* Load the matching timing */ |
216 | slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << (ap->port_no ? 4 : 0); | 215 | slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << (ap->port_no ? 4 : 0); |
217 | pci_write_config_byte(dev, 0x44, slave_data); | 216 | pci_write_config_byte(dev, 0x44, slave_data); |
@@ -263,7 +262,7 @@ static int it8213_init_one (struct pci_dev *pdev, const struct pci_device_id *en | |||
263 | static const struct ata_port_info info = { | 262 | static const struct ata_port_info info = { |
264 | .flags = ATA_FLAG_SLAVE_POSS, | 263 | .flags = ATA_FLAG_SLAVE_POSS, |
265 | .pio_mask = ATA_PIO4, | 264 | .pio_mask = ATA_PIO4, |
266 | .mwdma_mask = ATA_MWDMA2, | 265 | .mwdma_mask = ATA_MWDMA12_ONLY, |
267 | .udma_mask = ATA_UDMA4, /* FIXME: want UDMA 100? */ | 266 | .udma_mask = ATA_UDMA4, /* FIXME: want UDMA 100? */ |
268 | .port_ops = &it8213_ops, | 267 | .port_ops = &it8213_ops, |
269 | }; | 268 | }; |
diff --git a/drivers/ata/pata_it821x.c b/drivers/ata/pata_it821x.c index 188bc2fcd22c..edc5c1fed150 100644 --- a/drivers/ata/pata_it821x.c +++ b/drivers/ata/pata_it821x.c | |||
@@ -955,7 +955,7 @@ static int it821x_reinit_one(struct pci_dev *pdev) | |||
955 | static const struct pci_device_id it821x[] = { | 955 | static const struct pci_device_id it821x[] = { |
956 | { PCI_VDEVICE(ITE, PCI_DEVICE_ID_ITE_8211), }, | 956 | { PCI_VDEVICE(ITE, PCI_DEVICE_ID_ITE_8211), }, |
957 | { PCI_VDEVICE(ITE, PCI_DEVICE_ID_ITE_8212), }, | 957 | { PCI_VDEVICE(ITE, PCI_DEVICE_ID_ITE_8212), }, |
958 | { PCI_VDEVICE(RDC, 0x1010), }, | 958 | { PCI_VDEVICE(RDC, PCI_DEVICE_ID_RDC_D1010), }, |
959 | 959 | ||
960 | { }, | 960 | { }, |
961 | }; | 961 | }; |
diff --git a/drivers/ata/pata_legacy.c b/drivers/ata/pata_legacy.c index 6932e56d179c..9df1ff7e1eaa 100644 --- a/drivers/ata/pata_legacy.c +++ b/drivers/ata/pata_legacy.c | |||
@@ -25,6 +25,13 @@ | |||
25 | * http://www.ryston.cz/petr/vlb/pdc20230b.html | 25 | * http://www.ryston.cz/petr/vlb/pdc20230b.html |
26 | * http://www.ryston.cz/petr/vlb/pdc20230c.html | 26 | * http://www.ryston.cz/petr/vlb/pdc20230c.html |
27 | * http://www.ryston.cz/petr/vlb/pdc20630.html | 27 | * http://www.ryston.cz/petr/vlb/pdc20630.html |
28 | * QDI65x0: | ||
29 | * http://www.ryston.cz/petr/vlb/qd6500.html | ||
30 | * http://www.ryston.cz/petr/vlb/qd6580.html | ||
31 | * | ||
32 | * QDI65x0 probe code based on drivers/ide/legacy/qd65xx.c | ||
33 | * Rewritten from the work of Colten Edwards <pje120@cs.usask.ca> by | ||
34 | * Samuel Thibault <samuel.thibault@ens-lyon.org> | ||
28 | * | 35 | * |
29 | * Unsupported but docs exist: | 36 | * Unsupported but docs exist: |
30 | * Appian/Adaptec AIC25VL01/Cirrus Logic PD7220 | 37 | * Appian/Adaptec AIC25VL01/Cirrus Logic PD7220 |
@@ -35,7 +42,7 @@ | |||
35 | * the MPIIX where the tuning is PCI side but the IDE is "ISA side". | 42 | * the MPIIX where the tuning is PCI side but the IDE is "ISA side". |
36 | * | 43 | * |
37 | * Specific support is included for the ht6560a/ht6560b/opti82c611a/ | 44 | * Specific support is included for the ht6560a/ht6560b/opti82c611a/ |
38 | * opti82c465mv/promise 20230c/20630/winbond83759A | 45 | * opti82c465mv/promise 20230c/20630/qdi65x0/winbond83759A |
39 | * | 46 | * |
40 | * Use the autospeed and pio_mask options with: | 47 | * Use the autospeed and pio_mask options with: |
41 | * Appian ADI/2 aka CLPD7220 or AIC25VL01. | 48 | * Appian ADI/2 aka CLPD7220 or AIC25VL01. |
@@ -672,7 +679,7 @@ static void qdi6580dp_set_piomode(struct ata_port *ap, struct ata_device *adev) | |||
672 | outb(timing, ld_qdi->timing + 2 * ap->port_no); | 679 | outb(timing, ld_qdi->timing + 2 * ap->port_no); |
673 | /* Clear the FIFO */ | 680 | /* Clear the FIFO */ |
674 | if (adev->class != ATA_DEV_ATA) | 681 | if (adev->class != ATA_DEV_ATA) |
675 | outb(0x5F, ld_qdi->timing + 3); | 682 | outb(0x5F, (ld_qdi->timing & 0xFFF0) + 3); |
676 | } | 683 | } |
677 | 684 | ||
678 | /** | 685 | /** |
@@ -707,7 +714,7 @@ static void qdi6580_set_piomode(struct ata_port *ap, struct ata_device *adev) | |||
707 | outb(timing, ld_qdi->timing + 2 * adev->devno); | 714 | outb(timing, ld_qdi->timing + 2 * adev->devno); |
708 | /* Clear the FIFO */ | 715 | /* Clear the FIFO */ |
709 | if (adev->class != ATA_DEV_ATA) | 716 | if (adev->class != ATA_DEV_ATA) |
710 | outb(0x5F, ld_qdi->timing + 3); | 717 | outb(0x5F, (ld_qdi->timing & 0xFFF0) + 3); |
711 | } | 718 | } |
712 | 719 | ||
713 | /** | 720 | /** |
@@ -787,6 +794,7 @@ static struct ata_port_operations qdi6580_port_ops = { | |||
787 | static struct ata_port_operations qdi6580dp_port_ops = { | 794 | static struct ata_port_operations qdi6580dp_port_ops = { |
788 | .inherits = &legacy_base_port_ops, | 795 | .inherits = &legacy_base_port_ops, |
789 | .set_piomode = qdi6580dp_set_piomode, | 796 | .set_piomode = qdi6580dp_set_piomode, |
797 | .qc_issue = qdi_qc_issue, | ||
790 | .sff_data_xfer = vlb32_data_xfer, | 798 | .sff_data_xfer = vlb32_data_xfer, |
791 | }; | 799 | }; |
792 | 800 | ||
diff --git a/drivers/ata/pata_marvell.c b/drivers/ata/pata_marvell.c index 2096fb737f82..950da39cae3d 100644 --- a/drivers/ata/pata_marvell.c +++ b/drivers/ata/pata_marvell.c | |||
@@ -58,7 +58,7 @@ static int marvell_pata_active(struct pci_dev *pdev) | |||
58 | } | 58 | } |
59 | 59 | ||
60 | /** | 60 | /** |
61 | * marvell_pre_reset - check for 40/80 pin | 61 | * marvell_pre_reset - probe begin |
62 | * @link: link | 62 | * @link: link |
63 | * @deadline: deadline jiffies for the operation | 63 | * @deadline: deadline jiffies for the operation |
64 | * | 64 | * |
diff --git a/drivers/ata/pata_ns87415.c b/drivers/ata/pata_ns87415.c index 773b1590b492..061aa1c41a48 100644 --- a/drivers/ata/pata_ns87415.c +++ b/drivers/ata/pata_ns87415.c | |||
@@ -325,6 +325,13 @@ static struct scsi_host_template ns87415_sht = { | |||
325 | ATA_BMDMA_SHT(DRV_NAME), | 325 | ATA_BMDMA_SHT(DRV_NAME), |
326 | }; | 326 | }; |
327 | 327 | ||
328 | static void ns87415_fixup(struct pci_dev *pdev) | ||
329 | { | ||
330 | /* Select 512 byte sectors */ | ||
331 | pci_write_config_byte(pdev, 0x55, 0xEE); | ||
332 | /* Select PIO0 8bit clocking */ | ||
333 | pci_write_config_byte(pdev, 0x54, 0xB7); | ||
334 | } | ||
328 | 335 | ||
329 | /** | 336 | /** |
330 | * ns87415_init_one - Register 87415 ATA PCI device with kernel services | 337 | * ns87415_init_one - Register 87415 ATA PCI device with kernel services |
@@ -371,10 +378,8 @@ static int ns87415_init_one (struct pci_dev *pdev, const struct pci_device_id *e | |||
371 | if (rc) | 378 | if (rc) |
372 | return rc; | 379 | return rc; |
373 | 380 | ||
374 | /* Select 512 byte sectors */ | 381 | ns87415_fixup(pdev); |
375 | pci_write_config_byte(pdev, 0x55, 0xEE); | 382 | |
376 | /* Select PIO0 8bit clocking */ | ||
377 | pci_write_config_byte(pdev, 0x54, 0xB7); | ||
378 | return ata_pci_sff_init_one(pdev, ppi, &ns87415_sht, NULL); | 383 | return ata_pci_sff_init_one(pdev, ppi, &ns87415_sht, NULL); |
379 | } | 384 | } |
380 | 385 | ||
@@ -384,6 +389,23 @@ static const struct pci_device_id ns87415_pci_tbl[] = { | |||
384 | { } /* terminate list */ | 389 | { } /* terminate list */ |
385 | }; | 390 | }; |
386 | 391 | ||
392 | #ifdef CONFIG_PM | ||
393 | static int ns87415_reinit_one(struct pci_dev *pdev) | ||
394 | { | ||
395 | struct ata_host *host = dev_get_drvdata(&pdev->dev); | ||
396 | int rc; | ||
397 | |||
398 | rc = ata_pci_device_do_resume(pdev); | ||
399 | if (rc) | ||
400 | return rc; | ||
401 | |||
402 | ns87415_fixup(pdev); | ||
403 | |||
404 | ata_host_resume(host); | ||
405 | return 0; | ||
406 | } | ||
407 | #endif | ||
408 | |||
387 | static struct pci_driver ns87415_pci_driver = { | 409 | static struct pci_driver ns87415_pci_driver = { |
388 | .name = DRV_NAME, | 410 | .name = DRV_NAME, |
389 | .id_table = ns87415_pci_tbl, | 411 | .id_table = ns87415_pci_tbl, |
@@ -391,7 +413,7 @@ static struct pci_driver ns87415_pci_driver = { | |||
391 | .remove = ata_pci_remove_one, | 413 | .remove = ata_pci_remove_one, |
392 | #ifdef CONFIG_PM | 414 | #ifdef CONFIG_PM |
393 | .suspend = ata_pci_device_suspend, | 415 | .suspend = ata_pci_device_suspend, |
394 | .resume = ata_pci_device_resume, | 416 | .resume = ns87415_reinit_one, |
395 | #endif | 417 | #endif |
396 | }; | 418 | }; |
397 | 419 | ||
diff --git a/drivers/ata/pata_oldpiix.c b/drivers/ata/pata_oldpiix.c index 84ac5033ac89..9a8687db6b2d 100644 --- a/drivers/ata/pata_oldpiix.c +++ b/drivers/ata/pata_oldpiix.c | |||
@@ -239,7 +239,7 @@ static int oldpiix_init_one (struct pci_dev *pdev, const struct pci_device_id *e | |||
239 | static const struct ata_port_info info = { | 239 | static const struct ata_port_info info = { |
240 | .flags = ATA_FLAG_SLAVE_POSS, | 240 | .flags = ATA_FLAG_SLAVE_POSS, |
241 | .pio_mask = ATA_PIO4, | 241 | .pio_mask = ATA_PIO4, |
242 | .mwdma_mask = ATA_MWDMA2, | 242 | .mwdma_mask = ATA_MWDMA12_ONLY, |
243 | .port_ops = &oldpiix_pata_ops, | 243 | .port_ops = &oldpiix_pata_ops, |
244 | }; | 244 | }; |
245 | const struct ata_port_info *ppi[] = { &info, NULL }; | 245 | const struct ata_port_info *ppi[] = { &info, NULL }; |
diff --git a/drivers/ata/pata_pcmcia.c b/drivers/ata/pata_pcmcia.c index dc99e26f8e5b..1b392c9e8531 100644 --- a/drivers/ata/pata_pcmcia.c +++ b/drivers/ata/pata_pcmcia.c | |||
@@ -177,9 +177,6 @@ static struct ata_port_operations pcmcia_8bit_port_ops = { | |||
177 | .drain_fifo = pcmcia_8bit_drain_fifo, | 177 | .drain_fifo = pcmcia_8bit_drain_fifo, |
178 | }; | 178 | }; |
179 | 179 | ||
180 | #define CS_CHECK(fn, ret) \ | ||
181 | do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0) | ||
182 | |||
183 | 180 | ||
184 | struct pcmcia_config_check { | 181 | struct pcmcia_config_check { |
185 | unsigned long ctl_base; | 182 | unsigned long ctl_base; |
@@ -252,7 +249,7 @@ static int pcmcia_init_one(struct pcmcia_device *pdev) | |||
252 | struct ata_port *ap; | 249 | struct ata_port *ap; |
253 | struct ata_pcmcia_info *info; | 250 | struct ata_pcmcia_info *info; |
254 | struct pcmcia_config_check *stk = NULL; | 251 | struct pcmcia_config_check *stk = NULL; |
255 | int last_ret = 0, last_fn = 0, is_kme = 0, ret = -ENOMEM, p; | 252 | int is_kme = 0, ret = -ENOMEM, p; |
256 | unsigned long io_base, ctl_base; | 253 | unsigned long io_base, ctl_base; |
257 | void __iomem *io_addr, *ctl_addr; | 254 | void __iomem *io_addr, *ctl_addr; |
258 | int n_ports = 1; | 255 | int n_ports = 1; |
@@ -271,7 +268,6 @@ static int pcmcia_init_one(struct pcmcia_device *pdev) | |||
271 | pdev->io.Attributes2 = IO_DATA_PATH_WIDTH_8; | 268 | pdev->io.Attributes2 = IO_DATA_PATH_WIDTH_8; |
272 | pdev->io.IOAddrLines = 3; | 269 | pdev->io.IOAddrLines = 3; |
273 | pdev->irq.Attributes = IRQ_TYPE_DYNAMIC_SHARING; | 270 | pdev->irq.Attributes = IRQ_TYPE_DYNAMIC_SHARING; |
274 | pdev->irq.IRQInfo1 = IRQ_LEVEL_ID; | ||
275 | pdev->conf.Attributes = CONF_ENABLE_IRQ; | 271 | pdev->conf.Attributes = CONF_ENABLE_IRQ; |
276 | pdev->conf.IntType = INT_MEMORY_AND_IO; | 272 | pdev->conf.IntType = INT_MEMORY_AND_IO; |
277 | 273 | ||
@@ -296,8 +292,13 @@ static int pcmcia_init_one(struct pcmcia_device *pdev) | |||
296 | } | 292 | } |
297 | io_base = pdev->io.BasePort1; | 293 | io_base = pdev->io.BasePort1; |
298 | ctl_base = stk->ctl_base; | 294 | ctl_base = stk->ctl_base; |
299 | CS_CHECK(RequestIRQ, pcmcia_request_irq(pdev, &pdev->irq)); | 295 | ret = pcmcia_request_irq(pdev, &pdev->irq); |
300 | CS_CHECK(RequestConfiguration, pcmcia_request_configuration(pdev, &pdev->conf)); | 296 | if (ret) |
297 | goto failed; | ||
298 | |||
299 | ret = pcmcia_request_configuration(pdev, &pdev->conf); | ||
300 | if (ret) | ||
301 | goto failed; | ||
301 | 302 | ||
302 | /* iomap */ | 303 | /* iomap */ |
303 | ret = -ENOMEM; | 304 | ret = -ENOMEM; |
@@ -351,8 +352,6 @@ static int pcmcia_init_one(struct pcmcia_device *pdev) | |||
351 | kfree(stk); | 352 | kfree(stk); |
352 | return 0; | 353 | return 0; |
353 | 354 | ||
354 | cs_failed: | ||
355 | cs_error(pdev, last_fn, last_ret); | ||
356 | failed: | 355 | failed: |
357 | kfree(stk); | 356 | kfree(stk); |
358 | info->ndev = 0; | 357 | info->ndev = 0; |
diff --git a/drivers/ata/pata_piccolo.c b/drivers/ata/pata_piccolo.c new file mode 100644 index 000000000000..bfe0180f3efa --- /dev/null +++ b/drivers/ata/pata_piccolo.c | |||
@@ -0,0 +1,140 @@ | |||
1 | /* | ||
2 | * pata_piccolo.c - Toshiba Piccolo PATA/SATA controller driver. | ||
3 | * | ||
4 | * This is basically an update to ata_generic.c to add Toshiba Piccolo support | ||
5 | * then split out to keep ata_generic "clean". | ||
6 | * | ||
7 | * Copyright 2005 Red Hat Inc, all rights reserved. | ||
8 | * | ||
9 | * Elements from ide/pci/generic.c | ||
10 | * Copyright (C) 2001-2002 Andre Hedrick <andre@linux-ide.org> | ||
11 | * Portions (C) Copyright 2002 Red Hat Inc <alan@redhat.com> | ||
12 | * | ||
13 | * May be copied or modified under the terms of the GNU General Public License | ||
14 | * | ||
15 | * The timing data tables/programming info are courtesy of the NetBSD driver | ||
16 | */ | ||
17 | |||
18 | #include <linux/kernel.h> | ||
19 | #include <linux/module.h> | ||
20 | #include <linux/pci.h> | ||
21 | #include <linux/init.h> | ||
22 | #include <linux/blkdev.h> | ||
23 | #include <linux/delay.h> | ||
24 | #include <scsi/scsi_host.h> | ||
25 | #include <linux/libata.h> | ||
26 | |||
27 | #define DRV_NAME "pata_piccolo" | ||
28 | #define DRV_VERSION "0.0.1" | ||
29 | |||
30 | |||
31 | |||
32 | static void tosh_set_piomode(struct ata_port *ap, struct ata_device *adev) | ||
33 | { | ||
34 | static const u16 pio[6] = { /* For reg 0x50 low word & E088 */ | ||
35 | 0x0566, 0x0433, 0x0311, 0x0201, 0x0200, 0x0100 | ||
36 | }; | ||
37 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | ||
38 | u16 conf; | ||
39 | pci_read_config_word(pdev, 0x50, &conf); | ||
40 | conf &= 0xE088; | ||
41 | conf |= pio[adev->pio_mode - XFER_PIO_0]; | ||
42 | pci_write_config_word(pdev, 0x50, conf); | ||
43 | } | ||
44 | |||
45 | static void tosh_set_dmamode(struct ata_port *ap, struct ata_device *adev) | ||
46 | { | ||
47 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | ||
48 | u32 conf; | ||
49 | pci_read_config_dword(pdev, 0x5C, &conf); | ||
50 | conf &= 0x78FFE088; /* Keep the other bits */ | ||
51 | if (adev->dma_mode >= XFER_UDMA_0) { | ||
52 | int udma = adev->dma_mode - XFER_UDMA_0; | ||
53 | conf |= 0x80000000; | ||
54 | conf |= (udma + 2) << 28; | ||
55 | conf |= (2 - udma) * 0x111; /* spread into three nibbles */ | ||
56 | } else { | ||
57 | static const u32 mwdma[4] = { | ||
58 | 0x0655, 0x0200, 0x0200, 0x0100 | ||
59 | }; | ||
60 | conf |= mwdma[adev->dma_mode - XFER_MW_DMA_0]; | ||
61 | } | ||
62 | pci_write_config_dword(pdev, 0x5C, conf); | ||
63 | } | ||
64 | |||
65 | |||
66 | static struct scsi_host_template tosh_sht = { | ||
67 | ATA_BMDMA_SHT(DRV_NAME), | ||
68 | }; | ||
69 | |||
70 | static struct ata_port_operations tosh_port_ops = { | ||
71 | .inherits = &ata_bmdma_port_ops, | ||
72 | .cable_detect = ata_cable_unknown, | ||
73 | .set_piomode = tosh_set_piomode, | ||
74 | .set_dmamode = tosh_set_dmamode | ||
75 | }; | ||
76 | |||
77 | /** | ||
78 | * ata_tosh_init - attach generic IDE | ||
79 | * @dev: PCI device found | ||
80 | * @id: match entry | ||
81 | * | ||
82 | * Called each time a matching IDE interface is found. We check if the | ||
83 | * interface is one we wish to claim and if so we perform any chip | ||
84 | * specific hacks then let the ATA layer do the heavy lifting. | ||
85 | */ | ||
86 | |||
87 | static int ata_tosh_init_one(struct pci_dev *dev, const struct pci_device_id *id) | ||
88 | { | ||
89 | static const struct ata_port_info info = { | ||
90 | .flags = ATA_FLAG_SLAVE_POSS, | ||
91 | .pio_mask = ATA_PIO5, | ||
92 | .mwdma_mask = ATA_MWDMA2, | ||
93 | .udma_mask = ATA_UDMA2, | ||
94 | .port_ops = &tosh_port_ops | ||
95 | }; | ||
96 | const struct ata_port_info *ppi[] = { &info, &ata_dummy_port_info }; | ||
97 | /* Just one port for the moment */ | ||
98 | return ata_pci_sff_init_one(dev, ppi, &tosh_sht, NULL); | ||
99 | } | ||
100 | |||
101 | static struct pci_device_id ata_tosh[] = { | ||
102 | { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_1), }, | ||
103 | { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_2), }, | ||
104 | { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_3), }, | ||
105 | { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_5), }, | ||
106 | { 0, }, | ||
107 | }; | ||
108 | |||
109 | static struct pci_driver ata_tosh_pci_driver = { | ||
110 | .name = DRV_NAME, | ||
111 | .id_table = ata_tosh, | ||
112 | .probe = ata_tosh_init_one, | ||
113 | .remove = ata_pci_remove_one, | ||
114 | #ifdef CONFIG_PM | ||
115 | .suspend = ata_pci_device_suspend, | ||
116 | .resume = ata_pci_device_resume, | ||
117 | #endif | ||
118 | }; | ||
119 | |||
120 | static int __init ata_tosh_init(void) | ||
121 | { | ||
122 | return pci_register_driver(&ata_tosh_pci_driver); | ||
123 | } | ||
124 | |||
125 | |||
126 | static void __exit ata_tosh_exit(void) | ||
127 | { | ||
128 | pci_unregister_driver(&ata_tosh_pci_driver); | ||
129 | } | ||
130 | |||
131 | |||
132 | MODULE_AUTHOR("Alan Cox"); | ||
133 | MODULE_DESCRIPTION("Low level driver for Toshiba Piccolo ATA"); | ||
134 | MODULE_LICENSE("GPL"); | ||
135 | MODULE_DEVICE_TABLE(pci, ata_tosh); | ||
136 | MODULE_VERSION(DRV_VERSION); | ||
137 | |||
138 | module_init(ata_tosh_init); | ||
139 | module_exit(ata_tosh_exit); | ||
140 | |||
diff --git a/drivers/ata/pata_radisys.c b/drivers/ata/pata_radisys.c index 4401b332eaab..4fd25e737d9a 100644 --- a/drivers/ata/pata_radisys.c +++ b/drivers/ata/pata_radisys.c | |||
@@ -139,9 +139,9 @@ static void radisys_set_dmamode (struct ata_port *ap, struct ata_device *adev) | |||
139 | pci_read_config_byte(dev, 0x4A, &udma_mode); | 139 | pci_read_config_byte(dev, 0x4A, &udma_mode); |
140 | 140 | ||
141 | if (adev->xfer_mode == XFER_UDMA_2) | 141 | if (adev->xfer_mode == XFER_UDMA_2) |
142 | udma_mode &= ~ (1 << adev->devno); | 142 | udma_mode &= ~(2 << (adev->devno * 4)); |
143 | else /* UDMA 4 */ | 143 | else /* UDMA 4 */ |
144 | udma_mode |= (1 << adev->devno); | 144 | udma_mode |= (2 << (adev->devno * 4)); |
145 | 145 | ||
146 | pci_write_config_byte(dev, 0x4A, udma_mode); | 146 | pci_write_config_byte(dev, 0x4A, udma_mode); |
147 | 147 | ||
diff --git a/drivers/ata/pata_rdc.c b/drivers/ata/pata_rdc.c index c843a1e07c4f..237a24d41a2d 100644 --- a/drivers/ata/pata_rdc.c +++ b/drivers/ata/pata_rdc.c | |||
@@ -284,7 +284,7 @@ static struct ata_port_info rdc_port_info = { | |||
284 | 284 | ||
285 | .flags = ATA_FLAG_SLAVE_POSS, | 285 | .flags = ATA_FLAG_SLAVE_POSS, |
286 | .pio_mask = ATA_PIO4, | 286 | .pio_mask = ATA_PIO4, |
287 | .mwdma_mask = ATA_MWDMA2, | 287 | .mwdma_mask = ATA_MWDMA12_ONLY, |
288 | .udma_mask = ATA_UDMA5, | 288 | .udma_mask = ATA_UDMA5, |
289 | .port_ops = &rdc_pata_ops, | 289 | .port_ops = &rdc_pata_ops, |
290 | }; | 290 | }; |
diff --git a/drivers/ata/pata_rz1000.c b/drivers/ata/pata_rz1000.c index a5e4dfe60b41..2932998fc4c6 100644 --- a/drivers/ata/pata_rz1000.c +++ b/drivers/ata/pata_rz1000.c | |||
@@ -105,11 +105,20 @@ static int rz1000_init_one (struct pci_dev *pdev, const struct pci_device_id *en | |||
105 | #ifdef CONFIG_PM | 105 | #ifdef CONFIG_PM |
106 | static int rz1000_reinit_one(struct pci_dev *pdev) | 106 | static int rz1000_reinit_one(struct pci_dev *pdev) |
107 | { | 107 | { |
108 | struct ata_host *host = dev_get_drvdata(&pdev->dev); | ||
109 | int rc; | ||
110 | |||
111 | rc = ata_pci_device_do_resume(pdev); | ||
112 | if (rc) | ||
113 | return rc; | ||
114 | |||
108 | /* If this fails on resume (which is a "cant happen" case), we | 115 | /* If this fails on resume (which is a "cant happen" case), we |
109 | must stop as any progress risks data loss */ | 116 | must stop as any progress risks data loss */ |
110 | if (rz1000_fifo_disable(pdev)) | 117 | if (rz1000_fifo_disable(pdev)) |
111 | panic("rz1000 fifo"); | 118 | panic("rz1000 fifo"); |
112 | return ata_pci_device_resume(pdev); | 119 | |
120 | ata_host_resume(host); | ||
121 | return 0; | ||
113 | } | 122 | } |
114 | #endif | 123 | #endif |
115 | 124 | ||
diff --git a/drivers/ata/pata_sil680.c b/drivers/ata/pata_sil680.c index 4cb649d8d38c..a2ace48a4610 100644 --- a/drivers/ata/pata_sil680.c +++ b/drivers/ata/pata_sil680.c | |||
@@ -212,13 +212,11 @@ static struct ata_port_operations sil680_port_ops = { | |||
212 | 212 | ||
213 | static u8 sil680_init_chip(struct pci_dev *pdev, int *try_mmio) | 213 | static u8 sil680_init_chip(struct pci_dev *pdev, int *try_mmio) |
214 | { | 214 | { |
215 | u32 class_rev = 0; | ||
216 | u8 tmpbyte = 0; | 215 | u8 tmpbyte = 0; |
217 | 216 | ||
218 | pci_read_config_dword(pdev, PCI_CLASS_REVISION, &class_rev); | ||
219 | class_rev &= 0xff; | ||
220 | /* FIXME: double check */ | 217 | /* FIXME: double check */ |
221 | pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, (class_rev) ? 1 : 255); | 218 | pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, |
219 | pdev->revision ? 1 : 255); | ||
222 | 220 | ||
223 | pci_write_config_byte(pdev, 0x80, 0x00); | 221 | pci_write_config_byte(pdev, 0x80, 0x00); |
224 | pci_write_config_byte(pdev, 0x84, 0x00); | 222 | pci_write_config_byte(pdev, 0x84, 0x00); |
diff --git a/drivers/ata/pata_sis.c b/drivers/ata/pata_sis.c index 488e77bcd22b..5c30d56dec84 100644 --- a/drivers/ata/pata_sis.c +++ b/drivers/ata/pata_sis.c | |||
@@ -2,7 +2,7 @@ | |||
2 | * pata_sis.c - SiS ATA driver | 2 | * pata_sis.c - SiS ATA driver |
3 | * | 3 | * |
4 | * (C) 2005 Red Hat | 4 | * (C) 2005 Red Hat |
5 | * (C) 2007 Bartlomiej Zolnierkiewicz | 5 | * (C) 2007,2009 Bartlomiej Zolnierkiewicz |
6 | * | 6 | * |
7 | * Based upon linux/drivers/ide/pci/sis5513.c | 7 | * Based upon linux/drivers/ide/pci/sis5513.c |
8 | * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org> | 8 | * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org> |
@@ -829,6 +829,23 @@ static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | |||
829 | return ata_pci_sff_init_one(pdev, ppi, &sis_sht, chipset); | 829 | return ata_pci_sff_init_one(pdev, ppi, &sis_sht, chipset); |
830 | } | 830 | } |
831 | 831 | ||
832 | #ifdef CONFIG_PM | ||
833 | static int sis_reinit_one(struct pci_dev *pdev) | ||
834 | { | ||
835 | struct ata_host *host = dev_get_drvdata(&pdev->dev); | ||
836 | int rc; | ||
837 | |||
838 | rc = ata_pci_device_do_resume(pdev); | ||
839 | if (rc) | ||
840 | return rc; | ||
841 | |||
842 | sis_fixup(pdev, host->private_data); | ||
843 | |||
844 | ata_host_resume(host); | ||
845 | return 0; | ||
846 | } | ||
847 | #endif | ||
848 | |||
832 | static const struct pci_device_id sis_pci_tbl[] = { | 849 | static const struct pci_device_id sis_pci_tbl[] = { |
833 | { PCI_VDEVICE(SI, 0x5513), }, /* SiS 5513 */ | 850 | { PCI_VDEVICE(SI, 0x5513), }, /* SiS 5513 */ |
834 | { PCI_VDEVICE(SI, 0x5518), }, /* SiS 5518 */ | 851 | { PCI_VDEVICE(SI, 0x5518), }, /* SiS 5518 */ |
@@ -844,7 +861,7 @@ static struct pci_driver sis_pci_driver = { | |||
844 | .remove = ata_pci_remove_one, | 861 | .remove = ata_pci_remove_one, |
845 | #ifdef CONFIG_PM | 862 | #ifdef CONFIG_PM |
846 | .suspend = ata_pci_device_suspend, | 863 | .suspend = ata_pci_device_suspend, |
847 | .resume = ata_pci_device_resume, | 864 | .resume = sis_reinit_one, |
848 | #endif | 865 | #endif |
849 | }; | 866 | }; |
850 | 867 | ||
diff --git a/drivers/ata/pata_via.c b/drivers/ata/pata_via.c index 88984b803d6d..0d97890af681 100644 --- a/drivers/ata/pata_via.c +++ b/drivers/ata/pata_via.c | |||
@@ -303,14 +303,21 @@ static void via_do_set_mode(struct ata_port *ap, struct ata_device *adev, int mo | |||
303 | } | 303 | } |
304 | 304 | ||
305 | /* Set UDMA unless device is not UDMA capable */ | 305 | /* Set UDMA unless device is not UDMA capable */ |
306 | if (udma_type && t.udma) { | 306 | if (udma_type) { |
307 | u8 cable80_status; | 307 | u8 udma_etc; |
308 | 308 | ||
309 | /* Get 80-wire cable detection bit */ | 309 | pci_read_config_byte(pdev, 0x50 + offset, &udma_etc); |
310 | pci_read_config_byte(pdev, 0x50 + offset, &cable80_status); | ||
311 | cable80_status &= 0x10; | ||
312 | 310 | ||
313 | pci_write_config_byte(pdev, 0x50 + offset, ut | cable80_status); | 311 | /* clear transfer mode bit */ |
312 | udma_etc &= ~0x20; | ||
313 | |||
314 | if (t.udma) { | ||
315 | /* preserve 80-wire cable detection bit */ | ||
316 | udma_etc &= 0x10; | ||
317 | udma_etc |= ut; | ||
318 | } | ||
319 | |||
320 | pci_write_config_byte(pdev, 0x50 + offset, udma_etc); | ||
314 | } | 321 | } |
315 | } | 322 | } |
316 | 323 | ||
@@ -337,6 +344,32 @@ static void via_set_dmamode(struct ata_port *ap, struct ata_device *adev) | |||
337 | } | 344 | } |
338 | 345 | ||
339 | /** | 346 | /** |
347 | * via_mode_filter - filter buggy device/mode pairs | ||
348 | * @dev: ATA device | ||
349 | * @mask: Mode bitmask | ||
350 | * | ||
351 | * We need to apply some minimal filtering for old controllers and at least | ||
352 | * one breed of Transcend SSD. Return the updated mask. | ||
353 | */ | ||
354 | |||
355 | static unsigned long via_mode_filter(struct ata_device *dev, unsigned long mask) | ||
356 | { | ||
357 | struct ata_host *host = dev->link->ap->host; | ||
358 | const struct via_isa_bridge *config = host->private_data; | ||
359 | unsigned char model_num[ATA_ID_PROD_LEN + 1]; | ||
360 | |||
361 | if (config->id == PCI_DEVICE_ID_VIA_82C586_0) { | ||
362 | ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num)); | ||
363 | if (strcmp(model_num, "TS64GSSD25-M") == 0) { | ||
364 | ata_dev_printk(dev, KERN_WARNING, | ||
365 | "disabling UDMA mode due to reported lockups with this device.\n"); | ||
366 | mask &= ~ ATA_MASK_UDMA; | ||
367 | } | ||
368 | } | ||
369 | return ata_bmdma_mode_filter(dev, mask); | ||
370 | } | ||
371 | |||
372 | /** | ||
340 | * via_tf_load - send taskfile registers to host controller | 373 | * via_tf_load - send taskfile registers to host controller |
341 | * @ap: Port to which output is sent | 374 | * @ap: Port to which output is sent |
342 | * @tf: ATA taskfile register set | 375 | * @tf: ATA taskfile register set |
@@ -427,6 +460,7 @@ static struct ata_port_operations via_port_ops = { | |||
427 | .prereset = via_pre_reset, | 460 | .prereset = via_pre_reset, |
428 | .sff_tf_load = via_tf_load, | 461 | .sff_tf_load = via_tf_load, |
429 | .port_start = via_port_start, | 462 | .port_start = via_port_start, |
463 | .mode_filter = via_mode_filter, | ||
430 | }; | 464 | }; |
431 | 465 | ||
432 | static struct ata_port_operations via_port_ops_noirq = { | 466 | static struct ata_port_operations via_port_ops_noirq = { |
@@ -526,7 +560,7 @@ static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id) | |||
526 | .port_ops = &via_port_ops | 560 | .port_ops = &via_port_ops |
527 | }; | 561 | }; |
528 | const struct ata_port_info *ppi[] = { NULL, NULL }; | 562 | const struct ata_port_info *ppi[] = { NULL, NULL }; |
529 | struct pci_dev *isa = NULL; | 563 | struct pci_dev *isa; |
530 | const struct via_isa_bridge *config; | 564 | const struct via_isa_bridge *config; |
531 | static int printed_version; | 565 | static int printed_version; |
532 | u8 enable; | 566 | u8 enable; |
@@ -551,15 +585,13 @@ static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id) | |||
551 | if ((isa = pci_get_device(PCI_VENDOR_ID_VIA + | 585 | if ((isa = pci_get_device(PCI_VENDOR_ID_VIA + |
552 | !!(config->flags & VIA_BAD_ID), | 586 | !!(config->flags & VIA_BAD_ID), |
553 | config->id, NULL))) { | 587 | config->id, NULL))) { |
588 | u8 rev = isa->revision; | ||
589 | pci_dev_put(isa); | ||
554 | 590 | ||
555 | if (isa->revision >= config->rev_min && | 591 | if (rev >= config->rev_min && rev <= config->rev_max) |
556 | isa->revision <= config->rev_max) | ||
557 | break; | 592 | break; |
558 | pci_dev_put(isa); | ||
559 | } | 593 | } |
560 | 594 | ||
561 | pci_dev_put(isa); | ||
562 | |||
563 | if (!(config->flags & VIA_NO_ENABLES)) { | 595 | if (!(config->flags & VIA_NO_ENABLES)) { |
564 | /* 0x40 low bits indicate enabled channels */ | 596 | /* 0x40 low bits indicate enabled channels */ |
565 | pci_read_config_byte(pdev, 0x40 , &enable); | 597 | pci_read_config_byte(pdev, 0x40 , &enable); |
diff --git a/drivers/ata/sata_fsl.c b/drivers/ata/sata_fsl.c index d344db42a002..8a5d35b759dd 100644 --- a/drivers/ata/sata_fsl.c +++ b/drivers/ata/sata_fsl.c | |||
@@ -34,7 +34,7 @@ enum { | |||
34 | 34 | ||
35 | SATA_FSL_HOST_FLAGS = (ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | | 35 | SATA_FSL_HOST_FLAGS = (ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | |
36 | ATA_FLAG_MMIO | ATA_FLAG_PIO_DMA | | 36 | ATA_FLAG_MMIO | ATA_FLAG_PIO_DMA | |
37 | ATA_FLAG_PMP | ATA_FLAG_NCQ), | 37 | ATA_FLAG_PMP | ATA_FLAG_NCQ | ATA_FLAG_AN), |
38 | 38 | ||
39 | SATA_FSL_MAX_CMDS = SATA_FSL_QUEUE_DEPTH, | 39 | SATA_FSL_MAX_CMDS = SATA_FSL_QUEUE_DEPTH, |
40 | SATA_FSL_CMD_HDR_SIZE = 16, /* 4 DWORDS */ | 40 | SATA_FSL_CMD_HDR_SIZE = 16, /* 4 DWORDS */ |
@@ -132,7 +132,7 @@ enum { | |||
132 | INT_ON_SINGL_DEVICE_ERR = (1 << 1), | 132 | INT_ON_SINGL_DEVICE_ERR = (1 << 1), |
133 | INT_ON_CMD_COMPLETE = 1, | 133 | INT_ON_CMD_COMPLETE = 1, |
134 | 134 | ||
135 | INT_ON_ERROR = INT_ON_FATAL_ERR | | 135 | INT_ON_ERROR = INT_ON_FATAL_ERR | INT_ON_SNOTIFY_UPDATE | |
136 | INT_ON_PHYRDY_CHG | INT_ON_SINGL_DEVICE_ERR, | 136 | INT_ON_PHYRDY_CHG | INT_ON_SINGL_DEVICE_ERR, |
137 | 137 | ||
138 | /* | 138 | /* |
@@ -153,7 +153,7 @@ enum { | |||
153 | IE_ON_CMD_COMPLETE = 1, | 153 | IE_ON_CMD_COMPLETE = 1, |
154 | 154 | ||
155 | DEFAULT_PORT_IRQ_ENABLE_MASK = IE_ON_FATAL_ERR | IE_ON_PHYRDY_CHG | | 155 | DEFAULT_PORT_IRQ_ENABLE_MASK = IE_ON_FATAL_ERR | IE_ON_PHYRDY_CHG | |
156 | IE_ON_SIGNATURE_UPDATE | | 156 | IE_ON_SIGNATURE_UPDATE | IE_ON_SNOTIFY_UPDATE | |
157 | IE_ON_SINGL_DEVICE_ERR | IE_ON_CMD_COMPLETE, | 157 | IE_ON_SINGL_DEVICE_ERR | IE_ON_CMD_COMPLETE, |
158 | 158 | ||
159 | EXT_INDIRECT_SEG_PRD_FLAG = (1 << 31), | 159 | EXT_INDIRECT_SEG_PRD_FLAG = (1 << 31), |
@@ -707,34 +707,17 @@ static unsigned int sata_fsl_dev_classify(struct ata_port *ap) | |||
707 | return ata_dev_classify(&tf); | 707 | return ata_dev_classify(&tf); |
708 | } | 708 | } |
709 | 709 | ||
710 | static int sata_fsl_prereset(struct ata_link *link, unsigned long deadline) | 710 | static int sata_fsl_hardreset(struct ata_link *link, unsigned int *class, |
711 | { | ||
712 | /* FIXME: Never skip softreset, sata_fsl_softreset() is | ||
713 | * combination of soft and hard resets. sata_fsl_softreset() | ||
714 | * needs to be splitted into soft and hard resets. | ||
715 | */ | ||
716 | return 0; | ||
717 | } | ||
718 | |||
719 | static int sata_fsl_softreset(struct ata_link *link, unsigned int *class, | ||
720 | unsigned long deadline) | 711 | unsigned long deadline) |
721 | { | 712 | { |
722 | struct ata_port *ap = link->ap; | 713 | struct ata_port *ap = link->ap; |
723 | struct sata_fsl_port_priv *pp = ap->private_data; | ||
724 | struct sata_fsl_host_priv *host_priv = ap->host->private_data; | 714 | struct sata_fsl_host_priv *host_priv = ap->host->private_data; |
725 | void __iomem *hcr_base = host_priv->hcr_base; | 715 | void __iomem *hcr_base = host_priv->hcr_base; |
726 | int pmp = sata_srst_pmp(link); | ||
727 | u32 temp; | 716 | u32 temp; |
728 | struct ata_taskfile tf; | ||
729 | u8 *cfis; | ||
730 | u32 Serror; | ||
731 | int i = 0; | 717 | int i = 0; |
732 | unsigned long start_jiffies; | 718 | unsigned long start_jiffies; |
733 | 719 | ||
734 | DPRINTK("in xx_softreset\n"); | 720 | DPRINTK("in xx_hardreset\n"); |
735 | |||
736 | if (pmp != SATA_PMP_CTRL_PORT) | ||
737 | goto issue_srst; | ||
738 | 721 | ||
739 | try_offline_again: | 722 | try_offline_again: |
740 | /* | 723 | /* |
@@ -749,7 +732,7 @@ try_offline_again: | |||
749 | 732 | ||
750 | if (temp & ONLINE) { | 733 | if (temp & ONLINE) { |
751 | ata_port_printk(ap, KERN_ERR, | 734 | ata_port_printk(ap, KERN_ERR, |
752 | "Softreset failed, not off-lined %d\n", i); | 735 | "Hardreset failed, not off-lined %d\n", i); |
753 | 736 | ||
754 | /* | 737 | /* |
755 | * Try to offline controller atleast twice | 738 | * Try to offline controller atleast twice |
@@ -761,7 +744,7 @@ try_offline_again: | |||
761 | goto try_offline_again; | 744 | goto try_offline_again; |
762 | } | 745 | } |
763 | 746 | ||
764 | DPRINTK("softreset, controller off-lined\n"); | 747 | DPRINTK("hardreset, controller off-lined\n"); |
765 | VPRINTK("HStatus = 0x%x\n", ioread32(hcr_base + HSTATUS)); | 748 | VPRINTK("HStatus = 0x%x\n", ioread32(hcr_base + HSTATUS)); |
766 | VPRINTK("HControl = 0x%x\n", ioread32(hcr_base + HCONTROL)); | 749 | VPRINTK("HControl = 0x%x\n", ioread32(hcr_base + HCONTROL)); |
767 | 750 | ||
@@ -786,11 +769,11 @@ try_offline_again: | |||
786 | 769 | ||
787 | if (!(temp & ONLINE)) { | 770 | if (!(temp & ONLINE)) { |
788 | ata_port_printk(ap, KERN_ERR, | 771 | ata_port_printk(ap, KERN_ERR, |
789 | "Softreset failed, not on-lined\n"); | 772 | "Hardreset failed, not on-lined\n"); |
790 | goto err; | 773 | goto err; |
791 | } | 774 | } |
792 | 775 | ||
793 | DPRINTK("softreset, controller off-lined & on-lined\n"); | 776 | DPRINTK("hardreset, controller off-lined & on-lined\n"); |
794 | VPRINTK("HStatus = 0x%x\n", ioread32(hcr_base + HSTATUS)); | 777 | VPRINTK("HStatus = 0x%x\n", ioread32(hcr_base + HSTATUS)); |
795 | VPRINTK("HControl = 0x%x\n", ioread32(hcr_base + HCONTROL)); | 778 | VPRINTK("HControl = 0x%x\n", ioread32(hcr_base + HCONTROL)); |
796 | 779 | ||
@@ -806,7 +789,7 @@ try_offline_again: | |||
806 | "No Device OR PHYRDY change,Hstatus = 0x%x\n", | 789 | "No Device OR PHYRDY change,Hstatus = 0x%x\n", |
807 | ioread32(hcr_base + HSTATUS)); | 790 | ioread32(hcr_base + HSTATUS)); |
808 | *class = ATA_DEV_NONE; | 791 | *class = ATA_DEV_NONE; |
809 | goto out; | 792 | return 0; |
810 | } | 793 | } |
811 | 794 | ||
812 | /* | 795 | /* |
@@ -819,11 +802,44 @@ try_offline_again: | |||
819 | if ((temp & 0xFF) != 0x18) { | 802 | if ((temp & 0xFF) != 0x18) { |
820 | ata_port_printk(ap, KERN_WARNING, "No Signature Update\n"); | 803 | ata_port_printk(ap, KERN_WARNING, "No Signature Update\n"); |
821 | *class = ATA_DEV_NONE; | 804 | *class = ATA_DEV_NONE; |
822 | goto out; | 805 | goto do_followup_srst; |
823 | } else { | 806 | } else { |
824 | ata_port_printk(ap, KERN_INFO, | 807 | ata_port_printk(ap, KERN_INFO, |
825 | "Signature Update detected @ %d msecs\n", | 808 | "Signature Update detected @ %d msecs\n", |
826 | jiffies_to_msecs(jiffies - start_jiffies)); | 809 | jiffies_to_msecs(jiffies - start_jiffies)); |
810 | *class = sata_fsl_dev_classify(ap); | ||
811 | return 0; | ||
812 | } | ||
813 | |||
814 | do_followup_srst: | ||
815 | /* | ||
816 | * request libATA to perform follow-up softreset | ||
817 | */ | ||
818 | return -EAGAIN; | ||
819 | |||
820 | err: | ||
821 | return -EIO; | ||
822 | } | ||
823 | |||
824 | static int sata_fsl_softreset(struct ata_link *link, unsigned int *class, | ||
825 | unsigned long deadline) | ||
826 | { | ||
827 | struct ata_port *ap = link->ap; | ||
828 | struct sata_fsl_port_priv *pp = ap->private_data; | ||
829 | struct sata_fsl_host_priv *host_priv = ap->host->private_data; | ||
830 | void __iomem *hcr_base = host_priv->hcr_base; | ||
831 | int pmp = sata_srst_pmp(link); | ||
832 | u32 temp; | ||
833 | struct ata_taskfile tf; | ||
834 | u8 *cfis; | ||
835 | u32 Serror; | ||
836 | |||
837 | DPRINTK("in xx_softreset\n"); | ||
838 | |||
839 | if (ata_link_offline(link)) { | ||
840 | DPRINTK("PHY reports no device\n"); | ||
841 | *class = ATA_DEV_NONE; | ||
842 | return 0; | ||
827 | } | 843 | } |
828 | 844 | ||
829 | /* | 845 | /* |
@@ -834,7 +850,6 @@ try_offline_again: | |||
834 | * reached here, we can send a command to the target device | 850 | * reached here, we can send a command to the target device |
835 | */ | 851 | */ |
836 | 852 | ||
837 | issue_srst: | ||
838 | DPRINTK("Sending SRST/device reset\n"); | 853 | DPRINTK("Sending SRST/device reset\n"); |
839 | 854 | ||
840 | ata_tf_init(link->device, &tf); | 855 | ata_tf_init(link->device, &tf); |
@@ -860,6 +875,8 @@ issue_srst: | |||
860 | ioread32(CA + hcr_base), ioread32(CC + hcr_base)); | 875 | ioread32(CA + hcr_base), ioread32(CC + hcr_base)); |
861 | 876 | ||
862 | iowrite32(0xFFFF, CC + hcr_base); | 877 | iowrite32(0xFFFF, CC + hcr_base); |
878 | if (pmp != SATA_PMP_CTRL_PORT) | ||
879 | iowrite32(pmp, CQPMP + hcr_base); | ||
863 | iowrite32(1, CQ + hcr_base); | 880 | iowrite32(1, CQ + hcr_base); |
864 | 881 | ||
865 | temp = ata_wait_register(CQ + hcr_base, 0x1, 0x1, 1, 5000); | 882 | temp = ata_wait_register(CQ + hcr_base, 0x1, 0x1, 1, 5000); |
@@ -926,7 +943,6 @@ issue_srst: | |||
926 | VPRINTK("cereg = 0x%x\n", ioread32(hcr_base + CE)); | 943 | VPRINTK("cereg = 0x%x\n", ioread32(hcr_base + CE)); |
927 | } | 944 | } |
928 | 945 | ||
929 | out: | ||
930 | return 0; | 946 | return 0; |
931 | 947 | ||
932 | err: | 948 | err: |
@@ -976,9 +992,8 @@ static void sata_fsl_error_intr(struct ata_port *ap) | |||
976 | */ | 992 | */ |
977 | 993 | ||
978 | sata_fsl_scr_read(&ap->link, SCR_ERROR, &SError); | 994 | sata_fsl_scr_read(&ap->link, SCR_ERROR, &SError); |
979 | if (unlikely(SError & 0xFFFF0000)) { | 995 | if (unlikely(SError & 0xFFFF0000)) |
980 | sata_fsl_scr_write(&ap->link, SCR_ERROR, SError); | 996 | sata_fsl_scr_write(&ap->link, SCR_ERROR, SError); |
981 | } | ||
982 | 997 | ||
983 | DPRINTK("error_intr,hStat=0x%x,CE=0x%x,DE =0x%x,SErr=0x%x\n", | 998 | DPRINTK("error_intr,hStat=0x%x,CE=0x%x,DE =0x%x,SErr=0x%x\n", |
984 | hstatus, cereg, ioread32(hcr_base + DE), SError); | 999 | hstatus, cereg, ioread32(hcr_base + DE), SError); |
@@ -988,21 +1003,13 @@ static void sata_fsl_error_intr(struct ata_port *ap) | |||
988 | ehi->err_mask |= AC_ERR_ATA_BUS; | 1003 | ehi->err_mask |= AC_ERR_ATA_BUS; |
989 | ehi->action |= ATA_EH_SOFTRESET; | 1004 | ehi->action |= ATA_EH_SOFTRESET; |
990 | 1005 | ||
991 | /* | ||
992 | * Ignore serror in case of fatal errors as we always want | ||
993 | * to do a soft-reset of the FSL SATA controller. Analyzing | ||
994 | * serror may cause libata to schedule a hard-reset action, | ||
995 | * and hard-reset currently does not do controller | ||
996 | * offline/online, causing command timeouts and leads to an | ||
997 | * un-recoverable state, hence make libATA ignore | ||
998 | * autopsy in case of fatal errors. | ||
999 | */ | ||
1000 | |||
1001 | ehi->flags |= ATA_EHI_NO_AUTOPSY; | ||
1002 | |||
1003 | freeze = 1; | 1006 | freeze = 1; |
1004 | } | 1007 | } |
1005 | 1008 | ||
1009 | /* Handle SDB FIS receive & notify update */ | ||
1010 | if (hstatus & INT_ON_SNOTIFY_UPDATE) | ||
1011 | sata_async_notification(ap); | ||
1012 | |||
1006 | /* Handle PHYRDY change notification */ | 1013 | /* Handle PHYRDY change notification */ |
1007 | if (hstatus & INT_ON_PHYRDY_CHG) { | 1014 | if (hstatus & INT_ON_PHYRDY_CHG) { |
1008 | DPRINTK("SATA FSL: PHYRDY change indication\n"); | 1015 | DPRINTK("SATA FSL: PHYRDY change indication\n"); |
@@ -1066,9 +1073,9 @@ static void sata_fsl_error_intr(struct ata_port *ap) | |||
1066 | } | 1073 | } |
1067 | 1074 | ||
1068 | /* record error info */ | 1075 | /* record error info */ |
1069 | if (qc) { | 1076 | if (qc) |
1070 | qc->err_mask |= err_mask; | 1077 | qc->err_mask |= err_mask; |
1071 | } else | 1078 | else |
1072 | ehi->err_mask |= err_mask; | 1079 | ehi->err_mask |= err_mask; |
1073 | 1080 | ||
1074 | ehi->action |= action; | 1081 | ehi->action |= action; |
@@ -1099,7 +1106,6 @@ static void sata_fsl_host_intr(struct ata_port *ap) | |||
1099 | if (unlikely(SError & 0xFFFF0000)) { | 1106 | if (unlikely(SError & 0xFFFF0000)) { |
1100 | DPRINTK("serror @host_intr : 0x%x\n", SError); | 1107 | DPRINTK("serror @host_intr : 0x%x\n", SError); |
1101 | sata_fsl_error_intr(ap); | 1108 | sata_fsl_error_intr(ap); |
1102 | |||
1103 | } | 1109 | } |
1104 | 1110 | ||
1105 | if (unlikely(hstatus & INT_ON_ERROR)) { | 1111 | if (unlikely(hstatus & INT_ON_ERROR)) { |
@@ -1267,8 +1273,8 @@ static struct ata_port_operations sata_fsl_ops = { | |||
1267 | 1273 | ||
1268 | .freeze = sata_fsl_freeze, | 1274 | .freeze = sata_fsl_freeze, |
1269 | .thaw = sata_fsl_thaw, | 1275 | .thaw = sata_fsl_thaw, |
1270 | .prereset = sata_fsl_prereset, | ||
1271 | .softreset = sata_fsl_softreset, | 1276 | .softreset = sata_fsl_softreset, |
1277 | .hardreset = sata_fsl_hardreset, | ||
1272 | .pmp_softreset = sata_fsl_softreset, | 1278 | .pmp_softreset = sata_fsl_softreset, |
1273 | .error_handler = sata_fsl_error_handler, | 1279 | .error_handler = sata_fsl_error_handler, |
1274 | .post_internal_cmd = sata_fsl_post_internal_cmd, | 1280 | .post_internal_cmd = sata_fsl_post_internal_cmd, |
diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c index 6f5093b7c8c5..a8a7be0d06ff 100644 --- a/drivers/ata/sata_mv.c +++ b/drivers/ata/sata_mv.c | |||
@@ -2217,7 +2217,7 @@ static unsigned int mv_qc_issue_fis(struct ata_queued_cmd *qc) | |||
2217 | int err = 0; | 2217 | int err = 0; |
2218 | 2218 | ||
2219 | ata_tf_to_fis(&qc->tf, link->pmp, 1, (void *)fis); | 2219 | ata_tf_to_fis(&qc->tf, link->pmp, 1, (void *)fis); |
2220 | err = mv_send_fis(ap, fis, sizeof(fis) / sizeof(fis[0])); | 2220 | err = mv_send_fis(ap, fis, ARRAY_SIZE(fis)); |
2221 | if (err) | 2221 | if (err) |
2222 | return err; | 2222 | return err; |
2223 | 2223 | ||
diff --git a/drivers/ata/sata_sil24.c b/drivers/ata/sata_sil24.c index e6946fc527d0..1370df6c420c 100644 --- a/drivers/ata/sata_sil24.c +++ b/drivers/ata/sata_sil24.c | |||
@@ -417,6 +417,10 @@ static struct ata_port_operations sil24_ops = { | |||
417 | #endif | 417 | #endif |
418 | }; | 418 | }; |
419 | 419 | ||
420 | static int sata_sil24_msi; /* Disable MSI */ | ||
421 | module_param_named(msi, sata_sil24_msi, bool, S_IRUGO); | ||
422 | MODULE_PARM_DESC(msi, "Enable MSI (Default: false)"); | ||
423 | |||
420 | /* | 424 | /* |
421 | * Use bits 30-31 of port_flags to encode available port numbers. | 425 | * Use bits 30-31 of port_flags to encode available port numbers. |
422 | * Current maxium is 4. | 426 | * Current maxium is 4. |
@@ -1340,6 +1344,11 @@ static int sil24_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
1340 | 1344 | ||
1341 | sil24_init_controller(host); | 1345 | sil24_init_controller(host); |
1342 | 1346 | ||
1347 | if (sata_sil24_msi && !pci_enable_msi(pdev)) { | ||
1348 | dev_printk(KERN_INFO, &pdev->dev, "Using MSI\n"); | ||
1349 | pci_intx(pdev, 0); | ||
1350 | } | ||
1351 | |||
1343 | pci_set_master(pdev); | 1352 | pci_set_master(pdev); |
1344 | return ata_host_activate(host, pdev->irq, sil24_interrupt, IRQF_SHARED, | 1353 | return ata_host_activate(host, pdev->irq, sil24_interrupt, IRQF_SHARED, |
1345 | &sil24_sht); | 1354 | &sil24_sht); |