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-rw-r--r--drivers/ata/Kconfig6
-rw-r--r--drivers/ata/ahci.c21
-rw-r--r--drivers/ata/ata_piix.c2
-rw-r--r--drivers/ata/libata-sff.c5
-rw-r--r--drivers/ata/pata_marvell.c51
-rw-r--r--drivers/ata/pata_sil680.c3
-rw-r--r--drivers/ata/sata_inic162x.c3
-rw-r--r--drivers/ata/sata_mv.c3
-rw-r--r--drivers/ata/sata_nv.c19
9 files changed, 68 insertions, 45 deletions
diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
index 55d7ee4e92b4..3b54e6e60635 100644
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -447,8 +447,10 @@ config PATA_MARVELL
447 tristate "Marvell PATA support via legacy mode" 447 tristate "Marvell PATA support via legacy mode"
448 depends on PCI 448 depends on PCI
449 help 449 help
450 This option enables limited support for the Marvell 88SE6145 ATA 450 This option enables limited support for the Marvell 88SE61xx ATA
451 controller. 451 controllers. If you wish to use only the SATA ports then select
452 the AHCI driver alone. If you wish to the use the PATA port or
453 both SATA and PATA include this driver.
452 454
453 If unsure, say N. 455 If unsure, say N.
454 456
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index c729e6988bbb..2e1a7cb2ed5f 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -420,7 +420,7 @@ static const struct ata_port_info ahci_port_info[] = {
420 /* board_ahci_mv */ 420 /* board_ahci_mv */
421 { 421 {
422 AHCI_HFLAGS (AHCI_HFLAG_NO_NCQ | AHCI_HFLAG_NO_MSI | 422 AHCI_HFLAGS (AHCI_HFLAG_NO_NCQ | AHCI_HFLAG_NO_MSI |
423 AHCI_HFLAG_MV_PATA), 423 AHCI_HFLAG_MV_PATA | AHCI_HFLAG_NO_PMP),
424 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | 424 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
425 ATA_FLAG_MMIO | ATA_FLAG_PIO_DMA, 425 ATA_FLAG_MMIO | ATA_FLAG_PIO_DMA,
426 .pio_mask = 0x1f, /* pio0-4 */ 426 .pio_mask = 0x1f, /* pio0-4 */
@@ -487,7 +487,9 @@ static const struct pci_device_id ahci_pci_tbl[] = {
487 { PCI_VDEVICE(INTEL, 0x3a05), board_ahci }, /* ICH10 */ 487 { PCI_VDEVICE(INTEL, 0x3a05), board_ahci }, /* ICH10 */
488 { PCI_VDEVICE(INTEL, 0x3a25), board_ahci }, /* ICH10 */ 488 { PCI_VDEVICE(INTEL, 0x3a25), board_ahci }, /* ICH10 */
489 { PCI_VDEVICE(INTEL, 0x3b24), board_ahci }, /* PCH RAID */ 489 { PCI_VDEVICE(INTEL, 0x3b24), board_ahci }, /* PCH RAID */
490 { PCI_VDEVICE(INTEL, 0x3b25), board_ahci }, /* PCH RAID */
490 { PCI_VDEVICE(INTEL, 0x3b2b), board_ahci }, /* PCH RAID */ 491 { PCI_VDEVICE(INTEL, 0x3b2b), board_ahci }, /* PCH RAID */
492 { PCI_VDEVICE(INTEL, 0x3b2c), board_ahci }, /* PCH RAID */
491 493
492 /* JMicron 360/1/3/5/6, match class to avoid IDE function */ 494 /* JMicron 360/1/3/5/6, match class to avoid IDE function */
493 { PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 495 { PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
@@ -610,6 +612,15 @@ module_param(ahci_em_messages, int, 0444);
610MODULE_PARM_DESC(ahci_em_messages, 612MODULE_PARM_DESC(ahci_em_messages,
611 "Set AHCI Enclosure Management Message type (0 = disabled, 1 = LED"); 613 "Set AHCI Enclosure Management Message type (0 = disabled, 1 = LED");
612 614
615#if defined(CONFIG_PATA_MARVELL) || defined(CONFIG_PATA_MARVELL_MODULE)
616static int marvell_enable;
617#else
618static int marvell_enable = 1;
619#endif
620module_param(marvell_enable, int, 0644);
621MODULE_PARM_DESC(marvell_enable, "Marvell SATA via AHCI (1 = enabled)");
622
623
613static inline int ahci_nr_ports(u32 cap) 624static inline int ahci_nr_ports(u32 cap)
614{ 625{
615 return (cap & 0x1f) + 1; 626 return (cap & 0x1f) + 1;
@@ -732,6 +743,8 @@ static void ahci_save_initial_config(struct pci_dev *pdev,
732 "MV_AHCI HACK: port_map %x -> %x\n", 743 "MV_AHCI HACK: port_map %x -> %x\n",
733 port_map, 744 port_map,
734 port_map & mv); 745 port_map & mv);
746 dev_printk(KERN_ERR, &pdev->dev,
747 "Disabling your PATA port. Use the boot option 'ahci.marvell_enable=0' to avoid this.\n");
735 748
736 port_map &= mv; 749 port_map &= mv;
737 } 750 }
@@ -2533,6 +2546,12 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
2533 if (!printed_version++) 2546 if (!printed_version++)
2534 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n"); 2547 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
2535 2548
2549 /* The AHCI driver can only drive the SATA ports, the PATA driver
2550 can drive them all so if both drivers are selected make sure
2551 AHCI stays out of the way */
2552 if (pdev->vendor == PCI_VENDOR_ID_MARVELL && !marvell_enable)
2553 return -ENODEV;
2554
2536 /* acquire resources */ 2555 /* acquire resources */
2537 rc = pcim_enable_device(pdev); 2556 rc = pcim_enable_device(pdev);
2538 if (rc) 2557 if (rc)
diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c
index b1d08a8f5003..e6b4606e36b6 100644
--- a/drivers/ata/ata_piix.c
+++ b/drivers/ata/ata_piix.c
@@ -1499,7 +1499,7 @@ static int __devinit piix_init_one(struct pci_dev *pdev,
1499 * off. 1499 * off.
1500 */ 1500 */
1501 if (pdev->vendor == PCI_VENDOR_ID_INTEL && pdev->device == 0x2652) { 1501 if (pdev->vendor == PCI_VENDOR_ID_INTEL && pdev->device == 0x2652) {
1502 int rc = piix_disable_ahci(pdev); 1502 rc = piix_disable_ahci(pdev);
1503 if (rc) 1503 if (rc)
1504 return rc; 1504 return rc;
1505 } 1505 }
diff --git a/drivers/ata/libata-sff.c b/drivers/ata/libata-sff.c
index 304fdc6f1dc2..2a4c516894f0 100644
--- a/drivers/ata/libata-sff.c
+++ b/drivers/ata/libata-sff.c
@@ -1315,11 +1315,6 @@ fsm_start:
1315 break; 1315 break;
1316 1316
1317 case HSM_ST_ERR: 1317 case HSM_ST_ERR:
1318 /* make sure qc->err_mask is available to
1319 * know what's wrong and recover
1320 */
1321 WARN_ON(!(qc->err_mask & (AC_ERR_DEV | AC_ERR_HSM)));
1322
1323 ap->hsm_task_state = HSM_ST_IDLE; 1318 ap->hsm_task_state = HSM_ST_IDLE;
1324 1319
1325 /* complete taskfile transaction */ 1320 /* complete taskfile transaction */
diff --git a/drivers/ata/pata_marvell.c b/drivers/ata/pata_marvell.c
index 24a011b25024..0d87eec84966 100644
--- a/drivers/ata/pata_marvell.c
+++ b/drivers/ata/pata_marvell.c
@@ -20,29 +20,30 @@
20#include <linux/ata.h> 20#include <linux/ata.h>
21 21
22#define DRV_NAME "pata_marvell" 22#define DRV_NAME "pata_marvell"
23#define DRV_VERSION "0.1.4" 23#define DRV_VERSION "0.1.6"
24 24
25/** 25/**
26 * marvell_pre_reset - check for 40/80 pin 26 * marvell_pata_active - check if PATA is active
27 * @link: link 27 * @pdev: PCI device
28 * @deadline: deadline jiffies for the operation
29 * 28 *
30 * Perform the PATA port setup we need. 29 * Returns 1 if the PATA port may be active. We know how to check this
30 * for the 6145 but not the other devices
31 */ 31 */
32 32
33static int marvell_pre_reset(struct ata_link *link, unsigned long deadline) 33static int marvell_pata_active(struct pci_dev *pdev)
34{ 34{
35 struct ata_port *ap = link->ap; 35 int i;
36 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
37 u32 devices; 36 u32 devices;
38 void __iomem *barp; 37 void __iomem *barp;
39 int i;
40 38
41 /* Check if our port is enabled */ 39 /* We don't yet know how to do this for other devices */
40 if (pdev->device != 0x6145)
41 return 1;
42 42
43 barp = pci_iomap(pdev, 5, 0x10); 43 barp = pci_iomap(pdev, 5, 0x10);
44 if (barp == NULL) 44 if (barp == NULL)
45 return -ENOMEM; 45 return -ENOMEM;
46
46 printk("BAR5:"); 47 printk("BAR5:");
47 for(i = 0; i <= 0x0F; i++) 48 for(i = 0; i <= 0x0F; i++)
48 printk("%02X:%02X ", i, ioread8(barp + i)); 49 printk("%02X:%02X ", i, ioread8(barp + i));
@@ -51,9 +52,27 @@ static int marvell_pre_reset(struct ata_link *link, unsigned long deadline)
51 devices = ioread32(barp + 0x0C); 52 devices = ioread32(barp + 0x0C);
52 pci_iounmap(pdev, barp); 53 pci_iounmap(pdev, barp);
53 54
54 if ((pdev->device == 0x6145) && (ap->port_no == 0) && 55 if (devices & 0x10)
55 (!(devices & 0x10))) /* PATA enable ? */ 56 return 1;
56 return -ENOENT; 57 return 0;
58}
59
60/**
61 * marvell_pre_reset - check for 40/80 pin
62 * @link: link
63 * @deadline: deadline jiffies for the operation
64 *
65 * Perform the PATA port setup we need.
66 */
67
68static int marvell_pre_reset(struct ata_link *link, unsigned long deadline)
69{
70 struct ata_port *ap = link->ap;
71 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
72
73 if (pdev->device == 0x6145 && ap->port_no == 0 &&
74 !marvell_pata_active(pdev)) /* PATA enable ? */
75 return -ENOENT;
57 76
58 return ata_sff_prereset(link, deadline); 77 return ata_sff_prereset(link, deadline);
59} 78}
@@ -128,6 +147,12 @@ static int marvell_init_one (struct pci_dev *pdev, const struct pci_device_id *i
128 if (pdev->device == 0x6101) 147 if (pdev->device == 0x6101)
129 ppi[1] = &ata_dummy_port_info; 148 ppi[1] = &ata_dummy_port_info;
130 149
150#if defined(CONFIG_AHCI) || defined(CONFIG_AHCI_MODULE)
151 if (!marvell_pata_active(pdev)) {
152 printk(KERN_INFO DRV_NAME ": PATA port not active, deferring to AHCI driver.\n");
153 return -ENODEV;
154 }
155#endif
131 return ata_pci_sff_init_one(pdev, ppi, &marvell_sht, NULL); 156 return ata_pci_sff_init_one(pdev, ppi, &marvell_sht, NULL);
132} 157}
133 158
diff --git a/drivers/ata/pata_sil680.c b/drivers/ata/pata_sil680.c
index 720b8645f58a..e970b227fbce 100644
--- a/drivers/ata/pata_sil680.c
+++ b/drivers/ata/pata_sil680.c
@@ -322,9 +322,6 @@ static int __devinit sil680_init_one(struct pci_dev *pdev,
322 /* Try to acquire MMIO resources and fallback to PIO if 322 /* Try to acquire MMIO resources and fallback to PIO if
323 * that fails 323 * that fails
324 */ 324 */
325 rc = pcim_enable_device(pdev);
326 if (rc)
327 return rc;
328 rc = pcim_iomap_regions(pdev, 1 << SIL680_MMIO_BAR, DRV_NAME); 325 rc = pcim_iomap_regions(pdev, 1 << SIL680_MMIO_BAR, DRV_NAME);
329 if (rc) 326 if (rc)
330 goto use_ioports; 327 goto use_ioports;
diff --git a/drivers/ata/sata_inic162x.c b/drivers/ata/sata_inic162x.c
index 3ead02fe379e..5032c32fa505 100644
--- a/drivers/ata/sata_inic162x.c
+++ b/drivers/ata/sata_inic162x.c
@@ -96,6 +96,7 @@ enum {
96 PORT_SCR = 0x20, 96 PORT_SCR = 0x20,
97 97
98 /* HOST_CTL bits */ 98 /* HOST_CTL bits */
99 HCTL_LEDEN = (1 << 3), /* enable LED operation */
99 HCTL_IRQOFF = (1 << 8), /* global IRQ off */ 100 HCTL_IRQOFF = (1 << 8), /* global IRQ off */
100 HCTL_FTHD0 = (1 << 10), /* fifo threshold 0 */ 101 HCTL_FTHD0 = (1 << 10), /* fifo threshold 0 */
101 HCTL_FTHD1 = (1 << 11), /* fifo threshold 1*/ 102 HCTL_FTHD1 = (1 << 11), /* fifo threshold 1*/
@@ -540,7 +541,7 @@ static unsigned int inic_qc_issue(struct ata_queued_cmd *qc)
540 void __iomem *port_base = inic_port_base(ap); 541 void __iomem *port_base = inic_port_base(ap);
541 542
542 /* fire up the ADMA engine */ 543 /* fire up the ADMA engine */
543 writew(HCTL_FTHD0, port_base + HOST_CTL); 544 writew(HCTL_FTHD0 | HCTL_LEDEN, port_base + HOST_CTL);
544 writew(IDMA_CTL_GO, port_base + PORT_IDMA_CTL); 545 writew(IDMA_CTL_GO, port_base + PORT_IDMA_CTL);
545 writeb(0, port_base + PORT_CPB_PTQFIFO); 546 writeb(0, port_base + PORT_CPB_PTQFIFO);
546 547
diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c
index 13c1d2af18ac..c815f8ecf6e6 100644
--- a/drivers/ata/sata_mv.c
+++ b/drivers/ata/sata_mv.c
@@ -667,7 +667,8 @@ static const struct pci_device_id mv_pci_tbl[] = {
667 { PCI_VDEVICE(MARVELL, 0x5041), chip_504x }, 667 { PCI_VDEVICE(MARVELL, 0x5041), chip_504x },
668 { PCI_VDEVICE(MARVELL, 0x5080), chip_5080 }, 668 { PCI_VDEVICE(MARVELL, 0x5080), chip_5080 },
669 { PCI_VDEVICE(MARVELL, 0x5081), chip_508x }, 669 { PCI_VDEVICE(MARVELL, 0x5081), chip_508x },
670 /* RocketRAID 1740/174x have different identifiers */ 670 /* RocketRAID 1720/174x have different identifiers */
671 { PCI_VDEVICE(TTI, 0x1720), chip_6042 },
671 { PCI_VDEVICE(TTI, 0x1740), chip_508x }, 672 { PCI_VDEVICE(TTI, 0x1740), chip_508x },
672 { PCI_VDEVICE(TTI, 0x1742), chip_508x }, 673 { PCI_VDEVICE(TTI, 0x1742), chip_508x },
673 674
diff --git a/drivers/ata/sata_nv.c b/drivers/ata/sata_nv.c
index 858f70610eda..1e1f3f3757ae 100644
--- a/drivers/ata/sata_nv.c
+++ b/drivers/ata/sata_nv.c
@@ -309,8 +309,6 @@ static void nv_nf2_freeze(struct ata_port *ap);
309static void nv_nf2_thaw(struct ata_port *ap); 309static void nv_nf2_thaw(struct ata_port *ap);
310static void nv_ck804_freeze(struct ata_port *ap); 310static void nv_ck804_freeze(struct ata_port *ap);
311static void nv_ck804_thaw(struct ata_port *ap); 311static void nv_ck804_thaw(struct ata_port *ap);
312static int nv_hardreset(struct ata_link *link, unsigned int *class,
313 unsigned long deadline);
314static int nv_adma_slave_config(struct scsi_device *sdev); 312static int nv_adma_slave_config(struct scsi_device *sdev);
315static int nv_adma_check_atapi_dma(struct ata_queued_cmd *qc); 313static int nv_adma_check_atapi_dma(struct ata_queued_cmd *qc);
316static void nv_adma_qc_prep(struct ata_queued_cmd *qc); 314static void nv_adma_qc_prep(struct ata_queued_cmd *qc);
@@ -407,7 +405,7 @@ static struct scsi_host_template nv_swncq_sht = {
407 405
408static struct ata_port_operations nv_generic_ops = { 406static struct ata_port_operations nv_generic_ops = {
409 .inherits = &ata_bmdma_port_ops, 407 .inherits = &ata_bmdma_port_ops,
410 .hardreset = nv_hardreset, 408 .hardreset = ATA_OP_NULL,
411 .scr_read = nv_scr_read, 409 .scr_read = nv_scr_read,
412 .scr_write = nv_scr_write, 410 .scr_write = nv_scr_write,
413}; 411};
@@ -1588,21 +1586,6 @@ static void nv_mcp55_thaw(struct ata_port *ap)
1588 ata_sff_thaw(ap); 1586 ata_sff_thaw(ap);
1589} 1587}
1590 1588
1591static int nv_hardreset(struct ata_link *link, unsigned int *class,
1592 unsigned long deadline)
1593{
1594 int rc;
1595
1596 /* SATA hardreset fails to retrieve proper device signature on
1597 * some controllers. Request follow up SRST. For more info,
1598 * see http://bugzilla.kernel.org/show_bug.cgi?id=3352
1599 */
1600 rc = sata_sff_hardreset(link, class, deadline);
1601 if (rc)
1602 return rc;
1603 return -EAGAIN;
1604}
1605
1606static void nv_adma_error_handler(struct ata_port *ap) 1589static void nv_adma_error_handler(struct ata_port *ap)
1607{ 1590{
1608 struct nv_adma_port_priv *pp = ap->private_data; 1591 struct nv_adma_port_priv *pp = ap->private_data;