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-rw-r--r--drivers/ata/ahci.c72
-rw-r--r--drivers/ata/ata_piix.c27
-rw-r--r--drivers/ata/libata-core.c4
-rw-r--r--drivers/ata/libata-eh.c34
-rw-r--r--drivers/ata/libata-scsi.c38
-rw-r--r--drivers/ata/pata_ali.c17
-rw-r--r--drivers/ata/pata_efar.c17
-rw-r--r--drivers/ata/pata_legacy.c2
-rw-r--r--drivers/ata/pata_netcell.c13
-rw-r--r--drivers/ata/pata_pdc202xx_old.c6
-rw-r--r--drivers/ata/sata_fsl.c15
-rw-r--r--drivers/ata/sata_mv.c69
-rw-r--r--drivers/ata/sata_sx4.c180
13 files changed, 397 insertions, 97 deletions
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index 08186ecbaf8d..6b91c26a4635 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -220,6 +220,7 @@ enum {
220 AHCI_HFLAG_NO_HOTPLUG = (1 << 7), /* ignore PxSERR.DIAG.N */ 220 AHCI_HFLAG_NO_HOTPLUG = (1 << 7), /* ignore PxSERR.DIAG.N */
221 AHCI_HFLAG_SECT255 = (1 << 8), /* max 255 sectors */ 221 AHCI_HFLAG_SECT255 = (1 << 8), /* max 255 sectors */
222 AHCI_HFLAG_YES_NCQ = (1 << 9), /* force NCQ cap on */ 222 AHCI_HFLAG_YES_NCQ = (1 << 9), /* force NCQ cap on */
223 AHCI_HFLAG_NO_SUSPEND = (1 << 10), /* don't suspend */
223 224
224 /* ap->flags bits */ 225 /* ap->flags bits */
225 226
@@ -2316,9 +2317,17 @@ static int ahci_port_suspend(struct ata_port *ap, pm_message_t mesg)
2316static int ahci_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg) 2317static int ahci_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
2317{ 2318{
2318 struct ata_host *host = dev_get_drvdata(&pdev->dev); 2319 struct ata_host *host = dev_get_drvdata(&pdev->dev);
2320 struct ahci_host_priv *hpriv = host->private_data;
2319 void __iomem *mmio = host->iomap[AHCI_PCI_BAR]; 2321 void __iomem *mmio = host->iomap[AHCI_PCI_BAR];
2320 u32 ctl; 2322 u32 ctl;
2321 2323
2324 if (mesg.event & PM_EVENT_SUSPEND &&
2325 hpriv->flags & AHCI_HFLAG_NO_SUSPEND) {
2326 dev_printk(KERN_ERR, &pdev->dev,
2327 "BIOS update required for suspend/resume\n");
2328 return -EIO;
2329 }
2330
2322 if (mesg.event & PM_EVENT_SLEEP) { 2331 if (mesg.event & PM_EVENT_SLEEP) {
2323 /* AHCI spec rev1.1 section 8.3.3: 2332 /* AHCI spec rev1.1 section 8.3.3:
2324 * Software must disable interrupts prior to requesting a 2333 * Software must disable interrupts prior to requesting a
@@ -2610,6 +2619,63 @@ static bool ahci_broken_system_poweroff(struct pci_dev *pdev)
2610 return false; 2619 return false;
2611} 2620}
2612 2621
2622static bool ahci_broken_suspend(struct pci_dev *pdev)
2623{
2624 static const struct dmi_system_id sysids[] = {
2625 /*
2626 * On HP dv[4-6] and HDX18 with earlier BIOSen, link
2627 * to the harddisk doesn't become online after
2628 * resuming from STR. Warn and fail suspend.
2629 */
2630 {
2631 .ident = "dv4",
2632 .matches = {
2633 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
2634 DMI_MATCH(DMI_PRODUCT_NAME,
2635 "HP Pavilion dv4 Notebook PC"),
2636 },
2637 .driver_data = "F.30", /* cutoff BIOS version */
2638 },
2639 {
2640 .ident = "dv5",
2641 .matches = {
2642 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
2643 DMI_MATCH(DMI_PRODUCT_NAME,
2644 "HP Pavilion dv5 Notebook PC"),
2645 },
2646 .driver_data = "F.16", /* cutoff BIOS version */
2647 },
2648 {
2649 .ident = "dv6",
2650 .matches = {
2651 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
2652 DMI_MATCH(DMI_PRODUCT_NAME,
2653 "HP Pavilion dv6 Notebook PC"),
2654 },
2655 .driver_data = "F.21", /* cutoff BIOS version */
2656 },
2657 {
2658 .ident = "HDX18",
2659 .matches = {
2660 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
2661 DMI_MATCH(DMI_PRODUCT_NAME,
2662 "HP HDX18 Notebook PC"),
2663 },
2664 .driver_data = "F.23", /* cutoff BIOS version */
2665 },
2666 { } /* terminate list */
2667 };
2668 const struct dmi_system_id *dmi = dmi_first_match(sysids);
2669 const char *ver;
2670
2671 if (!dmi || pdev->bus->number || pdev->devfn != PCI_DEVFN(0x1f, 2))
2672 return false;
2673
2674 ver = dmi_get_system_info(DMI_BIOS_VERSION);
2675
2676 return !ver || strcmp(ver, dmi->driver_data) < 0;
2677}
2678
2613static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 2679static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
2614{ 2680{
2615 static int printed_version; 2681 static int printed_version;
@@ -2715,6 +2781,12 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
2715 "quirky BIOS, skipping spindown on poweroff\n"); 2781 "quirky BIOS, skipping spindown on poweroff\n");
2716 } 2782 }
2717 2783
2784 if (ahci_broken_suspend(pdev)) {
2785 hpriv->flags |= AHCI_HFLAG_NO_SUSPEND;
2786 dev_printk(KERN_WARNING, &pdev->dev,
2787 "BIOS update required for suspend/resume\n");
2788 }
2789
2718 /* CAP.NP sometimes indicate the index of the last enabled 2790 /* CAP.NP sometimes indicate the index of the last enabled
2719 * port, at other times, that of the last possible port, so 2791 * port, at other times, that of the last possible port, so
2720 * determining the maximum port number requires looking at 2792 * determining the maximum port number requires looking at
diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c
index 942d14ac8792..1aeb7082b0c4 100644
--- a/drivers/ata/ata_piix.c
+++ b/drivers/ata/ata_piix.c
@@ -72,6 +72,7 @@
72 * ICH2 spec c #20 - IDE PRD must not cross a 64K boundary 72 * ICH2 spec c #20 - IDE PRD must not cross a 64K boundary
73 * and must be dword aligned 73 * and must be dword aligned
74 * ICH2 spec c #24 - UDMA mode 4,5 t85/86 should be 6ns not 3.3 74 * ICH2 spec c #24 - UDMA mode 4,5 t85/86 should be 6ns not 3.3
75 * ICH7 errata #16 - MWDMA1 timings are incorrect
75 * 76 *
76 * Should have been BIOS fixed: 77 * Should have been BIOS fixed:
77 * 450NX: errata #19 - DMA hangs on old 450NX 78 * 450NX: errata #19 - DMA hangs on old 450NX
@@ -94,7 +95,7 @@
94#include <linux/dmi.h> 95#include <linux/dmi.h>
95 96
96#define DRV_NAME "ata_piix" 97#define DRV_NAME "ata_piix"
97#define DRV_VERSION "2.12" 98#define DRV_VERSION "2.13"
98 99
99enum { 100enum {
100 PIIX_IOCFG = 0x54, /* IDE I/O configuration register */ 101 PIIX_IOCFG = 0x54, /* IDE I/O configuration register */
@@ -136,6 +137,7 @@ enum piix_controller_ids {
136 ich_pata_33, /* ICH up to UDMA 33 only */ 137 ich_pata_33, /* ICH up to UDMA 33 only */
137 ich_pata_66, /* ICH up to 66 Mhz */ 138 ich_pata_66, /* ICH up to 66 Mhz */
138 ich_pata_100, /* ICH up to UDMA 100 */ 139 ich_pata_100, /* ICH up to UDMA 100 */
140 ich_pata_100_nomwdma1, /* ICH up to UDMA 100 but with no MWDMA1*/
139 ich5_sata, 141 ich5_sata,
140 ich6_sata, 142 ich6_sata,
141 ich6m_sata, 143 ich6m_sata,
@@ -216,8 +218,8 @@ static const struct pci_device_id piix_pci_tbl[] = {
216 /* ICH6 (and 6) (i915) UDMA 100 */ 218 /* ICH6 (and 6) (i915) UDMA 100 */
217 { 0x8086, 0x266F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 }, 219 { 0x8086, 0x266F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
218 /* ICH7/7-R (i945, i975) UDMA 100*/ 220 /* ICH7/7-R (i945, i975) UDMA 100*/
219 { 0x8086, 0x27DF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 }, 221 { 0x8086, 0x27DF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100_nomwdma1 },
220 { 0x8086, 0x269E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 }, 222 { 0x8086, 0x269E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100_nomwdma1 },
221 /* ICH8 Mobile PATA Controller */ 223 /* ICH8 Mobile PATA Controller */
222 { 0x8086, 0x2850, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 }, 224 { 0x8086, 0x2850, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
223 225
@@ -487,6 +489,15 @@ static struct ata_port_info piix_port_info[] = {
487 .port_ops = &ich_pata_ops, 489 .port_ops = &ich_pata_ops,
488 }, 490 },
489 491
492 [ich_pata_100_nomwdma1] =
493 {
494 .flags = PIIX_PATA_FLAGS | PIIX_FLAG_CHECKINTR,
495 .pio_mask = ATA_PIO4,
496 .mwdma_mask = ATA_MWDMA2_ONLY,
497 .udma_mask = ATA_UDMA5,
498 .port_ops = &ich_pata_ops,
499 },
500
490 [ich5_sata] = 501 [ich5_sata] =
491 { 502 {
492 .flags = PIIX_SATA_FLAGS, 503 .flags = PIIX_SATA_FLAGS,
@@ -594,6 +605,7 @@ static const struct ich_laptop ich_laptop[] = {
594 { 0x24CA, 0x1025, 0x003d }, /* ICH4 on ACER TM290 */ 605 { 0x24CA, 0x1025, 0x003d }, /* ICH4 on ACER TM290 */
595 { 0x266F, 0x1025, 0x0066 }, /* ICH6 on ACER Aspire 1694WLMi */ 606 { 0x266F, 0x1025, 0x0066 }, /* ICH6 on ACER Aspire 1694WLMi */
596 { 0x2653, 0x1043, 0x82D8 }, /* ICH6M on Asus Eee 701 */ 607 { 0x2653, 0x1043, 0x82D8 }, /* ICH6M on Asus Eee 701 */
608 { 0x27df, 0x104d, 0x900e }, /* ICH7 on Sony TZ-90 */
597 /* end marker */ 609 /* end marker */
598 { 0, } 610 { 0, }
599}; 611};
@@ -1443,6 +1455,15 @@ static bool piix_broken_system_poweroff(struct pci_dev *pdev)
1443 /* PCI slot number of the controller */ 1455 /* PCI slot number of the controller */
1444 .driver_data = (void *)0x1FUL, 1456 .driver_data = (void *)0x1FUL,
1445 }, 1457 },
1458 {
1459 .ident = "HP Compaq nc6000",
1460 .matches = {
1461 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
1462 DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nc6000"),
1463 },
1464 /* PCI slot number of the controller */
1465 .driver_data = (void *)0x1FUL,
1466 },
1446 1467
1447 { } /* terminate list */ 1468 { } /* terminate list */
1448 }; 1469 };
diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c
index 17c5d48a75d2..c9242301cfa1 100644
--- a/drivers/ata/libata-core.c
+++ b/drivers/ata/libata-core.c
@@ -4091,7 +4091,9 @@ int ata_dev_revalidate(struct ata_device *dev, unsigned int new_class,
4091 4091
4092 /* fail early if !ATA && !ATAPI to avoid issuing [P]IDENTIFY to PMP */ 4092 /* fail early if !ATA && !ATAPI to avoid issuing [P]IDENTIFY to PMP */
4093 if (ata_class_enabled(new_class) && 4093 if (ata_class_enabled(new_class) &&
4094 new_class != ATA_DEV_ATA && new_class != ATA_DEV_ATAPI) { 4094 new_class != ATA_DEV_ATA &&
4095 new_class != ATA_DEV_ATAPI &&
4096 new_class != ATA_DEV_SEMB) {
4095 ata_dev_printk(dev, KERN_INFO, "class mismatch %u != %u\n", 4097 ata_dev_printk(dev, KERN_INFO, "class mismatch %u != %u\n",
4096 dev->class, new_class); 4098 dev->class, new_class);
4097 rc = -ENODEV; 4099 rc = -ENODEV;
diff --git a/drivers/ata/libata-eh.c b/drivers/ata/libata-eh.c
index 01831312c360..94919ad03df1 100644
--- a/drivers/ata/libata-eh.c
+++ b/drivers/ata/libata-eh.c
@@ -2783,6 +2783,12 @@ static int ata_eh_revalidate_and_attach(struct ata_link *link,
2783 } else if (dev->class == ATA_DEV_UNKNOWN && 2783 } else if (dev->class == ATA_DEV_UNKNOWN &&
2784 ehc->tries[dev->devno] && 2784 ehc->tries[dev->devno] &&
2785 ata_class_enabled(ehc->classes[dev->devno])) { 2785 ata_class_enabled(ehc->classes[dev->devno])) {
2786 /* Temporarily set dev->class, it will be
2787 * permanently set once all configurations are
2788 * complete. This is necessary because new
2789 * device configuration is done in two
2790 * separate loops.
2791 */
2786 dev->class = ehc->classes[dev->devno]; 2792 dev->class = ehc->classes[dev->devno];
2787 2793
2788 if (dev->class == ATA_DEV_PMP) 2794 if (dev->class == ATA_DEV_PMP)
@@ -2790,6 +2796,11 @@ static int ata_eh_revalidate_and_attach(struct ata_link *link,
2790 else 2796 else
2791 rc = ata_dev_read_id(dev, &dev->class, 2797 rc = ata_dev_read_id(dev, &dev->class,
2792 readid_flags, dev->id); 2798 readid_flags, dev->id);
2799
2800 /* read_id might have changed class, store and reset */
2801 ehc->classes[dev->devno] = dev->class;
2802 dev->class = ATA_DEV_UNKNOWN;
2803
2793 switch (rc) { 2804 switch (rc) {
2794 case 0: 2805 case 0:
2795 /* clear error info accumulated during probe */ 2806 /* clear error info accumulated during probe */
@@ -2799,13 +2810,11 @@ static int ata_eh_revalidate_and_attach(struct ata_link *link,
2799 case -ENOENT: 2810 case -ENOENT:
2800 /* IDENTIFY was issued to non-existent 2811 /* IDENTIFY was issued to non-existent
2801 * device. No need to reset. Just 2812 * device. No need to reset. Just
2802 * thaw and kill the device. 2813 * thaw and ignore the device.
2803 */ 2814 */
2804 ata_eh_thaw_port(ap); 2815 ata_eh_thaw_port(ap);
2805 dev->class = ATA_DEV_UNKNOWN;
2806 break; 2816 break;
2807 default: 2817 default:
2808 dev->class = ATA_DEV_UNKNOWN;
2809 goto err; 2818 goto err;
2810 } 2819 }
2811 } 2820 }
@@ -2826,11 +2835,15 @@ static int ata_eh_revalidate_and_attach(struct ata_link *link,
2826 dev->class == ATA_DEV_PMP) 2835 dev->class == ATA_DEV_PMP)
2827 continue; 2836 continue;
2828 2837
2838 dev->class = ehc->classes[dev->devno];
2839
2829 ehc->i.flags |= ATA_EHI_PRINTINFO; 2840 ehc->i.flags |= ATA_EHI_PRINTINFO;
2830 rc = ata_dev_configure(dev); 2841 rc = ata_dev_configure(dev);
2831 ehc->i.flags &= ~ATA_EHI_PRINTINFO; 2842 ehc->i.flags &= ~ATA_EHI_PRINTINFO;
2832 if (rc) 2843 if (rc) {
2844 dev->class = ATA_DEV_UNKNOWN;
2833 goto err; 2845 goto err;
2846 }
2834 2847
2835 spin_lock_irqsave(ap->lock, flags); 2848 spin_lock_irqsave(ap->lock, flags);
2836 ap->pflags |= ATA_PFLAG_SCSI_HOTPLUG; 2849 ap->pflags |= ATA_PFLAG_SCSI_HOTPLUG;
@@ -3494,6 +3507,8 @@ static void ata_eh_handle_port_suspend(struct ata_port *ap)
3494 */ 3507 */
3495static void ata_eh_handle_port_resume(struct ata_port *ap) 3508static void ata_eh_handle_port_resume(struct ata_port *ap)
3496{ 3509{
3510 struct ata_link *link;
3511 struct ata_device *dev;
3497 unsigned long flags; 3512 unsigned long flags;
3498 int rc = 0; 3513 int rc = 0;
3499 3514
@@ -3508,6 +3523,17 @@ static void ata_eh_handle_port_resume(struct ata_port *ap)
3508 3523
3509 WARN_ON(!(ap->pflags & ATA_PFLAG_SUSPENDED)); 3524 WARN_ON(!(ap->pflags & ATA_PFLAG_SUSPENDED));
3510 3525
3526 /*
3527 * Error timestamps are in jiffies which doesn't run while
3528 * suspended and PHY events during resume isn't too uncommon.
3529 * When the two are combined, it can lead to unnecessary speed
3530 * downs if the machine is suspended and resumed repeatedly.
3531 * Clear error history.
3532 */
3533 ata_for_each_link(link, ap, HOST_FIRST)
3534 ata_for_each_dev(dev, link, ALL)
3535 ata_ering_clear(&dev->ering);
3536
3511 ata_acpi_set_state(ap, PMSG_ON); 3537 ata_acpi_set_state(ap, PMSG_ON);
3512 3538
3513 if (ap->ops->port_resume) 3539 if (ap->ops->port_resume)
diff --git a/drivers/ata/libata-scsi.c b/drivers/ata/libata-scsi.c
index 2733b0c90b75..342316064e9f 100644
--- a/drivers/ata/libata-scsi.c
+++ b/drivers/ata/libata-scsi.c
@@ -313,7 +313,7 @@ ata_scsi_em_message_show(struct device *dev, struct device_attribute *attr,
313 return ap->ops->em_show(ap, buf); 313 return ap->ops->em_show(ap, buf);
314 return -EINVAL; 314 return -EINVAL;
315} 315}
316DEVICE_ATTR(em_message, S_IRUGO | S_IWUGO, 316DEVICE_ATTR(em_message, S_IRUGO | S_IWUSR,
317 ata_scsi_em_message_show, ata_scsi_em_message_store); 317 ata_scsi_em_message_show, ata_scsi_em_message_store);
318EXPORT_SYMBOL_GPL(dev_attr_em_message); 318EXPORT_SYMBOL_GPL(dev_attr_em_message);
319 319
@@ -366,7 +366,7 @@ ata_scsi_activity_store(struct device *dev, struct device_attribute *attr,
366 } 366 }
367 return -EINVAL; 367 return -EINVAL;
368} 368}
369DEVICE_ATTR(sw_activity, S_IWUGO | S_IRUGO, ata_scsi_activity_show, 369DEVICE_ATTR(sw_activity, S_IWUSR | S_IRUGO, ata_scsi_activity_show,
370 ata_scsi_activity_store); 370 ata_scsi_activity_store);
371EXPORT_SYMBOL_GPL(dev_attr_sw_activity); 371EXPORT_SYMBOL_GPL(dev_attr_sw_activity);
372 372
@@ -2142,13 +2142,14 @@ static unsigned int ata_scsiop_inq_89(struct ata_scsi_args *args, u8 *rbuf)
2142 2142
2143static unsigned int ata_scsiop_inq_b1(struct ata_scsi_args *args, u8 *rbuf) 2143static unsigned int ata_scsiop_inq_b1(struct ata_scsi_args *args, u8 *rbuf)
2144{ 2144{
2145 int form_factor = ata_id_form_factor(args->id);
2146 int media_rotation_rate = ata_id_rotation_rate(args->id);
2147
2145 rbuf[1] = 0xb1; 2148 rbuf[1] = 0xb1;
2146 rbuf[3] = 0x3c; 2149 rbuf[3] = 0x3c;
2147 if (ata_id_major_version(args->id) > 7) { 2150 rbuf[4] = media_rotation_rate >> 8;
2148 rbuf[4] = args->id[217] >> 8; 2151 rbuf[5] = media_rotation_rate;
2149 rbuf[5] = args->id[217]; 2152 rbuf[7] = form_factor;
2150 rbuf[7] = args->id[168] & 0xf;
2151 }
2152 2153
2153 return 0; 2154 return 0;
2154} 2155}
@@ -2376,7 +2377,23 @@ saving_not_supp:
2376 */ 2377 */
2377static unsigned int ata_scsiop_read_cap(struct ata_scsi_args *args, u8 *rbuf) 2378static unsigned int ata_scsiop_read_cap(struct ata_scsi_args *args, u8 *rbuf)
2378{ 2379{
2379 u64 last_lba = args->dev->n_sectors - 1; /* LBA of the last block */ 2380 struct ata_device *dev = args->dev;
2381 u64 last_lba = dev->n_sectors - 1; /* LBA of the last block */
2382 u8 log_per_phys = 0;
2383 u16 lowest_aligned = 0;
2384 u16 word_106 = dev->id[106];
2385 u16 word_209 = dev->id[209];
2386
2387 if ((word_106 & 0xc000) == 0x4000) {
2388 /* Number and offset of logical sectors per physical sector */
2389 if (word_106 & (1 << 13))
2390 log_per_phys = word_106 & 0xf;
2391 if ((word_209 & 0xc000) == 0x4000) {
2392 u16 first = dev->id[209] & 0x3fff;
2393 if (first > 0)
2394 lowest_aligned = (1 << log_per_phys) - first;
2395 }
2396 }
2380 2397
2381 VPRINTK("ENTER\n"); 2398 VPRINTK("ENTER\n");
2382 2399
@@ -2407,6 +2424,11 @@ static unsigned int ata_scsiop_read_cap(struct ata_scsi_args *args, u8 *rbuf)
2407 /* sector size */ 2424 /* sector size */
2408 rbuf[10] = ATA_SECT_SIZE >> 8; 2425 rbuf[10] = ATA_SECT_SIZE >> 8;
2409 rbuf[11] = ATA_SECT_SIZE & 0xff; 2426 rbuf[11] = ATA_SECT_SIZE & 0xff;
2427
2428 rbuf[12] = 0;
2429 rbuf[13] = log_per_phys;
2430 rbuf[14] = (lowest_aligned >> 8) & 0x3f;
2431 rbuf[15] = lowest_aligned;
2410 } 2432 }
2411 2433
2412 return 0; 2434 return 0;
diff --git a/drivers/ata/pata_ali.c b/drivers/ata/pata_ali.c
index 751b7ea4816c..fc9c5d6d7d80 100644
--- a/drivers/ata/pata_ali.c
+++ b/drivers/ata/pata_ali.c
@@ -497,14 +497,16 @@ static int ali_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
497 }; 497 };
498 /* Revision 0x20 added DMA */ 498 /* Revision 0x20 added DMA */
499 static const struct ata_port_info info_20 = { 499 static const struct ata_port_info info_20 = {
500 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48, 500 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48 |
501 ATA_FLAG_IGN_SIMPLEX,
501 .pio_mask = ATA_PIO4, 502 .pio_mask = ATA_PIO4,
502 .mwdma_mask = ATA_MWDMA2, 503 .mwdma_mask = ATA_MWDMA2,
503 .port_ops = &ali_20_port_ops 504 .port_ops = &ali_20_port_ops
504 }; 505 };
505 /* Revision 0x20 with support logic added UDMA */ 506 /* Revision 0x20 with support logic added UDMA */
506 static const struct ata_port_info info_20_udma = { 507 static const struct ata_port_info info_20_udma = {
507 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48, 508 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48 |
509 ATA_FLAG_IGN_SIMPLEX,
508 .pio_mask = ATA_PIO4, 510 .pio_mask = ATA_PIO4,
509 .mwdma_mask = ATA_MWDMA2, 511 .mwdma_mask = ATA_MWDMA2,
510 .udma_mask = ATA_UDMA2, 512 .udma_mask = ATA_UDMA2,
@@ -512,7 +514,8 @@ static int ali_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
512 }; 514 };
513 /* Revision 0xC2 adds UDMA66 */ 515 /* Revision 0xC2 adds UDMA66 */
514 static const struct ata_port_info info_c2 = { 516 static const struct ata_port_info info_c2 = {
515 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48, 517 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48 |
518 ATA_FLAG_IGN_SIMPLEX,
516 .pio_mask = ATA_PIO4, 519 .pio_mask = ATA_PIO4,
517 .mwdma_mask = ATA_MWDMA2, 520 .mwdma_mask = ATA_MWDMA2,
518 .udma_mask = ATA_UDMA4, 521 .udma_mask = ATA_UDMA4,
@@ -520,7 +523,8 @@ static int ali_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
520 }; 523 };
521 /* Revision 0xC3 is UDMA66 for now */ 524 /* Revision 0xC3 is UDMA66 for now */
522 static const struct ata_port_info info_c3 = { 525 static const struct ata_port_info info_c3 = {
523 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48, 526 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48 |
527 ATA_FLAG_IGN_SIMPLEX,
524 .pio_mask = ATA_PIO4, 528 .pio_mask = ATA_PIO4,
525 .mwdma_mask = ATA_MWDMA2, 529 .mwdma_mask = ATA_MWDMA2,
526 .udma_mask = ATA_UDMA4, 530 .udma_mask = ATA_UDMA4,
@@ -528,7 +532,8 @@ static int ali_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
528 }; 532 };
529 /* Revision 0xC4 is UDMA100 */ 533 /* Revision 0xC4 is UDMA100 */
530 static const struct ata_port_info info_c4 = { 534 static const struct ata_port_info info_c4 = {
531 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48, 535 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48 |
536 ATA_FLAG_IGN_SIMPLEX,
532 .pio_mask = ATA_PIO4, 537 .pio_mask = ATA_PIO4,
533 .mwdma_mask = ATA_MWDMA2, 538 .mwdma_mask = ATA_MWDMA2,
534 .udma_mask = ATA_UDMA5, 539 .udma_mask = ATA_UDMA5,
@@ -536,7 +541,7 @@ static int ali_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
536 }; 541 };
537 /* Revision 0xC5 is UDMA133 with LBA48 DMA */ 542 /* Revision 0xC5 is UDMA133 with LBA48 DMA */
538 static const struct ata_port_info info_c5 = { 543 static const struct ata_port_info info_c5 = {
539 .flags = ATA_FLAG_SLAVE_POSS, 544 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_IGN_SIMPLEX,
540 .pio_mask = ATA_PIO4, 545 .pio_mask = ATA_PIO4,
541 .mwdma_mask = ATA_MWDMA2, 546 .mwdma_mask = ATA_MWDMA2,
542 .udma_mask = ATA_UDMA6, 547 .udma_mask = ATA_UDMA6,
diff --git a/drivers/ata/pata_efar.c b/drivers/ata/pata_efar.c
index 2085e0a3a05a..2a6412f5d117 100644
--- a/drivers/ata/pata_efar.c
+++ b/drivers/ata/pata_efar.c
@@ -22,7 +22,7 @@
22#include <linux/ata.h> 22#include <linux/ata.h>
23 23
24#define DRV_NAME "pata_efar" 24#define DRV_NAME "pata_efar"
25#define DRV_VERSION "0.4.4" 25#define DRV_VERSION "0.4.5"
26 26
27/** 27/**
28 * efar_pre_reset - Enable bits 28 * efar_pre_reset - Enable bits
@@ -98,18 +98,17 @@ static void efar_set_piomode (struct ata_port *ap, struct ata_device *adev)
98 { 2, 1 }, 98 { 2, 1 },
99 { 2, 3 }, }; 99 { 2, 3 }, };
100 100
101 if (pio > 2) 101 if (pio > 1)
102 control |= 1; /* TIME1 enable */ 102 control |= 1; /* TIME */
103 if (ata_pio_need_iordy(adev)) /* PIO 3/4 require IORDY */ 103 if (ata_pio_need_iordy(adev)) /* PIO 3/4 require IORDY */
104 control |= 2; /* IE enable */ 104 control |= 2; /* IE */
105 /* Intel specifies that the PPE functionality is for disk only */ 105 /* Intel specifies that the prefetch/posting is for disk only */
106 if (adev->class == ATA_DEV_ATA) 106 if (adev->class == ATA_DEV_ATA)
107 control |= 4; /* PPE enable */ 107 control |= 4; /* PPE */
108 108
109 pci_read_config_word(dev, idetm_port, &idetm_data); 109 pci_read_config_word(dev, idetm_port, &idetm_data);
110 110
111 /* Enable PPE, IE and TIME as appropriate */ 111 /* Set PPE, IE, and TIME as appropriate */
112
113 if (adev->devno == 0) { 112 if (adev->devno == 0) {
114 idetm_data &= 0xCCF0; 113 idetm_data &= 0xCCF0;
115 idetm_data |= control; 114 idetm_data |= control;
@@ -129,7 +128,7 @@ static void efar_set_piomode (struct ata_port *ap, struct ata_device *adev)
129 pci_write_config_byte(dev, 0x44, slave_data); 128 pci_write_config_byte(dev, 0x44, slave_data);
130 } 129 }
131 130
132 idetm_data |= 0x4000; /* Ensure SITRE is enabled */ 131 idetm_data |= 0x4000; /* Ensure SITRE is set */
133 pci_write_config_word(dev, idetm_port, idetm_data); 132 pci_write_config_word(dev, idetm_port, idetm_data);
134} 133}
135 134
diff --git a/drivers/ata/pata_legacy.c b/drivers/ata/pata_legacy.c
index f72c6c5b820f..6932e56d179c 100644
--- a/drivers/ata/pata_legacy.c
+++ b/drivers/ata/pata_legacy.c
@@ -48,6 +48,7 @@
48 * 48 *
49 */ 49 */
50 50
51#include <linux/async.h>
51#include <linux/kernel.h> 52#include <linux/kernel.h>
52#include <linux/module.h> 53#include <linux/module.h>
53#include <linux/pci.h> 54#include <linux/pci.h>
@@ -1028,6 +1029,7 @@ static __init int legacy_init_one(struct legacy_probe *probe)
1028 &legacy_sht); 1029 &legacy_sht);
1029 if (ret) 1030 if (ret)
1030 goto fail; 1031 goto fail;
1032 async_synchronize_full();
1031 ld->platform_dev = pdev; 1033 ld->platform_dev = pdev;
1032 1034
1033 /* Nothing found means we drop the port as its probably not there */ 1035 /* Nothing found means we drop the port as its probably not there */
diff --git a/drivers/ata/pata_netcell.c b/drivers/ata/pata_netcell.c
index bdb236957cb9..f0d52f72f5bb 100644
--- a/drivers/ata/pata_netcell.c
+++ b/drivers/ata/pata_netcell.c
@@ -20,13 +20,24 @@
20 20
21/* No PIO or DMA methods needed for this device */ 21/* No PIO or DMA methods needed for this device */
22 22
23static unsigned int netcell_read_id(struct ata_device *adev,
24 struct ata_taskfile *tf, u16 *id)
25{
26 unsigned int err_mask = ata_do_dev_read_id(adev, tf, id);
27 /* Firmware forgets to mark words 85-87 valid */
28 if (err_mask == 0)
29 id[ATA_ID_CSF_DEFAULT] |= 0x4000;
30 return err_mask;
31}
32
23static struct scsi_host_template netcell_sht = { 33static struct scsi_host_template netcell_sht = {
24 ATA_BMDMA_SHT(DRV_NAME), 34 ATA_BMDMA_SHT(DRV_NAME),
25}; 35};
26 36
27static struct ata_port_operations netcell_ops = { 37static struct ata_port_operations netcell_ops = {
28 .inherits = &ata_bmdma_port_ops, 38 .inherits = &ata_bmdma_port_ops,
29 .cable_detect = ata_cable_80wire, 39 .cable_detect = ata_cable_80wire,
40 .read_id = netcell_read_id,
30}; 41};
31 42
32 43
diff --git a/drivers/ata/pata_pdc202xx_old.c b/drivers/ata/pata_pdc202xx_old.c
index 5fedb3d4032b..2f3c9bed63d9 100644
--- a/drivers/ata/pata_pdc202xx_old.c
+++ b/drivers/ata/pata_pdc202xx_old.c
@@ -2,7 +2,7 @@
2 * pata_pdc202xx_old.c - Promise PDC202xx PATA for new ATA layer 2 * pata_pdc202xx_old.c - Promise PDC202xx PATA for new ATA layer
3 * (C) 2005 Red Hat Inc 3 * (C) 2005 Red Hat Inc
4 * Alan Cox <alan@lxorguk.ukuu.org.uk> 4 * Alan Cox <alan@lxorguk.ukuu.org.uk>
5 * (C) 2007 Bartlomiej Zolnierkiewicz 5 * (C) 2007,2009 Bartlomiej Zolnierkiewicz
6 * 6 *
7 * Based in part on linux/drivers/ide/pci/pdc202xx_old.c 7 * Based in part on linux/drivers/ide/pci/pdc202xx_old.c
8 * 8 *
@@ -158,7 +158,7 @@ static void pdc2026x_bmdma_start(struct ata_queued_cmd *qc)
158 u32 len; 158 u32 len;
159 159
160 /* Check we keep host level locking here */ 160 /* Check we keep host level locking here */
161 if (adev->dma_mode >= XFER_UDMA_2) 161 if (adev->dma_mode > XFER_UDMA_2)
162 iowrite8(ioread8(clock) | sel66, clock); 162 iowrite8(ioread8(clock) | sel66, clock);
163 else 163 else
164 iowrite8(ioread8(clock) & ~sel66, clock); 164 iowrite8(ioread8(clock) & ~sel66, clock);
@@ -212,7 +212,7 @@ static void pdc2026x_bmdma_stop(struct ata_queued_cmd *qc)
212 iowrite8(ioread8(clock) & ~sel66, clock); 212 iowrite8(ioread8(clock) & ~sel66, clock);
213 } 213 }
214 /* Flip back to 33Mhz for PIO */ 214 /* Flip back to 33Mhz for PIO */
215 if (adev->dma_mode >= XFER_UDMA_2) 215 if (adev->dma_mode > XFER_UDMA_2)
216 iowrite8(ioread8(clock) & ~sel66, clock); 216 iowrite8(ioread8(clock) & ~sel66, clock);
217 ata_bmdma_stop(qc); 217 ata_bmdma_stop(qc);
218 pdc202xx_set_piomode(ap, adev); 218 pdc202xx_set_piomode(ap, adev);
diff --git a/drivers/ata/sata_fsl.c b/drivers/ata/sata_fsl.c
index c2e90e1fece0..36b8629203be 100644
--- a/drivers/ata/sata_fsl.c
+++ b/drivers/ata/sata_fsl.c
@@ -205,6 +205,7 @@ struct cmdhdr_tbl_entry {
205 * Description information bitdefs 205 * Description information bitdefs
206 */ 206 */
207enum { 207enum {
208 CMD_DESC_RES = (1 << 11),
208 VENDOR_SPECIFIC_BIST = (1 << 10), 209 VENDOR_SPECIFIC_BIST = (1 << 10),
209 CMD_DESC_SNOOP_ENABLE = (1 << 9), 210 CMD_DESC_SNOOP_ENABLE = (1 << 9),
210 FPDMA_QUEUED_CMD = (1 << 8), 211 FPDMA_QUEUED_CMD = (1 << 8),
@@ -332,13 +333,14 @@ static unsigned int sata_fsl_fill_sg(struct ata_queued_cmd *qc, void *cmd_desc,
332 dma_addr_t sg_addr = sg_dma_address(sg); 333 dma_addr_t sg_addr = sg_dma_address(sg);
333 u32 sg_len = sg_dma_len(sg); 334 u32 sg_len = sg_dma_len(sg);
334 335
335 VPRINTK("SATA FSL : fill_sg, sg_addr = 0x%x, sg_len = %d\n", 336 VPRINTK("SATA FSL : fill_sg, sg_addr = 0x%llx, sg_len = %d\n",
336 sg_addr, sg_len); 337 (unsigned long long)sg_addr, sg_len);
337 338
338 /* warn if each s/g element is not dword aligned */ 339 /* warn if each s/g element is not dword aligned */
339 if (sg_addr & 0x03) 340 if (sg_addr & 0x03)
340 ata_port_printk(qc->ap, KERN_ERR, 341 ata_port_printk(qc->ap, KERN_ERR,
341 "s/g addr unaligned : 0x%x\n", sg_addr); 342 "s/g addr unaligned : 0x%llx\n",
343 (unsigned long long)sg_addr);
342 if (sg_len & 0x03) 344 if (sg_len & 0x03)
343 ata_port_printk(qc->ap, KERN_ERR, 345 ata_port_printk(qc->ap, KERN_ERR,
344 "s/g len unaligned : 0x%x\n", sg_len); 346 "s/g len unaligned : 0x%x\n", sg_len);
@@ -387,7 +389,7 @@ static void sata_fsl_qc_prep(struct ata_queued_cmd *qc)
387 void __iomem *hcr_base = host_priv->hcr_base; 389 void __iomem *hcr_base = host_priv->hcr_base;
388 unsigned int tag = sata_fsl_tag(qc->tag, hcr_base); 390 unsigned int tag = sata_fsl_tag(qc->tag, hcr_base);
389 struct command_desc *cd; 391 struct command_desc *cd;
390 u32 desc_info = CMD_DESC_SNOOP_ENABLE; 392 u32 desc_info = CMD_DESC_RES | CMD_DESC_SNOOP_ENABLE;
391 u32 num_prde = 0; 393 u32 num_prde = 0;
392 u32 ttl_dwords = 0; 394 u32 ttl_dwords = 0;
393 dma_addr_t cd_paddr; 395 dma_addr_t cd_paddr;
@@ -840,7 +842,7 @@ issue_srst:
840 842
841 /* device reset/SRST is a control register update FIS, uses tag0 */ 843 /* device reset/SRST is a control register update FIS, uses tag0 */
842 sata_fsl_setup_cmd_hdr_entry(pp, 0, 844 sata_fsl_setup_cmd_hdr_entry(pp, 0,
843 SRST_CMD | CMD_DESC_SNOOP_ENABLE, 0, 0, 5); 845 SRST_CMD | CMD_DESC_RES | CMD_DESC_SNOOP_ENABLE, 0, 0, 5);
844 846
845 tf.ctl |= ATA_SRST; /* setup SRST bit in taskfile control reg */ 847 tf.ctl |= ATA_SRST; /* setup SRST bit in taskfile control reg */
846 ata_tf_to_fis(&tf, pmp, 0, cfis); 848 ata_tf_to_fis(&tf, pmp, 0, cfis);
@@ -886,7 +888,8 @@ issue_srst:
886 * using ATA signature D2H register FIS to the host controller. 888 * using ATA signature D2H register FIS to the host controller.
887 */ 889 */
888 890
889 sata_fsl_setup_cmd_hdr_entry(pp, 0, CMD_DESC_SNOOP_ENABLE, 0, 0, 5); 891 sata_fsl_setup_cmd_hdr_entry(pp, 0, CMD_DESC_RES | CMD_DESC_SNOOP_ENABLE,
892 0, 0, 5);
890 893
891 tf.ctl &= ~ATA_SRST; /* 2nd H2D Ctl. register FIS */ 894 tf.ctl &= ~ATA_SRST; /* 2nd H2D Ctl. register FIS */
892 ata_tf_to_fis(&tf, pmp, 0, cfis); 895 ata_tf_to_fis(&tf, pmp, 0, cfis);
diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c
index 870dcfd82357..23714aefb825 100644
--- a/drivers/ata/sata_mv.c
+++ b/drivers/ata/sata_mv.c
@@ -293,6 +293,10 @@ enum {
293 FISCFG_WAIT_DEV_ERR = (1 << 8), /* wait for host on DevErr */ 293 FISCFG_WAIT_DEV_ERR = (1 << 8), /* wait for host on DevErr */
294 FISCFG_SINGLE_SYNC = (1 << 16), /* SYNC on DMA activation */ 294 FISCFG_SINGLE_SYNC = (1 << 16), /* SYNC on DMA activation */
295 295
296 PHY_MODE9_GEN2 = 0x398,
297 PHY_MODE9_GEN1 = 0x39c,
298 PHYCFG_OFS = 0x3a0, /* only in 65n devices */
299
296 MV5_PHY_MODE = 0x74, 300 MV5_PHY_MODE = 0x74,
297 MV5_LTMODE = 0x30, 301 MV5_LTMODE = 0x30,
298 MV5_PHY_CTL = 0x0C, 302 MV5_PHY_CTL = 0x0C,
@@ -609,6 +613,8 @@ static int mv_soc_reset_hc(struct mv_host_priv *hpriv,
609static void mv_soc_reset_flash(struct mv_host_priv *hpriv, 613static void mv_soc_reset_flash(struct mv_host_priv *hpriv,
610 void __iomem *mmio); 614 void __iomem *mmio);
611static void mv_soc_reset_bus(struct ata_host *host, void __iomem *mmio); 615static void mv_soc_reset_bus(struct ata_host *host, void __iomem *mmio);
616static void mv_soc_65n_phy_errata(struct mv_host_priv *hpriv,
617 void __iomem *mmio, unsigned int port);
612static void mv_reset_pci_bus(struct ata_host *host, void __iomem *mmio); 618static void mv_reset_pci_bus(struct ata_host *host, void __iomem *mmio);
613static void mv_reset_channel(struct mv_host_priv *hpriv, void __iomem *mmio, 619static void mv_reset_channel(struct mv_host_priv *hpriv, void __iomem *mmio,
614 unsigned int port_no); 620 unsigned int port_no);
@@ -807,6 +813,14 @@ static const struct mv_hw_ops mv_soc_ops = {
807 .reset_bus = mv_soc_reset_bus, 813 .reset_bus = mv_soc_reset_bus,
808}; 814};
809 815
816static const struct mv_hw_ops mv_soc_65n_ops = {
817 .phy_errata = mv_soc_65n_phy_errata,
818 .enable_leds = mv_soc_enable_leds,
819 .reset_hc = mv_soc_reset_hc,
820 .reset_flash = mv_soc_reset_flash,
821 .reset_bus = mv_soc_reset_bus,
822};
823
810/* 824/*
811 * Functions 825 * Functions
812 */ 826 */
@@ -3397,6 +3411,53 @@ static void mv_soc_reset_bus(struct ata_host *host, void __iomem *mmio)
3397 return; 3411 return;
3398} 3412}
3399 3413
3414static void mv_soc_65n_phy_errata(struct mv_host_priv *hpriv,
3415 void __iomem *mmio, unsigned int port)
3416{
3417 void __iomem *port_mmio = mv_port_base(mmio, port);
3418 u32 reg;
3419
3420 reg = readl(port_mmio + PHY_MODE3);
3421 reg &= ~(0x3 << 27); /* SELMUPF (bits 28:27) to 1 */
3422 reg |= (0x1 << 27);
3423 reg &= ~(0x3 << 29); /* SELMUPI (bits 30:29) to 1 */
3424 reg |= (0x1 << 29);
3425 writel(reg, port_mmio + PHY_MODE3);
3426
3427 reg = readl(port_mmio + PHY_MODE4);
3428 reg &= ~0x1; /* SATU_OD8 (bit 0) to 0, reserved bit 16 must be set */
3429 reg |= (0x1 << 16);
3430 writel(reg, port_mmio + PHY_MODE4);
3431
3432 reg = readl(port_mmio + PHY_MODE9_GEN2);
3433 reg &= ~0xf; /* TXAMP[3:0] (bits 3:0) to 8 */
3434 reg |= 0x8;
3435 reg &= ~(0x1 << 14); /* TXAMP[4] (bit 14) to 0 */
3436 writel(reg, port_mmio + PHY_MODE9_GEN2);
3437
3438 reg = readl(port_mmio + PHY_MODE9_GEN1);
3439 reg &= ~0xf; /* TXAMP[3:0] (bits 3:0) to 8 */
3440 reg |= 0x8;
3441 reg &= ~(0x1 << 14); /* TXAMP[4] (bit 14) to 0 */
3442 writel(reg, port_mmio + PHY_MODE9_GEN1);
3443}
3444
3445/**
3446 * soc_is_65 - check if the soc is 65 nano device
3447 *
3448 * Detect the type of the SoC, this is done by reading the PHYCFG_OFS
3449 * register, this register should contain non-zero value and it exists only
3450 * in the 65 nano devices, when reading it from older devices we get 0.
3451 */
3452static bool soc_is_65n(struct mv_host_priv *hpriv)
3453{
3454 void __iomem *port0_mmio = mv_port_base(hpriv->base, 0);
3455
3456 if (readl(port0_mmio + PHYCFG_OFS))
3457 return true;
3458 return false;
3459}
3460
3400static void mv_setup_ifcfg(void __iomem *port_mmio, int want_gen2i) 3461static void mv_setup_ifcfg(void __iomem *port_mmio, int want_gen2i)
3401{ 3462{
3402 u32 ifcfg = readl(port_mmio + SATA_IFCFG); 3463 u32 ifcfg = readl(port_mmio + SATA_IFCFG);
@@ -3737,7 +3798,10 @@ static int mv_chip_id(struct ata_host *host, unsigned int board_idx)
3737 } 3798 }
3738 break; 3799 break;
3739 case chip_soc: 3800 case chip_soc:
3740 hpriv->ops = &mv_soc_ops; 3801 if (soc_is_65n(hpriv))
3802 hpriv->ops = &mv_soc_65n_ops;
3803 else
3804 hpriv->ops = &mv_soc_ops;
3741 hp_flags |= MV_HP_FLAG_SOC | MV_HP_GEN_IIE | 3805 hp_flags |= MV_HP_FLAG_SOC | MV_HP_GEN_IIE |
3742 MV_HP_ERRATA_60X1C0; 3806 MV_HP_ERRATA_60X1C0;
3743 break; 3807 break;
@@ -3800,7 +3864,8 @@ static int mv_init_host(struct ata_host *host, unsigned int board_idx)
3800 n_hc = mv_get_hc_count(host->ports[0]->flags); 3864 n_hc = mv_get_hc_count(host->ports[0]->flags);
3801 3865
3802 for (port = 0; port < host->n_ports; port++) 3866 for (port = 0; port < host->n_ports; port++)
3803 hpriv->ops->read_preamp(hpriv, port, mmio); 3867 if (hpriv->ops->read_preamp)
3868 hpriv->ops->read_preamp(hpriv, port, mmio);
3804 3869
3805 rc = hpriv->ops->reset_hc(hpriv, mmio, n_hc); 3870 rc = hpriv->ops->reset_hc(hpriv, mmio, n_hc);
3806 if (rc) 3871 if (rc)
diff --git a/drivers/ata/sata_sx4.c b/drivers/ata/sata_sx4.c
index dce3dccced3f..eb05a3c82a9e 100644
--- a/drivers/ata/sata_sx4.c
+++ b/drivers/ata/sata_sx4.c
@@ -213,8 +213,9 @@ struct pdc_host_priv {
213 213
214 214
215static int pdc_sata_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); 215static int pdc_sata_init_one(struct pci_dev *pdev, const struct pci_device_id *ent);
216static void pdc_eng_timeout(struct ata_port *ap); 216static void pdc_error_handler(struct ata_port *ap);
217static void pdc_20621_phy_reset(struct ata_port *ap); 217static void pdc_freeze(struct ata_port *ap);
218static void pdc_thaw(struct ata_port *ap);
218static int pdc_port_start(struct ata_port *ap); 219static int pdc_port_start(struct ata_port *ap);
219static void pdc20621_qc_prep(struct ata_queued_cmd *qc); 220static void pdc20621_qc_prep(struct ata_queued_cmd *qc);
220static void pdc_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf); 221static void pdc_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf);
@@ -233,6 +234,10 @@ static void pdc20621_put_to_dimm(struct ata_host *host,
233 void *psource, u32 offset, u32 size); 234 void *psource, u32 offset, u32 size);
234static void pdc20621_irq_clear(struct ata_port *ap); 235static void pdc20621_irq_clear(struct ata_port *ap);
235static unsigned int pdc20621_qc_issue(struct ata_queued_cmd *qc); 236static unsigned int pdc20621_qc_issue(struct ata_queued_cmd *qc);
237static int pdc_softreset(struct ata_link *link, unsigned int *class,
238 unsigned long deadline);
239static void pdc_post_internal_cmd(struct ata_queued_cmd *qc);
240static int pdc_check_atapi_dma(struct ata_queued_cmd *qc);
236 241
237 242
238static struct scsi_host_template pdc_sata_sht = { 243static struct scsi_host_template pdc_sata_sht = {
@@ -243,20 +248,24 @@ static struct scsi_host_template pdc_sata_sht = {
243 248
244/* TODO: inherit from base port_ops after converting to new EH */ 249/* TODO: inherit from base port_ops after converting to new EH */
245static struct ata_port_operations pdc_20621_ops = { 250static struct ata_port_operations pdc_20621_ops = {
246 .sff_tf_load = pdc_tf_load_mmio, 251 .inherits = &ata_sff_port_ops,
247 .sff_tf_read = ata_sff_tf_read, 252
248 .sff_check_status = ata_sff_check_status, 253 .check_atapi_dma = pdc_check_atapi_dma,
249 .sff_exec_command = pdc_exec_command_mmio,
250 .sff_dev_select = ata_sff_dev_select,
251 .phy_reset = pdc_20621_phy_reset,
252 .qc_prep = pdc20621_qc_prep, 254 .qc_prep = pdc20621_qc_prep,
253 .qc_issue = pdc20621_qc_issue, 255 .qc_issue = pdc20621_qc_issue,
254 .qc_fill_rtf = ata_sff_qc_fill_rtf, 256
255 .sff_data_xfer = ata_sff_data_xfer, 257 .freeze = pdc_freeze,
256 .eng_timeout = pdc_eng_timeout, 258 .thaw = pdc_thaw,
257 .sff_irq_clear = pdc20621_irq_clear, 259 .softreset = pdc_softreset,
258 .sff_irq_on = ata_sff_irq_on, 260 .error_handler = pdc_error_handler,
261 .lost_interrupt = ATA_OP_NULL,
262 .post_internal_cmd = pdc_post_internal_cmd,
263
259 .port_start = pdc_port_start, 264 .port_start = pdc_port_start,
265
266 .sff_tf_load = pdc_tf_load_mmio,
267 .sff_exec_command = pdc_exec_command_mmio,
268 .sff_irq_clear = pdc20621_irq_clear,
260}; 269};
261 270
262static const struct ata_port_info pdc_port_info[] = { 271static const struct ata_port_info pdc_port_info[] = {
@@ -310,14 +319,6 @@ static int pdc_port_start(struct ata_port *ap)
310 return 0; 319 return 0;
311} 320}
312 321
313static void pdc_20621_phy_reset(struct ata_port *ap)
314{
315 VPRINTK("ENTER\n");
316 ap->cbl = ATA_CBL_SATA;
317 ata_port_probe(ap);
318 ata_bus_reset(ap);
319}
320
321static inline void pdc20621_ata_sg(struct ata_taskfile *tf, u8 *buf, 322static inline void pdc20621_ata_sg(struct ata_taskfile *tf, u8 *buf,
322 unsigned int portno, 323 unsigned int portno,
323 unsigned int total_len) 324 unsigned int total_len)
@@ -686,8 +687,11 @@ static void pdc20621_packet_start(struct ata_queued_cmd *qc)
686static unsigned int pdc20621_qc_issue(struct ata_queued_cmd *qc) 687static unsigned int pdc20621_qc_issue(struct ata_queued_cmd *qc)
687{ 688{
688 switch (qc->tf.protocol) { 689 switch (qc->tf.protocol) {
689 case ATA_PROT_DMA:
690 case ATA_PROT_NODATA: 690 case ATA_PROT_NODATA:
691 if (qc->tf.flags & ATA_TFLAG_POLLING)
692 break;
693 /*FALLTHROUGH*/
694 case ATA_PROT_DMA:
691 pdc20621_packet_start(qc); 695 pdc20621_packet_start(qc);
692 return 0; 696 return 0;
693 697
@@ -786,12 +790,7 @@ static inline unsigned int pdc20621_host_intr(struct ata_port *ap,
786 790
787static void pdc20621_irq_clear(struct ata_port *ap) 791static void pdc20621_irq_clear(struct ata_port *ap)
788{ 792{
789 struct ata_host *host = ap->host; 793 ioread8(ap->ioaddr.status_addr);
790 void __iomem *mmio = host->iomap[PDC_MMIO_BAR];
791
792 mmio += PDC_CHIP0_OFS;
793
794 readl(mmio + PDC_20621_SEQMASK);
795} 794}
796 795
797static irqreturn_t pdc20621_interrupt(int irq, void *dev_instance) 796static irqreturn_t pdc20621_interrupt(int irq, void *dev_instance)
@@ -859,46 +858,119 @@ static irqreturn_t pdc20621_interrupt(int irq, void *dev_instance)
859 return IRQ_RETVAL(handled); 858 return IRQ_RETVAL(handled);
860} 859}
861 860
862static void pdc_eng_timeout(struct ata_port *ap) 861static void pdc_freeze(struct ata_port *ap)
863{ 862{
864 u8 drv_stat; 863 void __iomem *mmio = ap->ioaddr.cmd_addr;
865 struct ata_host *host = ap->host; 864 u32 tmp;
866 struct ata_queued_cmd *qc;
867 unsigned long flags;
868 865
869 DPRINTK("ENTER\n"); 866 /* FIXME: if all 4 ATA engines are stopped, also stop HDMA engine */
870 867
871 spin_lock_irqsave(&host->lock, flags); 868 tmp = readl(mmio + PDC_CTLSTAT);
869 tmp |= PDC_MASK_INT;
870 tmp &= ~PDC_DMA_ENABLE;
871 writel(tmp, mmio + PDC_CTLSTAT);
872 readl(mmio + PDC_CTLSTAT); /* flush */
873}
872 874
873 qc = ata_qc_from_tag(ap, ap->link.active_tag); 875static void pdc_thaw(struct ata_port *ap)
876{
877 void __iomem *mmio = ap->ioaddr.cmd_addr;
878 u32 tmp;
874 879
875 switch (qc->tf.protocol) { 880 /* FIXME: start HDMA engine, if zero ATA engines running */
876 case ATA_PROT_DMA:
877 case ATA_PROT_NODATA:
878 ata_port_printk(ap, KERN_ERR, "command timeout\n");
879 qc->err_mask |= __ac_err_mask(ata_wait_idle(ap));
880 break;
881 881
882 default: 882 /* clear IRQ */
883 drv_stat = ata_sff_busy_wait(ap, ATA_BUSY | ATA_DRQ, 1000); 883 ioread8(ap->ioaddr.status_addr);
884 884
885 ata_port_printk(ap, KERN_ERR, 885 /* turn IRQ back on */
886 "unknown timeout, cmd 0x%x stat 0x%x\n", 886 tmp = readl(mmio + PDC_CTLSTAT);
887 qc->tf.command, drv_stat); 887 tmp &= ~PDC_MASK_INT;
888 writel(tmp, mmio + PDC_CTLSTAT);
889 readl(mmio + PDC_CTLSTAT); /* flush */
890}
888 891
889 qc->err_mask |= ac_err_mask(drv_stat); 892static void pdc_reset_port(struct ata_port *ap)
890 break; 893{
894 void __iomem *mmio = ap->ioaddr.cmd_addr + PDC_CTLSTAT;
895 unsigned int i;
896 u32 tmp;
897
898 /* FIXME: handle HDMA copy engine */
899
900 for (i = 11; i > 0; i--) {
901 tmp = readl(mmio);
902 if (tmp & PDC_RESET)
903 break;
904
905 udelay(100);
906
907 tmp |= PDC_RESET;
908 writel(tmp, mmio);
891 } 909 }
892 910
893 spin_unlock_irqrestore(&host->lock, flags); 911 tmp &= ~PDC_RESET;
894 ata_eh_qc_complete(qc); 912 writel(tmp, mmio);
895 DPRINTK("EXIT\n"); 913 readl(mmio); /* flush */
914}
915
916static int pdc_softreset(struct ata_link *link, unsigned int *class,
917 unsigned long deadline)
918{
919 pdc_reset_port(link->ap);
920 return ata_sff_softreset(link, class, deadline);
921}
922
923static void pdc_error_handler(struct ata_port *ap)
924{
925 if (!(ap->pflags & ATA_PFLAG_FROZEN))
926 pdc_reset_port(ap);
927
928 ata_std_error_handler(ap);
929}
930
931static void pdc_post_internal_cmd(struct ata_queued_cmd *qc)
932{
933 struct ata_port *ap = qc->ap;
934
935 /* make DMA engine forget about the failed command */
936 if (qc->flags & ATA_QCFLAG_FAILED)
937 pdc_reset_port(ap);
938}
939
940static int pdc_check_atapi_dma(struct ata_queued_cmd *qc)
941{
942 u8 *scsicmd = qc->scsicmd->cmnd;
943 int pio = 1; /* atapi dma off by default */
944
945 /* Whitelist commands that may use DMA. */
946 switch (scsicmd[0]) {
947 case WRITE_12:
948 case WRITE_10:
949 case WRITE_6:
950 case READ_12:
951 case READ_10:
952 case READ_6:
953 case 0xad: /* READ_DVD_STRUCTURE */
954 case 0xbe: /* READ_CD */
955 pio = 0;
956 }
957 /* -45150 (FFFF4FA2) to -1 (FFFFFFFF) shall use PIO mode */
958 if (scsicmd[0] == WRITE_10) {
959 unsigned int lba =
960 (scsicmd[2] << 24) |
961 (scsicmd[3] << 16) |
962 (scsicmd[4] << 8) |
963 scsicmd[5];
964 if (lba >= 0xFFFF4FA2)
965 pio = 1;
966 }
967 return pio;
896} 968}
897 969
898static void pdc_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf) 970static void pdc_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf)
899{ 971{
900 WARN_ON(tf->protocol == ATA_PROT_DMA || 972 WARN_ON(tf->protocol == ATA_PROT_DMA ||
901 tf->protocol == ATA_PROT_NODATA); 973 tf->protocol == ATAPI_PROT_DMA);
902 ata_sff_tf_load(ap, tf); 974 ata_sff_tf_load(ap, tf);
903} 975}
904 976
@@ -906,7 +978,7 @@ static void pdc_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf)
906static void pdc_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile *tf) 978static void pdc_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile *tf)
907{ 979{
908 WARN_ON(tf->protocol == ATA_PROT_DMA || 980 WARN_ON(tf->protocol == ATA_PROT_DMA ||
909 tf->protocol == ATA_PROT_NODATA); 981 tf->protocol == ATAPI_PROT_DMA);
910 ata_sff_exec_command(ap, tf); 982 ata_sff_exec_command(ap, tf);
911} 983}
912 984
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-30 18:23:04 -0500