diff options
Diffstat (limited to 'drivers/ata')
-rw-r--r-- | drivers/ata/ata_piix.c | 7 | ||||
-rw-r--r-- | drivers/ata/pata_ixp4xx_cf.c | 3 | ||||
-rw-r--r-- | drivers/ata/pata_marvell.c | 4 | ||||
-rw-r--r-- | drivers/ata/sata_mv.c | 35 |
4 files changed, 37 insertions, 12 deletions
diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c index 3b8bf1812dc8..6996eb5b7506 100644 --- a/drivers/ata/ata_piix.c +++ b/drivers/ata/ata_piix.c | |||
@@ -921,6 +921,13 @@ static int piix_broken_suspend(void) | |||
921 | { | 921 | { |
922 | static struct dmi_system_id sysids[] = { | 922 | static struct dmi_system_id sysids[] = { |
923 | { | 923 | { |
924 | .ident = "TECRA M3", | ||
925 | .matches = { | ||
926 | DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), | ||
927 | DMI_MATCH(DMI_PRODUCT_NAME, "TECRA M3"), | ||
928 | }, | ||
929 | }, | ||
930 | { | ||
924 | .ident = "TECRA M5", | 931 | .ident = "TECRA M5", |
925 | .matches = { | 932 | .matches = { |
926 | DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), | 933 | DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), |
diff --git a/drivers/ata/pata_ixp4xx_cf.c b/drivers/ata/pata_ixp4xx_cf.c index 4ca7fd6118d5..5dea3584c6c2 100644 --- a/drivers/ata/pata_ixp4xx_cf.c +++ b/drivers/ata/pata_ixp4xx_cf.c | |||
@@ -189,6 +189,9 @@ static __devinit int ixp4xx_pata_probe(struct platform_device *pdev) | |||
189 | data->cs0 = devm_ioremap(&pdev->dev, cs0->start, 0x1000); | 189 | data->cs0 = devm_ioremap(&pdev->dev, cs0->start, 0x1000); |
190 | data->cs1 = devm_ioremap(&pdev->dev, cs1->start, 0x1000); | 190 | data->cs1 = devm_ioremap(&pdev->dev, cs1->start, 0x1000); |
191 | 191 | ||
192 | if (!data->cs0 || !data->cs1) | ||
193 | return -ENOMEM; | ||
194 | |||
192 | irq = platform_get_irq(pdev, 0); | 195 | irq = platform_get_irq(pdev, 0); |
193 | if (irq) | 196 | if (irq) |
194 | set_irq_type(irq, IRQT_RISING); | 197 | set_irq_type(irq, IRQT_RISING); |
diff --git a/drivers/ata/pata_marvell.c b/drivers/ata/pata_marvell.c index ae206f35f747..b45506f1ef73 100644 --- a/drivers/ata/pata_marvell.c +++ b/drivers/ata/pata_marvell.c | |||
@@ -44,10 +44,10 @@ static int marvell_pre_reset(struct ata_port *ap, unsigned long deadline) | |||
44 | return -ENOMEM; | 44 | return -ENOMEM; |
45 | printk("BAR5:"); | 45 | printk("BAR5:"); |
46 | for(i = 0; i <= 0x0F; i++) | 46 | for(i = 0; i <= 0x0F; i++) |
47 | printk("%02X:%02X ", i, readb(barp + i)); | 47 | printk("%02X:%02X ", i, ioread8(barp + i)); |
48 | printk("\n"); | 48 | printk("\n"); |
49 | 49 | ||
50 | devices = readl(barp + 0x0C); | 50 | devices = ioread32(barp + 0x0C); |
51 | pci_iounmap(pdev, barp); | 51 | pci_iounmap(pdev, barp); |
52 | 52 | ||
53 | if ((pdev->device == 0x6145) && (ap->port_no == 0) && | 53 | if ((pdev->device == 0x6145) && (ap->port_no == 0) && |
diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c index 11bf6c7ac122..cb7dec97fee6 100644 --- a/drivers/ata/sata_mv.c +++ b/drivers/ata/sata_mv.c | |||
@@ -313,7 +313,10 @@ enum { | |||
313 | #define IS_GEN_IIE(hpriv) ((hpriv)->hp_flags & MV_HP_GEN_IIE) | 313 | #define IS_GEN_IIE(hpriv) ((hpriv)->hp_flags & MV_HP_GEN_IIE) |
314 | 314 | ||
315 | enum { | 315 | enum { |
316 | MV_DMA_BOUNDARY = 0xffffffffU, | 316 | /* DMA boundary 0xffff is required by the s/g splitting |
317 | * we need on /length/ in mv_fill-sg(). | ||
318 | */ | ||
319 | MV_DMA_BOUNDARY = 0xffffU, | ||
317 | 320 | ||
318 | /* mask of register bits containing lower 32 bits | 321 | /* mask of register bits containing lower 32 bits |
319 | * of EDMA request queue DMA address | 322 | * of EDMA request queue DMA address |
@@ -448,7 +451,7 @@ static struct scsi_host_template mv5_sht = { | |||
448 | .queuecommand = ata_scsi_queuecmd, | 451 | .queuecommand = ata_scsi_queuecmd, |
449 | .can_queue = ATA_DEF_QUEUE, | 452 | .can_queue = ATA_DEF_QUEUE, |
450 | .this_id = ATA_SHT_THIS_ID, | 453 | .this_id = ATA_SHT_THIS_ID, |
451 | .sg_tablesize = MV_MAX_SG_CT, | 454 | .sg_tablesize = MV_MAX_SG_CT / 2, |
452 | .cmd_per_lun = ATA_SHT_CMD_PER_LUN, | 455 | .cmd_per_lun = ATA_SHT_CMD_PER_LUN, |
453 | .emulated = ATA_SHT_EMULATED, | 456 | .emulated = ATA_SHT_EMULATED, |
454 | .use_clustering = 1, | 457 | .use_clustering = 1, |
@@ -466,7 +469,7 @@ static struct scsi_host_template mv6_sht = { | |||
466 | .queuecommand = ata_scsi_queuecmd, | 469 | .queuecommand = ata_scsi_queuecmd, |
467 | .can_queue = ATA_DEF_QUEUE, | 470 | .can_queue = ATA_DEF_QUEUE, |
468 | .this_id = ATA_SHT_THIS_ID, | 471 | .this_id = ATA_SHT_THIS_ID, |
469 | .sg_tablesize = MV_MAX_SG_CT, | 472 | .sg_tablesize = MV_MAX_SG_CT / 2, |
470 | .cmd_per_lun = ATA_SHT_CMD_PER_LUN, | 473 | .cmd_per_lun = ATA_SHT_CMD_PER_LUN, |
471 | .emulated = ATA_SHT_EMULATED, | 474 | .emulated = ATA_SHT_EMULATED, |
472 | .use_clustering = 1, | 475 | .use_clustering = 1, |
@@ -1139,15 +1142,27 @@ static unsigned int mv_fill_sg(struct ata_queued_cmd *qc) | |||
1139 | dma_addr_t addr = sg_dma_address(sg); | 1142 | dma_addr_t addr = sg_dma_address(sg); |
1140 | u32 sg_len = sg_dma_len(sg); | 1143 | u32 sg_len = sg_dma_len(sg); |
1141 | 1144 | ||
1142 | mv_sg->addr = cpu_to_le32(addr & 0xffffffff); | 1145 | while (sg_len) { |
1143 | mv_sg->addr_hi = cpu_to_le32((addr >> 16) >> 16); | 1146 | u32 offset = addr & 0xffff; |
1144 | mv_sg->flags_size = cpu_to_le32(sg_len & 0xffff); | 1147 | u32 len = sg_len; |
1148 | |||
1149 | if ((offset + sg_len > 0x10000)) | ||
1150 | len = 0x10000 - offset; | ||
1151 | |||
1152 | mv_sg->addr = cpu_to_le32(addr & 0xffffffff); | ||
1153 | mv_sg->addr_hi = cpu_to_le32((addr >> 16) >> 16); | ||
1154 | mv_sg->flags_size = cpu_to_le32(len); | ||
1145 | 1155 | ||
1146 | if (ata_sg_is_last(sg, qc)) | 1156 | sg_len -= len; |
1147 | mv_sg->flags_size |= cpu_to_le32(EPRD_FLAG_END_OF_TBL); | 1157 | addr += len; |
1158 | |||
1159 | if (!sg_len && ata_sg_is_last(sg, qc)) | ||
1160 | mv_sg->flags_size |= cpu_to_le32(EPRD_FLAG_END_OF_TBL); | ||
1161 | |||
1162 | mv_sg++; | ||
1163 | n_sg++; | ||
1164 | } | ||
1148 | 1165 | ||
1149 | mv_sg++; | ||
1150 | n_sg++; | ||
1151 | } | 1166 | } |
1152 | 1167 | ||
1153 | return n_sg; | 1168 | return n_sg; |