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-rw-r--r--drivers/ata/ahci.c159
-rw-r--r--drivers/ata/ata_piix.c20
-rw-r--r--drivers/ata/libata-core.c11
-rw-r--r--drivers/ata/libata-scsi.c2
-rw-r--r--drivers/ata/libata-sff.c20
-rw-r--r--drivers/ata/pata_ali.c17
-rw-r--r--drivers/ata/pata_efar.c17
-rw-r--r--drivers/ata/pata_legacy.c2
-rw-r--r--drivers/ata/pata_netcell.c13
-rw-r--r--drivers/ata/sata_nv.c131
-rw-r--r--drivers/ata/sata_sil.c2
-rw-r--r--drivers/ata/sata_sx4.c11
12 files changed, 295 insertions, 110 deletions
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index 08186ecbaf8d..15a23031833f 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -77,8 +77,6 @@ static ssize_t ahci_led_store(struct ata_port *ap, const char *buf,
77 size_t size); 77 size_t size);
78static ssize_t ahci_transmit_led_message(struct ata_port *ap, u32 state, 78static ssize_t ahci_transmit_led_message(struct ata_port *ap, u32 state,
79 ssize_t size); 79 ssize_t size);
80#define MAX_SLOTS 8
81#define MAX_RETRY 15
82 80
83enum { 81enum {
84 AHCI_PCI_BAR = 5, 82 AHCI_PCI_BAR = 5,
@@ -220,6 +218,7 @@ enum {
220 AHCI_HFLAG_NO_HOTPLUG = (1 << 7), /* ignore PxSERR.DIAG.N */ 218 AHCI_HFLAG_NO_HOTPLUG = (1 << 7), /* ignore PxSERR.DIAG.N */
221 AHCI_HFLAG_SECT255 = (1 << 8), /* max 255 sectors */ 219 AHCI_HFLAG_SECT255 = (1 << 8), /* max 255 sectors */
222 AHCI_HFLAG_YES_NCQ = (1 << 9), /* force NCQ cap on */ 220 AHCI_HFLAG_YES_NCQ = (1 << 9), /* force NCQ cap on */
221 AHCI_HFLAG_NO_SUSPEND = (1 << 10), /* don't suspend */
223 222
224 /* ap->flags bits */ 223 /* ap->flags bits */
225 224
@@ -230,6 +229,10 @@ enum {
230 229
231 ICH_MAP = 0x90, /* ICH MAP register */ 230 ICH_MAP = 0x90, /* ICH MAP register */
232 231
232 /* em constants */
233 EM_MAX_SLOTS = 8,
234 EM_MAX_RETRY = 5,
235
233 /* em_ctl bits */ 236 /* em_ctl bits */
234 EM_CTL_RST = (1 << 9), /* Reset */ 237 EM_CTL_RST = (1 << 9), /* Reset */
235 EM_CTL_TM = (1 << 8), /* Transmit Message */ 238 EM_CTL_TM = (1 << 8), /* Transmit Message */
@@ -281,8 +284,8 @@ struct ahci_port_priv {
281 unsigned int ncq_saw_dmas:1; 284 unsigned int ncq_saw_dmas:1;
282 unsigned int ncq_saw_sdb:1; 285 unsigned int ncq_saw_sdb:1;
283 u32 intr_mask; /* interrupts to enable */ 286 u32 intr_mask; /* interrupts to enable */
284 struct ahci_em_priv em_priv[MAX_SLOTS];/* enclosure management info 287 /* enclosure management info per PM slot */
285 * per PM slot */ 288 struct ahci_em_priv em_priv[EM_MAX_SLOTS];
286}; 289};
287 290
288static int ahci_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val); 291static int ahci_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val);
@@ -312,7 +315,6 @@ static void ahci_error_handler(struct ata_port *ap);
312static void ahci_post_internal_cmd(struct ata_queued_cmd *qc); 315static void ahci_post_internal_cmd(struct ata_queued_cmd *qc);
313static int ahci_port_resume(struct ata_port *ap); 316static int ahci_port_resume(struct ata_port *ap);
314static void ahci_dev_config(struct ata_device *dev); 317static void ahci_dev_config(struct ata_device *dev);
315static unsigned int ahci_fill_sg(struct ata_queued_cmd *qc, void *cmd_tbl);
316static void ahci_fill_cmd_slot(struct ahci_port_priv *pp, unsigned int tag, 318static void ahci_fill_cmd_slot(struct ahci_port_priv *pp, unsigned int tag,
317 u32 opts); 319 u32 opts);
318#ifdef CONFIG_PM 320#ifdef CONFIG_PM
@@ -403,14 +405,14 @@ static struct ata_port_operations ahci_sb600_ops = {
403#define AHCI_HFLAGS(flags) .private_data = (void *)(flags) 405#define AHCI_HFLAGS(flags) .private_data = (void *)(flags)
404 406
405static const struct ata_port_info ahci_port_info[] = { 407static const struct ata_port_info ahci_port_info[] = {
406 /* board_ahci */ 408 [board_ahci] =
407 { 409 {
408 .flags = AHCI_FLAG_COMMON, 410 .flags = AHCI_FLAG_COMMON,
409 .pio_mask = ATA_PIO4, 411 .pio_mask = ATA_PIO4,
410 .udma_mask = ATA_UDMA6, 412 .udma_mask = ATA_UDMA6,
411 .port_ops = &ahci_ops, 413 .port_ops = &ahci_ops,
412 }, 414 },
413 /* board_ahci_vt8251 */ 415 [board_ahci_vt8251] =
414 { 416 {
415 AHCI_HFLAGS (AHCI_HFLAG_NO_NCQ | AHCI_HFLAG_NO_PMP), 417 AHCI_HFLAGS (AHCI_HFLAG_NO_NCQ | AHCI_HFLAG_NO_PMP),
416 .flags = AHCI_FLAG_COMMON, 418 .flags = AHCI_FLAG_COMMON,
@@ -418,7 +420,7 @@ static const struct ata_port_info ahci_port_info[] = {
418 .udma_mask = ATA_UDMA6, 420 .udma_mask = ATA_UDMA6,
419 .port_ops = &ahci_vt8251_ops, 421 .port_ops = &ahci_vt8251_ops,
420 }, 422 },
421 /* board_ahci_ign_iferr */ 423 [board_ahci_ign_iferr] =
422 { 424 {
423 AHCI_HFLAGS (AHCI_HFLAG_IGN_IRQ_IF_ERR), 425 AHCI_HFLAGS (AHCI_HFLAG_IGN_IRQ_IF_ERR),
424 .flags = AHCI_FLAG_COMMON, 426 .flags = AHCI_FLAG_COMMON,
@@ -426,17 +428,16 @@ static const struct ata_port_info ahci_port_info[] = {
426 .udma_mask = ATA_UDMA6, 428 .udma_mask = ATA_UDMA6,
427 .port_ops = &ahci_ops, 429 .port_ops = &ahci_ops,
428 }, 430 },
429 /* board_ahci_sb600 */ 431 [board_ahci_sb600] =
430 { 432 {
431 AHCI_HFLAGS (AHCI_HFLAG_IGN_SERR_INTERNAL | 433 AHCI_HFLAGS (AHCI_HFLAG_IGN_SERR_INTERNAL |
432 AHCI_HFLAG_32BIT_ONLY | AHCI_HFLAG_NO_MSI | 434 AHCI_HFLAG_NO_MSI | AHCI_HFLAG_SECT255),
433 AHCI_HFLAG_SECT255),
434 .flags = AHCI_FLAG_COMMON, 435 .flags = AHCI_FLAG_COMMON,
435 .pio_mask = ATA_PIO4, 436 .pio_mask = ATA_PIO4,
436 .udma_mask = ATA_UDMA6, 437 .udma_mask = ATA_UDMA6,
437 .port_ops = &ahci_sb600_ops, 438 .port_ops = &ahci_sb600_ops,
438 }, 439 },
439 /* board_ahci_mv */ 440 [board_ahci_mv] =
440 { 441 {
441 AHCI_HFLAGS (AHCI_HFLAG_NO_NCQ | AHCI_HFLAG_NO_MSI | 442 AHCI_HFLAGS (AHCI_HFLAG_NO_NCQ | AHCI_HFLAG_NO_MSI |
442 AHCI_HFLAG_MV_PATA | AHCI_HFLAG_NO_PMP), 443 AHCI_HFLAG_MV_PATA | AHCI_HFLAG_NO_PMP),
@@ -446,7 +447,7 @@ static const struct ata_port_info ahci_port_info[] = {
446 .udma_mask = ATA_UDMA6, 447 .udma_mask = ATA_UDMA6,
447 .port_ops = &ahci_ops, 448 .port_ops = &ahci_ops,
448 }, 449 },
449 /* board_ahci_sb700, for SB700 and SB800 */ 450 [board_ahci_sb700] = /* for SB700 and SB800 */
450 { 451 {
451 AHCI_HFLAGS (AHCI_HFLAG_IGN_SERR_INTERNAL), 452 AHCI_HFLAGS (AHCI_HFLAG_IGN_SERR_INTERNAL),
452 .flags = AHCI_FLAG_COMMON, 453 .flags = AHCI_FLAG_COMMON,
@@ -454,7 +455,7 @@ static const struct ata_port_info ahci_port_info[] = {
454 .udma_mask = ATA_UDMA6, 455 .udma_mask = ATA_UDMA6,
455 .port_ops = &ahci_sb600_ops, 456 .port_ops = &ahci_sb600_ops,
456 }, 457 },
457 /* board_ahci_mcp65 */ 458 [board_ahci_mcp65] =
458 { 459 {
459 AHCI_HFLAGS (AHCI_HFLAG_YES_NCQ), 460 AHCI_HFLAGS (AHCI_HFLAG_YES_NCQ),
460 .flags = AHCI_FLAG_COMMON, 461 .flags = AHCI_FLAG_COMMON,
@@ -462,7 +463,7 @@ static const struct ata_port_info ahci_port_info[] = {
462 .udma_mask = ATA_UDMA6, 463 .udma_mask = ATA_UDMA6,
463 .port_ops = &ahci_ops, 464 .port_ops = &ahci_ops,
464 }, 465 },
465 /* board_ahci_nopmp */ 466 [board_ahci_nopmp] =
466 { 467 {
467 AHCI_HFLAGS (AHCI_HFLAG_NO_PMP), 468 AHCI_HFLAGS (AHCI_HFLAG_NO_PMP),
468 .flags = AHCI_FLAG_COMMON, 469 .flags = AHCI_FLAG_COMMON,
@@ -1140,12 +1141,12 @@ static void ahci_start_port(struct ata_port *ap)
1140 emp = &pp->em_priv[link->pmp]; 1141 emp = &pp->em_priv[link->pmp];
1141 1142
1142 /* EM Transmit bit maybe busy during init */ 1143 /* EM Transmit bit maybe busy during init */
1143 for (i = 0; i < MAX_RETRY; i++) { 1144 for (i = 0; i < EM_MAX_RETRY; i++) {
1144 rc = ahci_transmit_led_message(ap, 1145 rc = ahci_transmit_led_message(ap,
1145 emp->led_state, 1146 emp->led_state,
1146 4); 1147 4);
1147 if (rc == -EBUSY) 1148 if (rc == -EBUSY)
1148 udelay(100); 1149 msleep(1);
1149 else 1150 else
1150 break; 1151 break;
1151 } 1152 }
@@ -1339,7 +1340,7 @@ static ssize_t ahci_transmit_led_message(struct ata_port *ap, u32 state,
1339 1340
1340 /* get the slot number from the message */ 1341 /* get the slot number from the message */
1341 pmp = (state & EM_MSG_LED_PMP_SLOT) >> 8; 1342 pmp = (state & EM_MSG_LED_PMP_SLOT) >> 8;
1342 if (pmp < MAX_SLOTS) 1343 if (pmp < EM_MAX_SLOTS)
1343 emp = &pp->em_priv[pmp]; 1344 emp = &pp->em_priv[pmp];
1344 else 1345 else
1345 return -EINVAL; 1346 return -EINVAL;
@@ -1407,7 +1408,7 @@ static ssize_t ahci_led_store(struct ata_port *ap, const char *buf,
1407 1408
1408 /* get the slot number from the message */ 1409 /* get the slot number from the message */
1409 pmp = (state & EM_MSG_LED_PMP_SLOT) >> 8; 1410 pmp = (state & EM_MSG_LED_PMP_SLOT) >> 8;
1410 if (pmp < MAX_SLOTS) 1411 if (pmp < EM_MAX_SLOTS)
1411 emp = &pp->em_priv[pmp]; 1412 emp = &pp->em_priv[pmp];
1412 else 1413 else
1413 return -EINVAL; 1414 return -EINVAL;
@@ -2316,9 +2317,17 @@ static int ahci_port_suspend(struct ata_port *ap, pm_message_t mesg)
2316static int ahci_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg) 2317static int ahci_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
2317{ 2318{
2318 struct ata_host *host = dev_get_drvdata(&pdev->dev); 2319 struct ata_host *host = dev_get_drvdata(&pdev->dev);
2320 struct ahci_host_priv *hpriv = host->private_data;
2319 void __iomem *mmio = host->iomap[AHCI_PCI_BAR]; 2321 void __iomem *mmio = host->iomap[AHCI_PCI_BAR];
2320 u32 ctl; 2322 u32 ctl;
2321 2323
2324 if (mesg.event & PM_EVENT_SUSPEND &&
2325 hpriv->flags & AHCI_HFLAG_NO_SUSPEND) {
2326 dev_printk(KERN_ERR, &pdev->dev,
2327 "BIOS update required for suspend/resume\n");
2328 return -EIO;
2329 }
2330
2322 if (mesg.event & PM_EVENT_SLEEP) { 2331 if (mesg.event & PM_EVENT_SLEEP) {
2323 /* AHCI spec rev1.1 section 8.3.3: 2332 /* AHCI spec rev1.1 section 8.3.3:
2324 * Software must disable interrupts prior to requesting a 2333 * Software must disable interrupts prior to requesting a
@@ -2575,6 +2584,51 @@ static void ahci_p5wdh_workaround(struct ata_host *host)
2575 } 2584 }
2576} 2585}
2577 2586
2587/*
2588 * SB600 ahci controller on ASUS M2A-VM can't do 64bit DMA with older
2589 * BIOS. The oldest version known to be broken is 0901 and working is
2590 * 1501 which was released on 2007-10-26. Force 32bit DMA on anything
2591 * older than 1501. Please read bko#9412 for more info.
2592 */
2593static bool ahci_asus_m2a_vm_32bit_only(struct pci_dev *pdev)
2594{
2595 static const struct dmi_system_id sysids[] = {
2596 {
2597 .ident = "ASUS M2A-VM",
2598 .matches = {
2599 DMI_MATCH(DMI_BOARD_VENDOR,
2600 "ASUSTeK Computer INC."),
2601 DMI_MATCH(DMI_BOARD_NAME, "M2A-VM"),
2602 },
2603 },
2604 { }
2605 };
2606 const char *cutoff_mmdd = "10/26";
2607 const char *date;
2608 int year;
2609
2610 if (pdev->bus->number != 0 || pdev->devfn != PCI_DEVFN(0x12, 0) ||
2611 !dmi_check_system(sysids))
2612 return false;
2613
2614 /*
2615 * Argh.... both version and date are free form strings.
2616 * Let's hope they're using the same date format across
2617 * different versions.
2618 */
2619 date = dmi_get_system_info(DMI_BIOS_DATE);
2620 year = dmi_get_year(DMI_BIOS_DATE);
2621 if (date && strlen(date) >= 10 && date[2] == '/' && date[5] == '/' &&
2622 (year > 2007 ||
2623 (year == 2007 && strncmp(date, cutoff_mmdd, 5) >= 0)))
2624 return false;
2625
2626 dev_printk(KERN_WARNING, &pdev->dev, "ASUS M2A-VM: BIOS too old, "
2627 "forcing 32bit DMA, update BIOS\n");
2628
2629 return true;
2630}
2631
2578static bool ahci_broken_system_poweroff(struct pci_dev *pdev) 2632static bool ahci_broken_system_poweroff(struct pci_dev *pdev)
2579{ 2633{
2580 static const struct dmi_system_id broken_systems[] = { 2634 static const struct dmi_system_id broken_systems[] = {
@@ -2610,6 +2664,63 @@ static bool ahci_broken_system_poweroff(struct pci_dev *pdev)
2610 return false; 2664 return false;
2611} 2665}
2612 2666
2667static bool ahci_broken_suspend(struct pci_dev *pdev)
2668{
2669 static const struct dmi_system_id sysids[] = {
2670 /*
2671 * On HP dv[4-6] and HDX18 with earlier BIOSen, link
2672 * to the harddisk doesn't become online after
2673 * resuming from STR. Warn and fail suspend.
2674 */
2675 {
2676 .ident = "dv4",
2677 .matches = {
2678 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
2679 DMI_MATCH(DMI_PRODUCT_NAME,
2680 "HP Pavilion dv4 Notebook PC"),
2681 },
2682 .driver_data = "F.30", /* cutoff BIOS version */
2683 },
2684 {
2685 .ident = "dv5",
2686 .matches = {
2687 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
2688 DMI_MATCH(DMI_PRODUCT_NAME,
2689 "HP Pavilion dv5 Notebook PC"),
2690 },
2691 .driver_data = "F.16", /* cutoff BIOS version */
2692 },
2693 {
2694 .ident = "dv6",
2695 .matches = {
2696 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
2697 DMI_MATCH(DMI_PRODUCT_NAME,
2698 "HP Pavilion dv6 Notebook PC"),
2699 },
2700 .driver_data = "F.21", /* cutoff BIOS version */
2701 },
2702 {
2703 .ident = "HDX18",
2704 .matches = {
2705 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
2706 DMI_MATCH(DMI_PRODUCT_NAME,
2707 "HP HDX18 Notebook PC"),
2708 },
2709 .driver_data = "F.23", /* cutoff BIOS version */
2710 },
2711 { } /* terminate list */
2712 };
2713 const struct dmi_system_id *dmi = dmi_first_match(sysids);
2714 const char *ver;
2715
2716 if (!dmi || pdev->bus->number || pdev->devfn != PCI_DEVFN(0x1f, 2))
2717 return false;
2718
2719 ver = dmi_get_system_info(DMI_BIOS_VERSION);
2720
2721 return !ver || strcmp(ver, dmi->driver_data) < 0;
2722}
2723
2613static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 2724static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
2614{ 2725{
2615 static int printed_version; 2726 static int printed_version;
@@ -2678,6 +2789,10 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
2678 if (board_id == board_ahci_sb700 && pdev->revision >= 0x40) 2789 if (board_id == board_ahci_sb700 && pdev->revision >= 0x40)
2679 hpriv->flags &= ~AHCI_HFLAG_IGN_SERR_INTERNAL; 2790 hpriv->flags &= ~AHCI_HFLAG_IGN_SERR_INTERNAL;
2680 2791
2792 /* apply ASUS M2A_VM quirk */
2793 if (ahci_asus_m2a_vm_32bit_only(pdev))
2794 hpriv->flags |= AHCI_HFLAG_32BIT_ONLY;
2795
2681 if (!(hpriv->flags & AHCI_HFLAG_NO_MSI)) 2796 if (!(hpriv->flags & AHCI_HFLAG_NO_MSI))
2682 pci_enable_msi(pdev); 2797 pci_enable_msi(pdev);
2683 2798
@@ -2715,6 +2830,12 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
2715 "quirky BIOS, skipping spindown on poweroff\n"); 2830 "quirky BIOS, skipping spindown on poweroff\n");
2716 } 2831 }
2717 2832
2833 if (ahci_broken_suspend(pdev)) {
2834 hpriv->flags |= AHCI_HFLAG_NO_SUSPEND;
2835 dev_printk(KERN_WARNING, &pdev->dev,
2836 "BIOS update required for suspend/resume\n");
2837 }
2838
2718 /* CAP.NP sometimes indicate the index of the last enabled 2839 /* CAP.NP sometimes indicate the index of the last enabled
2719 * port, at other times, that of the last possible port, so 2840 * port, at other times, that of the last possible port, so
2720 * determining the maximum port number requires looking at 2841 * determining the maximum port number requires looking at
diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c
index d51a17c0f59b..d0a14cf2bd74 100644
--- a/drivers/ata/ata_piix.c
+++ b/drivers/ata/ata_piix.c
@@ -223,10 +223,8 @@ static const struct pci_device_id piix_pci_tbl[] = {
223 /* ICH8 Mobile PATA Controller */ 223 /* ICH8 Mobile PATA Controller */
224 { 0x8086, 0x2850, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 }, 224 { 0x8086, 0x2850, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
225 225
226 /* NOTE: The following PCI ids must be kept in sync with the 226 /* SATA ports */
227 * list in drivers/pci/quirks.c. 227
228 */
229
230 /* 82801EB (ICH5) */ 228 /* 82801EB (ICH5) */
231 { 0x8086, 0x24d1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich5_sata }, 229 { 0x8086, 0x24d1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich5_sata },
232 /* 82801EB (ICH5) */ 230 /* 82801EB (ICH5) */
@@ -1455,6 +1453,15 @@ static bool piix_broken_system_poweroff(struct pci_dev *pdev)
1455 /* PCI slot number of the controller */ 1453 /* PCI slot number of the controller */
1456 .driver_data = (void *)0x1FUL, 1454 .driver_data = (void *)0x1FUL,
1457 }, 1455 },
1456 {
1457 .ident = "HP Compaq nc6000",
1458 .matches = {
1459 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
1460 DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nc6000"),
1461 },
1462 /* PCI slot number of the controller */
1463 .driver_data = (void *)0x1FUL,
1464 },
1458 1465
1459 { } /* terminate list */ 1466 { } /* terminate list */
1460 }; 1467 };
@@ -1500,8 +1507,8 @@ static int __devinit piix_init_one(struct pci_dev *pdev,
1500 dev_printk(KERN_DEBUG, &pdev->dev, 1507 dev_printk(KERN_DEBUG, &pdev->dev,
1501 "version " DRV_VERSION "\n"); 1508 "version " DRV_VERSION "\n");
1502 1509
1503 /* no hotplugging support (FIXME) */ 1510 /* no hotplugging support for later devices (FIXME) */
1504 if (!in_module_init) 1511 if (!in_module_init && ent->driver_data >= ich5_sata)
1505 return -ENODEV; 1512 return -ENODEV;
1506 1513
1507 if (piix_broken_system_poweroff(pdev)) { 1514 if (piix_broken_system_poweroff(pdev)) {
@@ -1582,6 +1589,7 @@ static int __devinit piix_init_one(struct pci_dev *pdev,
1582 host->ports[1]->mwdma_mask = 0; 1589 host->ports[1]->mwdma_mask = 0;
1583 host->ports[1]->udma_mask = 0; 1590 host->ports[1]->udma_mask = 0;
1584 } 1591 }
1592 host->flags |= ATA_HOST_PARALLEL_SCAN;
1585 1593
1586 pci_set_master(pdev); 1594 pci_set_master(pdev);
1587 return ata_pci_sff_activate_host(host, ata_sff_interrupt, &piix_sht); 1595 return ata_pci_sff_activate_host(host, ata_sff_interrupt, &piix_sht);
diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c
index c9242301cfa1..ca4d208ddf3b 100644
--- a/drivers/ata/libata-core.c
+++ b/drivers/ata/libata-core.c
@@ -5031,7 +5031,6 @@ int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active)
5031{ 5031{
5032 int nr_done = 0; 5032 int nr_done = 0;
5033 u32 done_mask; 5033 u32 done_mask;
5034 int i;
5035 5034
5036 done_mask = ap->qc_active ^ qc_active; 5035 done_mask = ap->qc_active ^ qc_active;
5037 5036
@@ -5041,16 +5040,16 @@ int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active)
5041 return -EINVAL; 5040 return -EINVAL;
5042 } 5041 }
5043 5042
5044 for (i = 0; i < ATA_MAX_QUEUE; i++) { 5043 while (done_mask) {
5045 struct ata_queued_cmd *qc; 5044 struct ata_queued_cmd *qc;
5045 unsigned int tag = __ffs(done_mask);
5046 5046
5047 if (!(done_mask & (1 << i))) 5047 qc = ata_qc_from_tag(ap, tag);
5048 continue; 5048 if (qc) {
5049
5050 if ((qc = ata_qc_from_tag(ap, i))) {
5051 ata_qc_complete(qc); 5049 ata_qc_complete(qc);
5052 nr_done++; 5050 nr_done++;
5053 } 5051 }
5052 done_mask &= ~(1 << tag);
5054 } 5053 }
5055 5054
5056 return nr_done; 5055 return nr_done;
diff --git a/drivers/ata/libata-scsi.c b/drivers/ata/libata-scsi.c
index 342316064e9f..d0dfeef55db5 100644
--- a/drivers/ata/libata-scsi.c
+++ b/drivers/ata/libata-scsi.c
@@ -1084,7 +1084,7 @@ static int atapi_drain_needed(struct request *rq)
1084 if (likely(!blk_pc_request(rq))) 1084 if (likely(!blk_pc_request(rq)))
1085 return 0; 1085 return 0;
1086 1086
1087 if (!rq->data_len || (rq->cmd_flags & REQ_RW)) 1087 if (!blk_rq_bytes(rq) || (rq->cmd_flags & REQ_RW))
1088 return 0; 1088 return 0;
1089 1089
1090 return atapi_cmd_type(rq->cmd[0]) == ATAPI_MISC; 1090 return atapi_cmd_type(rq->cmd[0]) == ATAPI_MISC;
diff --git a/drivers/ata/libata-sff.c b/drivers/ata/libata-sff.c
index bb18415d3d63..bbbb1fab1755 100644
--- a/drivers/ata/libata-sff.c
+++ b/drivers/ata/libata-sff.c
@@ -727,17 +727,23 @@ unsigned int ata_sff_data_xfer(struct ata_device *dev, unsigned char *buf,
727 else 727 else
728 iowrite16_rep(data_addr, buf, words); 728 iowrite16_rep(data_addr, buf, words);
729 729
730 /* Transfer trailing 1 byte, if any. */ 730 /* Transfer trailing byte, if any. */
731 if (unlikely(buflen & 0x01)) { 731 if (unlikely(buflen & 0x01)) {
732 __le16 align_buf[1] = { 0 }; 732 unsigned char pad[2];
733 unsigned char *trailing_buf = buf + buflen - 1;
734 733
734 /* Point buf to the tail of buffer */
735 buf += buflen - 1;
736
737 /*
738 * Use io*16_rep() accessors here as well to avoid pointlessly
739 * swapping bytes to and fro on the big endian machines...
740 */
735 if (rw == READ) { 741 if (rw == READ) {
736 align_buf[0] = cpu_to_le16(ioread16(data_addr)); 742 ioread16_rep(data_addr, pad, 1);
737 memcpy(trailing_buf, align_buf, 1); 743 *buf = pad[0];
738 } else { 744 } else {
739 memcpy(align_buf, trailing_buf, 1); 745 pad[0] = *buf;
740 iowrite16(le16_to_cpu(align_buf[0]), data_addr); 746 iowrite16_rep(data_addr, pad, 1);
741 } 747 }
742 words++; 748 words++;
743 } 749 }
diff --git a/drivers/ata/pata_ali.c b/drivers/ata/pata_ali.c
index 751b7ea4816c..fc9c5d6d7d80 100644
--- a/drivers/ata/pata_ali.c
+++ b/drivers/ata/pata_ali.c
@@ -497,14 +497,16 @@ static int ali_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
497 }; 497 };
498 /* Revision 0x20 added DMA */ 498 /* Revision 0x20 added DMA */
499 static const struct ata_port_info info_20 = { 499 static const struct ata_port_info info_20 = {
500 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48, 500 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48 |
501 ATA_FLAG_IGN_SIMPLEX,
501 .pio_mask = ATA_PIO4, 502 .pio_mask = ATA_PIO4,
502 .mwdma_mask = ATA_MWDMA2, 503 .mwdma_mask = ATA_MWDMA2,
503 .port_ops = &ali_20_port_ops 504 .port_ops = &ali_20_port_ops
504 }; 505 };
505 /* Revision 0x20 with support logic added UDMA */ 506 /* Revision 0x20 with support logic added UDMA */
506 static const struct ata_port_info info_20_udma = { 507 static const struct ata_port_info info_20_udma = {
507 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48, 508 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48 |
509 ATA_FLAG_IGN_SIMPLEX,
508 .pio_mask = ATA_PIO4, 510 .pio_mask = ATA_PIO4,
509 .mwdma_mask = ATA_MWDMA2, 511 .mwdma_mask = ATA_MWDMA2,
510 .udma_mask = ATA_UDMA2, 512 .udma_mask = ATA_UDMA2,
@@ -512,7 +514,8 @@ static int ali_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
512 }; 514 };
513 /* Revision 0xC2 adds UDMA66 */ 515 /* Revision 0xC2 adds UDMA66 */
514 static const struct ata_port_info info_c2 = { 516 static const struct ata_port_info info_c2 = {
515 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48, 517 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48 |
518 ATA_FLAG_IGN_SIMPLEX,
516 .pio_mask = ATA_PIO4, 519 .pio_mask = ATA_PIO4,
517 .mwdma_mask = ATA_MWDMA2, 520 .mwdma_mask = ATA_MWDMA2,
518 .udma_mask = ATA_UDMA4, 521 .udma_mask = ATA_UDMA4,
@@ -520,7 +523,8 @@ static int ali_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
520 }; 523 };
521 /* Revision 0xC3 is UDMA66 for now */ 524 /* Revision 0xC3 is UDMA66 for now */
522 static const struct ata_port_info info_c3 = { 525 static const struct ata_port_info info_c3 = {
523 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48, 526 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48 |
527 ATA_FLAG_IGN_SIMPLEX,
524 .pio_mask = ATA_PIO4, 528 .pio_mask = ATA_PIO4,
525 .mwdma_mask = ATA_MWDMA2, 529 .mwdma_mask = ATA_MWDMA2,
526 .udma_mask = ATA_UDMA4, 530 .udma_mask = ATA_UDMA4,
@@ -528,7 +532,8 @@ static int ali_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
528 }; 532 };
529 /* Revision 0xC4 is UDMA100 */ 533 /* Revision 0xC4 is UDMA100 */
530 static const struct ata_port_info info_c4 = { 534 static const struct ata_port_info info_c4 = {
531 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48, 535 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48 |
536 ATA_FLAG_IGN_SIMPLEX,
532 .pio_mask = ATA_PIO4, 537 .pio_mask = ATA_PIO4,
533 .mwdma_mask = ATA_MWDMA2, 538 .mwdma_mask = ATA_MWDMA2,
534 .udma_mask = ATA_UDMA5, 539 .udma_mask = ATA_UDMA5,
@@ -536,7 +541,7 @@ static int ali_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
536 }; 541 };
537 /* Revision 0xC5 is UDMA133 with LBA48 DMA */ 542 /* Revision 0xC5 is UDMA133 with LBA48 DMA */
538 static const struct ata_port_info info_c5 = { 543 static const struct ata_port_info info_c5 = {
539 .flags = ATA_FLAG_SLAVE_POSS, 544 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_IGN_SIMPLEX,
540 .pio_mask = ATA_PIO4, 545 .pio_mask = ATA_PIO4,
541 .mwdma_mask = ATA_MWDMA2, 546 .mwdma_mask = ATA_MWDMA2,
542 .udma_mask = ATA_UDMA6, 547 .udma_mask = ATA_UDMA6,
diff --git a/drivers/ata/pata_efar.c b/drivers/ata/pata_efar.c
index 2085e0a3a05a..2a6412f5d117 100644
--- a/drivers/ata/pata_efar.c
+++ b/drivers/ata/pata_efar.c
@@ -22,7 +22,7 @@
22#include <linux/ata.h> 22#include <linux/ata.h>
23 23
24#define DRV_NAME "pata_efar" 24#define DRV_NAME "pata_efar"
25#define DRV_VERSION "0.4.4" 25#define DRV_VERSION "0.4.5"
26 26
27/** 27/**
28 * efar_pre_reset - Enable bits 28 * efar_pre_reset - Enable bits
@@ -98,18 +98,17 @@ static void efar_set_piomode (struct ata_port *ap, struct ata_device *adev)
98 { 2, 1 }, 98 { 2, 1 },
99 { 2, 3 }, }; 99 { 2, 3 }, };
100 100
101 if (pio > 2) 101 if (pio > 1)
102 control |= 1; /* TIME1 enable */ 102 control |= 1; /* TIME */
103 if (ata_pio_need_iordy(adev)) /* PIO 3/4 require IORDY */ 103 if (ata_pio_need_iordy(adev)) /* PIO 3/4 require IORDY */
104 control |= 2; /* IE enable */ 104 control |= 2; /* IE */
105 /* Intel specifies that the PPE functionality is for disk only */ 105 /* Intel specifies that the prefetch/posting is for disk only */
106 if (adev->class == ATA_DEV_ATA) 106 if (adev->class == ATA_DEV_ATA)
107 control |= 4; /* PPE enable */ 107 control |= 4; /* PPE */
108 108
109 pci_read_config_word(dev, idetm_port, &idetm_data); 109 pci_read_config_word(dev, idetm_port, &idetm_data);
110 110
111 /* Enable PPE, IE and TIME as appropriate */ 111 /* Set PPE, IE, and TIME as appropriate */
112
113 if (adev->devno == 0) { 112 if (adev->devno == 0) {
114 idetm_data &= 0xCCF0; 113 idetm_data &= 0xCCF0;
115 idetm_data |= control; 114 idetm_data |= control;
@@ -129,7 +128,7 @@ static void efar_set_piomode (struct ata_port *ap, struct ata_device *adev)
129 pci_write_config_byte(dev, 0x44, slave_data); 128 pci_write_config_byte(dev, 0x44, slave_data);
130 } 129 }
131 130
132 idetm_data |= 0x4000; /* Ensure SITRE is enabled */ 131 idetm_data |= 0x4000; /* Ensure SITRE is set */
133 pci_write_config_word(dev, idetm_port, idetm_data); 132 pci_write_config_word(dev, idetm_port, idetm_data);
134} 133}
135 134
diff --git a/drivers/ata/pata_legacy.c b/drivers/ata/pata_legacy.c
index f72c6c5b820f..6932e56d179c 100644
--- a/drivers/ata/pata_legacy.c
+++ b/drivers/ata/pata_legacy.c
@@ -48,6 +48,7 @@
48 * 48 *
49 */ 49 */
50 50
51#include <linux/async.h>
51#include <linux/kernel.h> 52#include <linux/kernel.h>
52#include <linux/module.h> 53#include <linux/module.h>
53#include <linux/pci.h> 54#include <linux/pci.h>
@@ -1028,6 +1029,7 @@ static __init int legacy_init_one(struct legacy_probe *probe)
1028 &legacy_sht); 1029 &legacy_sht);
1029 if (ret) 1030 if (ret)
1030 goto fail; 1031 goto fail;
1032 async_synchronize_full();
1031 ld->platform_dev = pdev; 1033 ld->platform_dev = pdev;
1032 1034
1033 /* Nothing found means we drop the port as its probably not there */ 1035 /* Nothing found means we drop the port as its probably not there */
diff --git a/drivers/ata/pata_netcell.c b/drivers/ata/pata_netcell.c
index bdb236957cb9..f0d52f72f5bb 100644
--- a/drivers/ata/pata_netcell.c
+++ b/drivers/ata/pata_netcell.c
@@ -20,13 +20,24 @@
20 20
21/* No PIO or DMA methods needed for this device */ 21/* No PIO or DMA methods needed for this device */
22 22
23static unsigned int netcell_read_id(struct ata_device *adev,
24 struct ata_taskfile *tf, u16 *id)
25{
26 unsigned int err_mask = ata_do_dev_read_id(adev, tf, id);
27 /* Firmware forgets to mark words 85-87 valid */
28 if (err_mask == 0)
29 id[ATA_ID_CSF_DEFAULT] |= 0x4000;
30 return err_mask;
31}
32
23static struct scsi_host_template netcell_sht = { 33static struct scsi_host_template netcell_sht = {
24 ATA_BMDMA_SHT(DRV_NAME), 34 ATA_BMDMA_SHT(DRV_NAME),
25}; 35};
26 36
27static struct ata_port_operations netcell_ops = { 37static struct ata_port_operations netcell_ops = {
28 .inherits = &ata_bmdma_port_ops, 38 .inherits = &ata_bmdma_port_ops,
29 .cable_detect = ata_cable_80wire, 39 .cable_detect = ata_cable_80wire,
40 .read_id = netcell_read_id,
30}; 41};
31 42
32 43
diff --git a/drivers/ata/sata_nv.c b/drivers/ata/sata_nv.c
index 6cda12ba8122..b2d11f300c39 100644
--- a/drivers/ata/sata_nv.c
+++ b/drivers/ata/sata_nv.c
@@ -305,8 +305,8 @@ static irqreturn_t nv_ck804_interrupt(int irq, void *dev_instance);
305static int nv_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val); 305static int nv_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val);
306static int nv_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val); 306static int nv_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val);
307 307
308static int nv_noclassify_hardreset(struct ata_link *link, unsigned int *class, 308static int nv_hardreset(struct ata_link *link, unsigned int *class,
309 unsigned long deadline); 309 unsigned long deadline);
310static void nv_nf2_freeze(struct ata_port *ap); 310static void nv_nf2_freeze(struct ata_port *ap);
311static void nv_nf2_thaw(struct ata_port *ap); 311static void nv_nf2_thaw(struct ata_port *ap);
312static void nv_ck804_freeze(struct ata_port *ap); 312static void nv_ck804_freeze(struct ata_port *ap);
@@ -406,49 +406,82 @@ static struct scsi_host_template nv_swncq_sht = {
406 .slave_configure = nv_swncq_slave_config, 406 .slave_configure = nv_swncq_slave_config,
407}; 407};
408 408
409static struct ata_port_operations nv_common_ops = { 409/*
410 * NV SATA controllers have various different problems with hardreset
411 * protocol depending on the specific controller and device.
412 *
413 * GENERIC:
414 *
415 * bko11195 reports that link doesn't come online after hardreset on
416 * generic nv's and there have been several other similar reports on
417 * linux-ide.
418 *
419 * bko12351#c23 reports that warmplug on MCP61 doesn't work with
420 * softreset.
421 *
422 * NF2/3:
423 *
424 * bko3352 reports nf2/3 controllers can't determine device signature
425 * reliably after hardreset. The following thread reports detection
426 * failure on cold boot with the standard debouncing timing.
427 *
428 * http://thread.gmane.org/gmane.linux.ide/34098
429 *
430 * bko12176 reports that hardreset fails to bring up the link during
431 * boot on nf2.
432 *
433 * CK804:
434 *
435 * For initial probing after boot and hot plugging, hardreset mostly
436 * works fine on CK804 but curiously, reprobing on the initial port
437 * by rescanning or rmmod/insmod fails to acquire the initial D2H Reg
438 * FIS in somewhat undeterministic way.
439 *
440 * SWNCQ:
441 *
442 * bko12351 reports that when SWNCQ is enabled, for hotplug to work,
443 * hardreset should be used and hardreset can't report proper
444 * signature, which suggests that mcp5x is closer to nf2 as long as
445 * reset quirkiness is concerned.
446 *
447 * bko12703 reports that boot probing fails for intel SSD with
448 * hardreset. Link fails to come online. Softreset works fine.
449 *
450 * The failures are varied but the following patterns seem true for
451 * all flavors.
452 *
453 * - Softreset during boot always works.
454 *
455 * - Hardreset during boot sometimes fails to bring up the link on
456 * certain comibnations and device signature acquisition is
457 * unreliable.
458 *
459 * - Hardreset is often necessary after hotplug.
460 *
461 * So, preferring softreset for boot probing and error handling (as
462 * hardreset might bring down the link) but using hardreset for
463 * post-boot probing should work around the above issues in most
464 * cases. Define nv_hardreset() which only kicks in for post-boot
465 * probing and use it for all variants.
466 */
467static struct ata_port_operations nv_generic_ops = {
410 .inherits = &ata_bmdma_port_ops, 468 .inherits = &ata_bmdma_port_ops,
411 .lost_interrupt = ATA_OP_NULL, 469 .lost_interrupt = ATA_OP_NULL,
412 .scr_read = nv_scr_read, 470 .scr_read = nv_scr_read,
413 .scr_write = nv_scr_write, 471 .scr_write = nv_scr_write,
472 .hardreset = nv_hardreset,
414}; 473};
415 474
416/* OSDL bz11195 reports that link doesn't come online after hardreset
417 * on generic nv's and there have been several other similar reports
418 * on linux-ide. Disable hardreset for generic nv's.
419 */
420static struct ata_port_operations nv_generic_ops = {
421 .inherits = &nv_common_ops,
422 .hardreset = ATA_OP_NULL,
423};
424
425/* nf2 is ripe with hardreset related problems.
426 *
427 * kernel bz#3352 reports nf2/3 controllers can't determine device
428 * signature reliably. The following thread reports detection failure
429 * on cold boot with the standard debouncing timing.
430 *
431 * http://thread.gmane.org/gmane.linux.ide/34098
432 *
433 * And bz#12176 reports that hardreset simply doesn't work on nf2.
434 * Give up on it and just don't do hardreset.
435 */
436static struct ata_port_operations nv_nf2_ops = { 475static struct ata_port_operations nv_nf2_ops = {
437 .inherits = &nv_generic_ops, 476 .inherits = &nv_generic_ops,
438 .freeze = nv_nf2_freeze, 477 .freeze = nv_nf2_freeze,
439 .thaw = nv_nf2_thaw, 478 .thaw = nv_nf2_thaw,
440}; 479};
441 480
442/* For initial probing after boot and hot plugging, hardreset mostly
443 * works fine on CK804 but curiously, reprobing on the initial port by
444 * rescanning or rmmod/insmod fails to acquire the initial D2H Reg FIS
445 * in somewhat undeterministic way. Use noclassify hardreset.
446 */
447static struct ata_port_operations nv_ck804_ops = { 481static struct ata_port_operations nv_ck804_ops = {
448 .inherits = &nv_common_ops, 482 .inherits = &nv_generic_ops,
449 .freeze = nv_ck804_freeze, 483 .freeze = nv_ck804_freeze,
450 .thaw = nv_ck804_thaw, 484 .thaw = nv_ck804_thaw,
451 .hardreset = nv_noclassify_hardreset,
452 .host_stop = nv_ck804_host_stop, 485 .host_stop = nv_ck804_host_stop,
453}; 486};
454 487
@@ -476,19 +509,8 @@ static struct ata_port_operations nv_adma_ops = {
476 .host_stop = nv_adma_host_stop, 509 .host_stop = nv_adma_host_stop,
477}; 510};
478 511
479/* Kernel bz#12351 reports that when SWNCQ is enabled, for hotplug to
480 * work, hardreset should be used and hardreset can't report proper
481 * signature, which suggests that mcp5x is closer to nf2 as long as
482 * reset quirkiness is concerned. Define separate ops for mcp5x with
483 * nv_noclassify_hardreset().
484 */
485static struct ata_port_operations nv_mcp5x_ops = {
486 .inherits = &nv_common_ops,
487 .hardreset = nv_noclassify_hardreset,
488};
489
490static struct ata_port_operations nv_swncq_ops = { 512static struct ata_port_operations nv_swncq_ops = {
491 .inherits = &nv_mcp5x_ops, 513 .inherits = &nv_generic_ops,
492 514
493 .qc_defer = ata_std_qc_defer, 515 .qc_defer = ata_std_qc_defer,
494 .qc_prep = nv_swncq_qc_prep, 516 .qc_prep = nv_swncq_qc_prep,
@@ -557,7 +579,7 @@ static const struct ata_port_info nv_port_info[] = {
557 .pio_mask = NV_PIO_MASK, 579 .pio_mask = NV_PIO_MASK,
558 .mwdma_mask = NV_MWDMA_MASK, 580 .mwdma_mask = NV_MWDMA_MASK,
559 .udma_mask = NV_UDMA_MASK, 581 .udma_mask = NV_UDMA_MASK,
560 .port_ops = &nv_mcp5x_ops, 582 .port_ops = &nv_generic_ops,
561 .private_data = NV_PI_PRIV(nv_generic_interrupt, &nv_sht), 583 .private_data = NV_PI_PRIV(nv_generic_interrupt, &nv_sht),
562 }, 584 },
563 /* SWNCQ */ 585 /* SWNCQ */
@@ -1559,15 +1581,24 @@ static int nv_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val)
1559 return 0; 1581 return 0;
1560} 1582}
1561 1583
1562static int nv_noclassify_hardreset(struct ata_link *link, unsigned int *class, 1584static int nv_hardreset(struct ata_link *link, unsigned int *class,
1563 unsigned long deadline) 1585 unsigned long deadline)
1564{ 1586{
1565 bool online; 1587 struct ata_eh_context *ehc = &link->eh_context;
1566 int rc;
1567 1588
1568 rc = sata_link_hardreset(link, sata_deb_timing_hotplug, deadline, 1589 /* Do hardreset iff it's post-boot probing, please read the
1569 &online, NULL); 1590 * comment above port ops for details.
1570 return online ? -EAGAIN : rc; 1591 */
1592 if (!(link->ap->pflags & ATA_PFLAG_LOADING) &&
1593 !ata_dev_enabled(link->device))
1594 sata_link_hardreset(link, sata_deb_timing_hotplug, deadline,
1595 NULL, NULL);
1596 else if (!(ehc->i.flags & ATA_EHI_QUIET))
1597 ata_link_printk(link, KERN_INFO,
1598 "nv: skipping hardreset on occupied port\n");
1599
1600 /* device signature acquisition is unreliable */
1601 return -EAGAIN;
1571} 1602}
1572 1603
1573static void nv_nf2_freeze(struct ata_port *ap) 1604static void nv_nf2_freeze(struct ata_port *ap)
diff --git a/drivers/ata/sata_sil.c b/drivers/ata/sata_sil.c
index e67ce8e5caa5..030ec079b184 100644
--- a/drivers/ata/sata_sil.c
+++ b/drivers/ata/sata_sil.c
@@ -183,7 +183,7 @@ static struct scsi_host_template sil_sht = {
183}; 183};
184 184
185static struct ata_port_operations sil_ops = { 185static struct ata_port_operations sil_ops = {
186 .inherits = &ata_bmdma_port_ops, 186 .inherits = &ata_bmdma32_port_ops,
187 .dev_config = sil_dev_config, 187 .dev_config = sil_dev_config,
188 .set_mode = sil_set_mode, 188 .set_mode = sil_set_mode,
189 .bmdma_setup = sil_bmdma_setup, 189 .bmdma_setup = sil_bmdma_setup,
diff --git a/drivers/ata/sata_sx4.c b/drivers/ata/sata_sx4.c
index eb05a3c82a9e..bbcf970068ad 100644
--- a/drivers/ata/sata_sx4.c
+++ b/drivers/ata/sata_sx4.c
@@ -193,6 +193,7 @@ enum {
193 PDC_TIMER_MASK_INT, 193 PDC_TIMER_MASK_INT,
194}; 194};
195 195
196#define ECC_ERASE_BUF_SZ (128 * 1024)
196 197
197struct pdc_port_priv { 198struct pdc_port_priv {
198 u8 dimm_buf[(ATA_PRD_SZ * ATA_MAX_PRD) + 512]; 199 u8 dimm_buf[(ATA_PRD_SZ * ATA_MAX_PRD) + 512];
@@ -1280,7 +1281,6 @@ static unsigned int pdc20621_dimm_init(struct ata_host *host)
1280{ 1281{
1281 int speed, size, length; 1282 int speed, size, length;
1282 u32 addr, spd0, pci_status; 1283 u32 addr, spd0, pci_status;
1283 u32 tmp = 0;
1284 u32 time_period = 0; 1284 u32 time_period = 0;
1285 u32 tcount = 0; 1285 u32 tcount = 0;
1286 u32 ticks = 0; 1286 u32 ticks = 0;
@@ -1395,14 +1395,17 @@ static unsigned int pdc20621_dimm_init(struct ata_host *host)
1395 pdc20621_i2c_read(host, PDC_DIMM0_SPD_DEV_ADDRESS, 1395 pdc20621_i2c_read(host, PDC_DIMM0_SPD_DEV_ADDRESS,
1396 PDC_DIMM_SPD_TYPE, &spd0); 1396 PDC_DIMM_SPD_TYPE, &spd0);
1397 if (spd0 == 0x02) { 1397 if (spd0 == 0x02) {
1398 void *buf;
1398 VPRINTK("Start ECC initialization\n"); 1399 VPRINTK("Start ECC initialization\n");
1399 addr = 0; 1400 addr = 0;
1400 length = size * 1024 * 1024; 1401 length = size * 1024 * 1024;
1402 buf = kzalloc(ECC_ERASE_BUF_SZ, GFP_KERNEL);
1401 while (addr < length) { 1403 while (addr < length) {
1402 pdc20621_put_to_dimm(host, (void *) &tmp, addr, 1404 pdc20621_put_to_dimm(host, buf, addr,
1403 sizeof(u32)); 1405 ECC_ERASE_BUF_SZ);
1404 addr += sizeof(u32); 1406 addr += ECC_ERASE_BUF_SZ;
1405 } 1407 }
1408 kfree(buf);
1406 VPRINTK("Finish ECC initialization\n"); 1409 VPRINTK("Finish ECC initialization\n");
1407 } 1410 }
1408 return 0; 1411 return 0;