20 files changed, 37 insertions, 37 deletions

diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index e62f693be8ea..39d829cd82dd 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -926,7 +926,7 @@ static bool ahci_broken_suspend(struct pci_dev *pdev)
                 /*
                  * Acer eMachines G725 has the same problem.  BIOS
                  * V1.03 is known to be broken.  V3.04 is known to
-                 * work.  Inbetween, there are V1.06, V2.06 and V3.03
+                 * work.  Between, there are V1.06, V2.06 and V3.03
                  * that we don't have much idea about.  For now,
                  * blacklist anything older than V3.04.
                  *
diff --git a/drivers/ata/ahci.h b/drivers/ata/ahci.h
index ccaf08122058..39865009c251 100644
--- a/drivers/ata/ahci.h
+++ b/drivers/ata/ahci.h
@@ -225,7 +225,7 @@ enum {
         /* em_ctl bits */
         EM_CTL_RST              = (1 << 9), /* Reset */
         EM_CTL_TM               = (1 << 8), /* Transmit Message */
-        EM_CTL_MR               = (1 << 0), /* Message Recieved */
+        EM_CTL_MR               = (1 << 0), /* Message Received */
         EM_CTL_ALHD             = (1 << 26), /* Activity LED */
         EM_CTL_XMT              = (1 << 25), /* Transmit Only */
         EM_CTL_SMB              = (1 << 24), /* Single Message Buffer */
@@ -281,7 +281,7 @@ struct ahci_port_priv {
 };
 
 struct ahci_host_priv {
-        void __iomem *          mmio;           /* bus-independant mem map */
+        void __iomem *          mmio;           /* bus-independent mem map */
         unsigned int            flags;          /* AHCI_HFLAG_* */
         u32                     cap;            /* cap to use */
         u32                     cap2;           /* cap2 to use */
diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c
index cdec4ab3b159..0bc3fd6c3fdb 100644
--- a/drivers/ata/ata_piix.c
+++ b/drivers/ata/ata_piix.c
@@ -38,16 +38,16 @@
  *  Hardware documentation available at http://developer.intel.com/
  *
  * Documentation
- *      Publically available from Intel web site. Errata documentation
- * is also publically available. As an aide to anyone hacking on this
+ *      Publicly available from Intel web site. Errata documentation
+ * is also publicly available. As an aide to anyone hacking on this
  * driver the list of errata that are relevant is below, going back to
  * PIIX4. Older device documentation is now a bit tricky to find.
  *
  * The chipsets all follow very much the same design. The original Triton
- * series chipsets do _not_ support independant device timings, but this
+ * series chipsets do _not_ support independent device timings, but this
  * is fixed in Triton II. With the odd mobile exception the chips then
  * change little except in gaining more modes until SATA arrives. This
- * driver supports only the chips with independant timing (that is those
+ * driver supports only the chips with independent timing (that is those
  * with SITRE and the 0x44 timing register). See pata_oldpiix and pata_mpiix
  * for the early chip drivers.
  *
@@ -122,7 +122,7 @@ enum {
         P2                      = 2,  /* port 2 */
         P3                      = 3,  /* port 3 */
         IDE                     = -1, /* IDE */
-        NA                      = -2, /* not avaliable */
+        NA                      = -2, /* not available */
         RV                      = -3, /* reserved */
 
         PIIX_AHCI_DEVICE        = 6,
diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c
index b91e19cab102..423c0a6952b2 100644
--- a/drivers/ata/libata-core.c
+++ b/drivers/ata/libata-core.c
@@ -5340,7 +5340,7 @@ int ata_host_suspend(struct ata_host *host, pm_message_t mesg)
  *
  *      Resume @host.  Actual operation is performed by EH.  This
  *      function requests EH to perform PM operations and returns.
- *      Note that all resume operations are performed parallely.
+ *      Note that all resume operations are performed parallelly.
  *
  *      LOCKING:
  *      Kernel thread context (may sleep).
diff --git a/drivers/ata/libata-eh.c b/drivers/ata/libata-eh.c
index df3f3140c9c7..88cd22fa65cd 100644
--- a/drivers/ata/libata-eh.c
+++ b/drivers/ata/libata-eh.c
@@ -771,7 +771,7 @@ void ata_scsi_port_error_handler(struct Scsi_Host *host, struct ata_port *ap)
                 /* process port suspend request */
                 ata_eh_handle_port_suspend(ap);
 
-                /* Exception might have happend after ->error_handler
+                /* Exception might have happened after ->error_handler
                  * recovered the port but before this point.  Repeat
                  * EH in such case.
                  */
@@ -1742,7 +1742,7 @@ void ata_eh_analyze_ncq_error(struct ata_link *link)
  *
  *      Analyze taskfile of @qc and further determine cause of
  *      failure.  This function also requests ATAPI sense data if
- *      avaliable.
+ *      available.
  *
  *      LOCKING:
  *      Kernel thread context (may sleep).
@@ -1893,7 +1893,7 @@ static int speed_down_verdict_cb(struct ata_ering_entry *ent, void *void_arg)
  *         occurred during last 5 mins, NCQ_OFF.
  *
  *      3. If more than 8 ATA_BUS, TOUT_HSM or UNK_DEV errors
- *         ocurred during last 5 mins, FALLBACK_TO_PIO
+ *         occurred during last 5 mins, FALLBACK_TO_PIO
  *
  *      4. If more than 3 TOUT_HSM or UNK_DEV errors occurred
  *         during last 10 mins, NCQ_OFF.
@@ -2577,7 +2577,7 @@ int ata_eh_reset(struct ata_link *link, int classify,
         if (link->flags & ATA_LFLAG_NO_SRST)
                 softreset = NULL;
 
-        /* make sure each reset attemp is at least COOL_DOWN apart */
+        /* make sure each reset attempt is at least COOL_DOWN apart */
         if (ehc->i.flags & ATA_EHI_DID_RESET) {
                 now = jiffies;
                 WARN_ON(time_after(ehc->last_reset, now));
@@ -2736,7 +2736,7 @@ int ata_eh_reset(struct ata_link *link, int classify,
                         if (!reset) {
                                 ata_link_printk(link, KERN_ERR,
                                                 "follow-up softreset required "
-                                                "but no softreset avaliable\n");
+                                                "but no softreset available\n");
                                 failed_link = link;
                                 rc = -EINVAL;
                                 goto fail;
diff --git a/drivers/ata/libata-scsi.c b/drivers/ata/libata-scsi.c
index a83419991357..e2f57e9e12f0 100644
--- a/drivers/ata/libata-scsi.c
+++ b/drivers/ata/libata-scsi.c
@@ -999,7 +999,7 @@ static void ata_gen_passthru_sense(struct ata_queued_cmd *qc)
  *      @qc: Command that we are erroring out
  *
  *      Generate sense block for a failed ATA command @qc.  Descriptor
- *      format is used to accomodate LBA48 block address.
+ *      format is used to accommodate LBA48 block address.
  *
  *      LOCKING:
  *      None.
diff --git a/drivers/ata/libata-sff.c b/drivers/ata/libata-sff.c
index cf7acbc0cfcb..f8380ce0f4d1 100644
--- a/drivers/ata/libata-sff.c
+++ b/drivers/ata/libata-sff.c
@@ -2839,7 +2839,7 @@ unsigned int ata_bmdma_port_intr(struct ata_port *ap, struct ata_queued_cmd *qc)
                 bmdma_stopped = true;
 
                 if (unlikely(host_stat & ATA_DMA_ERR)) {
-                        /* error when transfering data to/from memory */
+                        /* error when transferring data to/from memory */
                         qc->err_mask |= AC_ERR_HOST_BUS;
                         ap->hsm_task_state = HSM_ST_ERR;
                 }
@@ -3032,7 +3032,7 @@ void ata_bmdma_start(struct ata_queued_cmd *qc)
          * Or maybe I'm just being paranoid.
          *
          * FIXME: The posting of this write means I/O starts are
-         * unneccessarily delayed for MMIO
+         * unnecessarily delayed for MMIO
          */
 }
 EXPORT_SYMBOL_GPL(ata_bmdma_start);
diff --git a/drivers/ata/pata_amd.c b/drivers/ata/pata_amd.c
index 620a07cabe31..b0975a5ad8c4 100644
--- a/drivers/ata/pata_amd.c
+++ b/drivers/ata/pata_amd.c
@@ -11,7 +11,7 @@
  *      Power management on ports
  *
  *
- *  Documentation publically available.
+ *  Documentation publicly available.
  */
 
 #include <linux/kernel.h>
diff --git a/drivers/ata/pata_arasan_cf.c b/drivers/ata/pata_arasan_cf.c
index 65cee74605b4..719bb73a73e0 100644
--- a/drivers/ata/pata_arasan_cf.c
+++ b/drivers/ata/pata_arasan_cf.c
@@ -385,7 +385,7 @@ static inline int wait4buf(struct arasan_cf_dev *acdev)
                 return -ETIMEDOUT;
         }
 
-        /* Check if PIO Error interrupt has occured */
+        /* Check if PIO Error interrupt has occurred */
         if (acdev->dma_status & ATA_DMA_ERR)
                 return -EAGAIN;
 
@@ -450,7 +450,7 @@ static int sg_xfer(struct arasan_cf_dev *acdev, struct scatterlist *sg)
         /*
          * For each sg:
          * MAX_XFER_COUNT data will be transferred before we get transfer
-         * complete interrupt. Inbetween after FIFO_SIZE data
+         * complete interrupt. Between after FIFO_SIZE data
          * buffer available interrupt will be generated. At this time we will
          * fill FIFO again: max FIFO_SIZE data.
          */
@@ -463,7 +463,7 @@ static int sg_xfer(struct arasan_cf_dev *acdev, struct scatterlist *sg)
                                 acdev->vbase + XFER_CTR);
                 spin_unlock_irqrestore(&acdev->host->lock, flags);
 
-                /* continue dma xfers untill current sg is completed */
+                /* continue dma xfers until current sg is completed */
                 while (xfer_cnt) {
                         /* wait for read to complete */
                         if (!write) {
@@ -563,7 +563,7 @@ static void data_xfer(struct work_struct *work)
 
 chan_request_fail:
         spin_lock_irqsave(&acdev->host->lock, flags);
-        /* error when transfering data to/from memory */
+        /* error when transferring data to/from memory */
         qc->err_mask |= AC_ERR_HOST_BUS;
         qc->ap->hsm_task_state = HSM_ST_ERR;
 
diff --git a/drivers/ata/pata_bf54x.c b/drivers/ata/pata_bf54x.c
index e0b58b8dfe6f..ea64967000ff 100644
--- a/drivers/ata/pata_bf54x.c
+++ b/drivers/ata/pata_bf54x.c
@@ -1342,7 +1342,7 @@ static unsigned int bfin_ata_host_intr(struct ata_port *ap,
                         ap->ops->bmdma_stop(qc);
 
                         if (unlikely(host_stat & ATA_DMA_ERR)) {
-                                /* error when transfering data to/from memory */
+                                /* error when transferring data to/from memory */
                                 qc->err_mask |= AC_ERR_HOST_BUS;
                                 ap->hsm_task_state = HSM_ST_ERR;
                         }
diff --git a/drivers/ata/pata_cs5520.c b/drivers/ata/pata_cs5520.c
index 030952f1f97c..e3254fcff0f1 100644
--- a/drivers/ata/pata_cs5520.c
+++ b/drivers/ata/pata_cs5520.c
@@ -29,7 +29,7 @@
  * General Public License for more details.
  *
  * Documentation:
- *      Not publically available.
+ *      Not publicly available.
  */
 #include <linux/kernel.h>
 #include <linux/module.h>
diff --git a/drivers/ata/pata_mpiix.c b/drivers/ata/pata_mpiix.c
index b21f0021f54a..d8d9c5807740 100644
--- a/drivers/ata/pata_mpiix.c
+++ b/drivers/ata/pata_mpiix.c
@@ -15,7 +15,7 @@
  * with PCI IDE and also that we do not disable the device when our driver is
  * unloaded (as it has many other functions).
  *
- * The driver conciously keeps this logic internally to avoid pushing quirky
+ * The driver consciously keeps this logic internally to avoid pushing quirky
  * PATA history into the clean libata layer.
  *
  * Thinkpad specific note: If you boot an MPIIX using a thinkpad with a PCMCIA
diff --git a/drivers/ata/pata_rz1000.c b/drivers/ata/pata_rz1000.c
index 4a454a88aa9d..4d04471794b6 100644
--- a/drivers/ata/pata_rz1000.c
+++ b/drivers/ata/pata_rz1000.c
@@ -112,7 +112,7 @@ static int rz1000_reinit_one(struct pci_dev *pdev)
         if (rc)
                 return rc;
 
-        /* If this fails on resume (which is a "cant happen" case), we
+        /* If this fails on resume (which is a "can't happen" case), we
            must stop as any progress risks data loss */
         if (rz1000_fifo_disable(pdev))
                 panic("rz1000 fifo");
diff --git a/drivers/ata/pata_sil680.c b/drivers/ata/pata_sil680.c
index 00eefbd84b33..118787caa93f 100644
--- a/drivers/ata/pata_sil680.c
+++ b/drivers/ata/pata_sil680.c
@@ -11,7 +11,7 @@
  *
  *  May be copied or modified under the terms of the GNU General Public License
  *
- *  Documentation publically available.
+ *  Documentation publicly available.
  *
  *      If you have strange problems with nVidia chipset systems please
  *      see the SI support documentation and update your system BIOS
@@ -43,7 +43,7 @@
  *
  *      Turn a config register offset into the right address in either
  *      PCI space or MMIO space to access the control register in question
- *      Thankfully this is a configuration operation so isnt performance
+ *      Thankfully this is a configuration operation so isn't performance
  *      criticial.
  */
 
diff --git a/drivers/ata/pata_sis.c b/drivers/ata/pata_sis.c
index c04abc393fc5..be08ff92db17 100644
--- a/drivers/ata/pata_sis.c
+++ b/drivers/ata/pata_sis.c
@@ -331,7 +331,7 @@ static void sis_old_set_dmamode (struct ata_port *ap, struct ata_device *adev)
 
         if (adev->dma_mode < XFER_UDMA_0) {
                 /* bits 3-0 hold recovery timing bits 8-10 active timing and
-                   the higher bits are dependant on the device */
+                   the higher bits are dependent on the device */
                 timing &= ~0x870F;
                 timing |= mwdma_bits[speed];
         } else {
@@ -371,7 +371,7 @@ static void sis_66_set_dmamode (struct ata_port *ap, struct ata_device *adev)
 
         if (adev->dma_mode < XFER_UDMA_0) {
                 /* bits 3-0 hold recovery timing bits 8-10 active timing and
-                   the higher bits are dependant on the device, bit 15 udma */
+                   the higher bits are dependent on the device, bit 15 udma */
                 timing &= ~0x870F;
                 timing |= mwdma_bits[speed];
         } else {
diff --git a/drivers/ata/pata_triflex.c b/drivers/ata/pata_triflex.c
index 0d1f89e571dd..03b6d69d6197 100644
--- a/drivers/ata/pata_triflex.c
+++ b/drivers/ata/pata_triflex.c
@@ -30,7 +30,7 @@
  * Loosely based on the piix & svwks drivers.
  *
  * Documentation:
- *      Not publically available.
+ *      Not publicly available.
  */
 
 #include <linux/kernel.h>
diff --git a/drivers/ata/sata_fsl.c b/drivers/ata/sata_fsl.c
index 0f91e583892e..35a71d875d0e 100644
--- a/drivers/ata/sata_fsl.c
+++ b/drivers/ata/sata_fsl.c
@@ -42,7 +42,7 @@ enum {
 
         /*
          * SATA-FSL host controller supports a max. of (15+1) direct PRDEs, and
-         * chained indirect PRDEs upto a max count of 63.
+         * chained indirect PRDEs up to a max count of 63.
          * We are allocating an array of 63 PRDEs contiguously, but PRDE#15 will
          * be setup as an indirect descriptor, pointing to it's next
          * (contiguous) PRDE. Though chained indirect PRDE arrays are
@@ -907,7 +907,7 @@ static int sata_fsl_softreset(struct ata_link *link, unsigned int *class,
         ata_msleep(ap, 1);
 
         /*
-         * SATA device enters reset state after receving a Control register
+         * SATA device enters reset state after receiving a Control register
          * FIS with SRST bit asserted and it awaits another H2D Control reg.
          * FIS with SRST bit cleared, then the device does internal diags &
          * initialization, followed by indicating it's initialization status
diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c
index cd40651e9b72..b52c0519ad0b 100644
--- a/drivers/ata/sata_mv.c
+++ b/drivers/ata/sata_mv.c
@@ -1352,7 +1352,7 @@ static int mv_scr_write(struct ata_link *link, unsigned int sc_reg_in, u32 val)
                         /*
                          * Workaround for 88SX60x1 FEr SATA#26:
                          *
-                         * COMRESETs have to take care not to accidently
+                         * COMRESETs have to take care not to accidentally
                          * put the drive to sleep when writing SCR_CONTROL.
                          * Setting bits 12..15 prevents this problem.
                          *
@@ -2044,7 +2044,7 @@ static void mv_qc_prep(struct ata_queued_cmd *qc)
 
         cw = &pp->crqb[in_index].ata_cmd[0];
 
-        /* Sadly, the CRQB cannot accomodate all registers--there are
+        /* Sadly, the CRQB cannot accommodate all registers--there are
          * only 11 bytes...so we must pick and choose required
          * registers based on the command.  So, we drop feature and
          * hob_feature for [RW] DMA commands, but they are needed for
diff --git a/drivers/ata/sata_nv.c b/drivers/ata/sata_nv.c
index 42344e3c686d..f173ef3bfc10 100644
--- a/drivers/ata/sata_nv.c
+++ b/drivers/ata/sata_nv.c
@@ -2121,7 +2121,7 @@ static int nv_swncq_sdbfis(struct ata_port *ap)
 
         host_stat = ap->ops->bmdma_status(ap);
         if (unlikely(host_stat & ATA_DMA_ERR)) {
-                /* error when transfering data to/from memory */
+                /* error when transferring data to/from memory */
                 ata_ehi_clear_desc(ehi);
                 ata_ehi_push_desc(ehi, "BMDMA stat 0x%x", host_stat);
                 ehi->err_mask |= AC_ERR_HOST_BUS;
diff --git a/drivers/ata/sata_via.c b/drivers/ata/sata_via.c
index 21242c5709a0..54434db15b12 100644
--- a/drivers/ata/sata_via.c
+++ b/drivers/ata/sata_via.c
@@ -582,7 +582,7 @@ static void svia_configure(struct pci_dev *pdev, int board_id)
          * When host issues HOLD, device may send up to 20DW of data
          * before acknowledging it with HOLDA and the host should be
          * able to buffer them in FIFO.  Unfortunately, some WD drives
-         * send upto 40DW before acknowledging HOLD and, in the
+         * send up to 40DW before acknowledging HOLD and, in the
          * default configuration, this ends up overflowing vt6421's
          * FIFO, making the controller abort the transaction with
          * R_ERR.