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-rw-r--r--drivers/ata/Kconfig4
-rw-r--r--drivers/ata/ahci.c235
-rw-r--r--drivers/ata/ata_generic.c2
-rw-r--r--drivers/ata/ata_piix.c28
-rw-r--r--drivers/ata/libata-core.c17
-rw-r--r--drivers/ata/libata-sff.c50
-rw-r--r--drivers/ata/pata_acpi.c2
-rw-r--r--drivers/ata/pata_ali.c10
-rw-r--r--drivers/ata/pata_amd.c2
-rw-r--r--drivers/ata/pata_artop.c2
-rw-r--r--drivers/ata/pata_at91.c4
-rw-r--r--drivers/ata/pata_atiixp.c14
-rw-r--r--drivers/ata/pata_cmd640.c2
-rw-r--r--drivers/ata/pata_cmd64x.c27
-rw-r--r--drivers/ata/pata_cs5530.c2
-rw-r--r--drivers/ata/pata_cs5535.c4
-rw-r--r--drivers/ata/pata_cs5536.c2
-rw-r--r--drivers/ata/pata_cypress.c12
-rw-r--r--drivers/ata/pata_efar.c22
-rw-r--r--drivers/ata/pata_hpt366.c23
-rw-r--r--drivers/ata/pata_hpt37x.c189
-rw-r--r--drivers/ata/pata_hpt3x2n.c120
-rw-r--r--drivers/ata/pata_it8213.c2
-rw-r--r--drivers/ata/pata_it821x.c2
-rw-r--r--drivers/ata/pata_jmicron.c2
-rw-r--r--drivers/ata/pata_marvell.c4
-rw-r--r--drivers/ata/pata_netcell.c2
-rw-r--r--drivers/ata/pata_ns87410.c2
-rw-r--r--drivers/ata/pata_ns87415.c2
-rw-r--r--drivers/ata/pata_oldpiix.c2
-rw-r--r--drivers/ata/pata_opti.c2
-rw-r--r--drivers/ata/pata_optidma.c2
-rw-r--r--drivers/ata/pata_pcmcia.c2
-rw-r--r--drivers/ata/pata_pdc202xx_old.c17
-rw-r--r--drivers/ata/pata_piccolo.c2
-rw-r--r--drivers/ata/pata_radisys.c2
-rw-r--r--drivers/ata/pata_rz1000.c2
-rw-r--r--drivers/ata/pata_sc1200.c2
-rw-r--r--drivers/ata/pata_serverworks.c7
-rw-r--r--drivers/ata/pata_sil680.c2
-rw-r--r--drivers/ata/pata_sis.c2
-rw-r--r--drivers/ata/pata_sl82c105.c2
-rw-r--r--drivers/ata/pata_triflex.c2
-rw-r--r--drivers/ata/pata_via.c210
-rw-r--r--drivers/ata/sata_via.c23
45 files changed, 657 insertions, 413 deletions
diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
index 56c6374a3989..01c52c415bdc 100644
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -446,9 +446,9 @@ config PATA_JMICRON
446 446
447config PATA_LEGACY 447config PATA_LEGACY
448 tristate "Legacy ISA PATA support (Experimental)" 448 tristate "Legacy ISA PATA support (Experimental)"
449 depends on ISA && EXPERIMENTAL 449 depends on (ISA || PCI) && EXPERIMENTAL
450 help 450 help
451 This option enables support for ISA/VLB bus legacy PATA 451 This option enables support for ISA/VLB/PCI bus legacy PATA
452 ports and allows them to be accessed via the new ATA layer. 452 ports and allows them to be accessed via the new ATA layer.
453 453
454 If unsure, say N. 454 If unsure, say N.
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index a6a736a7dbf2..6bd930b93bcc 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -93,6 +93,9 @@ enum {
93 AHCI_CMD_TBL_AR_SZ = AHCI_CMD_TBL_SZ * AHCI_MAX_CMDS, 93 AHCI_CMD_TBL_AR_SZ = AHCI_CMD_TBL_SZ * AHCI_MAX_CMDS,
94 AHCI_PORT_PRIV_DMA_SZ = AHCI_CMD_SLOT_SZ + AHCI_CMD_TBL_AR_SZ + 94 AHCI_PORT_PRIV_DMA_SZ = AHCI_CMD_SLOT_SZ + AHCI_CMD_TBL_AR_SZ +
95 AHCI_RX_FIS_SZ, 95 AHCI_RX_FIS_SZ,
96 AHCI_PORT_PRIV_FBS_DMA_SZ = AHCI_CMD_SLOT_SZ +
97 AHCI_CMD_TBL_AR_SZ +
98 (AHCI_RX_FIS_SZ * 16),
96 AHCI_IRQ_ON_SG = (1 << 31), 99 AHCI_IRQ_ON_SG = (1 << 31),
97 AHCI_CMD_ATAPI = (1 << 5), 100 AHCI_CMD_ATAPI = (1 << 5),
98 AHCI_CMD_WRITE = (1 << 6), 101 AHCI_CMD_WRITE = (1 << 6),
@@ -170,6 +173,7 @@ enum {
170 PORT_SCR_ERR = 0x30, /* SATA phy register: SError */ 173 PORT_SCR_ERR = 0x30, /* SATA phy register: SError */
171 PORT_SCR_ACT = 0x34, /* SATA phy register: SActive */ 174 PORT_SCR_ACT = 0x34, /* SATA phy register: SActive */
172 PORT_SCR_NTF = 0x3c, /* SATA phy register: SNotification */ 175 PORT_SCR_NTF = 0x3c, /* SATA phy register: SNotification */
176 PORT_FBS = 0x40, /* FIS-based Switching */
173 177
174 /* PORT_IRQ_{STAT,MASK} bits */ 178 /* PORT_IRQ_{STAT,MASK} bits */
175 PORT_IRQ_COLD_PRES = (1 << 31), /* cold presence detect */ 179 PORT_IRQ_COLD_PRES = (1 << 31), /* cold presence detect */
@@ -208,6 +212,7 @@ enum {
208 PORT_CMD_ASP = (1 << 27), /* Aggressive Slumber/Partial */ 212 PORT_CMD_ASP = (1 << 27), /* Aggressive Slumber/Partial */
209 PORT_CMD_ALPE = (1 << 26), /* Aggressive Link PM enable */ 213 PORT_CMD_ALPE = (1 << 26), /* Aggressive Link PM enable */
210 PORT_CMD_ATAPI = (1 << 24), /* Device is ATAPI */ 214 PORT_CMD_ATAPI = (1 << 24), /* Device is ATAPI */
215 PORT_CMD_FBSCP = (1 << 22), /* FBS Capable Port */
211 PORT_CMD_PMP = (1 << 17), /* PMP attached */ 216 PORT_CMD_PMP = (1 << 17), /* PMP attached */
212 PORT_CMD_LIST_ON = (1 << 15), /* cmd list DMA engine running */ 217 PORT_CMD_LIST_ON = (1 << 15), /* cmd list DMA engine running */
213 PORT_CMD_FIS_ON = (1 << 14), /* FIS DMA engine running */ 218 PORT_CMD_FIS_ON = (1 << 14), /* FIS DMA engine running */
@@ -222,6 +227,14 @@ enum {
222 PORT_CMD_ICC_PARTIAL = (0x2 << 28), /* Put i/f in partial state */ 227 PORT_CMD_ICC_PARTIAL = (0x2 << 28), /* Put i/f in partial state */
223 PORT_CMD_ICC_SLUMBER = (0x6 << 28), /* Put i/f in slumber state */ 228 PORT_CMD_ICC_SLUMBER = (0x6 << 28), /* Put i/f in slumber state */
224 229
230 PORT_FBS_DWE_OFFSET = 16, /* FBS device with error offset */
231 PORT_FBS_ADO_OFFSET = 12, /* FBS active dev optimization offset */
232 PORT_FBS_DEV_OFFSET = 8, /* FBS device to issue offset */
233 PORT_FBS_DEV_MASK = (0xf << PORT_FBS_DEV_OFFSET), /* FBS.DEV */
234 PORT_FBS_SDE = (1 << 2), /* FBS single device error */
235 PORT_FBS_DEC = (1 << 1), /* FBS device error clear */
236 PORT_FBS_EN = (1 << 0), /* Enable FBS */
237
225 /* hpriv->flags bits */ 238 /* hpriv->flags bits */
226 AHCI_HFLAG_NO_NCQ = (1 << 0), 239 AHCI_HFLAG_NO_NCQ = (1 << 0),
227 AHCI_HFLAG_IGN_IRQ_IF_ERR = (1 << 1), /* ignore IRQ_IF_ERR */ 240 AHCI_HFLAG_IGN_IRQ_IF_ERR = (1 << 1), /* ignore IRQ_IF_ERR */
@@ -304,6 +317,9 @@ struct ahci_port_priv {
304 unsigned int ncq_saw_dmas:1; 317 unsigned int ncq_saw_dmas:1;
305 unsigned int ncq_saw_sdb:1; 318 unsigned int ncq_saw_sdb:1;
306 u32 intr_mask; /* interrupts to enable */ 319 u32 intr_mask; /* interrupts to enable */
320 bool fbs_supported; /* set iff FBS is supported */
321 bool fbs_enabled; /* set iff FBS is enabled */
322 int fbs_last_dev; /* save FBS.DEV of last FIS */
307 /* enclosure management info per PM slot */ 323 /* enclosure management info per PM slot */
308 struct ahci_em_priv em_priv[EM_MAX_SLOTS]; 324 struct ahci_em_priv em_priv[EM_MAX_SLOTS];
309}; 325};
@@ -315,9 +331,12 @@ static unsigned int ahci_qc_issue(struct ata_queued_cmd *qc);
315static bool ahci_qc_fill_rtf(struct ata_queued_cmd *qc); 331static bool ahci_qc_fill_rtf(struct ata_queued_cmd *qc);
316static int ahci_port_start(struct ata_port *ap); 332static int ahci_port_start(struct ata_port *ap);
317static void ahci_port_stop(struct ata_port *ap); 333static void ahci_port_stop(struct ata_port *ap);
334static int ahci_pmp_qc_defer(struct ata_queued_cmd *qc);
318static void ahci_qc_prep(struct ata_queued_cmd *qc); 335static void ahci_qc_prep(struct ata_queued_cmd *qc);
319static void ahci_freeze(struct ata_port *ap); 336static void ahci_freeze(struct ata_port *ap);
320static void ahci_thaw(struct ata_port *ap); 337static void ahci_thaw(struct ata_port *ap);
338static void ahci_enable_fbs(struct ata_port *ap);
339static void ahci_disable_fbs(struct ata_port *ap);
321static void ahci_pmp_attach(struct ata_port *ap); 340static void ahci_pmp_attach(struct ata_port *ap);
322static void ahci_pmp_detach(struct ata_port *ap); 341static void ahci_pmp_detach(struct ata_port *ap);
323static int ahci_softreset(struct ata_link *link, unsigned int *class, 342static int ahci_softreset(struct ata_link *link, unsigned int *class,
@@ -356,10 +375,10 @@ static ssize_t ahci_show_host_version(struct device *dev,
356static ssize_t ahci_show_port_cmd(struct device *dev, 375static ssize_t ahci_show_port_cmd(struct device *dev,
357 struct device_attribute *attr, char *buf); 376 struct device_attribute *attr, char *buf);
358 377
359DEVICE_ATTR(ahci_host_caps, S_IRUGO, ahci_show_host_caps, NULL); 378static DEVICE_ATTR(ahci_host_caps, S_IRUGO, ahci_show_host_caps, NULL);
360DEVICE_ATTR(ahci_host_cap2, S_IRUGO, ahci_show_host_cap2, NULL); 379static DEVICE_ATTR(ahci_host_cap2, S_IRUGO, ahci_show_host_cap2, NULL);
361DEVICE_ATTR(ahci_host_version, S_IRUGO, ahci_show_host_version, NULL); 380static DEVICE_ATTR(ahci_host_version, S_IRUGO, ahci_show_host_version, NULL);
362DEVICE_ATTR(ahci_port_cmd, S_IRUGO, ahci_show_port_cmd, NULL); 381static DEVICE_ATTR(ahci_port_cmd, S_IRUGO, ahci_show_port_cmd, NULL);
363 382
364static struct device_attribute *ahci_shost_attrs[] = { 383static struct device_attribute *ahci_shost_attrs[] = {
365 &dev_attr_link_power_management_policy, 384 &dev_attr_link_power_management_policy,
@@ -390,7 +409,7 @@ static struct scsi_host_template ahci_sht = {
390static struct ata_port_operations ahci_ops = { 409static struct ata_port_operations ahci_ops = {
391 .inherits = &sata_pmp_port_ops, 410 .inherits = &sata_pmp_port_ops,
392 411
393 .qc_defer = sata_pmp_qc_defer_cmd_switch, 412 .qc_defer = ahci_pmp_qc_defer,
394 .qc_prep = ahci_qc_prep, 413 .qc_prep = ahci_qc_prep,
395 .qc_issue = ahci_qc_issue, 414 .qc_issue = ahci_qc_issue,
396 .qc_fill_rtf = ahci_qc_fill_rtf, 415 .qc_fill_rtf = ahci_qc_fill_rtf,
@@ -570,6 +589,12 @@ static const struct pci_device_id ahci_pci_tbl[] = {
570 { PCI_VDEVICE(INTEL, 0x3b2b), board_ahci }, /* PCH RAID */ 589 { PCI_VDEVICE(INTEL, 0x3b2b), board_ahci }, /* PCH RAID */
571 { PCI_VDEVICE(INTEL, 0x3b2c), board_ahci }, /* PCH RAID */ 590 { PCI_VDEVICE(INTEL, 0x3b2c), board_ahci }, /* PCH RAID */
572 { PCI_VDEVICE(INTEL, 0x3b2f), board_ahci }, /* PCH AHCI */ 591 { PCI_VDEVICE(INTEL, 0x3b2f), board_ahci }, /* PCH AHCI */
592 { PCI_VDEVICE(INTEL, 0x1c02), board_ahci }, /* CPT AHCI */
593 { PCI_VDEVICE(INTEL, 0x1c03), board_ahci }, /* CPT AHCI */
594 { PCI_VDEVICE(INTEL, 0x1c04), board_ahci }, /* CPT RAID */
595 { PCI_VDEVICE(INTEL, 0x1c05), board_ahci }, /* CPT RAID */
596 { PCI_VDEVICE(INTEL, 0x1c06), board_ahci }, /* CPT RAID */
597 { PCI_VDEVICE(INTEL, 0x1c07), board_ahci }, /* CPT RAID */
573 598
574 /* JMicron 360/1/3/5/6, match class to avoid IDE function */ 599 /* JMicron 360/1/3/5/6, match class to avoid IDE function */
575 { PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 600 { PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
@@ -2045,6 +2070,17 @@ static unsigned int ahci_fill_sg(struct ata_queued_cmd *qc, void *cmd_tbl)
2045 return si; 2070 return si;
2046} 2071}
2047 2072
2073static int ahci_pmp_qc_defer(struct ata_queued_cmd *qc)
2074{
2075 struct ata_port *ap = qc->ap;
2076 struct ahci_port_priv *pp = ap->private_data;
2077
2078 if (!sata_pmp_attached(ap) || pp->fbs_enabled)
2079 return ata_std_qc_defer(qc);
2080 else
2081 return sata_pmp_qc_defer_cmd_switch(qc);
2082}
2083
2048static void ahci_qc_prep(struct ata_queued_cmd *qc) 2084static void ahci_qc_prep(struct ata_queued_cmd *qc)
2049{ 2085{
2050 struct ata_port *ap = qc->ap; 2086 struct ata_port *ap = qc->ap;
@@ -2083,6 +2119,31 @@ static void ahci_qc_prep(struct ata_queued_cmd *qc)
2083 ahci_fill_cmd_slot(pp, qc->tag, opts); 2119 ahci_fill_cmd_slot(pp, qc->tag, opts);
2084} 2120}
2085 2121
2122static void ahci_fbs_dec_intr(struct ata_port *ap)
2123{
2124 struct ahci_port_priv *pp = ap->private_data;
2125 void __iomem *port_mmio = ahci_port_base(ap);
2126 u32 fbs = readl(port_mmio + PORT_FBS);
2127 int retries = 3;
2128
2129 DPRINTK("ENTER\n");
2130 BUG_ON(!pp->fbs_enabled);
2131
2132 /* time to wait for DEC is not specified by AHCI spec,
2133 * add a retry loop for safety.
2134 */
2135 writel(fbs | PORT_FBS_DEC, port_mmio + PORT_FBS);
2136 fbs = readl(port_mmio + PORT_FBS);
2137 while ((fbs & PORT_FBS_DEC) && retries--) {
2138 udelay(1);
2139 fbs = readl(port_mmio + PORT_FBS);
2140 }
2141
2142 if (fbs & PORT_FBS_DEC)
2143 dev_printk(KERN_ERR, ap->host->dev,
2144 "failed to clear device error\n");
2145}
2146
2086static void ahci_error_intr(struct ata_port *ap, u32 irq_stat) 2147static void ahci_error_intr(struct ata_port *ap, u32 irq_stat)
2087{ 2148{
2088 struct ahci_host_priv *hpriv = ap->host->private_data; 2149 struct ahci_host_priv *hpriv = ap->host->private_data;
@@ -2091,12 +2152,26 @@ static void ahci_error_intr(struct ata_port *ap, u32 irq_stat)
2091 struct ata_link *link = NULL; 2152 struct ata_link *link = NULL;
2092 struct ata_queued_cmd *active_qc; 2153 struct ata_queued_cmd *active_qc;
2093 struct ata_eh_info *active_ehi; 2154 struct ata_eh_info *active_ehi;
2155 bool fbs_need_dec = false;
2094 u32 serror; 2156 u32 serror;
2095 2157
2096 /* determine active link */ 2158 /* determine active link with error */
2097 ata_for_each_link(link, ap, EDGE) 2159 if (pp->fbs_enabled) {
2098 if (ata_link_active(link)) 2160 void __iomem *port_mmio = ahci_port_base(ap);
2099 break; 2161 u32 fbs = readl(port_mmio + PORT_FBS);
2162 int pmp = fbs >> PORT_FBS_DWE_OFFSET;
2163
2164 if ((fbs & PORT_FBS_SDE) && (pmp < ap->nr_pmp_links) &&
2165 ata_link_online(&ap->pmp_link[pmp])) {
2166 link = &ap->pmp_link[pmp];
2167 fbs_need_dec = true;
2168 }
2169
2170 } else
2171 ata_for_each_link(link, ap, EDGE)
2172 if (ata_link_active(link))
2173 break;
2174
2100 if (!link) 2175 if (!link)
2101 link = &ap->link; 2176 link = &ap->link;
2102 2177
@@ -2153,8 +2228,13 @@ static void ahci_error_intr(struct ata_port *ap, u32 irq_stat)
2153 } 2228 }
2154 2229
2155 if (irq_stat & PORT_IRQ_IF_ERR) { 2230 if (irq_stat & PORT_IRQ_IF_ERR) {
2156 host_ehi->err_mask |= AC_ERR_ATA_BUS; 2231 if (fbs_need_dec)
2157 host_ehi->action |= ATA_EH_RESET; 2232 active_ehi->err_mask |= AC_ERR_DEV;
2233 else {
2234 host_ehi->err_mask |= AC_ERR_ATA_BUS;
2235 host_ehi->action |= ATA_EH_RESET;
2236 }
2237
2158 ata_ehi_push_desc(host_ehi, "interface fatal error"); 2238 ata_ehi_push_desc(host_ehi, "interface fatal error");
2159 } 2239 }
2160 2240
@@ -2169,7 +2249,10 @@ static void ahci_error_intr(struct ata_port *ap, u32 irq_stat)
2169 2249
2170 if (irq_stat & PORT_IRQ_FREEZE) 2250 if (irq_stat & PORT_IRQ_FREEZE)
2171 ata_port_freeze(ap); 2251 ata_port_freeze(ap);
2172 else 2252 else if (fbs_need_dec) {
2253 ata_link_abort(link);
2254 ahci_fbs_dec_intr(ap);
2255 } else
2173 ata_port_abort(ap); 2256 ata_port_abort(ap);
2174} 2257}
2175 2258
@@ -2222,12 +2305,19 @@ static void ahci_port_intr(struct ata_port *ap)
2222 /* If the 'N' bit in word 0 of the FIS is set, 2305 /* If the 'N' bit in word 0 of the FIS is set,
2223 * we just received asynchronous notification. 2306 * we just received asynchronous notification.
2224 * Tell libata about it. 2307 * Tell libata about it.
2308 *
2309 * Lack of SNotification should not appear in
2310 * ahci 1.2, so the workaround is unnecessary
2311 * when FBS is enabled.
2225 */ 2312 */
2226 const __le32 *f = pp->rx_fis + RX_FIS_SDB; 2313 if (pp->fbs_enabled)
2227 u32 f0 = le32_to_cpu(f[0]); 2314 WARN_ON_ONCE(1);
2228 2315 else {
2229 if (f0 & (1 << 15)) 2316 const __le32 *f = pp->rx_fis + RX_FIS_SDB;
2230 sata_async_notification(ap); 2317 u32 f0 = le32_to_cpu(f[0]);
2318 if (f0 & (1 << 15))
2319 sata_async_notification(ap);
2320 }
2231 } 2321 }
2232 } 2322 }
2233 2323
@@ -2321,6 +2411,15 @@ static unsigned int ahci_qc_issue(struct ata_queued_cmd *qc)
2321 2411
2322 if (qc->tf.protocol == ATA_PROT_NCQ) 2412 if (qc->tf.protocol == ATA_PROT_NCQ)
2323 writel(1 << qc->tag, port_mmio + PORT_SCR_ACT); 2413 writel(1 << qc->tag, port_mmio + PORT_SCR_ACT);
2414
2415 if (pp->fbs_enabled && pp->fbs_last_dev != qc->dev->link->pmp) {
2416 u32 fbs = readl(port_mmio + PORT_FBS);
2417 fbs &= ~(PORT_FBS_DEV_MASK | PORT_FBS_DEC);
2418 fbs |= qc->dev->link->pmp << PORT_FBS_DEV_OFFSET;
2419 writel(fbs, port_mmio + PORT_FBS);
2420 pp->fbs_last_dev = qc->dev->link->pmp;
2421 }
2422
2324 writel(1 << qc->tag, port_mmio + PORT_CMD_ISSUE); 2423 writel(1 << qc->tag, port_mmio + PORT_CMD_ISSUE);
2325 2424
2326 ahci_sw_activity(qc->dev->link); 2425 ahci_sw_activity(qc->dev->link);
@@ -2333,6 +2432,9 @@ static bool ahci_qc_fill_rtf(struct ata_queued_cmd *qc)
2333 struct ahci_port_priv *pp = qc->ap->private_data; 2432 struct ahci_port_priv *pp = qc->ap->private_data;
2334 u8 *d2h_fis = pp->rx_fis + RX_FIS_D2H_REG; 2433 u8 *d2h_fis = pp->rx_fis + RX_FIS_D2H_REG;
2335 2434
2435 if (pp->fbs_enabled)
2436 d2h_fis += qc->dev->link->pmp * AHCI_RX_FIS_SZ;
2437
2336 ata_tf_from_fis(d2h_fis, &qc->result_tf); 2438 ata_tf_from_fis(d2h_fis, &qc->result_tf);
2337 return true; 2439 return true;
2338} 2440}
@@ -2381,6 +2483,71 @@ static void ahci_post_internal_cmd(struct ata_queued_cmd *qc)
2381 ahci_kick_engine(ap); 2483 ahci_kick_engine(ap);
2382} 2484}
2383 2485
2486static void ahci_enable_fbs(struct ata_port *ap)
2487{
2488 struct ahci_port_priv *pp = ap->private_data;
2489 void __iomem *port_mmio = ahci_port_base(ap);
2490 u32 fbs;
2491 int rc;
2492
2493 if (!pp->fbs_supported)
2494 return;
2495
2496 fbs = readl(port_mmio + PORT_FBS);
2497 if (fbs & PORT_FBS_EN) {
2498 pp->fbs_enabled = true;
2499 pp->fbs_last_dev = -1; /* initialization */
2500 return;
2501 }
2502
2503 rc = ahci_stop_engine(ap);
2504 if (rc)
2505 return;
2506
2507 writel(fbs | PORT_FBS_EN, port_mmio + PORT_FBS);
2508 fbs = readl(port_mmio + PORT_FBS);
2509 if (fbs & PORT_FBS_EN) {
2510 dev_printk(KERN_INFO, ap->host->dev, "FBS is enabled.\n");
2511 pp->fbs_enabled = true;
2512 pp->fbs_last_dev = -1; /* initialization */
2513 } else
2514 dev_printk(KERN_ERR, ap->host->dev, "Failed to enable FBS\n");
2515
2516 ahci_start_engine(ap);
2517}
2518
2519static void ahci_disable_fbs(struct ata_port *ap)
2520{
2521 struct ahci_port_priv *pp = ap->private_data;
2522 void __iomem *port_mmio = ahci_port_base(ap);
2523 u32 fbs;
2524 int rc;
2525
2526 if (!pp->fbs_supported)
2527 return;
2528
2529 fbs = readl(port_mmio + PORT_FBS);
2530 if ((fbs & PORT_FBS_EN) == 0) {
2531 pp->fbs_enabled = false;
2532 return;
2533 }
2534
2535 rc = ahci_stop_engine(ap);
2536 if (rc)
2537 return;
2538
2539 writel(fbs & ~PORT_FBS_EN, port_mmio + PORT_FBS);
2540 fbs = readl(port_mmio + PORT_FBS);
2541 if (fbs & PORT_FBS_EN)
2542 dev_printk(KERN_ERR, ap->host->dev, "Failed to disable FBS\n");
2543 else {
2544 dev_printk(KERN_INFO, ap->host->dev, "FBS is disabled.\n");
2545 pp->fbs_enabled = false;
2546 }
2547
2548 ahci_start_engine(ap);
2549}
2550
2384static void ahci_pmp_attach(struct ata_port *ap) 2551static void ahci_pmp_attach(struct ata_port *ap)
2385{ 2552{
2386 void __iomem *port_mmio = ahci_port_base(ap); 2553 void __iomem *port_mmio = ahci_port_base(ap);
@@ -2391,6 +2558,8 @@ static void ahci_pmp_attach(struct ata_port *ap)
2391 cmd |= PORT_CMD_PMP; 2558 cmd |= PORT_CMD_PMP;
2392 writel(cmd, port_mmio + PORT_CMD); 2559 writel(cmd, port_mmio + PORT_CMD);
2393 2560
2561 ahci_enable_fbs(ap);
2562
2394 pp->intr_mask |= PORT_IRQ_BAD_PMP; 2563 pp->intr_mask |= PORT_IRQ_BAD_PMP;
2395 writel(pp->intr_mask, port_mmio + PORT_IRQ_MASK); 2564 writel(pp->intr_mask, port_mmio + PORT_IRQ_MASK);
2396} 2565}
@@ -2401,6 +2570,8 @@ static void ahci_pmp_detach(struct ata_port *ap)
2401 struct ahci_port_priv *pp = ap->private_data; 2570 struct ahci_port_priv *pp = ap->private_data;
2402 u32 cmd; 2571 u32 cmd;
2403 2572
2573 ahci_disable_fbs(ap);
2574
2404 cmd = readl(port_mmio + PORT_CMD); 2575 cmd = readl(port_mmio + PORT_CMD);
2405 cmd &= ~PORT_CMD_PMP; 2576 cmd &= ~PORT_CMD_PMP;
2406 writel(cmd, port_mmio + PORT_CMD); 2577 writel(cmd, port_mmio + PORT_CMD);
@@ -2492,20 +2663,40 @@ static int ahci_pci_device_resume(struct pci_dev *pdev)
2492 2663
2493static int ahci_port_start(struct ata_port *ap) 2664static int ahci_port_start(struct ata_port *ap)
2494{ 2665{
2666 struct ahci_host_priv *hpriv = ap->host->private_data;
2495 struct device *dev = ap->host->dev; 2667 struct device *dev = ap->host->dev;
2496 struct ahci_port_priv *pp; 2668 struct ahci_port_priv *pp;
2497 void *mem; 2669 void *mem;
2498 dma_addr_t mem_dma; 2670 dma_addr_t mem_dma;
2671 size_t dma_sz, rx_fis_sz;
2499 2672
2500 pp = devm_kzalloc(dev, sizeof(*pp), GFP_KERNEL); 2673 pp = devm_kzalloc(dev, sizeof(*pp), GFP_KERNEL);
2501 if (!pp) 2674 if (!pp)
2502 return -ENOMEM; 2675 return -ENOMEM;
2503 2676
2504 mem = dmam_alloc_coherent(dev, AHCI_PORT_PRIV_DMA_SZ, &mem_dma, 2677 /* check FBS capability */
2505 GFP_KERNEL); 2678 if ((hpriv->cap & HOST_CAP_FBS) && sata_pmp_supported(ap)) {
2679 void __iomem *port_mmio = ahci_port_base(ap);
2680 u32 cmd = readl(port_mmio + PORT_CMD);
2681 if (cmd & PORT_CMD_FBSCP)
2682 pp->fbs_supported = true;
2683 else
2684 dev_printk(KERN_WARNING, dev,
2685 "The port is not capable of FBS\n");
2686 }
2687
2688 if (pp->fbs_supported) {
2689 dma_sz = AHCI_PORT_PRIV_FBS_DMA_SZ;
2690 rx_fis_sz = AHCI_RX_FIS_SZ * 16;
2691 } else {
2692 dma_sz = AHCI_PORT_PRIV_DMA_SZ;
2693 rx_fis_sz = AHCI_RX_FIS_SZ;
2694 }
2695
2696 mem = dmam_alloc_coherent(dev, dma_sz, &mem_dma, GFP_KERNEL);
2506 if (!mem) 2697 if (!mem)
2507 return -ENOMEM; 2698 return -ENOMEM;
2508 memset(mem, 0, AHCI_PORT_PRIV_DMA_SZ); 2699 memset(mem, 0, dma_sz);
2509 2700
2510 /* 2701 /*
2511 * First item in chunk of DMA memory: 32-slot command table, 2702 * First item in chunk of DMA memory: 32-slot command table,
@@ -2523,8 +2714,8 @@ static int ahci_port_start(struct ata_port *ap)
2523 pp->rx_fis = mem; 2714 pp->rx_fis = mem;
2524 pp->rx_fis_dma = mem_dma; 2715 pp->rx_fis_dma = mem_dma;
2525 2716
2526 mem += AHCI_RX_FIS_SZ; 2717 mem += rx_fis_sz;
2527 mem_dma += AHCI_RX_FIS_SZ; 2718 mem_dma += rx_fis_sz;
2528 2719
2529 /* 2720 /*
2530 * Third item: data area for storing a single command 2721 * Third item: data area for storing a single command
diff --git a/drivers/ata/ata_generic.c b/drivers/ata/ata_generic.c
index 12e26c3c68e3..33fb614f9784 100644
--- a/drivers/ata/ata_generic.c
+++ b/drivers/ata/ata_generic.c
@@ -155,7 +155,7 @@ static int ata_generic_init_one(struct pci_dev *dev, const struct pci_device_id
155 return rc; 155 return rc;
156 pcim_pin_device(dev); 156 pcim_pin_device(dev);
157 } 157 }
158 return ata_pci_sff_init_one(dev, ppi, &generic_sht, NULL); 158 return ata_pci_sff_init_one(dev, ppi, &generic_sht, NULL, 0);
159} 159}
160 160
161static struct pci_device_id ata_generic[] = { 161static struct pci_device_id ata_generic[] = {
diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c
index 6f3f2257d0f0..c33806654e46 100644
--- a/drivers/ata/ata_piix.c
+++ b/drivers/ata/ata_piix.c
@@ -173,6 +173,7 @@ static int piix_sidpr_scr_read(struct ata_link *link,
173 unsigned int reg, u32 *val); 173 unsigned int reg, u32 *val);
174static int piix_sidpr_scr_write(struct ata_link *link, 174static int piix_sidpr_scr_write(struct ata_link *link,
175 unsigned int reg, u32 val); 175 unsigned int reg, u32 val);
176static bool piix_irq_check(struct ata_port *ap);
176#ifdef CONFIG_PM 177#ifdef CONFIG_PM
177static int piix_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg); 178static int piix_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg);
178static int piix_pci_device_resume(struct pci_dev *pdev); 179static int piix_pci_device_resume(struct pci_dev *pdev);
@@ -291,6 +292,14 @@ static const struct pci_device_id piix_pci_tbl[] = {
291 { 0x8086, 0x3b2d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata }, 292 { 0x8086, 0x3b2d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
292 /* SATA Controller IDE (PCH) */ 293 /* SATA Controller IDE (PCH) */
293 { 0x8086, 0x3b2e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata }, 294 { 0x8086, 0x3b2e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
295 /* SATA Controller IDE (CPT) */
296 { 0x8086, 0x1c00, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
297 /* SATA Controller IDE (CPT) */
298 { 0x8086, 0x1c01, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
299 /* SATA Controller IDE (CPT) */
300 { 0x8086, 0x1c08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
301 /* SATA Controller IDE (CPT) */
302 { 0x8086, 0x1c09, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
294 { } /* terminate list */ 303 { } /* terminate list */
295}; 304};
296 305
@@ -309,8 +318,13 @@ static struct scsi_host_template piix_sht = {
309 ATA_BMDMA_SHT(DRV_NAME), 318 ATA_BMDMA_SHT(DRV_NAME),
310}; 319};
311 320
312static struct ata_port_operations piix_pata_ops = { 321static struct ata_port_operations piix_sata_ops = {
313 .inherits = &ata_bmdma32_port_ops, 322 .inherits = &ata_bmdma32_port_ops,
323 .sff_irq_check = piix_irq_check,
324};
325
326static struct ata_port_operations piix_pata_ops = {
327 .inherits = &piix_sata_ops,
314 .cable_detect = ata_cable_40wire, 328 .cable_detect = ata_cable_40wire,
315 .set_piomode = piix_set_piomode, 329 .set_piomode = piix_set_piomode,
316 .set_dmamode = piix_set_dmamode, 330 .set_dmamode = piix_set_dmamode,
@@ -328,10 +342,6 @@ static struct ata_port_operations ich_pata_ops = {
328 .set_dmamode = ich_set_dmamode, 342 .set_dmamode = ich_set_dmamode,
329}; 343};
330 344
331static struct ata_port_operations piix_sata_ops = {
332 .inherits = &ata_bmdma32_port_ops,
333};
334
335static struct ata_port_operations piix_sidpr_sata_ops = { 345static struct ata_port_operations piix_sidpr_sata_ops = {
336 .inherits = &piix_sata_ops, 346 .inherits = &piix_sata_ops,
337 .hardreset = sata_std_hardreset, 347 .hardreset = sata_std_hardreset,
@@ -962,6 +972,14 @@ static int piix_sidpr_scr_write(struct ata_link *link,
962 return 0; 972 return 0;
963} 973}
964 974
975static bool piix_irq_check(struct ata_port *ap)
976{
977 if (unlikely(!ap->ioaddr.bmdma_addr))
978 return false;
979
980 return ap->ops->bmdma_status(ap) & ATA_DMA_INTR;
981}
982
965#ifdef CONFIG_PM 983#ifdef CONFIG_PM
966static int piix_broken_suspend(void) 984static int piix_broken_suspend(void)
967{ 985{
diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c
index 6728328f3bea..9c77b0d1a9d0 100644
--- a/drivers/ata/libata-core.c
+++ b/drivers/ata/libata-core.c
@@ -3211,6 +3211,7 @@ const struct ata_timing *ata_timing_find_mode(u8 xfer_mode)
3211int ata_timing_compute(struct ata_device *adev, unsigned short speed, 3211int ata_timing_compute(struct ata_device *adev, unsigned short speed,
3212 struct ata_timing *t, int T, int UT) 3212 struct ata_timing *t, int T, int UT)
3213{ 3213{
3214 const u16 *id = adev->id;
3214 const struct ata_timing *s; 3215 const struct ata_timing *s;
3215 struct ata_timing p; 3216 struct ata_timing p;
3216 3217
@@ -3228,14 +3229,18 @@ int ata_timing_compute(struct ata_device *adev, unsigned short speed,
3228 * PIO/MW_DMA cycle timing. 3229 * PIO/MW_DMA cycle timing.
3229 */ 3230 */
3230 3231
3231 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */ 3232 if (id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
3232 memset(&p, 0, sizeof(p)); 3233 memset(&p, 0, sizeof(p));
3234
3233 if (speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) { 3235 if (speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
3234 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO]; 3236 if (speed <= XFER_PIO_2)
3235 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY]; 3237 p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO];
3236 } else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) { 3238 else if ((speed <= XFER_PIO_4) ||
3237 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN]; 3239 (speed == XFER_PIO_5 && !ata_id_is_cfa(id)))
3238 } 3240 p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO_IORDY];
3241 } else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2)
3242 p.cycle = id[ATA_ID_EIDE_DMA_MIN];
3243
3239 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B); 3244 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
3240 } 3245 }
3241 3246
diff --git a/drivers/ata/libata-sff.c b/drivers/ata/libata-sff.c
index 730ef3c384ca..02441fd57e9e 100644
--- a/drivers/ata/libata-sff.c
+++ b/drivers/ata/libata-sff.c
@@ -1763,24 +1763,50 @@ irqreturn_t ata_sff_interrupt(int irq, void *dev_instance)
1763{ 1763{
1764 struct ata_host *host = dev_instance; 1764 struct ata_host *host = dev_instance;
1765 unsigned int i; 1765 unsigned int i;
1766 unsigned int handled = 0; 1766 unsigned int handled = 0, polling = 0;
1767 unsigned long flags; 1767 unsigned long flags;
1768 1768
1769 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */ 1769 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
1770 spin_lock_irqsave(&host->lock, flags); 1770 spin_lock_irqsave(&host->lock, flags);
1771 1771
1772 for (i = 0; i < host->n_ports; i++) { 1772 for (i = 0; i < host->n_ports; i++) {
1773 struct ata_port *ap; 1773 struct ata_port *ap = host->ports[i];
1774 struct ata_queued_cmd *qc;
1774 1775
1775 ap = host->ports[i]; 1776 if (unlikely(ap->flags & ATA_FLAG_DISABLED))
1776 if (ap && 1777 continue;
1777 !(ap->flags & ATA_FLAG_DISABLED)) {
1778 struct ata_queued_cmd *qc;
1779 1778
1780 qc = ata_qc_from_tag(ap, ap->link.active_tag); 1779 qc = ata_qc_from_tag(ap, ap->link.active_tag);
1781 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) && 1780 if (qc) {
1782 (qc->flags & ATA_QCFLAG_ACTIVE)) 1781 if (!(qc->tf.flags & ATA_TFLAG_POLLING))
1783 handled |= ata_sff_host_intr(ap, qc); 1782 handled |= ata_sff_host_intr(ap, qc);
1783 else
1784 polling |= 1 << i;
1785 }
1786 }
1787
1788 /*
1789 * If no port was expecting IRQ but the controller is actually
1790 * asserting IRQ line, nobody cared will ensue. Check IRQ
1791 * pending status if available and clear spurious IRQ.
1792 */
1793 if (!handled) {
1794 for (i = 0; i < host->n_ports; i++) {
1795 struct ata_port *ap = host->ports[i];
1796
1797 if (polling & (1 << i))
1798 continue;
1799
1800 if (!ap->ops->sff_irq_check ||
1801 !ap->ops->sff_irq_check(ap))
1802 continue;
1803
1804 if (printk_ratelimit())
1805 ata_port_printk(ap, KERN_INFO,
1806 "clearing spurious IRQ\n");
1807
1808 ap->ops->sff_check_status(ap);
1809 ap->ops->sff_irq_clear(ap);
1784 } 1810 }
1785 } 1811 }
1786 1812
@@ -3011,6 +3037,7 @@ EXPORT_SYMBOL_GPL(ata_pci_sff_activate_host);
3011 * @ppi: array of port_info, must be enough for two ports 3037 * @ppi: array of port_info, must be enough for two ports
3012 * @sht: scsi_host_template to use when registering the host 3038 * @sht: scsi_host_template to use when registering the host
3013 * @host_priv: host private_data 3039 * @host_priv: host private_data
3040 * @hflag: host flags
3014 * 3041 *
3015 * This is a helper function which can be called from a driver's 3042 * This is a helper function which can be called from a driver's
3016 * xxx_init_one() probe function if the hardware uses traditional 3043 * xxx_init_one() probe function if the hardware uses traditional
@@ -3031,8 +3058,8 @@ EXPORT_SYMBOL_GPL(ata_pci_sff_activate_host);
3031 * Zero on success, negative on errno-based value on error. 3058 * Zero on success, negative on errno-based value on error.
3032 */ 3059 */
3033int ata_pci_sff_init_one(struct pci_dev *pdev, 3060int ata_pci_sff_init_one(struct pci_dev *pdev,
3034 const struct ata_port_info * const *ppi, 3061 const struct ata_port_info * const *ppi,
3035 struct scsi_host_template *sht, void *host_priv) 3062 struct scsi_host_template *sht, void *host_priv, int hflag)
3036{ 3063{
3037 struct device *dev = &pdev->dev; 3064 struct device *dev = &pdev->dev;
3038 const struct ata_port_info *pi = NULL; 3065 const struct ata_port_info *pi = NULL;
@@ -3067,6 +3094,7 @@ int ata_pci_sff_init_one(struct pci_dev *pdev,
3067 if (rc) 3094 if (rc)
3068 goto out; 3095 goto out;
3069 host->private_data = host_priv; 3096 host->private_data = host_priv;
3097 host->flags |= hflag;
3070 3098
3071 pci_set_master(pdev); 3099 pci_set_master(pdev);
3072 rc = ata_pci_sff_activate_host(host, ata_sff_interrupt, sht); 3100 rc = ata_pci_sff_activate_host(host, ata_sff_interrupt, sht);
diff --git a/drivers/ata/pata_acpi.c b/drivers/ata/pata_acpi.c
index d8f35fe44421..294f3020a78a 100644
--- a/drivers/ata/pata_acpi.c
+++ b/drivers/ata/pata_acpi.c
@@ -259,7 +259,7 @@ static int pacpi_init_one (struct pci_dev *pdev, const struct pci_device_id *id)
259 return rc; 259 return rc;
260 pcim_pin_device(pdev); 260 pcim_pin_device(pdev);
261 } 261 }
262 return ata_pci_sff_init_one(pdev, ppi, &pacpi_sht, NULL); 262 return ata_pci_sff_init_one(pdev, ppi, &pacpi_sht, NULL, 0);
263} 263}
264 264
265static const struct pci_device_id pacpi_pci_tbl[] = { 265static const struct pci_device_id pacpi_pci_tbl[] = {
diff --git a/drivers/ata/pata_ali.c b/drivers/ata/pata_ali.c
index 9434114b2ca8..dc61b72f751c 100644
--- a/drivers/ata/pata_ali.c
+++ b/drivers/ata/pata_ali.c
@@ -159,8 +159,7 @@ static void ali_fifo_control(struct ata_port *ap, struct ata_device *adev, int o
159 * ali_program_modes - load mode registers 159 * ali_program_modes - load mode registers
160 * @ap: ALi channel to load 160 * @ap: ALi channel to load
161 * @adev: Device the timing is for 161 * @adev: Device the timing is for
162 * @cmd: Command timing 162 * @t: timing data
163 * @data: Data timing
164 * @ultra: UDMA timing or zero for off 163 * @ultra: UDMA timing or zero for off
165 * 164 *
166 * Loads the timing registers for cmd/data and disable UDMA if 165 * Loads the timing registers for cmd/data and disable UDMA if
@@ -202,8 +201,7 @@ static void ali_program_modes(struct ata_port *ap, struct ata_device *adev, stru
202 * @ap: ATA interface 201 * @ap: ATA interface
203 * @adev: ATA device 202 * @adev: ATA device
204 * 203 *
205 * Program the ALi registers for PIO mode. FIXME: add timings for 204 * Program the ALi registers for PIO mode.
206 * PIO5.
207 */ 205 */
208 206
209static void ali_set_piomode(struct ata_port *ap, struct ata_device *adev) 207static void ali_set_piomode(struct ata_port *ap, struct ata_device *adev)
@@ -237,7 +235,7 @@ static void ali_set_piomode(struct ata_port *ap, struct ata_device *adev)
237 * @ap: ATA interface 235 * @ap: ATA interface
238 * @adev: ATA device 236 * @adev: ATA device
239 * 237 *
240 * FIXME: MWDMA timings 238 * Program the ALi registers for DMA mode.
241 */ 239 */
242 240
243static void ali_set_dmamode(struct ata_port *ap, struct ata_device *adev) 241static void ali_set_dmamode(struct ata_port *ap, struct ata_device *adev)
@@ -585,7 +583,7 @@ static int ali_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
585 ppi[0] = &info_20_udma; 583 ppi[0] = &info_20_udma;
586 } 584 }
587 585
588 return ata_pci_sff_init_one(pdev, ppi, &ali_sht, NULL); 586 return ata_pci_sff_init_one(pdev, ppi, &ali_sht, NULL, 0);
589} 587}
590 588
591#ifdef CONFIG_PM 589#ifdef CONFIG_PM
diff --git a/drivers/ata/pata_amd.c b/drivers/ata/pata_amd.c
index 567f3f72774e..d95eca9c547e 100644
--- a/drivers/ata/pata_amd.c
+++ b/drivers/ata/pata_amd.c
@@ -574,7 +574,7 @@ static int amd_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
574 } 574 }
575 575
576 /* And fire it up */ 576 /* And fire it up */
577 return ata_pci_sff_init_one(pdev, ppi, &amd_sht, hpriv); 577 return ata_pci_sff_init_one(pdev, ppi, &amd_sht, hpriv, 0);
578} 578}
579 579
580#ifdef CONFIG_PM 580#ifdef CONFIG_PM
diff --git a/drivers/ata/pata_artop.c b/drivers/ata/pata_artop.c
index d332cfdb0f30..4d066d6c30fa 100644
--- a/drivers/ata/pata_artop.c
+++ b/drivers/ata/pata_artop.c
@@ -421,7 +421,7 @@ static int artop_init_one (struct pci_dev *pdev, const struct pci_device_id *id)
421 421
422 BUG_ON(ppi[0] == NULL); 422 BUG_ON(ppi[0] == NULL);
423 423
424 return ata_pci_sff_init_one(pdev, ppi, &artop_sht, NULL); 424 return ata_pci_sff_init_one(pdev, ppi, &artop_sht, NULL, 0);
425} 425}
426 426
427static const struct pci_device_id artop_pci_tbl[] = { 427static const struct pci_device_id artop_pci_tbl[] = {
diff --git a/drivers/ata/pata_at91.c b/drivers/ata/pata_at91.c
index 41c94b1ae493..376dd380b43c 100644
--- a/drivers/ata/pata_at91.c
+++ b/drivers/ata/pata_at91.c
@@ -153,8 +153,8 @@ static void pata_at91_set_piomode(struct ata_port *ap, struct ata_device *adev)
153 /* Compute ATA timing and set it to SMC */ 153 /* Compute ATA timing and set it to SMC */
154 ret = ata_timing_compute(adev, adev->pio_mode, &timing, 1000, 0); 154 ret = ata_timing_compute(adev, adev->pio_mode, &timing, 1000, 0);
155 if (ret) { 155 if (ret) {
156 dev_warn(ap->dev, "Failed to compute ATA timing %d, \ 156 dev_warn(ap->dev, "Failed to compute ATA timing %d, "
157 set PIO_0 timing\n", ret); 157 "set PIO_0 timing\n", ret);
158 set_smc_timing(ap->dev, info, &initial_timing); 158 set_smc_timing(ap->dev, info, &initial_timing);
159 } else { 159 } else {
160 set_smc_timing(ap->dev, info, &timing); 160 set_smc_timing(ap->dev, info, &timing);
diff --git a/drivers/ata/pata_atiixp.c b/drivers/ata/pata_atiixp.c
index ae4454d4e955..cbaf2eddac6b 100644
--- a/drivers/ata/pata_atiixp.c
+++ b/drivers/ata/pata_atiixp.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * pata_atiixp.c - ATI PATA for new ATA layer 2 * pata_atiixp.c - ATI PATA for new ATA layer
3 * (C) 2005 Red Hat Inc 3 * (C) 2005 Red Hat Inc
4 * (C) 2009 Bartlomiej Zolnierkiewicz 4 * (C) 2009-2010 Bartlomiej Zolnierkiewicz
5 * 5 *
6 * Based on 6 * Based on
7 * 7 *
@@ -46,6 +46,8 @@ static int atiixp_cable_detect(struct ata_port *ap)
46 return ATA_CBL_PATA40; 46 return ATA_CBL_PATA40;
47} 47}
48 48
49static DEFINE_SPINLOCK(atiixp_lock);
50
49/** 51/**
50 * atiixp_set_pio_timing - set initial PIO mode data 52 * atiixp_set_pio_timing - set initial PIO mode data
51 * @ap: ATA interface 53 * @ap: ATA interface
@@ -88,7 +90,10 @@ static void atiixp_set_pio_timing(struct ata_port *ap, struct ata_device *adev,
88 90
89static void atiixp_set_piomode(struct ata_port *ap, struct ata_device *adev) 91static void atiixp_set_piomode(struct ata_port *ap, struct ata_device *adev)
90{ 92{
93 unsigned long flags;
94 spin_lock_irqsave(&atiixp_lock, flags);
91 atiixp_set_pio_timing(ap, adev, adev->pio_mode - XFER_PIO_0); 95 atiixp_set_pio_timing(ap, adev, adev->pio_mode - XFER_PIO_0);
96 spin_unlock_irqrestore(&atiixp_lock, flags);
92} 97}
93 98
94/** 99/**
@@ -108,6 +113,9 @@ static void atiixp_set_dmamode(struct ata_port *ap, struct ata_device *adev)
108 int dma = adev->dma_mode; 113 int dma = adev->dma_mode;
109 int dn = 2 * ap->port_no + adev->devno; 114 int dn = 2 * ap->port_no + adev->devno;
110 int wanted_pio; 115 int wanted_pio;
116 unsigned long flags;
117
118 spin_lock_irqsave(&atiixp_lock, flags);
111 119
112 if (adev->dma_mode >= XFER_UDMA_0) { 120 if (adev->dma_mode >= XFER_UDMA_0) {
113 u16 udma_mode_data; 121 u16 udma_mode_data;
@@ -145,6 +153,7 @@ static void atiixp_set_dmamode(struct ata_port *ap, struct ata_device *adev)
145 153
146 if (adev->pio_mode != wanted_pio) 154 if (adev->pio_mode != wanted_pio)
147 atiixp_set_pio_timing(ap, adev, wanted_pio); 155 atiixp_set_pio_timing(ap, adev, wanted_pio);
156 spin_unlock_irqrestore(&atiixp_lock, flags);
148} 157}
149 158
150/** 159/**
@@ -237,7 +246,8 @@ static int atiixp_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
237 if (!pci_test_config_bits(pdev, &atiixp_enable_bits[i])) 246 if (!pci_test_config_bits(pdev, &atiixp_enable_bits[i]))
238 ppi[i] = &ata_dummy_port_info; 247 ppi[i] = &ata_dummy_port_info;
239 248
240 return ata_pci_sff_init_one(pdev, ppi, &atiixp_sht, NULL); 249 return ata_pci_sff_init_one(pdev, ppi, &atiixp_sht, NULL,
250 ATA_HOST_PARALLEL_SCAN);
241} 251}
242 252
243static const struct pci_device_id atiixp[] = { 253static const struct pci_device_id atiixp[] = {
diff --git a/drivers/ata/pata_cmd640.c b/drivers/ata/pata_cmd640.c
index 5acf9fa9b39f..6cd5d5dd9e3b 100644
--- a/drivers/ata/pata_cmd640.c
+++ b/drivers/ata/pata_cmd640.c
@@ -223,7 +223,7 @@ static int cmd640_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
223 223
224 cmd640_hardware_init(pdev); 224 cmd640_hardware_init(pdev);
225 225
226 return ata_pci_sff_init_one(pdev, ppi, &cmd640_sht, NULL); 226 return ata_pci_sff_init_one(pdev, ppi, &cmd640_sht, NULL, 0);
227} 227}
228 228
229#ifdef CONFIG_PM 229#ifdef CONFIG_PM
diff --git a/drivers/ata/pata_cmd64x.c b/drivers/ata/pata_cmd64x.c
index 0efb1f58f255..4c81a71b8877 100644
--- a/drivers/ata/pata_cmd64x.c
+++ b/drivers/ata/pata_cmd64x.c
@@ -2,6 +2,7 @@
2 * pata_cmd64x.c - CMD64x PATA for new ATA layer 2 * pata_cmd64x.c - CMD64x PATA for new ATA layer
3 * (C) 2005 Red Hat Inc 3 * (C) 2005 Red Hat Inc
4 * Alan Cox <alan@lxorguk.ukuu.org.uk> 4 * Alan Cox <alan@lxorguk.ukuu.org.uk>
5 * (C) 2009-2010 Bartlomiej Zolnierkiewicz
5 * 6 *
6 * Based upon 7 * Based upon
7 * linux/drivers/ide/pci/cmd64x.c Version 1.30 Sept 10, 2002 8 * linux/drivers/ide/pci/cmd64x.c Version 1.30 Sept 10, 2002
@@ -39,11 +40,7 @@
39 40
40enum { 41enum {
41 CFR = 0x50, 42 CFR = 0x50,
42 CFR_INTR_CH0 = 0x02, 43 CFR_INTR_CH0 = 0x04,
43 CNTRL = 0x51,
44 CNTRL_DIS_RA0 = 0x40,
45 CNTRL_DIS_RA1 = 0x80,
46 CNTRL_ENA_2ND = 0x08,
47 CMDTIM = 0x52, 44 CMDTIM = 0x52,
48 ARTTIM0 = 0x53, 45 ARTTIM0 = 0x53,
49 DRWTIM0 = 0x54, 46 DRWTIM0 = 0x54,
@@ -53,9 +50,6 @@ enum {
53 ARTTIM23_DIS_RA2 = 0x04, 50 ARTTIM23_DIS_RA2 = 0x04,
54 ARTTIM23_DIS_RA3 = 0x08, 51 ARTTIM23_DIS_RA3 = 0x08,
55 ARTTIM23_INTR_CH1 = 0x10, 52 ARTTIM23_INTR_CH1 = 0x10,
56 ARTTIM2 = 0x57,
57 ARTTIM3 = 0x57,
58 DRWTIM23 = 0x58,
59 DRWTIM2 = 0x58, 53 DRWTIM2 = 0x58,
60 BRST = 0x59, 54 BRST = 0x59,
61 DRWTIM3 = 0x5b, 55 DRWTIM3 = 0x5b,
@@ -63,14 +57,11 @@ enum {
63 MRDMODE = 0x71, 57 MRDMODE = 0x71,
64 MRDMODE_INTR_CH0 = 0x04, 58 MRDMODE_INTR_CH0 = 0x04,
65 MRDMODE_INTR_CH1 = 0x08, 59 MRDMODE_INTR_CH1 = 0x08,
66 MRDMODE_BLK_CH0 = 0x10,
67 MRDMODE_BLK_CH1 = 0x20,
68 BMIDESR0 = 0x72, 60 BMIDESR0 = 0x72,
69 UDIDETCR0 = 0x73, 61 UDIDETCR0 = 0x73,
70 DTPR0 = 0x74, 62 DTPR0 = 0x74,
71 BMIDECR1 = 0x78, 63 BMIDECR1 = 0x78,
72 BMIDECSR = 0x79, 64 BMIDECSR = 0x79,
73 BMIDESR1 = 0x7A,
74 UDIDETCR1 = 0x7B, 65 UDIDETCR1 = 0x7B,
75 DTPR1 = 0x7C 66 DTPR1 = 0x7C
76}; 67};
@@ -130,8 +121,14 @@ static void cmd64x_set_timing(struct ata_port *ap, struct ata_device *adev, u8 m
130 121
131 if (pair) { 122 if (pair) {
132 struct ata_timing tp; 123 struct ata_timing tp;
124
133 ata_timing_compute(pair, pair->pio_mode, &tp, T, 0); 125 ata_timing_compute(pair, pair->pio_mode, &tp, T, 0);
134 ata_timing_merge(&t, &tp, &t, ATA_TIMING_SETUP); 126 ata_timing_merge(&t, &tp, &t, ATA_TIMING_SETUP);
127 if (pair->dma_mode) {
128 ata_timing_compute(pair, pair->dma_mode,
129 &tp, T, 0);
130 ata_timing_merge(&tp, &t, &t, ATA_TIMING_SETUP);
131 }
135 } 132 }
136 } 133 }
137 134
@@ -147,7 +144,9 @@ static void cmd64x_set_timing(struct ata_port *ap, struct ata_device *adev, u8 m
147 /* Now convert the clocks into values we can actually stuff into 144 /* Now convert the clocks into values we can actually stuff into
148 the chip */ 145 the chip */
149 146
150 if (t.recover > 1) 147 if (t.recover == 16)
148 t.recover = 0;
149 else if (t.recover > 1)
151 t.recover--; 150 t.recover--;
152 else 151 else
153 t.recover = 15; 152 t.recover = 15;
@@ -245,7 +244,7 @@ static void cmd648_bmdma_stop(struct ata_queued_cmd *qc)
245 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 244 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
246 u8 dma_intr; 245 u8 dma_intr;
247 int dma_mask = ap->port_no ? ARTTIM23_INTR_CH1 : CFR_INTR_CH0; 246 int dma_mask = ap->port_no ? ARTTIM23_INTR_CH1 : CFR_INTR_CH0;
248 int dma_reg = ap->port_no ? ARTTIM2 : CFR; 247 int dma_reg = ap->port_no ? ARTTIM23 : CFR;
249 248
250 ata_bmdma_stop(qc); 249 ata_bmdma_stop(qc);
251 250
@@ -368,7 +367,7 @@ static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
368 pci_write_config_byte(pdev, UDIDETCR0, 0xF0); 367 pci_write_config_byte(pdev, UDIDETCR0, 0xF0);
369#endif 368#endif
370 369
371 return ata_pci_sff_init_one(pdev, ppi, &cmd64x_sht, NULL); 370 return ata_pci_sff_init_one(pdev, ppi, &cmd64x_sht, NULL, 0);
372} 371}
373 372
374#ifdef CONFIG_PM 373#ifdef CONFIG_PM
diff --git a/drivers/ata/pata_cs5530.c b/drivers/ata/pata_cs5530.c
index c974b05e4129..738ad2e14a97 100644
--- a/drivers/ata/pata_cs5530.c
+++ b/drivers/ata/pata_cs5530.c
@@ -324,7 +324,7 @@ static int cs5530_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
324 ppi[1] = &info_palmax_secondary; 324 ppi[1] = &info_palmax_secondary;
325 325
326 /* Now kick off ATA set up */ 326 /* Now kick off ATA set up */
327 return ata_pci_sff_init_one(pdev, ppi, &cs5530_sht, NULL); 327 return ata_pci_sff_init_one(pdev, ppi, &cs5530_sht, NULL, 0);
328} 328}
329 329
330#ifdef CONFIG_PM 330#ifdef CONFIG_PM
diff --git a/drivers/ata/pata_cs5535.c b/drivers/ata/pata_cs5535.c
index 71cef9a962d4..a02e6459fdcc 100644
--- a/drivers/ata/pata_cs5535.c
+++ b/drivers/ata/pata_cs5535.c
@@ -100,7 +100,7 @@ static int cs5535_cable_detect(struct ata_port *ap)
100static void cs5535_set_piomode(struct ata_port *ap, struct ata_device *adev) 100static void cs5535_set_piomode(struct ata_port *ap, struct ata_device *adev)
101{ 101{
102 static const u16 pio_timings[5] = { 102 static const u16 pio_timings[5] = {
103 0xF7F4, 0x53F3, 0x13F1, 0x5131, 0x1131 103 0xF7F4, 0xF173, 0x8141, 0x5131, 0x1131
104 }; 104 };
105 static const u16 pio_cmd_timings[5] = { 105 static const u16 pio_cmd_timings[5] = {
106 0xF7F4, 0x53F3, 0x13F1, 0x5131, 0x1131 106 0xF7F4, 0x53F3, 0x13F1, 0x5131, 0x1131
@@ -198,7 +198,7 @@ static int cs5535_init_one(struct pci_dev *dev, const struct pci_device_id *id)
198 rdmsr(ATAC_CH0D1_PIO, timings, dummy); 198 rdmsr(ATAC_CH0D1_PIO, timings, dummy);
199 if (CS5535_BAD_PIO(timings)) 199 if (CS5535_BAD_PIO(timings))
200 wrmsr(ATAC_CH0D1_PIO, 0xF7F4F7F4UL, 0); 200 wrmsr(ATAC_CH0D1_PIO, 0xF7F4F7F4UL, 0);
201 return ata_pci_sff_init_one(dev, ppi, &cs5535_sht, NULL); 201 return ata_pci_sff_init_one(dev, ppi, &cs5535_sht, NULL, 0);
202} 202}
203 203
204static const struct pci_device_id cs5535[] = { 204static const struct pci_device_id cs5535[] = {
diff --git a/drivers/ata/pata_cs5536.c b/drivers/ata/pata_cs5536.c
index ffee3978ec83..914ae3506ff5 100644
--- a/drivers/ata/pata_cs5536.c
+++ b/drivers/ata/pata_cs5536.c
@@ -260,7 +260,7 @@ static int cs5536_init_one(struct pci_dev *dev, const struct pci_device_id *id)
260 return -ENODEV; 260 return -ENODEV;
261 } 261 }
262 262
263 return ata_pci_sff_init_one(dev, ppi, &cs5536_sht, NULL); 263 return ata_pci_sff_init_one(dev, ppi, &cs5536_sht, NULL, 0);
264} 264}
265 265
266static const struct pci_device_id cs5536[] = { 266static const struct pci_device_id cs5536[] = {
diff --git a/drivers/ata/pata_cypress.c b/drivers/ata/pata_cypress.c
index 8fb040bf7361..0fcc096b8dac 100644
--- a/drivers/ata/pata_cypress.c
+++ b/drivers/ata/pata_cypress.c
@@ -62,14 +62,16 @@ static void cy82c693_set_piomode(struct ata_port *ap, struct ata_device *adev)
62 return; 62 return;
63 } 63 }
64 64
65 time_16 = clamp_val(t.recover, 0, 15) | (clamp_val(t.active, 0, 15) << 4); 65 time_16 = clamp_val(t.recover - 1, 0, 15) |
66 time_8 = clamp_val(t.act8b, 0, 15) | (clamp_val(t.rec8b, 0, 15) << 4); 66 (clamp_val(t.active - 1, 0, 15) << 4);
67 time_8 = clamp_val(t.act8b - 1, 0, 15) |
68 (clamp_val(t.rec8b - 1, 0, 15) << 4);
67 69
68 if (adev->devno == 0) { 70 if (adev->devno == 0) {
69 pci_read_config_dword(pdev, CY82_IDE_ADDRSETUP, &addr); 71 pci_read_config_dword(pdev, CY82_IDE_ADDRSETUP, &addr);
70 72
71 addr &= ~0x0F; /* Mask bits */ 73 addr &= ~0x0F; /* Mask bits */
72 addr |= clamp_val(t.setup, 0, 15); 74 addr |= clamp_val(t.setup - 1, 0, 15);
73 75
74 pci_write_config_dword(pdev, CY82_IDE_ADDRSETUP, addr); 76 pci_write_config_dword(pdev, CY82_IDE_ADDRSETUP, addr);
75 pci_write_config_byte(pdev, CY82_IDE_MASTER_IOR, time_16); 77 pci_write_config_byte(pdev, CY82_IDE_MASTER_IOR, time_16);
@@ -79,7 +81,7 @@ static void cy82c693_set_piomode(struct ata_port *ap, struct ata_device *adev)
79 pci_read_config_dword(pdev, CY82_IDE_ADDRSETUP, &addr); 81 pci_read_config_dword(pdev, CY82_IDE_ADDRSETUP, &addr);
80 82
81 addr &= ~0xF0; /* Mask bits */ 83 addr &= ~0xF0; /* Mask bits */
82 addr |= (clamp_val(t.setup, 0, 15) << 4); 84 addr |= (clamp_val(t.setup - 1, 0, 15) << 4);
83 85
84 pci_write_config_dword(pdev, CY82_IDE_ADDRSETUP, addr); 86 pci_write_config_dword(pdev, CY82_IDE_ADDRSETUP, addr);
85 pci_write_config_byte(pdev, CY82_IDE_SLAVE_IOR, time_16); 87 pci_write_config_byte(pdev, CY82_IDE_SLAVE_IOR, time_16);
@@ -136,7 +138,7 @@ static int cy82c693_init_one(struct pci_dev *pdev, const struct pci_device_id *i
136 if (PCI_FUNC(pdev->devfn) != 1) 138 if (PCI_FUNC(pdev->devfn) != 1)
137 return -ENODEV; 139 return -ENODEV;
138 140
139 return ata_pci_sff_init_one(pdev, ppi, &cy82c693_sht, NULL); 141 return ata_pci_sff_init_one(pdev, ppi, &cy82c693_sht, NULL, 0);
140} 142}
141 143
142static const struct pci_device_id cy82c693[] = { 144static const struct pci_device_id cy82c693[] = {
diff --git a/drivers/ata/pata_efar.c b/drivers/ata/pata_efar.c
index b2e71e6473ed..3bac0e079691 100644
--- a/drivers/ata/pata_efar.c
+++ b/drivers/ata/pata_efar.c
@@ -2,7 +2,7 @@
2 * pata_efar.c - EFAR PIIX clone controller driver 2 * pata_efar.c - EFAR PIIX clone controller driver
3 * 3 *
4 * (C) 2005 Red Hat 4 * (C) 2005 Red Hat
5 * (C) 2009 Bartlomiej Zolnierkiewicz 5 * (C) 2009-2010 Bartlomiej Zolnierkiewicz
6 * 6 *
7 * Some parts based on ata_piix.c by Jeff Garzik and others. 7 * Some parts based on ata_piix.c by Jeff Garzik and others.
8 * 8 *
@@ -68,6 +68,8 @@ static int efar_cable_detect(struct ata_port *ap)
68 return ATA_CBL_PATA80; 68 return ATA_CBL_PATA80;
69} 69}
70 70
71static DEFINE_SPINLOCK(efar_lock);
72
71/** 73/**
72 * efar_set_piomode - Initialize host controller PATA PIO timings 74 * efar_set_piomode - Initialize host controller PATA PIO timings
73 * @ap: Port whose timings we are configuring 75 * @ap: Port whose timings we are configuring
@@ -84,7 +86,9 @@ static void efar_set_piomode (struct ata_port *ap, struct ata_device *adev)
84 unsigned int pio = adev->pio_mode - XFER_PIO_0; 86 unsigned int pio = adev->pio_mode - XFER_PIO_0;
85 struct pci_dev *dev = to_pci_dev(ap->host->dev); 87 struct pci_dev *dev = to_pci_dev(ap->host->dev);
86 unsigned int idetm_port= ap->port_no ? 0x42 : 0x40; 88 unsigned int idetm_port= ap->port_no ? 0x42 : 0x40;
89 unsigned long flags;
87 u16 idetm_data; 90 u16 idetm_data;
91 u8 udma_enable;
88 int control = 0; 92 int control = 0;
89 93
90 /* 94 /*
@@ -107,6 +111,8 @@ static void efar_set_piomode (struct ata_port *ap, struct ata_device *adev)
107 if (adev->class == ATA_DEV_ATA) 111 if (adev->class == ATA_DEV_ATA)
108 control |= 4; /* PPE */ 112 control |= 4; /* PPE */
109 113
114 spin_lock_irqsave(&efar_lock, flags);
115
110 pci_read_config_word(dev, idetm_port, &idetm_data); 116 pci_read_config_word(dev, idetm_port, &idetm_data);
111 117
112 /* Set PPE, IE, and TIME as appropriate */ 118 /* Set PPE, IE, and TIME as appropriate */
@@ -131,6 +137,11 @@ static void efar_set_piomode (struct ata_port *ap, struct ata_device *adev)
131 137
132 idetm_data |= 0x4000; /* Ensure SITRE is set */ 138 idetm_data |= 0x4000; /* Ensure SITRE is set */
133 pci_write_config_word(dev, idetm_port, idetm_data); 139 pci_write_config_word(dev, idetm_port, idetm_data);
140
141 pci_read_config_byte(dev, 0x48, &udma_enable);
142 udma_enable &= ~(1 << (2 * ap->port_no + adev->devno));
143 pci_write_config_byte(dev, 0x48, udma_enable);
144 spin_unlock_irqrestore(&efar_lock, flags);
134} 145}
135 146
136/** 147/**
@@ -151,6 +162,7 @@ static void efar_set_dmamode (struct ata_port *ap, struct ata_device *adev)
151 u16 master_data; 162 u16 master_data;
152 u8 speed = adev->dma_mode; 163 u8 speed = adev->dma_mode;
153 int devid = adev->devno + 2 * ap->port_no; 164 int devid = adev->devno + 2 * ap->port_no;
165 unsigned long flags;
154 u8 udma_enable; 166 u8 udma_enable;
155 167
156 static const /* ISP RTC */ 168 static const /* ISP RTC */
@@ -160,6 +172,8 @@ static void efar_set_dmamode (struct ata_port *ap, struct ata_device *adev)
160 { 2, 1 }, 172 { 2, 1 },
161 { 2, 3 }, }; 173 { 2, 3 }, };
162 174
175 spin_lock_irqsave(&efar_lock, flags);
176
163 pci_read_config_word(dev, master_port, &master_data); 177 pci_read_config_word(dev, master_port, &master_data);
164 pci_read_config_byte(dev, 0x48, &udma_enable); 178 pci_read_config_byte(dev, 0x48, &udma_enable);
165 179
@@ -217,6 +231,7 @@ static void efar_set_dmamode (struct ata_port *ap, struct ata_device *adev)
217 pci_write_config_word(dev, master_port, master_data); 231 pci_write_config_word(dev, master_port, master_data);
218 } 232 }
219 pci_write_config_byte(dev, 0x48, udma_enable); 233 pci_write_config_byte(dev, 0x48, udma_enable);
234 spin_unlock_irqrestore(&efar_lock, flags);
220} 235}
221 236
222static struct scsi_host_template efar_sht = { 237static struct scsi_host_template efar_sht = {
@@ -256,13 +271,14 @@ static int efar_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
256 .udma_mask = ATA_UDMA4, 271 .udma_mask = ATA_UDMA4,
257 .port_ops = &efar_ops, 272 .port_ops = &efar_ops,
258 }; 273 };
259 const struct ata_port_info *ppi[] = { &info, NULL }; 274 const struct ata_port_info *ppi[] = { &info, &info };
260 275
261 if (!printed_version++) 276 if (!printed_version++)
262 dev_printk(KERN_DEBUG, &pdev->dev, 277 dev_printk(KERN_DEBUG, &pdev->dev,
263 "version " DRV_VERSION "\n"); 278 "version " DRV_VERSION "\n");
264 279
265 return ata_pci_sff_init_one(pdev, ppi, &efar_sht, NULL); 280 return ata_pci_sff_init_one(pdev, ppi, &efar_sht, NULL,
281 ATA_HOST_PARALLEL_SCAN);
266} 282}
267 283
268static const struct pci_device_id efar_pci_tbl[] = { 284static const struct pci_device_id efar_pci_tbl[] = {
diff --git a/drivers/ata/pata_hpt366.c b/drivers/ata/pata_hpt366.c
index 0bd48e8f21bd..af49bfb57247 100644
--- a/drivers/ata/pata_hpt366.c
+++ b/drivers/ata/pata_hpt366.c
@@ -11,9 +11,7 @@
11 * 11 *
12 * 12 *
13 * TODO 13 * TODO
14 * Maybe PLL mode 14 * Look into engine reset on timeout errors. Should not be required.
15 * Look into engine reset on timeout errors. Should not be
16 * required.
17 */ 15 */
18 16
19 17
@@ -27,7 +25,7 @@
27#include <linux/libata.h> 25#include <linux/libata.h>
28 26
29#define DRV_NAME "pata_hpt366" 27#define DRV_NAME "pata_hpt366"
30#define DRV_VERSION "0.6.7" 28#define DRV_VERSION "0.6.8"
31 29
32struct hpt_clock { 30struct hpt_clock {
33 u8 xfer_mode; 31 u8 xfer_mode;
@@ -207,17 +205,8 @@ static void hpt366_set_mode(struct ata_port *ap, struct ata_device *adev,
207{ 205{
208 struct hpt_clock *clocks = ap->host->private_data; 206 struct hpt_clock *clocks = ap->host->private_data;
209 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 207 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
210 u32 addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no); 208 u32 addr = 0x40 + 4 * adev->devno;
211 u32 addr2 = 0x51 + 4 * ap->port_no;
212 u32 mask, reg; 209 u32 mask, reg;
213 u8 fast;
214
215 /* Fast interrupt prediction disable, hold off interrupt disable */
216 pci_read_config_byte(pdev, addr2, &fast);
217 if (fast & 0x80) {
218 fast &= ~0x80;
219 pci_write_config_byte(pdev, addr2, fast);
220 }
221 210
222 /* determine timing mask and find matching clock entry */ 211 /* determine timing mask and find matching clock entry */
223 if (mode < XFER_MW_DMA_0) 212 if (mode < XFER_MW_DMA_0)
@@ -240,9 +229,9 @@ static void hpt366_set_mode(struct ata_port *ap, struct ata_device *adev,
240 * on-chip PIO FIFO/buffer (and PIO MST mode as well) to avoid 229 * on-chip PIO FIFO/buffer (and PIO MST mode as well) to avoid
241 * problems handling I/O errors later. 230 * problems handling I/O errors later.
242 */ 231 */
243 pci_read_config_dword(pdev, addr1, &reg); 232 pci_read_config_dword(pdev, addr, &reg);
244 reg = ((reg & ~mask) | (clocks->timing & mask)) & ~0xc0000000; 233 reg = ((reg & ~mask) | (clocks->timing & mask)) & ~0xc0000000;
245 pci_write_config_dword(pdev, addr1, reg); 234 pci_write_config_dword(pdev, addr, reg);
246} 235}
247 236
248/** 237/**
@@ -372,7 +361,7 @@ static int hpt36x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
372 break; 361 break;
373 } 362 }
374 /* Now kick off ATA set up */ 363 /* Now kick off ATA set up */
375 return ata_pci_sff_init_one(dev, ppi, &hpt36x_sht, hpriv); 364 return ata_pci_sff_init_one(dev, ppi, &hpt36x_sht, hpriv, 0);
376} 365}
377 366
378#ifdef CONFIG_PM 367#ifdef CONFIG_PM
diff --git a/drivers/ata/pata_hpt37x.c b/drivers/ata/pata_hpt37x.c
index 4224cfccedef..8839307a64cf 100644
--- a/drivers/ata/pata_hpt37x.c
+++ b/drivers/ata/pata_hpt37x.c
@@ -24,7 +24,7 @@
24#include <linux/libata.h> 24#include <linux/libata.h>
25 25
26#define DRV_NAME "pata_hpt37x" 26#define DRV_NAME "pata_hpt37x"
27#define DRV_VERSION "0.6.14" 27#define DRV_VERSION "0.6.15"
28 28
29struct hpt_clock { 29struct hpt_clock {
30 u8 xfer_speed; 30 u8 xfer_speed;
@@ -39,25 +39,24 @@ struct hpt_chip {
39 39
40/* key for bus clock timings 40/* key for bus clock timings
41 * bit 41 * bit
42 * 0:3 data_high_time. inactive time of DIOW_/DIOR_ for PIO and MW 42 * 0:3 data_high_time. Inactive time of DIOW_/DIOR_ for PIO and MW DMA.
43 * DMA. cycles = value + 1 43 * cycles = value + 1
44 * 4:8 data_low_time. active time of DIOW_/DIOR_ for PIO and MW 44 * 4:8 data_low_time. Active time of DIOW_/DIOR_ for PIO and MW DMA.
45 * DMA. cycles = value + 1 45 * cycles = value + 1
46 * 9:12 cmd_high_time. inactive time of DIOW_/DIOR_ during task file 46 * 9:12 cmd_high_time. Inactive time of DIOW_/DIOR_ during task file
47 * register access. 47 * register access.
48 * 13:17 cmd_low_time. active time of DIOW_/DIOR_ during task file 48 * 13:17 cmd_low_time. Active time of DIOW_/DIOR_ during task file
49 * register access. 49 * register access.
50 * 18:21 udma_cycle_time. clock freq and clock cycles for UDMA xfer. 50 * 18:20 udma_cycle_time. Clock cycles for UDMA xfer.
51 * during task file register access. 51 * 21 CLK frequency for UDMA: 0=ATA clock, 1=dual ATA clock.
52 * 22:24 pre_high_time. time to initialize 1st cycle for PIO and MW DMA 52 * 22:24 pre_high_time. Time to initialize 1st cycle for PIO and MW DMA xfer.
53 * xfer. 53 * 25:27 cmd_pre_high_time. Time to initialize 1st PIO cycle for task file
54 * 25:27 cmd_pre_high_time. time to initialize 1st PIO cycle for task
55 * register access. 54 * register access.
56 * 28 UDMA enable 55 * 28 UDMA enable.
57 * 29 DMA enable 56 * 29 DMA enable.
58 * 30 PIO_MST enable. if set, the chip is in bus master mode during 57 * 30 PIO_MST enable. If set, the chip is in bus master mode during
59 * PIO. 58 * PIO xfer.
60 * 31 FIFO enable. 59 * 31 FIFO enable. Only for PIO.
61 */ 60 */
62 61
63static struct hpt_clock hpt37x_timings_33[] = { 62static struct hpt_clock hpt37x_timings_33[] = {
@@ -384,20 +383,12 @@ static int hpt37x_pre_reset(struct ata_link *link, unsigned long deadline)
384 return ata_sff_prereset(link, deadline); 383 return ata_sff_prereset(link, deadline);
385} 384}
386 385
387/** 386static void hpt370_set_mode(struct ata_port *ap, struct ata_device *adev,
388 * hpt370_set_piomode - PIO setup 387 u8 mode)
389 * @ap: ATA interface
390 * @adev: device on the interface
391 *
392 * Perform PIO mode setup.
393 */
394
395static void hpt370_set_piomode(struct ata_port *ap, struct ata_device *adev)
396{ 388{
397 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 389 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
398 u32 addr1, addr2; 390 u32 addr1, addr2;
399 u32 reg; 391 u32 reg, timing, mask;
400 u32 mode;
401 u8 fast; 392 u8 fast;
402 393
403 addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no); 394 addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no);
@@ -409,11 +400,31 @@ static void hpt370_set_piomode(struct ata_port *ap, struct ata_device *adev)
409 fast |= 0x01; 400 fast |= 0x01;
410 pci_write_config_byte(pdev, addr2, fast); 401 pci_write_config_byte(pdev, addr2, fast);
411 402
403 /* Determine timing mask and find matching mode entry */
404 if (mode < XFER_MW_DMA_0)
405 mask = 0xcfc3ffff;
406 else if (mode < XFER_UDMA_0)
407 mask = 0x31c001ff;
408 else
409 mask = 0x303c0000;
410
411 timing = hpt37x_find_mode(ap, mode);
412
412 pci_read_config_dword(pdev, addr1, &reg); 413 pci_read_config_dword(pdev, addr1, &reg);
413 mode = hpt37x_find_mode(ap, adev->pio_mode); 414 reg = (reg & ~mask) | (timing & mask);
414 mode &= 0xCFC3FFFF; /* Leave DMA bits alone */ 415 pci_write_config_dword(pdev, addr1, reg);
415 reg &= ~0xCFC3FFFF; /* Strip timing bits */ 416}
416 pci_write_config_dword(pdev, addr1, reg | mode); 417/**
418 * hpt370_set_piomode - PIO setup
419 * @ap: ATA interface
420 * @adev: device on the interface
421 *
422 * Perform PIO mode setup.
423 */
424
425static void hpt370_set_piomode(struct ata_port *ap, struct ata_device *adev)
426{
427 hpt370_set_mode(ap, adev, adev->pio_mode);
417} 428}
418 429
419/** 430/**
@@ -421,33 +432,12 @@ static void hpt370_set_piomode(struct ata_port *ap, struct ata_device *adev)
421 * @ap: ATA interface 432 * @ap: ATA interface
422 * @adev: Device being configured 433 * @adev: Device being configured
423 * 434 *
424 * Set up the channel for MWDMA or UDMA modes. Much the same as with 435 * Set up the channel for MWDMA or UDMA modes.
425 * PIO, load the mode number and then set MWDMA or UDMA flag.
426 */ 436 */
427 437
428static void hpt370_set_dmamode(struct ata_port *ap, struct ata_device *adev) 438static void hpt370_set_dmamode(struct ata_port *ap, struct ata_device *adev)
429{ 439{
430 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 440 hpt370_set_mode(ap, adev, adev->dma_mode);
431 u32 addr1, addr2;
432 u32 reg, mode, mask;
433 u8 fast;
434
435 addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no);
436 addr2 = 0x51 + 4 * ap->port_no;
437
438 /* Fast interrupt prediction disable, hold off interrupt disable */
439 pci_read_config_byte(pdev, addr2, &fast);
440 fast &= ~0x02;
441 fast |= 0x01;
442 pci_write_config_byte(pdev, addr2, fast);
443
444 mask = adev->dma_mode < XFER_UDMA_0 ? 0x31C001FF : 0x303C0000;
445
446 pci_read_config_dword(pdev, addr1, &reg);
447 mode = hpt37x_find_mode(ap, adev->dma_mode);
448 mode &= mask;
449 reg &= ~mask;
450 pci_write_config_dword(pdev, addr1, reg | mode);
451} 441}
452 442
453/** 443/**
@@ -461,24 +451,25 @@ static void hpt370_bmdma_stop(struct ata_queued_cmd *qc)
461{ 451{
462 struct ata_port *ap = qc->ap; 452 struct ata_port *ap = qc->ap;
463 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 453 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
464 u8 dma_stat = ioread8(ap->ioaddr.bmdma_addr + 2);
465 u8 dma_cmd;
466 void __iomem *bmdma = ap->ioaddr.bmdma_addr; 454 void __iomem *bmdma = ap->ioaddr.bmdma_addr;
455 u8 dma_stat = ioread8(bmdma + ATA_DMA_STATUS);
456 u8 dma_cmd;
467 457
468 if (dma_stat & 0x01) { 458 if (dma_stat & ATA_DMA_ACTIVE) {
469 udelay(20); 459 udelay(20);
470 dma_stat = ioread8(bmdma + 2); 460 dma_stat = ioread8(bmdma + ATA_DMA_STATUS);
471 } 461 }
472 if (dma_stat & 0x01) { 462 if (dma_stat & ATA_DMA_ACTIVE) {
473 /* Clear the engine */ 463 /* Clear the engine */
474 pci_write_config_byte(pdev, 0x50 + 4 * ap->port_no, 0x37); 464 pci_write_config_byte(pdev, 0x50 + 4 * ap->port_no, 0x37);
475 udelay(10); 465 udelay(10);
476 /* Stop DMA */ 466 /* Stop DMA */
477 dma_cmd = ioread8(bmdma ); 467 dma_cmd = ioread8(bmdma + ATA_DMA_CMD);
478 iowrite8(dma_cmd & 0xFE, bmdma); 468 iowrite8(dma_cmd & ~ATA_DMA_START, bmdma + ATA_DMA_CMD);
479 /* Clear Error */ 469 /* Clear Error */
480 dma_stat = ioread8(bmdma + 2); 470 dma_stat = ioread8(bmdma + ATA_DMA_STATUS);
481 iowrite8(dma_stat | 0x06 , bmdma + 2); 471 iowrite8(dma_stat | ATA_DMA_INTR | ATA_DMA_ERR,
472 bmdma + ATA_DMA_STATUS);
482 /* Clear the engine */ 473 /* Clear the engine */
483 pci_write_config_byte(pdev, 0x50 + 4 * ap->port_no, 0x37); 474 pci_write_config_byte(pdev, 0x50 + 4 * ap->port_no, 0x37);
484 udelay(10); 475 udelay(10);
@@ -486,20 +477,12 @@ static void hpt370_bmdma_stop(struct ata_queued_cmd *qc)
486 ata_bmdma_stop(qc); 477 ata_bmdma_stop(qc);
487} 478}
488 479
489/** 480static void hpt372_set_mode(struct ata_port *ap, struct ata_device *adev,
490 * hpt372_set_piomode - PIO setup 481 u8 mode)
491 * @ap: ATA interface
492 * @adev: device on the interface
493 *
494 * Perform PIO mode setup.
495 */
496
497static void hpt372_set_piomode(struct ata_port *ap, struct ata_device *adev)
498{ 482{
499 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 483 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
500 u32 addr1, addr2; 484 u32 addr1, addr2;
501 u32 reg; 485 u32 reg, timing, mask;
502 u32 mode;
503 u8 fast; 486 u8 fast;
504 487
505 addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no); 488 addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no);
@@ -510,13 +493,32 @@ static void hpt372_set_piomode(struct ata_port *ap, struct ata_device *adev)
510 fast &= ~0x07; 493 fast &= ~0x07;
511 pci_write_config_byte(pdev, addr2, fast); 494 pci_write_config_byte(pdev, addr2, fast);
512 495
496 /* Determine timing mask and find matching mode entry */
497 if (mode < XFER_MW_DMA_0)
498 mask = 0xcfc3ffff;
499 else if (mode < XFER_UDMA_0)
500 mask = 0x31c001ff;
501 else
502 mask = 0x303c0000;
503
504 timing = hpt37x_find_mode(ap, mode);
505
513 pci_read_config_dword(pdev, addr1, &reg); 506 pci_read_config_dword(pdev, addr1, &reg);
514 mode = hpt37x_find_mode(ap, adev->pio_mode); 507 reg = (reg & ~mask) | (timing & mask);
508 pci_write_config_dword(pdev, addr1, reg);
509}
510
511/**
512 * hpt372_set_piomode - PIO setup
513 * @ap: ATA interface
514 * @adev: device on the interface
515 *
516 * Perform PIO mode setup.
517 */
515 518
516 printk("Find mode for %d reports %X\n", adev->pio_mode, mode); 519static void hpt372_set_piomode(struct ata_port *ap, struct ata_device *adev)
517 mode &= 0xCFC3FFFF; /* Leave DMA bits alone */ 520{
518 reg &= ~0xCFC3FFFF; /* Strip timing bits */ 521 hpt372_set_mode(ap, adev, adev->pio_mode);
519 pci_write_config_dword(pdev, addr1, reg | mode);
520} 522}
521 523
522/** 524/**
@@ -524,33 +526,12 @@ static void hpt372_set_piomode(struct ata_port *ap, struct ata_device *adev)
524 * @ap: ATA interface 526 * @ap: ATA interface
525 * @adev: Device being configured 527 * @adev: Device being configured
526 * 528 *
527 * Set up the channel for MWDMA or UDMA modes. Much the same as with 529 * Set up the channel for MWDMA or UDMA modes.
528 * PIO, load the mode number and then set MWDMA or UDMA flag.
529 */ 530 */
530 531
531static void hpt372_set_dmamode(struct ata_port *ap, struct ata_device *adev) 532static void hpt372_set_dmamode(struct ata_port *ap, struct ata_device *adev)
532{ 533{
533 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 534 hpt372_set_mode(ap, adev, adev->dma_mode);
534 u32 addr1, addr2;
535 u32 reg, mode, mask;
536 u8 fast;
537
538 addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no);
539 addr2 = 0x51 + 4 * ap->port_no;
540
541 /* Fast interrupt prediction disable, hold off interrupt disable */
542 pci_read_config_byte(pdev, addr2, &fast);
543 fast &= ~0x07;
544 pci_write_config_byte(pdev, addr2, fast);
545
546 mask = adev->dma_mode < XFER_UDMA_0 ? 0x31C001FF : 0x303C0000;
547
548 pci_read_config_dword(pdev, addr1, &reg);
549 mode = hpt37x_find_mode(ap, adev->dma_mode);
550 printk("Find mode for DMA %d reports %X\n", adev->dma_mode, mode);
551 mode &= mask;
552 reg &= ~mask;
553 pci_write_config_dword(pdev, addr1, reg | mode);
554} 535}
555 536
556/** 537/**
@@ -1006,7 +987,7 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
1006 } 987 }
1007 988
1008 /* Now kick off ATA set up */ 989 /* Now kick off ATA set up */
1009 return ata_pci_sff_init_one(dev, ppi, &hpt37x_sht, private_data); 990 return ata_pci_sff_init_one(dev, ppi, &hpt37x_sht, private_data, 0);
1010} 991}
1011 992
1012static const struct pci_device_id hpt37x[] = { 993static const struct pci_device_id hpt37x[] = {
diff --git a/drivers/ata/pata_hpt3x2n.c b/drivers/ata/pata_hpt3x2n.c
index dd26bc73bd9a..01457b266f3d 100644
--- a/drivers/ata/pata_hpt3x2n.c
+++ b/drivers/ata/pata_hpt3x2n.c
@@ -25,7 +25,7 @@
25#include <linux/libata.h> 25#include <linux/libata.h>
26 26
27#define DRV_NAME "pata_hpt3x2n" 27#define DRV_NAME "pata_hpt3x2n"
28#define DRV_VERSION "0.3.8" 28#define DRV_VERSION "0.3.10"
29 29
30enum { 30enum {
31 HPT_PCI_FAST = (1 << 31), 31 HPT_PCI_FAST = (1 << 31),
@@ -45,25 +45,24 @@ struct hpt_chip {
45 45
46/* key for bus clock timings 46/* key for bus clock timings
47 * bit 47 * bit
48 * 0:3 data_high_time. inactive time of DIOW_/DIOR_ for PIO and MW 48 * 0:3 data_high_time. Inactive time of DIOW_/DIOR_ for PIO and MW DMA.
49 * DMA. cycles = value + 1 49 * cycles = value + 1
50 * 4:8 data_low_time. active time of DIOW_/DIOR_ for PIO and MW 50 * 4:8 data_low_time. Active time of DIOW_/DIOR_ for PIO and MW DMA.
51 * DMA. cycles = value + 1 51 * cycles = value + 1
52 * 9:12 cmd_high_time. inactive time of DIOW_/DIOR_ during task file 52 * 9:12 cmd_high_time. Inactive time of DIOW_/DIOR_ during task file
53 * register access. 53 * register access.
54 * 13:17 cmd_low_time. active time of DIOW_/DIOR_ during task file 54 * 13:17 cmd_low_time. Active time of DIOW_/DIOR_ during task file
55 * register access. 55 * register access.
56 * 18:21 udma_cycle_time. clock freq and clock cycles for UDMA xfer. 56 * 18:20 udma_cycle_time. Clock cycles for UDMA xfer.
57 * during task file register access. 57 * 21 CLK frequency for UDMA: 0=ATA clock, 1=dual ATA clock.
58 * 22:24 pre_high_time. time to initialize 1st cycle for PIO and MW DMA 58 * 22:24 pre_high_time. Time to initialize 1st cycle for PIO and MW DMA xfer.
59 * xfer. 59 * 25:27 cmd_pre_high_time. Time to initialize 1st PIO cycle for task file
60 * 25:27 cmd_pre_high_time. time to initialize 1st PIO cycle for task
61 * register access. 60 * register access.
62 * 28 UDMA enable 61 * 28 UDMA enable.
63 * 29 DMA enable 62 * 29 DMA enable.
64 * 30 PIO_MST enable. if set, the chip is in bus master mode during 63 * 30 PIO_MST enable. If set, the chip is in bus master mode during
65 * PIO. 64 * PIO xfer.
66 * 31 FIFO enable. 65 * 31 FIFO enable. Only for PIO.
67 */ 66 */
68 67
69/* 66MHz DPLL clocks */ 68/* 66MHz DPLL clocks */
@@ -161,20 +160,12 @@ static int hpt3x2n_pre_reset(struct ata_link *link, unsigned long deadline)
161 return ata_sff_prereset(link, deadline); 160 return ata_sff_prereset(link, deadline);
162} 161}
163 162
164/** 163static void hpt3x2n_set_mode(struct ata_port *ap, struct ata_device *adev,
165 * hpt3x2n_set_piomode - PIO setup 164 u8 mode)
166 * @ap: ATA interface
167 * @adev: device on the interface
168 *
169 * Perform PIO mode setup.
170 */
171
172static void hpt3x2n_set_piomode(struct ata_port *ap, struct ata_device *adev)
173{ 165{
174 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 166 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
175 u32 addr1, addr2; 167 u32 addr1, addr2;
176 u32 reg; 168 u32 reg, timing, mask;
177 u32 mode;
178 u8 fast; 169 u8 fast;
179 170
180 addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no); 171 addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no);
@@ -185,11 +176,32 @@ static void hpt3x2n_set_piomode(struct ata_port *ap, struct ata_device *adev)
185 fast &= ~0x07; 176 fast &= ~0x07;
186 pci_write_config_byte(pdev, addr2, fast); 177 pci_write_config_byte(pdev, addr2, fast);
187 178
179 /* Determine timing mask and find matching mode entry */
180 if (mode < XFER_MW_DMA_0)
181 mask = 0xcfc3ffff;
182 else if (mode < XFER_UDMA_0)
183 mask = 0x31c001ff;
184 else
185 mask = 0x303c0000;
186
187 timing = hpt3x2n_find_mode(ap, mode);
188
188 pci_read_config_dword(pdev, addr1, &reg); 189 pci_read_config_dword(pdev, addr1, &reg);
189 mode = hpt3x2n_find_mode(ap, adev->pio_mode); 190 reg = (reg & ~mask) | (timing & mask);
190 mode &= 0xCFC3FFFF; /* Leave DMA bits alone */ 191 pci_write_config_dword(pdev, addr1, reg);
191 reg &= ~0xCFC3FFFF; /* Strip timing bits */ 192}
192 pci_write_config_dword(pdev, addr1, reg | mode); 193
194/**
195 * hpt3x2n_set_piomode - PIO setup
196 * @ap: ATA interface
197 * @adev: device on the interface
198 *
199 * Perform PIO mode setup.
200 */
201
202static void hpt3x2n_set_piomode(struct ata_port *ap, struct ata_device *adev)
203{
204 hpt3x2n_set_mode(ap, adev, adev->pio_mode);
193} 205}
194 206
195/** 207/**
@@ -197,32 +209,12 @@ static void hpt3x2n_set_piomode(struct ata_port *ap, struct ata_device *adev)
197 * @ap: ATA interface 209 * @ap: ATA interface
198 * @adev: Device being configured 210 * @adev: Device being configured
199 * 211 *
200 * Set up the channel for MWDMA or UDMA modes. Much the same as with 212 * Set up the channel for MWDMA or UDMA modes.
201 * PIO, load the mode number and then set MWDMA or UDMA flag.
202 */ 213 */
203 214
204static void hpt3x2n_set_dmamode(struct ata_port *ap, struct ata_device *adev) 215static void hpt3x2n_set_dmamode(struct ata_port *ap, struct ata_device *adev)
205{ 216{
206 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 217 hpt3x2n_set_mode(ap, adev, adev->dma_mode);
207 u32 addr1, addr2;
208 u32 reg, mode, mask;
209 u8 fast;
210
211 addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no);
212 addr2 = 0x51 + 4 * ap->port_no;
213
214 /* Fast interrupt prediction disable, hold off interrupt disable */
215 pci_read_config_byte(pdev, addr2, &fast);
216 fast &= ~0x07;
217 pci_write_config_byte(pdev, addr2, fast);
218
219 mask = adev->dma_mode < XFER_UDMA_0 ? 0x31C001FF : 0x303C0000;
220
221 pci_read_config_dword(pdev, addr1, &reg);
222 mode = hpt3x2n_find_mode(ap, adev->dma_mode);
223 mode &= mask;
224 reg &= ~mask;
225 pci_write_config_dword(pdev, addr1, reg | mode);
226} 218}
227 219
228/** 220/**
@@ -544,19 +536,19 @@ static int hpt3x2n_init_one(struct pci_dev *dev, const struct pci_device_id *id)
544 pci_mhz); 536 pci_mhz);
545 /* Set our private data up. We only need a few flags so we use 537 /* Set our private data up. We only need a few flags so we use
546 it directly */ 538 it directly */
547 if (pci_mhz > 60) { 539 if (pci_mhz > 60)
548 hpriv = (void *)(PCI66 | USE_DPLL); 540 hpriv = (void *)(PCI66 | USE_DPLL);
549 /* 541
550 * On HPT371N, if ATA clock is 66 MHz we must set bit 2 in 542 /*
551 * the MISC. register to stretch the UltraDMA Tss timing. 543 * On HPT371N, if ATA clock is 66 MHz we must set bit 2 in
552 * NOTE: This register is only writeable via I/O space. 544 * the MISC. register to stretch the UltraDMA Tss timing.
553 */ 545 * NOTE: This register is only writeable via I/O space.
554 if (dev->device == PCI_DEVICE_ID_TTI_HPT371) 546 */
555 outb(inb(iobase + 0x9c) | 0x04, iobase + 0x9c); 547 if (dev->device == PCI_DEVICE_ID_TTI_HPT371)
556 } 548 outb(inb(iobase + 0x9c) | 0x04, iobase + 0x9c);
557 549
558 /* Now kick off ATA set up */ 550 /* Now kick off ATA set up */
559 return ata_pci_sff_init_one(dev, ppi, &hpt3x2n_sht, hpriv); 551 return ata_pci_sff_init_one(dev, ppi, &hpt3x2n_sht, hpriv, 0);
560} 552}
561 553
562static const struct pci_device_id hpt3x2n[] = { 554static const struct pci_device_id hpt3x2n[] = {
diff --git a/drivers/ata/pata_it8213.c b/drivers/ata/pata_it8213.c
index 8f3325adceb3..f971f0de88e6 100644
--- a/drivers/ata/pata_it8213.c
+++ b/drivers/ata/pata_it8213.c
@@ -273,7 +273,7 @@ static int it8213_init_one (struct pci_dev *pdev, const struct pci_device_id *en
273 dev_printk(KERN_DEBUG, &pdev->dev, 273 dev_printk(KERN_DEBUG, &pdev->dev,
274 "version " DRV_VERSION "\n"); 274 "version " DRV_VERSION "\n");
275 275
276 return ata_pci_sff_init_one(pdev, ppi, &it8213_sht, NULL); 276 return ata_pci_sff_init_one(pdev, ppi, &it8213_sht, NULL, 0);
277} 277}
278 278
279static const struct pci_device_id it8213_pci_tbl[] = { 279static const struct pci_device_id it8213_pci_tbl[] = {
diff --git a/drivers/ata/pata_it821x.c b/drivers/ata/pata_it821x.c
index edc5c1fed150..9bde1cb5f981 100644
--- a/drivers/ata/pata_it821x.c
+++ b/drivers/ata/pata_it821x.c
@@ -932,7 +932,7 @@ static int it821x_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
932 else 932 else
933 ppi[0] = &info_smart; 933 ppi[0] = &info_smart;
934 } 934 }
935 return ata_pci_sff_init_one(pdev, ppi, &it821x_sht, NULL); 935 return ata_pci_sff_init_one(pdev, ppi, &it821x_sht, NULL, 0);
936} 936}
937 937
938#ifdef CONFIG_PM 938#ifdef CONFIG_PM
diff --git a/drivers/ata/pata_jmicron.c b/drivers/ata/pata_jmicron.c
index 3a1474ac8838..565e01e6ac7c 100644
--- a/drivers/ata/pata_jmicron.c
+++ b/drivers/ata/pata_jmicron.c
@@ -144,7 +144,7 @@ static int jmicron_init_one (struct pci_dev *pdev, const struct pci_device_id *i
144 }; 144 };
145 const struct ata_port_info *ppi[] = { &info, NULL }; 145 const struct ata_port_info *ppi[] = { &info, NULL };
146 146
147 return ata_pci_sff_init_one(pdev, ppi, &jmicron_sht, NULL); 147 return ata_pci_sff_init_one(pdev, ppi, &jmicron_sht, NULL, 0);
148} 148}
149 149
150static const struct pci_device_id jmicron_pci_tbl[] = { 150static const struct pci_device_id jmicron_pci_tbl[] = {
diff --git a/drivers/ata/pata_marvell.c b/drivers/ata/pata_marvell.c
index 950da39cae3d..e8ca02e5a71d 100644
--- a/drivers/ata/pata_marvell.c
+++ b/drivers/ata/pata_marvell.c
@@ -147,13 +147,13 @@ static int marvell_init_one (struct pci_dev *pdev, const struct pci_device_id *i
147 if (pdev->device == 0x6101) 147 if (pdev->device == 0x6101)
148 ppi[1] = &ata_dummy_port_info; 148 ppi[1] = &ata_dummy_port_info;
149 149
150#if defined(CONFIG_AHCI) || defined(CONFIG_AHCI_MODULE) 150#if defined(CONFIG_SATA_AHCI) || defined(CONFIG_SATA_AHCI_MODULE)
151 if (!marvell_pata_active(pdev)) { 151 if (!marvell_pata_active(pdev)) {
152 printk(KERN_INFO DRV_NAME ": PATA port not active, deferring to AHCI driver.\n"); 152 printk(KERN_INFO DRV_NAME ": PATA port not active, deferring to AHCI driver.\n");
153 return -ENODEV; 153 return -ENODEV;
154 } 154 }
155#endif 155#endif
156 return ata_pci_sff_init_one(pdev, ppi, &marvell_sht, NULL); 156 return ata_pci_sff_init_one(pdev, ppi, &marvell_sht, NULL, 0);
157} 157}
158 158
159static const struct pci_device_id marvell_pci_tbl[] = { 159static const struct pci_device_id marvell_pci_tbl[] = {
diff --git a/drivers/ata/pata_netcell.c b/drivers/ata/pata_netcell.c
index f0d52f72f5bb..94f979a7f4f7 100644
--- a/drivers/ata/pata_netcell.c
+++ b/drivers/ata/pata_netcell.c
@@ -82,7 +82,7 @@ static int netcell_init_one (struct pci_dev *pdev, const struct pci_device_id *e
82 ata_pci_bmdma_clear_simplex(pdev); 82 ata_pci_bmdma_clear_simplex(pdev);
83 83
84 /* And let the library code do the work */ 84 /* And let the library code do the work */
85 return ata_pci_sff_init_one(pdev, port_info, &netcell_sht, NULL); 85 return ata_pci_sff_init_one(pdev, port_info, &netcell_sht, NULL, 0);
86} 86}
87 87
88static const struct pci_device_id netcell_pci_tbl[] = { 88static const struct pci_device_id netcell_pci_tbl[] = {
diff --git a/drivers/ata/pata_ns87410.c b/drivers/ata/pata_ns87410.c
index ca53fac06717..2110863bb3db 100644
--- a/drivers/ata/pata_ns87410.c
+++ b/drivers/ata/pata_ns87410.c
@@ -148,7 +148,7 @@ static int ns87410_init_one(struct pci_dev *dev, const struct pci_device_id *id)
148 .port_ops = &ns87410_port_ops 148 .port_ops = &ns87410_port_ops
149 }; 149 };
150 const struct ata_port_info *ppi[] = { &info, NULL }; 150 const struct ata_port_info *ppi[] = { &info, NULL };
151 return ata_pci_sff_init_one(dev, ppi, &ns87410_sht, NULL); 151 return ata_pci_sff_init_one(dev, ppi, &ns87410_sht, NULL, 0);
152} 152}
153 153
154static const struct pci_device_id ns87410[] = { 154static const struct pci_device_id ns87410[] = {
diff --git a/drivers/ata/pata_ns87415.c b/drivers/ata/pata_ns87415.c
index 061aa1c41a48..830431f036a1 100644
--- a/drivers/ata/pata_ns87415.c
+++ b/drivers/ata/pata_ns87415.c
@@ -380,7 +380,7 @@ static int ns87415_init_one (struct pci_dev *pdev, const struct pci_device_id *e
380 380
381 ns87415_fixup(pdev); 381 ns87415_fixup(pdev);
382 382
383 return ata_pci_sff_init_one(pdev, ppi, &ns87415_sht, NULL); 383 return ata_pci_sff_init_one(pdev, ppi, &ns87415_sht, NULL, 0);
384} 384}
385 385
386static const struct pci_device_id ns87415_pci_tbl[] = { 386static const struct pci_device_id ns87415_pci_tbl[] = {
diff --git a/drivers/ata/pata_oldpiix.c b/drivers/ata/pata_oldpiix.c
index 9a8687db6b2d..5f6aba7eb0dd 100644
--- a/drivers/ata/pata_oldpiix.c
+++ b/drivers/ata/pata_oldpiix.c
@@ -248,7 +248,7 @@ static int oldpiix_init_one (struct pci_dev *pdev, const struct pci_device_id *e
248 dev_printk(KERN_DEBUG, &pdev->dev, 248 dev_printk(KERN_DEBUG, &pdev->dev,
249 "version " DRV_VERSION "\n"); 249 "version " DRV_VERSION "\n");
250 250
251 return ata_pci_sff_init_one(pdev, ppi, &oldpiix_sht, NULL); 251 return ata_pci_sff_init_one(pdev, ppi, &oldpiix_sht, NULL, 0);
252} 252}
253 253
254static const struct pci_device_id oldpiix_pci_tbl[] = { 254static const struct pci_device_id oldpiix_pci_tbl[] = {
diff --git a/drivers/ata/pata_opti.c b/drivers/ata/pata_opti.c
index 99eddda2d2e5..00c5a02a94fc 100644
--- a/drivers/ata/pata_opti.c
+++ b/drivers/ata/pata_opti.c
@@ -172,7 +172,7 @@ static int opti_init_one(struct pci_dev *dev, const struct pci_device_id *id)
172 if (!printed_version++) 172 if (!printed_version++)
173 dev_printk(KERN_DEBUG, &dev->dev, "version " DRV_VERSION "\n"); 173 dev_printk(KERN_DEBUG, &dev->dev, "version " DRV_VERSION "\n");
174 174
175 return ata_pci_sff_init_one(dev, ppi, &opti_sht, NULL); 175 return ata_pci_sff_init_one(dev, ppi, &opti_sht, NULL, 0);
176} 176}
177 177
178static const struct pci_device_id opti[] = { 178static const struct pci_device_id opti[] = {
diff --git a/drivers/ata/pata_optidma.c b/drivers/ata/pata_optidma.c
index 86885a445f97..76b7d12b1e8d 100644
--- a/drivers/ata/pata_optidma.c
+++ b/drivers/ata/pata_optidma.c
@@ -429,7 +429,7 @@ static int optidma_init_one(struct pci_dev *dev, const struct pci_device_id *id)
429 if (optiplus_with_udma(dev)) 429 if (optiplus_with_udma(dev))
430 ppi[0] = &info_82c700_udma; 430 ppi[0] = &info_82c700_udma;
431 431
432 return ata_pci_sff_init_one(dev, ppi, &optidma_sht, NULL); 432 return ata_pci_sff_init_one(dev, ppi, &optidma_sht, NULL, 0);
433} 433}
434 434
435static const struct pci_device_id optidma[] = { 435static const struct pci_device_id optidma[] = {
diff --git a/drivers/ata/pata_pcmcia.c b/drivers/ata/pata_pcmcia.c
index 1b392c9e8531..36103531feeb 100644
--- a/drivers/ata/pata_pcmcia.c
+++ b/drivers/ata/pata_pcmcia.c
@@ -136,7 +136,7 @@ static unsigned int ata_data_xfer_8bit(struct ata_device *dev,
136 * 136 *
137 */ 137 */
138 138
139void pcmcia_8bit_drain_fifo(struct ata_queued_cmd *qc) 139static void pcmcia_8bit_drain_fifo(struct ata_queued_cmd *qc)
140{ 140{
141 int count; 141 int count;
142 struct ata_port *ap; 142 struct ata_port *ap;
diff --git a/drivers/ata/pata_pdc202xx_old.c b/drivers/ata/pata_pdc202xx_old.c
index 2f3c9bed63d9..9ac0897cf8b0 100644
--- a/drivers/ata/pata_pdc202xx_old.c
+++ b/drivers/ata/pata_pdc202xx_old.c
@@ -2,7 +2,7 @@
2 * pata_pdc202xx_old.c - Promise PDC202xx PATA for new ATA layer 2 * pata_pdc202xx_old.c - Promise PDC202xx PATA for new ATA layer
3 * (C) 2005 Red Hat Inc 3 * (C) 2005 Red Hat Inc
4 * Alan Cox <alan@lxorguk.ukuu.org.uk> 4 * Alan Cox <alan@lxorguk.ukuu.org.uk>
5 * (C) 2007,2009 Bartlomiej Zolnierkiewicz 5 * (C) 2007,2009,2010 Bartlomiej Zolnierkiewicz
6 * 6 *
7 * Based in part on linux/drivers/ide/pci/pdc202xx_old.c 7 * Based in part on linux/drivers/ide/pci/pdc202xx_old.c
8 * 8 *
@@ -35,6 +35,15 @@ static int pdc2026x_cable_detect(struct ata_port *ap)
35 return ATA_CBL_PATA80; 35 return ATA_CBL_PATA80;
36} 36}
37 37
38static void pdc202xx_exec_command(struct ata_port *ap,
39 const struct ata_taskfile *tf)
40{
41 DPRINTK("ata%u: cmd 0x%X\n", ap->print_id, tf->command);
42
43 iowrite8(tf->command, ap->ioaddr.command_addr);
44 ndelay(400);
45}
46
38/** 47/**
39 * pdc202xx_configure_piomode - set chip PIO timing 48 * pdc202xx_configure_piomode - set chip PIO timing
40 * @ap: ATA interface 49 * @ap: ATA interface
@@ -271,6 +280,8 @@ static struct ata_port_operations pdc2024x_port_ops = {
271 .cable_detect = ata_cable_40wire, 280 .cable_detect = ata_cable_40wire,
272 .set_piomode = pdc202xx_set_piomode, 281 .set_piomode = pdc202xx_set_piomode,
273 .set_dmamode = pdc202xx_set_dmamode, 282 .set_dmamode = pdc202xx_set_dmamode,
283
284 .sff_exec_command = pdc202xx_exec_command,
274}; 285};
275 286
276static struct ata_port_operations pdc2026x_port_ops = { 287static struct ata_port_operations pdc2026x_port_ops = {
@@ -284,6 +295,8 @@ static struct ata_port_operations pdc2026x_port_ops = {
284 .dev_config = pdc2026x_dev_config, 295 .dev_config = pdc2026x_dev_config,
285 296
286 .port_start = pdc2026x_port_start, 297 .port_start = pdc2026x_port_start,
298
299 .sff_exec_command = pdc202xx_exec_command,
287}; 300};
288 301
289static int pdc202xx_init_one(struct pci_dev *dev, const struct pci_device_id *id) 302static int pdc202xx_init_one(struct pci_dev *dev, const struct pci_device_id *id)
@@ -324,7 +337,7 @@ static int pdc202xx_init_one(struct pci_dev *dev, const struct pci_device_id *id
324 return -ENODEV; 337 return -ENODEV;
325 } 338 }
326 } 339 }
327 return ata_pci_sff_init_one(dev, ppi, &pdc202xx_sht, NULL); 340 return ata_pci_sff_init_one(dev, ppi, &pdc202xx_sht, NULL, 0);
328} 341}
329 342
330static const struct pci_device_id pdc202xx[] = { 343static const struct pci_device_id pdc202xx[] = {
diff --git a/drivers/ata/pata_piccolo.c b/drivers/ata/pata_piccolo.c
index bfe0180f3efa..981615414849 100644
--- a/drivers/ata/pata_piccolo.c
+++ b/drivers/ata/pata_piccolo.c
@@ -95,7 +95,7 @@ static int ata_tosh_init_one(struct pci_dev *dev, const struct pci_device_id *id
95 }; 95 };
96 const struct ata_port_info *ppi[] = { &info, &ata_dummy_port_info }; 96 const struct ata_port_info *ppi[] = { &info, &ata_dummy_port_info };
97 /* Just one port for the moment */ 97 /* Just one port for the moment */
98 return ata_pci_sff_init_one(dev, ppi, &tosh_sht, NULL); 98 return ata_pci_sff_init_one(dev, ppi, &tosh_sht, NULL, 0);
99} 99}
100 100
101static struct pci_device_id ata_tosh[] = { 101static struct pci_device_id ata_tosh[] = {
diff --git a/drivers/ata/pata_radisys.c b/drivers/ata/pata_radisys.c
index 4fd25e737d9a..fc9602229acb 100644
--- a/drivers/ata/pata_radisys.c
+++ b/drivers/ata/pata_radisys.c
@@ -227,7 +227,7 @@ static int radisys_init_one (struct pci_dev *pdev, const struct pci_device_id *e
227 dev_printk(KERN_DEBUG, &pdev->dev, 227 dev_printk(KERN_DEBUG, &pdev->dev,
228 "version " DRV_VERSION "\n"); 228 "version " DRV_VERSION "\n");
229 229
230 return ata_pci_sff_init_one(pdev, ppi, &radisys_sht, NULL); 230 return ata_pci_sff_init_one(pdev, ppi, &radisys_sht, NULL, 0);
231} 231}
232 232
233static const struct pci_device_id radisys_pci_tbl[] = { 233static const struct pci_device_id radisys_pci_tbl[] = {
diff --git a/drivers/ata/pata_rz1000.c b/drivers/ata/pata_rz1000.c
index 2932998fc4c6..4a454a88aa9d 100644
--- a/drivers/ata/pata_rz1000.c
+++ b/drivers/ata/pata_rz1000.c
@@ -95,7 +95,7 @@ static int rz1000_init_one (struct pci_dev *pdev, const struct pci_device_id *en
95 printk_once(KERN_DEBUG DRV_NAME " version " DRV_VERSION "\n"); 95 printk_once(KERN_DEBUG DRV_NAME " version " DRV_VERSION "\n");
96 96
97 if (rz1000_fifo_disable(pdev) == 0) 97 if (rz1000_fifo_disable(pdev) == 0)
98 return ata_pci_sff_init_one(pdev, ppi, &rz1000_sht, NULL); 98 return ata_pci_sff_init_one(pdev, ppi, &rz1000_sht, NULL, 0);
99 99
100 printk(KERN_ERR DRV_NAME ": failed to disable read-ahead on chipset..\n"); 100 printk(KERN_ERR DRV_NAME ": failed to disable read-ahead on chipset..\n");
101 /* Not safe to use so skip */ 101 /* Not safe to use so skip */
diff --git a/drivers/ata/pata_sc1200.c b/drivers/ata/pata_sc1200.c
index 3bbed8322ecf..dfecc6f964b0 100644
--- a/drivers/ata/pata_sc1200.c
+++ b/drivers/ata/pata_sc1200.c
@@ -237,7 +237,7 @@ static int sc1200_init_one(struct pci_dev *dev, const struct pci_device_id *id)
237 }; 237 };
238 const struct ata_port_info *ppi[] = { &info, NULL }; 238 const struct ata_port_info *ppi[] = { &info, NULL };
239 239
240 return ata_pci_sff_init_one(dev, ppi, &sc1200_sht, NULL); 240 return ata_pci_sff_init_one(dev, ppi, &sc1200_sht, NULL, 0);
241} 241}
242 242
243static const struct pci_device_id sc1200[] = { 243static const struct pci_device_id sc1200[] = {
diff --git a/drivers/ata/pata_serverworks.c b/drivers/ata/pata_serverworks.c
index beaed12d50e4..9524d54035f7 100644
--- a/drivers/ata/pata_serverworks.c
+++ b/drivers/ata/pata_serverworks.c
@@ -1,6 +1,7 @@
1/* 1/*
2 * pata_serverworks.c - Serverworks PATA for new ATA layer 2 * pata_serverworks.c - Serverworks PATA for new ATA layer
3 * (C) 2005 Red Hat Inc 3 * (C) 2005 Red Hat Inc
4 * (C) 2010 Bartlomiej Zolnierkiewicz
4 * 5 *
5 * based upon 6 * based upon
6 * 7 *
@@ -253,7 +254,7 @@ static void serverworks_set_piomode(struct ata_port *ap, struct ata_device *adev
253 if (serverworks_is_csb(pdev)) { 254 if (serverworks_is_csb(pdev)) {
254 pci_read_config_word(pdev, 0x4A, &csb5_pio); 255 pci_read_config_word(pdev, 0x4A, &csb5_pio);
255 csb5_pio &= ~(0x0F << devbits); 256 csb5_pio &= ~(0x0F << devbits);
256 pci_write_config_byte(pdev, 0x4A, csb5_pio | (pio << devbits)); 257 pci_write_config_word(pdev, 0x4A, csb5_pio | (pio << devbits));
257 } 258 }
258} 259}
259 260
@@ -327,7 +328,7 @@ static int serverworks_fixup_osb4(struct pci_dev *pdev)
327 pci_dev_put(isa_dev); 328 pci_dev_put(isa_dev);
328 return 0; 329 return 0;
329 } 330 }
330 printk(KERN_WARNING "ata_serverworks: Unable to find bridge.\n"); 331 printk(KERN_WARNING DRV_NAME ": Unable to find bridge.\n");
331 return -ENODEV; 332 return -ENODEV;
332} 333}
333 334
@@ -459,7 +460,7 @@ static int serverworks_init_one(struct pci_dev *pdev, const struct pci_device_id
459 if (pdev->device == PCI_DEVICE_ID_SERVERWORKS_CSB5IDE) 460 if (pdev->device == PCI_DEVICE_ID_SERVERWORKS_CSB5IDE)
460 ata_pci_bmdma_clear_simplex(pdev); 461 ata_pci_bmdma_clear_simplex(pdev);
461 462
462 return ata_pci_sff_init_one(pdev, ppi, &serverworks_sht, NULL); 463 return ata_pci_sff_init_one(pdev, ppi, &serverworks_sht, NULL, 0);
463} 464}
464 465
465#ifdef CONFIG_PM 466#ifdef CONFIG_PM
diff --git a/drivers/ata/pata_sil680.c b/drivers/ata/pata_sil680.c
index a2ace48a4610..c6c589c23ffc 100644
--- a/drivers/ata/pata_sil680.c
+++ b/drivers/ata/pata_sil680.c
@@ -356,7 +356,7 @@ static int __devinit sil680_init_one(struct pci_dev *pdev,
356 IRQF_SHARED, &sil680_sht); 356 IRQF_SHARED, &sil680_sht);
357 357
358use_ioports: 358use_ioports:
359 return ata_pci_sff_init_one(pdev, ppi, &sil680_sht, NULL); 359 return ata_pci_sff_init_one(pdev, ppi, &sil680_sht, NULL, 0);
360} 360}
361 361
362#ifdef CONFIG_PM 362#ifdef CONFIG_PM
diff --git a/drivers/ata/pata_sis.c b/drivers/ata/pata_sis.c
index 5c30d56dec84..b6708032f321 100644
--- a/drivers/ata/pata_sis.c
+++ b/drivers/ata/pata_sis.c
@@ -826,7 +826,7 @@ static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
826 826
827 sis_fixup(pdev, chipset); 827 sis_fixup(pdev, chipset);
828 828
829 return ata_pci_sff_init_one(pdev, ppi, &sis_sht, chipset); 829 return ata_pci_sff_init_one(pdev, ppi, &sis_sht, chipset, 0);
830} 830}
831 831
832#ifdef CONFIG_PM 832#ifdef CONFIG_PM
diff --git a/drivers/ata/pata_sl82c105.c b/drivers/ata/pata_sl82c105.c
index 29f733c32066..733b042a7469 100644
--- a/drivers/ata/pata_sl82c105.c
+++ b/drivers/ata/pata_sl82c105.c
@@ -316,7 +316,7 @@ static int sl82c105_init_one(struct pci_dev *dev, const struct pci_device_id *id
316 val |= CTRL_P0EN | CTRL_P0F16 | CTRL_P1F16; 316 val |= CTRL_P0EN | CTRL_P0F16 | CTRL_P1F16;
317 pci_write_config_dword(dev, 0x40, val); 317 pci_write_config_dword(dev, 0x40, val);
318 318
319 return ata_pci_sff_init_one(dev, ppi, &sl82c105_sht, NULL); 319 return ata_pci_sff_init_one(dev, ppi, &sl82c105_sht, NULL, 0);
320} 320}
321 321
322static const struct pci_device_id sl82c105[] = { 322static const struct pci_device_id sl82c105[] = {
diff --git a/drivers/ata/pata_triflex.c b/drivers/ata/pata_triflex.c
index f1f13ff222fd..48f50600ed2a 100644
--- a/drivers/ata/pata_triflex.c
+++ b/drivers/ata/pata_triflex.c
@@ -201,7 +201,7 @@ static int triflex_init_one(struct pci_dev *dev, const struct pci_device_id *id)
201 if (!printed_version++) 201 if (!printed_version++)
202 dev_printk(KERN_DEBUG, &dev->dev, "version " DRV_VERSION "\n"); 202 dev_printk(KERN_DEBUG, &dev->dev, "version " DRV_VERSION "\n");
203 203
204 return ata_pci_sff_init_one(dev, ppi, &triflex_sht, NULL); 204 return ata_pci_sff_init_one(dev, ppi, &triflex_sht, NULL, 0);
205} 205}
206 206
207static const struct pci_device_id triflex[] = { 207static const struct pci_device_id triflex[] = {
diff --git a/drivers/ata/pata_via.c b/drivers/ata/pata_via.c
index 0d97890af681..3059ec017de3 100644
--- a/drivers/ata/pata_via.c
+++ b/drivers/ata/pata_via.c
@@ -22,6 +22,7 @@
22 * VIA VT8233c - UDMA100 22 * VIA VT8233c - UDMA100
23 * VIA VT8235 - UDMA133 23 * VIA VT8235 - UDMA133
24 * VIA VT8237 - UDMA133 24 * VIA VT8237 - UDMA133
25 * VIA VT8237A - UDMA133
25 * VIA VT8237S - UDMA133 26 * VIA VT8237S - UDMA133
26 * VIA VT8251 - UDMA133 27 * VIA VT8251 - UDMA133
27 * 28 *
@@ -64,26 +65,15 @@
64#define DRV_NAME "pata_via" 65#define DRV_NAME "pata_via"
65#define DRV_VERSION "0.3.4" 66#define DRV_VERSION "0.3.4"
66 67
67/*
68 * The following comes directly from Vojtech Pavlik's ide/pci/via82cxxx
69 * driver.
70 */
71
72enum { 68enum {
73 VIA_UDMA = 0x007, 69 VIA_BAD_PREQ = 0x01, /* Crashes if PREQ# till DDACK# set */
74 VIA_UDMA_NONE = 0x000, 70 VIA_BAD_CLK66 = 0x02, /* 66 MHz clock doesn't work correctly */
75 VIA_UDMA_33 = 0x001, 71 VIA_SET_FIFO = 0x04, /* Needs to have FIFO split set */
76 VIA_UDMA_66 = 0x002, 72 VIA_NO_UNMASK = 0x08, /* Doesn't work with IRQ unmasking on */
77 VIA_UDMA_100 = 0x003, 73 VIA_BAD_ID = 0x10, /* Has wrong vendor ID (0x1107) */
78 VIA_UDMA_133 = 0x004, 74 VIA_BAD_AST = 0x20, /* Don't touch Address Setup Timing */
79 VIA_BAD_PREQ = 0x010, /* Crashes if PREQ# till DDACK# set */ 75 VIA_NO_ENABLES = 0x40, /* Has no enablebits */
80 VIA_BAD_CLK66 = 0x020, /* 66 MHz clock doesn't work correctly */ 76 VIA_SATA_PATA = 0x80, /* SATA/PATA combined configuration */
81 VIA_SET_FIFO = 0x040, /* Needs to have FIFO split set */
82 VIA_NO_UNMASK = 0x080, /* Doesn't work with IRQ unmasking on */
83 VIA_BAD_ID = 0x100, /* Has wrong vendor ID (0x1107) */
84 VIA_BAD_AST = 0x200, /* Don't touch Address Setup Timing */
85 VIA_NO_ENABLES = 0x400, /* Has no enablebits */
86 VIA_SATA_PATA = 0x800, /* SATA/PATA combined configuration */
87}; 77};
88 78
89enum { 79enum {
@@ -99,40 +89,37 @@ static const struct via_isa_bridge {
99 u16 id; 89 u16 id;
100 u8 rev_min; 90 u8 rev_min;
101 u8 rev_max; 91 u8 rev_max;
102 u16 flags; 92 u8 udma_mask;
93 u8 flags;
103} via_isa_bridges[] = { 94} via_isa_bridges[] = {
104 { "vx855", PCI_DEVICE_ID_VIA_VX855, 0x00, 0x2f, 95 { "vx855", PCI_DEVICE_ID_VIA_VX855, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
105 VIA_UDMA_133 | VIA_BAD_AST | VIA_SATA_PATA }, 96 { "vx800", PCI_DEVICE_ID_VIA_VX800, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
106 { "vx800", PCI_DEVICE_ID_VIA_VX800, 0x00, 0x2f, VIA_UDMA_133 | 97 { "vt8261", PCI_DEVICE_ID_VIA_8261, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
107 VIA_BAD_AST | VIA_SATA_PATA }, 98 { "vt8237s", PCI_DEVICE_ID_VIA_8237S, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
108 { "vt8261", PCI_DEVICE_ID_VIA_8261, 0x00, 0x2f, 99 { "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
109 VIA_UDMA_133 | VIA_BAD_AST }, 100 { "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
110 { "vt8237s", PCI_DEVICE_ID_VIA_8237S, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, 101 { "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_NO_ENABLES },
111 { "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, 102 { "vt6415", PCI_DEVICE_ID_VIA_6415, 0x00, 0xff, ATA_UDMA6, VIA_BAD_AST | VIA_NO_ENABLES },
112 { "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST | VIA_SATA_PATA }, 103 { "vt8237a", PCI_DEVICE_ID_VIA_8237A, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
113 { "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST | VIA_NO_ENABLES }, 104 { "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
114 { "vt6415", PCI_DEVICE_ID_VIA_6415, 0x00, 0xff, VIA_UDMA_133 | VIA_BAD_AST | VIA_NO_ENABLES }, 105 { "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
115 { "vt8237a", PCI_DEVICE_ID_VIA_8237A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, 106 { "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
116 { "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, 107 { "vt8233c", PCI_DEVICE_ID_VIA_8233C_0, 0x00, 0x2f, ATA_UDMA5, },
117 { "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, 108 { "vt8233", PCI_DEVICE_ID_VIA_8233_0, 0x00, 0x2f, ATA_UDMA5, },
118 { "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, 109 { "vt8231", PCI_DEVICE_ID_VIA_8231, 0x00, 0x2f, ATA_UDMA5, },
119 { "vt8233c", PCI_DEVICE_ID_VIA_8233C_0, 0x00, 0x2f, VIA_UDMA_100 }, 110 { "vt82c686b", PCI_DEVICE_ID_VIA_82C686, 0x40, 0x4f, ATA_UDMA5, },
120 { "vt8233", PCI_DEVICE_ID_VIA_8233_0, 0x00, 0x2f, VIA_UDMA_100 }, 111 { "vt82c686a", PCI_DEVICE_ID_VIA_82C686, 0x10, 0x2f, ATA_UDMA4, },
121 { "vt8231", PCI_DEVICE_ID_VIA_8231, 0x00, 0x2f, VIA_UDMA_100 }, 112 { "vt82c686", PCI_DEVICE_ID_VIA_82C686, 0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 },
122 { "vt82c686b", PCI_DEVICE_ID_VIA_82C686, 0x40, 0x4f, VIA_UDMA_100 }, 113 { "vt82c596b", PCI_DEVICE_ID_VIA_82C596, 0x10, 0x2f, ATA_UDMA4, },
123 { "vt82c686a", PCI_DEVICE_ID_VIA_82C686, 0x10, 0x2f, VIA_UDMA_66 }, 114 { "vt82c596a", PCI_DEVICE_ID_VIA_82C596, 0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 },
124 { "vt82c686", PCI_DEVICE_ID_VIA_82C686, 0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 }, 115 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, ATA_UDMA2, VIA_SET_FIFO },
125 { "vt82c596b", PCI_DEVICE_ID_VIA_82C596, 0x10, 0x2f, VIA_UDMA_66 }, 116 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, ATA_UDMA2, VIA_SET_FIFO | VIA_BAD_PREQ },
126 { "vt82c596a", PCI_DEVICE_ID_VIA_82C596, 0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 }, 117 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, ATA_UDMA2, VIA_SET_FIFO },
127 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, VIA_UDMA_33 | VIA_SET_FIFO }, 118 { "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, ATA_UDMA2, VIA_SET_FIFO },
128 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, VIA_UDMA_33 | VIA_SET_FIFO | VIA_BAD_PREQ }, 119 { "vt82c586", PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f, 0x00, VIA_SET_FIFO },
129 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, VIA_UDMA_33 | VIA_SET_FIFO }, 120 { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, 0x00, VIA_SET_FIFO | VIA_NO_UNMASK },
130 { "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, VIA_UDMA_33 | VIA_SET_FIFO }, 121 { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, 0x00, VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID },
131 { "vt82c586", PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f, VIA_UDMA_NONE | VIA_SET_FIFO }, 122 { "vtxxxx", PCI_DEVICE_ID_VIA_ANON, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
132 { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK },
133 { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID },
134 { "vtxxxx", PCI_DEVICE_ID_VIA_ANON, 0x00, 0x2f,
135 VIA_UDMA_133 | VIA_BAD_AST },
136 { NULL } 123 { NULL }
137}; 124};
138 125
@@ -191,10 +178,10 @@ static int via_cable_detect(struct ata_port *ap) {
191 return ATA_CBL_SATA; 178 return ATA_CBL_SATA;
192 179
193 /* Early chips are 40 wire */ 180 /* Early chips are 40 wire */
194 if ((config->flags & VIA_UDMA) < VIA_UDMA_66) 181 if (config->udma_mask < ATA_UDMA4)
195 return ATA_CBL_PATA40; 182 return ATA_CBL_PATA40;
196 /* UDMA 66 chips have only drive side logic */ 183 /* UDMA 66 chips have only drive side logic */
197 else if ((config->flags & VIA_UDMA) < VIA_UDMA_100) 184 else if (config->udma_mask < ATA_UDMA5)
198 return ATA_CBL_PATA_UNK; 185 return ATA_CBL_PATA_UNK;
199 /* UDMA 100 or later */ 186 /* UDMA 100 or later */
200 pci_read_config_dword(pdev, 0x50, &ata66); 187 pci_read_config_dword(pdev, 0x50, &ata66);
@@ -229,11 +216,10 @@ static int via_pre_reset(struct ata_link *link, unsigned long deadline)
229 216
230 217
231/** 218/**
232 * via_do_set_mode - set initial PIO mode data 219 * via_do_set_mode - set transfer mode data
233 * @ap: ATA interface 220 * @ap: ATA interface
234 * @adev: ATA device 221 * @adev: ATA device
235 * @mode: ATA mode being programmed 222 * @mode: ATA mode being programmed
236 * @tdiv: Clocks per PCI clock
237 * @set_ast: Set to program address setup 223 * @set_ast: Set to program address setup
238 * @udma_type: UDMA mode/format of registers 224 * @udma_type: UDMA mode/format of registers
239 * 225 *
@@ -244,17 +230,27 @@ static int via_pre_reset(struct ata_link *link, unsigned long deadline)
244 * on the two channels. 230 * on the two channels.
245 */ 231 */
246 232
247static void via_do_set_mode(struct ata_port *ap, struct ata_device *adev, int mode, int tdiv, int set_ast, int udma_type) 233static void via_do_set_mode(struct ata_port *ap, struct ata_device *adev,
234 int mode, int set_ast, int udma_type)
248{ 235{
249 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 236 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
250 struct ata_device *peer = ata_dev_pair(adev); 237 struct ata_device *peer = ata_dev_pair(adev);
251 struct ata_timing t, p; 238 struct ata_timing t, p;
252 static int via_clock = 33333; /* Bus clock in kHZ - ought to be tunable one day */ 239 static int via_clock = 33333; /* Bus clock in kHZ */
253 unsigned long T = 1000000000 / via_clock; 240 unsigned long T = 1000000000 / via_clock;
254 unsigned long UT = T/tdiv; 241 unsigned long UT = T;
255 int ut; 242 int ut;
256 int offset = 3 - (2*ap->port_no) - adev->devno; 243 int offset = 3 - (2*ap->port_no) - adev->devno;
257 244
245 switch (udma_type) {
246 case ATA_UDMA4:
247 UT = T / 2; break;
248 case ATA_UDMA5:
249 UT = T / 3; break;
250 case ATA_UDMA6:
251 UT = T / 4; break;
252 }
253
258 /* Calculate the timing values we require */ 254 /* Calculate the timing values we require */
259 ata_timing_compute(adev, mode, &t, T, UT); 255 ata_timing_compute(adev, mode, &t, T, UT);
260 256
@@ -273,7 +269,7 @@ static void via_do_set_mode(struct ata_port *ap, struct ata_device *adev, int mo
273 269
274 pci_read_config_byte(pdev, 0x4C, &setup); 270 pci_read_config_byte(pdev, 0x4C, &setup);
275 setup &= ~(3 << shift); 271 setup &= ~(3 << shift);
276 setup |= clamp_val(t.setup, 1, 4) << shift; /* 1,4 or 1,4 - 1 FIXME */ 272 setup |= (clamp_val(t.setup, 1, 4) - 1) << shift;
277 pci_write_config_byte(pdev, 0x4C, setup); 273 pci_write_config_byte(pdev, 0x4C, setup);
278 } 274 }
279 275
@@ -284,22 +280,20 @@ static void via_do_set_mode(struct ata_port *ap, struct ata_device *adev, int mo
284 ((clamp_val(t.active, 1, 16) - 1) << 4) | (clamp_val(t.recover, 1, 16) - 1)); 280 ((clamp_val(t.active, 1, 16) - 1) << 4) | (clamp_val(t.recover, 1, 16) - 1));
285 281
286 /* Load the UDMA bits according to type */ 282 /* Load the UDMA bits according to type */
287 switch(udma_type) { 283 switch (udma_type) {
288 default: 284 case ATA_UDMA2:
289 /* BUG() ? */ 285 default:
290 /* fall through */ 286 ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 5) - 2)) : 0x03;
291 case 33: 287 break;
292 ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 5) - 2)) : 0x03; 288 case ATA_UDMA4:
293 break; 289 ut = t.udma ? (0xe8 | (clamp_val(t.udma, 2, 9) - 2)) : 0x0f;
294 case 66: 290 break;
295 ut = t.udma ? (0xe8 | (clamp_val(t.udma, 2, 9) - 2)) : 0x0f; 291 case ATA_UDMA5:
296 break; 292 ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 9) - 2)) : 0x07;
297 case 100: 293 break;
298 ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 9) - 2)) : 0x07; 294 case ATA_UDMA6:
299 break; 295 ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 9) - 2)) : 0x07;
300 case 133: 296 break;
301 ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 9) - 2)) : 0x07;
302 break;
303 } 297 }
304 298
305 /* Set UDMA unless device is not UDMA capable */ 299 /* Set UDMA unless device is not UDMA capable */
@@ -325,22 +319,16 @@ static void via_set_piomode(struct ata_port *ap, struct ata_device *adev)
325{ 319{
326 const struct via_isa_bridge *config = ap->host->private_data; 320 const struct via_isa_bridge *config = ap->host->private_data;
327 int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1; 321 int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1;
328 int mode = config->flags & VIA_UDMA;
329 static u8 tclock[5] = { 1, 1, 2, 3, 4 };
330 static u8 udma[5] = { 0, 33, 66, 100, 133 };
331 322
332 via_do_set_mode(ap, adev, adev->pio_mode, tclock[mode], set_ast, udma[mode]); 323 via_do_set_mode(ap, adev, adev->pio_mode, set_ast, config->udma_mask);
333} 324}
334 325
335static void via_set_dmamode(struct ata_port *ap, struct ata_device *adev) 326static void via_set_dmamode(struct ata_port *ap, struct ata_device *adev)
336{ 327{
337 const struct via_isa_bridge *config = ap->host->private_data; 328 const struct via_isa_bridge *config = ap->host->private_data;
338 int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1; 329 int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1;
339 int mode = config->flags & VIA_UDMA;
340 static u8 tclock[5] = { 1, 1, 2, 3, 4 };
341 static u8 udma[5] = { 0, 33, 66, 100, 133 };
342 330
343 via_do_set_mode(ap, adev, adev->dma_mode, tclock[mode], set_ast, udma[mode]); 331 via_do_set_mode(ap, adev, adev->dma_mode, set_ast, config->udma_mask);
344} 332}
345 333
346/** 334/**
@@ -604,33 +592,29 @@ static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
604 via_config_fifo(pdev, config->flags); 592 via_config_fifo(pdev, config->flags);
605 593
606 /* Clock set up */ 594 /* Clock set up */
607 switch(config->flags & VIA_UDMA) { 595 switch (config->udma_mask) {
608 case VIA_UDMA_NONE: 596 case 0x00:
609 if (config->flags & VIA_NO_UNMASK) 597 if (config->flags & VIA_NO_UNMASK)
610 ppi[0] = &via_mwdma_info_borked; 598 ppi[0] = &via_mwdma_info_borked;
611 else 599 else
612 ppi[0] = &via_mwdma_info; 600 ppi[0] = &via_mwdma_info;
613 break; 601 break;
614 case VIA_UDMA_33: 602 case ATA_UDMA2:
615 ppi[0] = &via_udma33_info; 603 ppi[0] = &via_udma33_info;
616 break; 604 break;
617 case VIA_UDMA_66: 605 case ATA_UDMA4:
618 ppi[0] = &via_udma66_info; 606 ppi[0] = &via_udma66_info;
619 /* The 66 MHz devices require we enable the clock */ 607 break;
620 pci_read_config_dword(pdev, 0x50, &timing); 608 case ATA_UDMA5:
621 timing |= 0x80008; 609 ppi[0] = &via_udma100_info;
622 pci_write_config_dword(pdev, 0x50, timing); 610 break;
623 break; 611 case ATA_UDMA6:
624 case VIA_UDMA_100: 612 ppi[0] = &via_udma133_info;
625 ppi[0] = &via_udma100_info; 613 break;
626 break; 614 default:
627 case VIA_UDMA_133: 615 WARN_ON(1);
628 ppi[0] = &via_udma133_info; 616 return -ENODEV;
629 break; 617 }
630 default:
631 WARN_ON(1);
632 return -ENODEV;
633 }
634 618
635 if (config->flags & VIA_BAD_CLK66) { 619 if (config->flags & VIA_BAD_CLK66) {
636 /* Disable the 66MHz clock on problem devices */ 620 /* Disable the 66MHz clock on problem devices */
@@ -640,7 +624,7 @@ static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
640 } 624 }
641 625
642 /* We have established the device type, now fire it up */ 626 /* We have established the device type, now fire it up */
643 return ata_pci_sff_init_one(pdev, ppi, &via_sht, (void *)config); 627 return ata_pci_sff_init_one(pdev, ppi, &via_sht, (void *)config, 0);
644} 628}
645 629
646#ifdef CONFIG_PM 630#ifdef CONFIG_PM
@@ -667,7 +651,7 @@ static int via_reinit_one(struct pci_dev *pdev)
667 651
668 via_config_fifo(pdev, config->flags); 652 via_config_fifo(pdev, config->flags);
669 653
670 if ((config->flags & VIA_UDMA) == VIA_UDMA_66) { 654 if (config->udma_mask == ATA_UDMA4) {
671 /* The 66 MHz devices require we enable the clock */ 655 /* The 66 MHz devices require we enable the clock */
672 pci_read_config_dword(pdev, 0x50, &timing); 656 pci_read_config_dword(pdev, 0x50, &timing);
673 timing |= 0x80008; 657 timing |= 0x80008;
diff --git a/drivers/ata/sata_via.c b/drivers/ata/sata_via.c
index 02efd9a83d26..08f65492cc81 100644
--- a/drivers/ata/sata_via.c
+++ b/drivers/ata/sata_via.c
@@ -40,11 +40,13 @@
40#include <linux/blkdev.h> 40#include <linux/blkdev.h>
41#include <linux/delay.h> 41#include <linux/delay.h>
42#include <linux/device.h> 42#include <linux/device.h>
43#include <scsi/scsi.h>
44#include <scsi/scsi_cmnd.h>
43#include <scsi/scsi_host.h> 45#include <scsi/scsi_host.h>
44#include <linux/libata.h> 46#include <linux/libata.h>
45 47
46#define DRV_NAME "sata_via" 48#define DRV_NAME "sata_via"
47#define DRV_VERSION "2.4" 49#define DRV_VERSION "2.6"
48 50
49/* 51/*
50 * vt8251 is different from other sata controllers of VIA. It has two 52 * vt8251 is different from other sata controllers of VIA. It has two
@@ -80,6 +82,7 @@ static int vt8251_scr_write(struct ata_link *link, unsigned int scr, u32 val);
80static void svia_tf_load(struct ata_port *ap, const struct ata_taskfile *tf); 82static void svia_tf_load(struct ata_port *ap, const struct ata_taskfile *tf);
81static void svia_noop_freeze(struct ata_port *ap); 83static void svia_noop_freeze(struct ata_port *ap);
82static int vt6420_prereset(struct ata_link *link, unsigned long deadline); 84static int vt6420_prereset(struct ata_link *link, unsigned long deadline);
85static void vt6420_bmdma_start(struct ata_queued_cmd *qc);
83static int vt6421_pata_cable_detect(struct ata_port *ap); 86static int vt6421_pata_cable_detect(struct ata_port *ap);
84static void vt6421_set_pio_mode(struct ata_port *ap, struct ata_device *adev); 87static void vt6421_set_pio_mode(struct ata_port *ap, struct ata_device *adev);
85static void vt6421_set_dma_mode(struct ata_port *ap, struct ata_device *adev); 88static void vt6421_set_dma_mode(struct ata_port *ap, struct ata_device *adev);
@@ -121,6 +124,7 @@ static struct ata_port_operations vt6420_sata_ops = {
121 .inherits = &svia_base_ops, 124 .inherits = &svia_base_ops,
122 .freeze = svia_noop_freeze, 125 .freeze = svia_noop_freeze,
123 .prereset = vt6420_prereset, 126 .prereset = vt6420_prereset,
127 .bmdma_start = vt6420_bmdma_start,
124}; 128};
125 129
126static struct ata_port_operations vt6421_pata_ops = { 130static struct ata_port_operations vt6421_pata_ops = {
@@ -377,6 +381,17 @@ static int vt6420_prereset(struct ata_link *link, unsigned long deadline)
377 return 0; 381 return 0;
378} 382}
379 383
384static void vt6420_bmdma_start(struct ata_queued_cmd *qc)
385{
386 struct ata_port *ap = qc->ap;
387 if ((qc->tf.command == ATA_CMD_PACKET) &&
388 (qc->scsicmd->sc_data_direction == DMA_TO_DEVICE)) {
389 /* Prevents corruption on some ATAPI burners */
390 ata_sff_pause(ap);
391 }
392 ata_bmdma_start(qc);
393}
394
380static int vt6421_pata_cable_detect(struct ata_port *ap) 395static int vt6421_pata_cable_detect(struct ata_port *ap)
381{ 396{
382 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 397 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
@@ -392,14 +407,16 @@ static void vt6421_set_pio_mode(struct ata_port *ap, struct ata_device *adev)
392{ 407{
393 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 408 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
394 static const u8 pio_bits[] = { 0xA8, 0x65, 0x65, 0x31, 0x20 }; 409 static const u8 pio_bits[] = { 0xA8, 0x65, 0x65, 0x31, 0x20 };
395 pci_write_config_byte(pdev, PATA_PIO_TIMING, pio_bits[adev->pio_mode - XFER_PIO_0]); 410 pci_write_config_byte(pdev, PATA_PIO_TIMING - adev->devno,
411 pio_bits[adev->pio_mode - XFER_PIO_0]);
396} 412}
397 413
398static void vt6421_set_dma_mode(struct ata_port *ap, struct ata_device *adev) 414static void vt6421_set_dma_mode(struct ata_port *ap, struct ata_device *adev)
399{ 415{
400 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 416 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
401 static const u8 udma_bits[] = { 0xEE, 0xE8, 0xE6, 0xE4, 0xE2, 0xE1, 0xE0, 0xE0 }; 417 static const u8 udma_bits[] = { 0xEE, 0xE8, 0xE6, 0xE4, 0xE2, 0xE1, 0xE0, 0xE0 };
402 pci_write_config_byte(pdev, PATA_UDMA_TIMING, udma_bits[adev->dma_mode - XFER_UDMA_0]); 418 pci_write_config_byte(pdev, PATA_UDMA_TIMING - adev->devno,
419 udma_bits[adev->dma_mode - XFER_UDMA_0]);
403} 420}
404 421
405static const unsigned int svia_bar_sizes[] = { 422static const unsigned int svia_bar_sizes[] = {
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-20 07:49:58 -0500