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-rw-r--r--drivers/ata/pata_at91.c8
1 files changed, 7 insertions, 1 deletions
diff --git a/drivers/ata/pata_at91.c b/drivers/ata/pata_at91.c
index 0da0dcc7dd08..a9a066a18ccf 100644
--- a/drivers/ata/pata_at91.c
+++ b/drivers/ata/pata_at91.c
@@ -33,11 +33,12 @@
33 33
34 34
35#define DRV_NAME "pata_at91" 35#define DRV_NAME "pata_at91"
36#define DRV_VERSION "0.1" 36#define DRV_VERSION "0.2"
37 37
38#define CF_IDE_OFFSET 0x00c00000 38#define CF_IDE_OFFSET 0x00c00000
39#define CF_ALT_IDE_OFFSET 0x00e00000 39#define CF_ALT_IDE_OFFSET 0x00e00000
40#define CF_IDE_RES_SIZE 0x08 40#define CF_IDE_RES_SIZE 0x08
41#define NCS_RD_PULSE_LIMIT 0x3f /* maximal value for pulse bitfields */
41 42
42struct at91_ide_info { 43struct at91_ide_info {
43 unsigned long mode; 44 unsigned long mode;
@@ -109,6 +110,11 @@ static void set_smc_timing(struct device *dev,
109 /* (CS0, CS1, DIR, OE) <= (CFCE1, CFCE2, CFRNW, NCSX) timings */ 110 /* (CS0, CS1, DIR, OE) <= (CFCE1, CFCE2, CFRNW, NCSX) timings */
110 ncs_read_setup = 1; 111 ncs_read_setup = 1;
111 ncs_read_pulse = read_cycle - 2; 112 ncs_read_pulse = read_cycle - 2;
113 if (ncs_read_pulse > NCS_RD_PULSE_LIMIT) {
114 ncs_read_pulse = NCS_RD_PULSE_LIMIT;
115 dev_warn(dev, "ncs_read_pulse limited to maximal value %lu\n",
116 ncs_read_pulse);
117 }
112 118
113 /* Write timings same as read timings */ 119 /* Write timings same as read timings */
114 write_cycle = read_cycle; 120 write_cycle = read_cycle;