diff options
Diffstat (limited to 'drivers/ata/sata_sil.c')
-rw-r--r-- | drivers/ata/sata_sil.c | 99 |
1 files changed, 44 insertions, 55 deletions
diff --git a/drivers/ata/sata_sil.c b/drivers/ata/sata_sil.c index 7808d0369d91..dca3d3749f06 100644 --- a/drivers/ata/sata_sil.c +++ b/drivers/ata/sata_sil.c | |||
@@ -49,6 +49,8 @@ | |||
49 | #define DRV_VERSION "2.0" | 49 | #define DRV_VERSION "2.0" |
50 | 50 | ||
51 | enum { | 51 | enum { |
52 | SIL_MMIO_BAR = 5, | ||
53 | |||
52 | /* | 54 | /* |
53 | * host flags | 55 | * host flags |
54 | */ | 56 | */ |
@@ -200,18 +202,18 @@ static const struct ata_port_operations sil_ops = { | |||
200 | .bmdma_status = ata_bmdma_status, | 202 | .bmdma_status = ata_bmdma_status, |
201 | .qc_prep = ata_qc_prep, | 203 | .qc_prep = ata_qc_prep, |
202 | .qc_issue = ata_qc_issue_prot, | 204 | .qc_issue = ata_qc_issue_prot, |
203 | .data_xfer = ata_mmio_data_xfer, | 205 | .data_xfer = ata_data_xfer, |
204 | .freeze = sil_freeze, | 206 | .freeze = sil_freeze, |
205 | .thaw = sil_thaw, | 207 | .thaw = sil_thaw, |
206 | .error_handler = ata_bmdma_error_handler, | 208 | .error_handler = ata_bmdma_error_handler, |
207 | .post_internal_cmd = ata_bmdma_post_internal_cmd, | 209 | .post_internal_cmd = ata_bmdma_post_internal_cmd, |
208 | .irq_handler = sil_interrupt, | 210 | .irq_handler = sil_interrupt, |
209 | .irq_clear = ata_bmdma_irq_clear, | 211 | .irq_clear = ata_bmdma_irq_clear, |
212 | .irq_on = ata_irq_on, | ||
213 | .irq_ack = ata_irq_ack, | ||
210 | .scr_read = sil_scr_read, | 214 | .scr_read = sil_scr_read, |
211 | .scr_write = sil_scr_write, | 215 | .scr_write = sil_scr_write, |
212 | .port_start = ata_port_start, | 216 | .port_start = ata_port_start, |
213 | .port_stop = ata_port_stop, | ||
214 | .host_stop = ata_pci_host_stop, | ||
215 | }; | 217 | }; |
216 | 218 | ||
217 | static const struct ata_port_info sil_port_info[] = { | 219 | static const struct ata_port_info sil_port_info[] = { |
@@ -297,7 +299,8 @@ static void sil_post_set_mode (struct ata_port *ap) | |||
297 | { | 299 | { |
298 | struct ata_host *host = ap->host; | 300 | struct ata_host *host = ap->host; |
299 | struct ata_device *dev; | 301 | struct ata_device *dev; |
300 | void __iomem *addr = host->mmio_base + sil_port[ap->port_no].xfer_mode; | 302 | void __iomem *mmio_base = host->iomap[SIL_MMIO_BAR]; |
303 | void __iomem *addr = mmio_base + sil_port[ap->port_no].xfer_mode; | ||
301 | u32 tmp, dev_mode[2]; | 304 | u32 tmp, dev_mode[2]; |
302 | unsigned int i; | 305 | unsigned int i; |
303 | 306 | ||
@@ -320,9 +323,9 @@ static void sil_post_set_mode (struct ata_port *ap) | |||
320 | readl(addr); /* flush */ | 323 | readl(addr); /* flush */ |
321 | } | 324 | } |
322 | 325 | ||
323 | static inline unsigned long sil_scr_addr(struct ata_port *ap, unsigned int sc_reg) | 326 | static inline void __iomem *sil_scr_addr(struct ata_port *ap, unsigned int sc_reg) |
324 | { | 327 | { |
325 | unsigned long offset = ap->ioaddr.scr_addr; | 328 | void __iomem *offset = ap->ioaddr.scr_addr; |
326 | 329 | ||
327 | switch (sc_reg) { | 330 | switch (sc_reg) { |
328 | case SCR_STATUS: | 331 | case SCR_STATUS: |
@@ -341,7 +344,7 @@ static inline unsigned long sil_scr_addr(struct ata_port *ap, unsigned int sc_re | |||
341 | 344 | ||
342 | static u32 sil_scr_read (struct ata_port *ap, unsigned int sc_reg) | 345 | static u32 sil_scr_read (struct ata_port *ap, unsigned int sc_reg) |
343 | { | 346 | { |
344 | void __iomem *mmio = (void __iomem *) sil_scr_addr(ap, sc_reg); | 347 | void __iomem *mmio = sil_scr_addr(ap, sc_reg); |
345 | if (mmio) | 348 | if (mmio) |
346 | return readl(mmio); | 349 | return readl(mmio); |
347 | return 0xffffffffU; | 350 | return 0xffffffffU; |
@@ -349,7 +352,7 @@ static u32 sil_scr_read (struct ata_port *ap, unsigned int sc_reg) | |||
349 | 352 | ||
350 | static void sil_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val) | 353 | static void sil_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val) |
351 | { | 354 | { |
352 | void __iomem *mmio = (void __iomem *) sil_scr_addr(ap, sc_reg); | 355 | void __iomem *mmio = sil_scr_addr(ap, sc_reg); |
353 | if (mmio) | 356 | if (mmio) |
354 | writel(val, mmio); | 357 | writel(val, mmio); |
355 | } | 358 | } |
@@ -444,7 +447,7 @@ static void sil_host_intr(struct ata_port *ap, u32 bmdma2) | |||
444 | static irqreturn_t sil_interrupt(int irq, void *dev_instance) | 447 | static irqreturn_t sil_interrupt(int irq, void *dev_instance) |
445 | { | 448 | { |
446 | struct ata_host *host = dev_instance; | 449 | struct ata_host *host = dev_instance; |
447 | void __iomem *mmio_base = host->mmio_base; | 450 | void __iomem *mmio_base = host->iomap[SIL_MMIO_BAR]; |
448 | int handled = 0; | 451 | int handled = 0; |
449 | int i; | 452 | int i; |
450 | 453 | ||
@@ -476,7 +479,7 @@ static irqreturn_t sil_interrupt(int irq, void *dev_instance) | |||
476 | 479 | ||
477 | static void sil_freeze(struct ata_port *ap) | 480 | static void sil_freeze(struct ata_port *ap) |
478 | { | 481 | { |
479 | void __iomem *mmio_base = ap->host->mmio_base; | 482 | void __iomem *mmio_base = ap->host->iomap[SIL_MMIO_BAR]; |
480 | u32 tmp; | 483 | u32 tmp; |
481 | 484 | ||
482 | /* global IRQ mask doesn't block SATA IRQ, turn off explicitly */ | 485 | /* global IRQ mask doesn't block SATA IRQ, turn off explicitly */ |
@@ -491,7 +494,7 @@ static void sil_freeze(struct ata_port *ap) | |||
491 | 494 | ||
492 | static void sil_thaw(struct ata_port *ap) | 495 | static void sil_thaw(struct ata_port *ap) |
493 | { | 496 | { |
494 | void __iomem *mmio_base = ap->host->mmio_base; | 497 | void __iomem *mmio_base = ap->host->iomap[SIL_MMIO_BAR]; |
495 | u32 tmp; | 498 | u32 tmp; |
496 | 499 | ||
497 | /* clear IRQ */ | 500 | /* clear IRQ */ |
@@ -541,9 +544,9 @@ static void sil_dev_config(struct ata_port *ap, struct ata_device *dev) | |||
541 | { | 544 | { |
542 | int print_info = ap->eh_context.i.flags & ATA_EHI_PRINTINFO; | 545 | int print_info = ap->eh_context.i.flags & ATA_EHI_PRINTINFO; |
543 | unsigned int n, quirks = 0; | 546 | unsigned int n, quirks = 0; |
544 | unsigned char model_num[41]; | 547 | unsigned char model_num[ATA_ID_PROD_LEN + 1]; |
545 | 548 | ||
546 | ata_id_c_string(dev->id, model_num, ATA_ID_PROD_OFS, sizeof(model_num)); | 549 | ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num)); |
547 | 550 | ||
548 | for (n = 0; sil_blacklist[n].product; n++) | 551 | for (n = 0; sil_blacklist[n].product; n++) |
549 | if (!strcmp(sil_blacklist[n].product, model_num)) { | 552 | if (!strcmp(sil_blacklist[n].product, model_num)) { |
@@ -621,38 +624,35 @@ static void sil_init_controller(struct pci_dev *pdev, | |||
621 | static int sil_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | 624 | static int sil_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) |
622 | { | 625 | { |
623 | static int printed_version; | 626 | static int printed_version; |
624 | struct ata_probe_ent *probe_ent = NULL; | 627 | struct device *dev = &pdev->dev; |
625 | unsigned long base; | 628 | struct ata_probe_ent *probe_ent; |
626 | void __iomem *mmio_base; | 629 | void __iomem *mmio_base; |
627 | int rc; | 630 | int rc; |
628 | unsigned int i; | 631 | unsigned int i; |
629 | int pci_dev_busy = 0; | ||
630 | 632 | ||
631 | if (!printed_version++) | 633 | if (!printed_version++) |
632 | dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n"); | 634 | dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n"); |
633 | 635 | ||
634 | rc = pci_enable_device(pdev); | 636 | rc = pcim_enable_device(pdev); |
635 | if (rc) | 637 | if (rc) |
636 | return rc; | 638 | return rc; |
637 | 639 | ||
638 | rc = pci_request_regions(pdev, DRV_NAME); | 640 | rc = pcim_iomap_regions(pdev, 1 << SIL_MMIO_BAR, DRV_NAME); |
639 | if (rc) { | 641 | if (rc == -EBUSY) |
640 | pci_dev_busy = 1; | 642 | pcim_pin_device(pdev); |
641 | goto err_out; | 643 | if (rc) |
642 | } | 644 | return rc; |
643 | 645 | ||
644 | rc = pci_set_dma_mask(pdev, ATA_DMA_MASK); | 646 | rc = pci_set_dma_mask(pdev, ATA_DMA_MASK); |
645 | if (rc) | 647 | if (rc) |
646 | goto err_out_regions; | 648 | return rc; |
647 | rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK); | 649 | rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK); |
648 | if (rc) | 650 | if (rc) |
649 | goto err_out_regions; | 651 | return rc; |
650 | 652 | ||
651 | probe_ent = kzalloc(sizeof(*probe_ent), GFP_KERNEL); | 653 | probe_ent = devm_kzalloc(dev, sizeof(*probe_ent), GFP_KERNEL); |
652 | if (probe_ent == NULL) { | 654 | if (probe_ent == NULL) |
653 | rc = -ENOMEM; | 655 | return -ENOMEM; |
654 | goto err_out_regions; | ||
655 | } | ||
656 | 656 | ||
657 | INIT_LIST_HEAD(&probe_ent->node); | 657 | INIT_LIST_HEAD(&probe_ent->node); |
658 | probe_ent->dev = pci_dev_to_dev(pdev); | 658 | probe_ent->dev = pci_dev_to_dev(pdev); |
@@ -666,22 +666,16 @@ static int sil_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | |||
666 | probe_ent->irq_flags = IRQF_SHARED; | 666 | probe_ent->irq_flags = IRQF_SHARED; |
667 | probe_ent->port_flags = sil_port_info[ent->driver_data].flags; | 667 | probe_ent->port_flags = sil_port_info[ent->driver_data].flags; |
668 | 668 | ||
669 | mmio_base = pci_iomap(pdev, 5, 0); | 669 | probe_ent->iomap = pcim_iomap_table(pdev); |
670 | if (mmio_base == NULL) { | ||
671 | rc = -ENOMEM; | ||
672 | goto err_out_free_ent; | ||
673 | } | ||
674 | |||
675 | probe_ent->mmio_base = mmio_base; | ||
676 | 670 | ||
677 | base = (unsigned long) mmio_base; | 671 | mmio_base = probe_ent->iomap[SIL_MMIO_BAR]; |
678 | 672 | ||
679 | for (i = 0; i < probe_ent->n_ports; i++) { | 673 | for (i = 0; i < probe_ent->n_ports; i++) { |
680 | probe_ent->port[i].cmd_addr = base + sil_port[i].tf; | 674 | probe_ent->port[i].cmd_addr = mmio_base + sil_port[i].tf; |
681 | probe_ent->port[i].altstatus_addr = | 675 | probe_ent->port[i].altstatus_addr = |
682 | probe_ent->port[i].ctl_addr = base + sil_port[i].ctl; | 676 | probe_ent->port[i].ctl_addr = mmio_base + sil_port[i].ctl; |
683 | probe_ent->port[i].bmdma_addr = base + sil_port[i].bmdma; | 677 | probe_ent->port[i].bmdma_addr = mmio_base + sil_port[i].bmdma; |
684 | probe_ent->port[i].scr_addr = base + sil_port[i].scr; | 678 | probe_ent->port[i].scr_addr = mmio_base + sil_port[i].scr; |
685 | ata_std_ports(&probe_ent->port[i]); | 679 | ata_std_ports(&probe_ent->port[i]); |
686 | } | 680 | } |
687 | 681 | ||
@@ -690,30 +684,25 @@ static int sil_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | |||
690 | 684 | ||
691 | pci_set_master(pdev); | 685 | pci_set_master(pdev); |
692 | 686 | ||
693 | /* FIXME: check ata_device_add return value */ | 687 | if (!ata_device_add(probe_ent)) |
694 | ata_device_add(probe_ent); | 688 | return -ENODEV; |
695 | kfree(probe_ent); | ||
696 | 689 | ||
690 | devm_kfree(dev, probe_ent); | ||
697 | return 0; | 691 | return 0; |
698 | |||
699 | err_out_free_ent: | ||
700 | kfree(probe_ent); | ||
701 | err_out_regions: | ||
702 | pci_release_regions(pdev); | ||
703 | err_out: | ||
704 | if (!pci_dev_busy) | ||
705 | pci_disable_device(pdev); | ||
706 | return rc; | ||
707 | } | 692 | } |
708 | 693 | ||
709 | #ifdef CONFIG_PM | 694 | #ifdef CONFIG_PM |
710 | static int sil_pci_device_resume(struct pci_dev *pdev) | 695 | static int sil_pci_device_resume(struct pci_dev *pdev) |
711 | { | 696 | { |
712 | struct ata_host *host = dev_get_drvdata(&pdev->dev); | 697 | struct ata_host *host = dev_get_drvdata(&pdev->dev); |
698 | int rc; | ||
699 | |||
700 | rc = ata_pci_device_do_resume(pdev); | ||
701 | if (rc) | ||
702 | return rc; | ||
713 | 703 | ||
714 | ata_pci_device_do_resume(pdev); | ||
715 | sil_init_controller(pdev, host->n_ports, host->ports[0]->flags, | 704 | sil_init_controller(pdev, host->n_ports, host->ports[0]->flags, |
716 | host->mmio_base); | 705 | host->iomap[SIL_MMIO_BAR]); |
717 | ata_host_resume(host); | 706 | ata_host_resume(host); |
718 | 707 | ||
719 | return 0; | 708 | return 0; |