diff options
Diffstat (limited to 'drivers/ata/sata_qstor.c')
-rw-r--r-- | drivers/ata/sata_qstor.c | 114 |
1 files changed, 74 insertions, 40 deletions
diff --git a/drivers/ata/sata_qstor.c b/drivers/ata/sata_qstor.c index 6d43ba79e154..2f1de6ec044c 100644 --- a/drivers/ata/sata_qstor.c +++ b/drivers/ata/sata_qstor.c | |||
@@ -103,7 +103,7 @@ enum { | |||
103 | QS_DMA_BOUNDARY = ~0UL | 103 | QS_DMA_BOUNDARY = ~0UL |
104 | }; | 104 | }; |
105 | 105 | ||
106 | typedef enum { qs_state_idle, qs_state_pkt, qs_state_mmio } qs_state_t; | 106 | typedef enum { qs_state_mmio, qs_state_pkt } qs_state_t; |
107 | 107 | ||
108 | struct qs_port_priv { | 108 | struct qs_port_priv { |
109 | u8 *pkt; | 109 | u8 *pkt; |
@@ -116,14 +116,15 @@ static int qs_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val); | |||
116 | static int qs_ata_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); | 116 | static int qs_ata_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); |
117 | static int qs_port_start(struct ata_port *ap); | 117 | static int qs_port_start(struct ata_port *ap); |
118 | static void qs_host_stop(struct ata_host *host); | 118 | static void qs_host_stop(struct ata_host *host); |
119 | static void qs_phy_reset(struct ata_port *ap); | ||
120 | static void qs_qc_prep(struct ata_queued_cmd *qc); | 119 | static void qs_qc_prep(struct ata_queued_cmd *qc); |
121 | static unsigned int qs_qc_issue(struct ata_queued_cmd *qc); | 120 | static unsigned int qs_qc_issue(struct ata_queued_cmd *qc); |
122 | static int qs_check_atapi_dma(struct ata_queued_cmd *qc); | 121 | static int qs_check_atapi_dma(struct ata_queued_cmd *qc); |
123 | static void qs_bmdma_stop(struct ata_queued_cmd *qc); | 122 | static void qs_bmdma_stop(struct ata_queued_cmd *qc); |
124 | static u8 qs_bmdma_status(struct ata_port *ap); | 123 | static u8 qs_bmdma_status(struct ata_port *ap); |
125 | static void qs_irq_clear(struct ata_port *ap); | 124 | static void qs_irq_clear(struct ata_port *ap); |
126 | static void qs_eng_timeout(struct ata_port *ap); | 125 | static void qs_freeze(struct ata_port *ap); |
126 | static void qs_thaw(struct ata_port *ap); | ||
127 | static void qs_error_handler(struct ata_port *ap); | ||
127 | 128 | ||
128 | static struct scsi_host_template qs_ata_sht = { | 129 | static struct scsi_host_template qs_ata_sht = { |
129 | .module = THIS_MODULE, | 130 | .module = THIS_MODULE, |
@@ -150,11 +151,12 @@ static const struct ata_port_operations qs_ata_ops = { | |||
150 | .check_atapi_dma = qs_check_atapi_dma, | 151 | .check_atapi_dma = qs_check_atapi_dma, |
151 | .exec_command = ata_exec_command, | 152 | .exec_command = ata_exec_command, |
152 | .dev_select = ata_std_dev_select, | 153 | .dev_select = ata_std_dev_select, |
153 | .phy_reset = qs_phy_reset, | ||
154 | .qc_prep = qs_qc_prep, | 154 | .qc_prep = qs_qc_prep, |
155 | .qc_issue = qs_qc_issue, | 155 | .qc_issue = qs_qc_issue, |
156 | .data_xfer = ata_data_xfer, | 156 | .data_xfer = ata_data_xfer, |
157 | .eng_timeout = qs_eng_timeout, | 157 | .freeze = qs_freeze, |
158 | .thaw = qs_thaw, | ||
159 | .error_handler = qs_error_handler, | ||
158 | .irq_clear = qs_irq_clear, | 160 | .irq_clear = qs_irq_clear, |
159 | .irq_on = ata_irq_on, | 161 | .irq_on = ata_irq_on, |
160 | .scr_read = qs_scr_read, | 162 | .scr_read = qs_scr_read, |
@@ -169,8 +171,6 @@ static const struct ata_port_info qs_port_info[] = { | |||
169 | /* board_2068_idx */ | 171 | /* board_2068_idx */ |
170 | { | 172 | { |
171 | .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | | 173 | .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | |
172 | ATA_FLAG_SATA_RESET | | ||
173 | //FIXME ATA_FLAG_SRST | | ||
174 | ATA_FLAG_MMIO | ATA_FLAG_PIO_POLLING, | 174 | ATA_FLAG_MMIO | ATA_FLAG_PIO_POLLING, |
175 | .pio_mask = 0x10, /* pio4 */ | 175 | .pio_mask = 0x10, /* pio4 */ |
176 | .udma_mask = ATA_UDMA6, | 176 | .udma_mask = ATA_UDMA6, |
@@ -219,7 +219,9 @@ static void qs_irq_clear(struct ata_port *ap) | |||
219 | static inline void qs_enter_reg_mode(struct ata_port *ap) | 219 | static inline void qs_enter_reg_mode(struct ata_port *ap) |
220 | { | 220 | { |
221 | u8 __iomem *chan = qs_mmio_base(ap->host) + (ap->port_no * 0x4000); | 221 | u8 __iomem *chan = qs_mmio_base(ap->host) + (ap->port_no * 0x4000); |
222 | struct qs_port_priv *pp = ap->private_data; | ||
222 | 223 | ||
224 | pp->state = qs_state_mmio; | ||
223 | writeb(QS_CTR0_REG, chan + QS_CCT_CTR0); | 225 | writeb(QS_CTR0_REG, chan + QS_CCT_CTR0); |
224 | readb(chan + QS_CCT_CTR0); /* flush */ | 226 | readb(chan + QS_CCT_CTR0); /* flush */ |
225 | } | 227 | } |
@@ -233,23 +235,28 @@ static inline void qs_reset_channel_logic(struct ata_port *ap) | |||
233 | qs_enter_reg_mode(ap); | 235 | qs_enter_reg_mode(ap); |
234 | } | 236 | } |
235 | 237 | ||
236 | static void qs_phy_reset(struct ata_port *ap) | 238 | static void qs_freeze(struct ata_port *ap) |
237 | { | 239 | { |
238 | struct qs_port_priv *pp = ap->private_data; | 240 | u8 __iomem *mmio_base = qs_mmio_base(ap->host); |
239 | 241 | ||
240 | pp->state = qs_state_idle; | 242 | writeb(0, mmio_base + QS_HCT_CTRL); /* disable host interrupts */ |
241 | qs_reset_channel_logic(ap); | 243 | qs_enter_reg_mode(ap); |
242 | sata_phy_reset(ap); | ||
243 | } | 244 | } |
244 | 245 | ||
245 | static void qs_eng_timeout(struct ata_port *ap) | 246 | static void qs_thaw(struct ata_port *ap) |
246 | { | 247 | { |
247 | struct qs_port_priv *pp = ap->private_data; | 248 | u8 __iomem *mmio_base = qs_mmio_base(ap->host); |
249 | |||
250 | qs_enter_reg_mode(ap); | ||
251 | writeb(1, mmio_base + QS_HCT_CTRL); /* enable host interrupts */ | ||
252 | } | ||
253 | |||
254 | static int qs_prereset(struct ata_link *link, unsigned long deadline) | ||
255 | { | ||
256 | struct ata_port *ap = link->ap; | ||
248 | 257 | ||
249 | if (pp->state != qs_state_idle) /* healthy paranoia */ | ||
250 | pp->state = qs_state_mmio; | ||
251 | qs_reset_channel_logic(ap); | 258 | qs_reset_channel_logic(ap); |
252 | ata_eng_timeout(ap); | 259 | return ata_std_prereset(link, deadline); |
253 | } | 260 | } |
254 | 261 | ||
255 | static int qs_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val) | 262 | static int qs_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val) |
@@ -260,6 +267,13 @@ static int qs_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val) | |||
260 | return 0; | 267 | return 0; |
261 | } | 268 | } |
262 | 269 | ||
270 | static void qs_error_handler(struct ata_port *ap) | ||
271 | { | ||
272 | qs_enter_reg_mode(ap); | ||
273 | ata_do_eh(ap, qs_prereset, ata_std_softreset, NULL, | ||
274 | ata_std_postreset); | ||
275 | } | ||
276 | |||
263 | static int qs_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val) | 277 | static int qs_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val) |
264 | { | 278 | { |
265 | if (sc_reg > SCR_CONTROL) | 279 | if (sc_reg > SCR_CONTROL) |
@@ -358,7 +372,6 @@ static unsigned int qs_qc_issue(struct ata_queued_cmd *qc) | |||
358 | 372 | ||
359 | switch (qc->tf.protocol) { | 373 | switch (qc->tf.protocol) { |
360 | case ATA_PROT_DMA: | 374 | case ATA_PROT_DMA: |
361 | |||
362 | pp->state = qs_state_pkt; | 375 | pp->state = qs_state_pkt; |
363 | qs_packet_start(qc); | 376 | qs_packet_start(qc); |
364 | return 0; | 377 | return 0; |
@@ -375,6 +388,26 @@ static unsigned int qs_qc_issue(struct ata_queued_cmd *qc) | |||
375 | return ata_qc_issue_prot(qc); | 388 | return ata_qc_issue_prot(qc); |
376 | } | 389 | } |
377 | 390 | ||
391 | static void qs_do_or_die(struct ata_queued_cmd *qc, u8 status) | ||
392 | { | ||
393 | qc->err_mask |= ac_err_mask(status); | ||
394 | |||
395 | if (!qc->err_mask) { | ||
396 | ata_qc_complete(qc); | ||
397 | } else { | ||
398 | struct ata_port *ap = qc->ap; | ||
399 | struct ata_eh_info *ehi = &ap->link.eh_info; | ||
400 | |||
401 | ata_ehi_clear_desc(ehi); | ||
402 | ata_ehi_push_desc(ehi, "status 0x%02X", status); | ||
403 | |||
404 | if (qc->err_mask == AC_ERR_DEV) | ||
405 | ata_port_abort(ap); | ||
406 | else | ||
407 | ata_port_freeze(ap); | ||
408 | } | ||
409 | } | ||
410 | |||
378 | static inline unsigned int qs_intr_pkt(struct ata_host *host) | 411 | static inline unsigned int qs_intr_pkt(struct ata_host *host) |
379 | { | 412 | { |
380 | unsigned int handled = 0; | 413 | unsigned int handled = 0; |
@@ -406,10 +439,8 @@ static inline unsigned int qs_intr_pkt(struct ata_host *host) | |||
406 | switch (sHST) { | 439 | switch (sHST) { |
407 | case 0: /* successful CPB */ | 440 | case 0: /* successful CPB */ |
408 | case 3: /* device error */ | 441 | case 3: /* device error */ |
409 | pp->state = qs_state_idle; | ||
410 | qs_enter_reg_mode(qc->ap); | 442 | qs_enter_reg_mode(qc->ap); |
411 | qc->err_mask |= ac_err_mask(sDST); | 443 | qs_do_or_die(qc, sDST); |
412 | ata_qc_complete(qc); | ||
413 | break; | 444 | break; |
414 | default: | 445 | default: |
415 | break; | 446 | break; |
@@ -431,25 +462,27 @@ static inline unsigned int qs_intr_mmio(struct ata_host *host) | |||
431 | if (ap && | 462 | if (ap && |
432 | !(ap->flags & ATA_FLAG_DISABLED)) { | 463 | !(ap->flags & ATA_FLAG_DISABLED)) { |
433 | struct ata_queued_cmd *qc; | 464 | struct ata_queued_cmd *qc; |
434 | struct qs_port_priv *pp = ap->private_data; | 465 | struct qs_port_priv *pp; |
435 | if (!pp || pp->state != qs_state_mmio) | ||
436 | continue; | ||
437 | qc = ata_qc_from_tag(ap, ap->link.active_tag); | 466 | qc = ata_qc_from_tag(ap, ap->link.active_tag); |
438 | if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING))) { | 467 | if (!qc || !(qc->flags & ATA_QCFLAG_ACTIVE)) { |
439 | 468 | /* | |
440 | /* check main status, clearing INTRQ */ | 469 | * The qstor hardware generates spurious |
441 | u8 status = ata_check_status(ap); | 470 | * interrupts from time to time when switching |
442 | if ((status & ATA_BUSY)) | 471 | * in and out of packet mode. |
443 | continue; | 472 | * There's no obvious way to know if we're |
444 | DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n", | 473 | * here now due to that, so just ack the irq |
445 | ap->print_id, qc->tf.protocol, status); | 474 | * and pretend we knew it was ours.. (ugh). |
446 | 475 | * This does not affect packet mode. | |
447 | /* complete taskfile transaction */ | 476 | */ |
448 | pp->state = qs_state_idle; | 477 | ata_check_status(ap); |
449 | qc->err_mask |= ac_err_mask(status); | ||
450 | ata_qc_complete(qc); | ||
451 | handled = 1; | 478 | handled = 1; |
479 | continue; | ||
452 | } | 480 | } |
481 | pp = ap->private_data; | ||
482 | if (!pp || pp->state != qs_state_mmio) | ||
483 | continue; | ||
484 | if (!(qc->tf.flags & ATA_TFLAG_POLLING)) | ||
485 | handled |= ata_host_intr(ap, qc); | ||
453 | } | 486 | } |
454 | } | 487 | } |
455 | return handled; | 488 | return handled; |
@@ -459,12 +492,13 @@ static irqreturn_t qs_intr(int irq, void *dev_instance) | |||
459 | { | 492 | { |
460 | struct ata_host *host = dev_instance; | 493 | struct ata_host *host = dev_instance; |
461 | unsigned int handled = 0; | 494 | unsigned int handled = 0; |
495 | unsigned long flags; | ||
462 | 496 | ||
463 | VPRINTK("ENTER\n"); | 497 | VPRINTK("ENTER\n"); |
464 | 498 | ||
465 | spin_lock(&host->lock); | 499 | spin_lock_irqsave(&host->lock, flags); |
466 | handled = qs_intr_pkt(host) | qs_intr_mmio(host); | 500 | handled = qs_intr_pkt(host) | qs_intr_mmio(host); |
467 | spin_unlock(&host->lock); | 501 | spin_unlock_irqrestore(&host->lock, flags); |
468 | 502 | ||
469 | VPRINTK("EXIT\n"); | 503 | VPRINTK("EXIT\n"); |
470 | 504 | ||
@@ -501,7 +535,6 @@ static int qs_port_start(struct ata_port *ap) | |||
501 | rc = ata_port_start(ap); | 535 | rc = ata_port_start(ap); |
502 | if (rc) | 536 | if (rc) |
503 | return rc; | 537 | return rc; |
504 | qs_enter_reg_mode(ap); | ||
505 | pp = devm_kzalloc(dev, sizeof(*pp), GFP_KERNEL); | 538 | pp = devm_kzalloc(dev, sizeof(*pp), GFP_KERNEL); |
506 | if (!pp) | 539 | if (!pp) |
507 | return -ENOMEM; | 540 | return -ENOMEM; |
@@ -512,6 +545,7 @@ static int qs_port_start(struct ata_port *ap) | |||
512 | memset(pp->pkt, 0, QS_PKT_BYTES); | 545 | memset(pp->pkt, 0, QS_PKT_BYTES); |
513 | ap->private_data = pp; | 546 | ap->private_data = pp; |
514 | 547 | ||
548 | qs_enter_reg_mode(ap); | ||
515 | addr = (u64)pp->pkt_dma; | 549 | addr = (u64)pp->pkt_dma; |
516 | writel((u32) addr, chan + QS_CCF_CPBA); | 550 | writel((u32) addr, chan + QS_CCF_CPBA); |
517 | writel((u32)(addr >> 32), chan + QS_CCF_CPBA + 4); | 551 | writel((u32)(addr >> 32), chan + QS_CCF_CPBA + 4); |