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path: root/drivers/ata/sata_qstor.c
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Diffstat (limited to 'drivers/ata/sata_qstor.c')
-rw-r--r--drivers/ata/sata_qstor.c62
1 files changed, 21 insertions, 41 deletions
diff --git a/drivers/ata/sata_qstor.c b/drivers/ata/sata_qstor.c
index 8786b45f291b..f5a05de0093d 100644
--- a/drivers/ata/sata_qstor.c
+++ b/drivers/ata/sata_qstor.c
@@ -114,7 +114,6 @@ struct qs_port_priv {
114static u32 qs_scr_read (struct ata_port *ap, unsigned int sc_reg); 114static u32 qs_scr_read (struct ata_port *ap, unsigned int sc_reg);
115static void qs_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val); 115static void qs_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val);
116static int qs_ata_init_one (struct pci_dev *pdev, const struct pci_device_id *ent); 116static int qs_ata_init_one (struct pci_dev *pdev, const struct pci_device_id *ent);
117static irqreturn_t qs_intr (int irq, void *dev_instance);
118static int qs_port_start(struct ata_port *ap); 117static int qs_port_start(struct ata_port *ap);
119static void qs_host_stop(struct ata_host *host); 118static void qs_host_stop(struct ata_host *host);
120static void qs_phy_reset(struct ata_port *ap); 119static void qs_phy_reset(struct ata_port *ap);
@@ -158,7 +157,6 @@ static const struct ata_port_operations qs_ata_ops = {
158 .qc_issue = qs_qc_issue, 157 .qc_issue = qs_qc_issue,
159 .data_xfer = ata_data_xfer, 158 .data_xfer = ata_data_xfer,
160 .eng_timeout = qs_eng_timeout, 159 .eng_timeout = qs_eng_timeout,
161 .irq_handler = qs_intr,
162 .irq_clear = qs_irq_clear, 160 .irq_clear = qs_irq_clear,
163 .irq_on = ata_irq_on, 161 .irq_on = ata_irq_on,
164 .irq_ack = ata_irq_ack, 162 .irq_ack = ata_irq_ack,
@@ -173,7 +171,6 @@ static const struct ata_port_operations qs_ata_ops = {
173static const struct ata_port_info qs_port_info[] = { 171static const struct ata_port_info qs_port_info[] = {
174 /* board_2068_idx */ 172 /* board_2068_idx */
175 { 173 {
176 .sht = &qs_ata_sht,
177 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | 174 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
178 ATA_FLAG_SATA_RESET | 175 ATA_FLAG_SATA_RESET |
179 //FIXME ATA_FLAG_SRST | 176 //FIXME ATA_FLAG_SRST |
@@ -530,16 +527,16 @@ static void qs_host_stop(struct ata_host *host)
530 writeb(QS_CNFG3_GSRST, mmio_base + QS_HCF_CNFG3); /* global reset */ 527 writeb(QS_CNFG3_GSRST, mmio_base + QS_HCF_CNFG3); /* global reset */
531} 528}
532 529
533static void qs_host_init(unsigned int chip_id, struct ata_probe_ent *pe) 530static void qs_host_init(struct ata_host *host, unsigned int chip_id)
534{ 531{
535 void __iomem *mmio_base = pe->iomap[QS_MMIO_BAR]; 532 void __iomem *mmio_base = host->iomap[QS_MMIO_BAR];
536 unsigned int port_no; 533 unsigned int port_no;
537 534
538 writeb(0, mmio_base + QS_HCT_CTRL); /* disable host interrupts */ 535 writeb(0, mmio_base + QS_HCT_CTRL); /* disable host interrupts */
539 writeb(QS_CNFG3_GSRST, mmio_base + QS_HCF_CNFG3); /* global reset */ 536 writeb(QS_CNFG3_GSRST, mmio_base + QS_HCF_CNFG3); /* global reset */
540 537
541 /* reset each channel in turn */ 538 /* reset each channel in turn */
542 for (port_no = 0; port_no < pe->n_ports; ++port_no) { 539 for (port_no = 0; port_no < host->n_ports; ++port_no) {
543 u8 __iomem *chan = mmio_base + (port_no * 0x4000); 540 u8 __iomem *chan = mmio_base + (port_no * 0x4000);
544 writeb(QS_CTR1_RDEV|QS_CTR1_RCHN, chan + QS_CCT_CTR1); 541 writeb(QS_CTR1_RDEV|QS_CTR1_RCHN, chan + QS_CCT_CTR1);
545 writeb(QS_CTR0_REG, chan + QS_CCT_CTR0); 542 writeb(QS_CTR0_REG, chan + QS_CCT_CTR0);
@@ -547,7 +544,7 @@ static void qs_host_init(unsigned int chip_id, struct ata_probe_ent *pe)
547 } 544 }
548 writeb(QS_SERD3_PHY_ENA, mmio_base + QS_HVS_SERD3); /* enable phy */ 545 writeb(QS_SERD3_PHY_ENA, mmio_base + QS_HVS_SERD3); /* enable phy */
549 546
550 for (port_no = 0; port_no < pe->n_ports; ++port_no) { 547 for (port_no = 0; port_no < host->n_ports; ++port_no) {
551 u8 __iomem *chan = mmio_base + (port_no * 0x4000); 548 u8 __iomem *chan = mmio_base + (port_no * 0x4000);
552 /* set FIFO depths to same settings as Windows driver */ 549 /* set FIFO depths to same settings as Windows driver */
553 writew(32, chan + QS_CFC_HUFT); 550 writew(32, chan + QS_CFC_HUFT);
@@ -607,14 +604,20 @@ static int qs_ata_init_one(struct pci_dev *pdev,
607 const struct pci_device_id *ent) 604 const struct pci_device_id *ent)
608{ 605{
609 static int printed_version; 606 static int printed_version;
610 struct ata_probe_ent *probe_ent;
611 void __iomem * const *iomap;
612 unsigned int board_idx = (unsigned int) ent->driver_data; 607 unsigned int board_idx = (unsigned int) ent->driver_data;
608 const struct ata_port_info *ppi[] = { &qs_port_info[board_idx], NULL };
609 struct ata_host *host;
613 int rc, port_no; 610 int rc, port_no;
614 611
615 if (!printed_version++) 612 if (!printed_version++)
616 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n"); 613 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
617 614
615 /* alloc host */
616 host = ata_host_alloc_pinfo(&pdev->dev, ppi, QS_PORTS);
617 if (!host)
618 return -ENOMEM;
619
620 /* acquire resources and fill host */
618 rc = pcim_enable_device(pdev); 621 rc = pcim_enable_device(pdev);
619 if (rc) 622 if (rc)
620 return rc; 623 return rc;
@@ -625,47 +628,24 @@ static int qs_ata_init_one(struct pci_dev *pdev,
625 rc = pcim_iomap_regions(pdev, 1 << QS_MMIO_BAR, DRV_NAME); 628 rc = pcim_iomap_regions(pdev, 1 << QS_MMIO_BAR, DRV_NAME);
626 if (rc) 629 if (rc)
627 return rc; 630 return rc;
628 iomap = pcim_iomap_table(pdev); 631 host->iomap = pcim_iomap_table(pdev);
629 632
630 rc = qs_set_dma_masks(pdev, iomap[QS_MMIO_BAR]); 633 rc = qs_set_dma_masks(pdev, host->iomap[QS_MMIO_BAR]);
631 if (rc) 634 if (rc)
632 return rc; 635 return rc;
633 636
634 probe_ent = devm_kzalloc(&pdev->dev, sizeof(*probe_ent), GFP_KERNEL); 637 for (port_no = 0; port_no < host->n_ports; ++port_no) {
635 if (probe_ent == NULL)
636 return -ENOMEM;
637
638 probe_ent->dev = pci_dev_to_dev(pdev);
639 INIT_LIST_HEAD(&probe_ent->node);
640
641 probe_ent->sht = qs_port_info[board_idx].sht;
642 probe_ent->port_flags = qs_port_info[board_idx].flags;
643 probe_ent->pio_mask = qs_port_info[board_idx].pio_mask;
644 probe_ent->mwdma_mask = qs_port_info[board_idx].mwdma_mask;
645 probe_ent->udma_mask = qs_port_info[board_idx].udma_mask;
646 probe_ent->port_ops = qs_port_info[board_idx].port_ops;
647
648 probe_ent->irq = pdev->irq;
649 probe_ent->irq_flags = IRQF_SHARED;
650 probe_ent->iomap = iomap;
651 probe_ent->n_ports = QS_PORTS;
652
653 for (port_no = 0; port_no < probe_ent->n_ports; ++port_no) {
654 void __iomem *chan = 638 void __iomem *chan =
655 probe_ent->iomap[QS_MMIO_BAR] + (port_no * 0x4000); 639 host->iomap[QS_MMIO_BAR] + (port_no * 0x4000);
656 qs_ata_setup_port(&probe_ent->port[port_no], chan); 640 qs_ata_setup_port(&host->ports[port_no]->ioaddr, chan);
657 } 641 }
658 642
659 pci_set_master(pdev);
660
661 /* initialize adapter */ 643 /* initialize adapter */
662 qs_host_init(board_idx, probe_ent); 644 qs_host_init(host, board_idx);
663 645
664 if (ata_device_add(probe_ent) != QS_PORTS) 646 pci_set_master(pdev);
665 return -EIO; 647 return ata_host_activate(host, pdev->irq, qs_intr, IRQF_SHARED,
666 648 &qs_ata_sht);
667 devm_kfree(&pdev->dev, probe_ent);
668 return 0;
669} 649}
670 650
671static int __init qs_ata_init(void) 651static int __init qs_ata_init(void)