diff options
Diffstat (limited to 'drivers/ata/sata_promise.c')
-rw-r--r-- | drivers/ata/sata_promise.c | 164 |
1 files changed, 109 insertions, 55 deletions
diff --git a/drivers/ata/sata_promise.c b/drivers/ata/sata_promise.c index 72eda5160fad..f055874a6ec5 100644 --- a/drivers/ata/sata_promise.c +++ b/drivers/ata/sata_promise.c | |||
@@ -46,20 +46,19 @@ | |||
46 | #include "sata_promise.h" | 46 | #include "sata_promise.h" |
47 | 47 | ||
48 | #define DRV_NAME "sata_promise" | 48 | #define DRV_NAME "sata_promise" |
49 | #define DRV_VERSION "1.04" | 49 | #define DRV_VERSION "1.05" |
50 | 50 | ||
51 | 51 | ||
52 | enum { | 52 | enum { |
53 | PDC_PKT_SUBMIT = 0x40, /* Command packet pointer addr */ | 53 | PDC_PKT_SUBMIT = 0x40, /* Command packet pointer addr */ |
54 | PDC_INT_SEQMASK = 0x40, /* Mask of asserted SEQ INTs */ | 54 | PDC_INT_SEQMASK = 0x40, /* Mask of asserted SEQ INTs */ |
55 | PDC_TBG_MODE = 0x41, /* TBG mode */ | ||
56 | PDC_FLASH_CTL = 0x44, /* Flash control register */ | 55 | PDC_FLASH_CTL = 0x44, /* Flash control register */ |
57 | PDC_PCI_CTL = 0x48, /* PCI control and status register */ | ||
58 | PDC_GLOBAL_CTL = 0x48, /* Global control/status (per port) */ | 56 | PDC_GLOBAL_CTL = 0x48, /* Global control/status (per port) */ |
59 | PDC_CTLSTAT = 0x60, /* IDE control and status (per port) */ | 57 | PDC_CTLSTAT = 0x60, /* IDE control and status (per port) */ |
60 | PDC_SATA_PLUG_CSR = 0x6C, /* SATA Plug control/status reg */ | 58 | PDC_SATA_PLUG_CSR = 0x6C, /* SATA Plug control/status reg */ |
61 | PDC2_SATA_PLUG_CSR = 0x60, /* SATAII Plug control/status reg */ | 59 | PDC2_SATA_PLUG_CSR = 0x60, /* SATAII Plug control/status reg */ |
62 | PDC_SLEW_CTL = 0x470, /* slew rate control reg */ | 60 | PDC_TBG_MODE = 0x41C, /* TBG mode (not SATAII) */ |
61 | PDC_SLEW_CTL = 0x470, /* slew rate control reg (not SATAII) */ | ||
63 | 62 | ||
64 | PDC_ERR_MASK = (1<<19) | (1<<20) | (1<<21) | (1<<22) | | 63 | PDC_ERR_MASK = (1<<19) | (1<<20) | (1<<21) | (1<<22) | |
65 | (1<<8) | (1<<9) | (1<<10), | 64 | (1<<8) | (1<<9) | (1<<10), |
@@ -67,17 +66,22 @@ enum { | |||
67 | board_2037x = 0, /* FastTrak S150 TX2plus */ | 66 | board_2037x = 0, /* FastTrak S150 TX2plus */ |
68 | board_20319 = 1, /* FastTrak S150 TX4 */ | 67 | board_20319 = 1, /* FastTrak S150 TX4 */ |
69 | board_20619 = 2, /* FastTrak TX4000 */ | 68 | board_20619 = 2, /* FastTrak TX4000 */ |
70 | board_20771 = 3, /* FastTrak TX2300 */ | 69 | board_2057x = 3, /* SATAII150 Tx2plus */ |
71 | board_2057x = 4, /* SATAII150 Tx2plus */ | 70 | board_40518 = 4, /* SATAII150 Tx4 */ |
72 | board_40518 = 5, /* SATAII150 Tx4 */ | ||
73 | 71 | ||
74 | PDC_HAS_PATA = (1 << 1), /* PDC20375/20575 has PATA */ | 72 | PDC_HAS_PATA = (1 << 1), /* PDC20375/20575 has PATA */ |
75 | 73 | ||
74 | /* PDC_CTLSTAT bit definitions */ | ||
75 | PDC_DMA_ENABLE = (1 << 7), | ||
76 | PDC_IRQ_DISABLE = (1 << 10), | ||
76 | PDC_RESET = (1 << 11), /* HDMA reset */ | 77 | PDC_RESET = (1 << 11), /* HDMA reset */ |
77 | 78 | ||
78 | PDC_COMMON_FLAGS = ATA_FLAG_NO_LEGACY | ATA_FLAG_SRST | | 79 | PDC_COMMON_FLAGS = ATA_FLAG_NO_LEGACY | |
79 | ATA_FLAG_MMIO | ATA_FLAG_NO_ATAPI | | 80 | ATA_FLAG_MMIO | ATA_FLAG_NO_ATAPI | |
80 | ATA_FLAG_PIO_POLLING, | 81 | ATA_FLAG_PIO_POLLING, |
82 | |||
83 | /* hp->flags bits */ | ||
84 | PDC_FLAG_GEN_II = (1 << 0), | ||
81 | }; | 85 | }; |
82 | 86 | ||
83 | 87 | ||
@@ -87,7 +91,7 @@ struct pdc_port_priv { | |||
87 | }; | 91 | }; |
88 | 92 | ||
89 | struct pdc_host_priv { | 93 | struct pdc_host_priv { |
90 | int hotplug_offset; | 94 | unsigned long flags; |
91 | }; | 95 | }; |
92 | 96 | ||
93 | static u32 pdc_sata_scr_read (struct ata_port *ap, unsigned int sc_reg); | 97 | static u32 pdc_sata_scr_read (struct ata_port *ap, unsigned int sc_reg); |
@@ -98,13 +102,16 @@ static void pdc_eng_timeout(struct ata_port *ap); | |||
98 | static int pdc_port_start(struct ata_port *ap); | 102 | static int pdc_port_start(struct ata_port *ap); |
99 | static void pdc_port_stop(struct ata_port *ap); | 103 | static void pdc_port_stop(struct ata_port *ap); |
100 | static void pdc_pata_phy_reset(struct ata_port *ap); | 104 | static void pdc_pata_phy_reset(struct ata_port *ap); |
101 | static void pdc_sata_phy_reset(struct ata_port *ap); | ||
102 | static void pdc_qc_prep(struct ata_queued_cmd *qc); | 105 | static void pdc_qc_prep(struct ata_queued_cmd *qc); |
103 | static void pdc_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf); | 106 | static void pdc_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf); |
104 | static void pdc_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile *tf); | 107 | static void pdc_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile *tf); |
105 | static void pdc_irq_clear(struct ata_port *ap); | 108 | static void pdc_irq_clear(struct ata_port *ap); |
106 | static unsigned int pdc_qc_issue_prot(struct ata_queued_cmd *qc); | 109 | static unsigned int pdc_qc_issue_prot(struct ata_queued_cmd *qc); |
107 | static void pdc_host_stop(struct ata_host *host); | 110 | static void pdc_host_stop(struct ata_host *host); |
111 | static void pdc_freeze(struct ata_port *ap); | ||
112 | static void pdc_thaw(struct ata_port *ap); | ||
113 | static void pdc_error_handler(struct ata_port *ap); | ||
114 | static void pdc_post_internal_cmd(struct ata_queued_cmd *qc); | ||
108 | 115 | ||
109 | 116 | ||
110 | static struct scsi_host_template pdc_ata_sht = { | 117 | static struct scsi_host_template pdc_ata_sht = { |
@@ -133,11 +140,12 @@ static const struct ata_port_operations pdc_sata_ops = { | |||
133 | .exec_command = pdc_exec_command_mmio, | 140 | .exec_command = pdc_exec_command_mmio, |
134 | .dev_select = ata_std_dev_select, | 141 | .dev_select = ata_std_dev_select, |
135 | 142 | ||
136 | .phy_reset = pdc_sata_phy_reset, | ||
137 | |||
138 | .qc_prep = pdc_qc_prep, | 143 | .qc_prep = pdc_qc_prep, |
139 | .qc_issue = pdc_qc_issue_prot, | 144 | .qc_issue = pdc_qc_issue_prot, |
140 | .eng_timeout = pdc_eng_timeout, | 145 | .freeze = pdc_freeze, |
146 | .thaw = pdc_thaw, | ||
147 | .error_handler = pdc_error_handler, | ||
148 | .post_internal_cmd = pdc_post_internal_cmd, | ||
141 | .data_xfer = ata_mmio_data_xfer, | 149 | .data_xfer = ata_mmio_data_xfer, |
142 | .irq_handler = pdc_interrupt, | 150 | .irq_handler = pdc_interrupt, |
143 | .irq_clear = pdc_irq_clear, | 151 | .irq_clear = pdc_irq_clear, |
@@ -195,23 +203,13 @@ static const struct ata_port_info pdc_port_info[] = { | |||
195 | /* board_20619 */ | 203 | /* board_20619 */ |
196 | { | 204 | { |
197 | .sht = &pdc_ata_sht, | 205 | .sht = &pdc_ata_sht, |
198 | .flags = PDC_COMMON_FLAGS | ATA_FLAG_SLAVE_POSS, | 206 | .flags = PDC_COMMON_FLAGS | ATA_FLAG_SRST | ATA_FLAG_SLAVE_POSS, |
199 | .pio_mask = 0x1f, /* pio0-4 */ | 207 | .pio_mask = 0x1f, /* pio0-4 */ |
200 | .mwdma_mask = 0x07, /* mwdma0-2 */ | 208 | .mwdma_mask = 0x07, /* mwdma0-2 */ |
201 | .udma_mask = 0x7f, /* udma0-6 ; FIXME */ | 209 | .udma_mask = 0x7f, /* udma0-6 ; FIXME */ |
202 | .port_ops = &pdc_pata_ops, | 210 | .port_ops = &pdc_pata_ops, |
203 | }, | 211 | }, |
204 | 212 | ||
205 | /* board_20771 */ | ||
206 | { | ||
207 | .sht = &pdc_ata_sht, | ||
208 | .flags = PDC_COMMON_FLAGS | ATA_FLAG_SATA, | ||
209 | .pio_mask = 0x1f, /* pio0-4 */ | ||
210 | .mwdma_mask = 0x07, /* mwdma0-2 */ | ||
211 | .udma_mask = 0x7f, /* udma0-6 ; FIXME */ | ||
212 | .port_ops = &pdc_sata_ops, | ||
213 | }, | ||
214 | |||
215 | /* board_2057x */ | 213 | /* board_2057x */ |
216 | { | 214 | { |
217 | .sht = &pdc_ata_sht, | 215 | .sht = &pdc_ata_sht, |
@@ -235,33 +233,25 @@ static const struct ata_port_info pdc_port_info[] = { | |||
235 | 233 | ||
236 | static const struct pci_device_id pdc_ata_pci_tbl[] = { | 234 | static const struct pci_device_id pdc_ata_pci_tbl[] = { |
237 | { PCI_VDEVICE(PROMISE, 0x3371), board_2037x }, | 235 | { PCI_VDEVICE(PROMISE, 0x3371), board_2037x }, |
238 | { PCI_VDEVICE(PROMISE, 0x3570), board_2037x }, | ||
239 | { PCI_VDEVICE(PROMISE, 0x3571), board_2037x }, | ||
240 | { PCI_VDEVICE(PROMISE, 0x3373), board_2037x }, | 236 | { PCI_VDEVICE(PROMISE, 0x3373), board_2037x }, |
241 | { PCI_VDEVICE(PROMISE, 0x3375), board_2037x }, | 237 | { PCI_VDEVICE(PROMISE, 0x3375), board_2037x }, |
242 | { PCI_VDEVICE(PROMISE, 0x3376), board_2037x }, | 238 | { PCI_VDEVICE(PROMISE, 0x3376), board_2037x }, |
239 | { PCI_VDEVICE(PROMISE, 0x3570), board_2057x }, | ||
240 | { PCI_VDEVICE(PROMISE, 0x3571), board_2057x }, | ||
243 | { PCI_VDEVICE(PROMISE, 0x3574), board_2057x }, | 241 | { PCI_VDEVICE(PROMISE, 0x3574), board_2057x }, |
242 | { PCI_VDEVICE(PROMISE, 0x3577), board_2057x }, | ||
243 | { PCI_VDEVICE(PROMISE, 0x3d73), board_2057x }, | ||
244 | { PCI_VDEVICE(PROMISE, 0x3d75), board_2057x }, | 244 | { PCI_VDEVICE(PROMISE, 0x3d75), board_2057x }, |
245 | { PCI_VDEVICE(PROMISE, 0x3d73), board_2037x }, | ||
246 | 245 | ||
247 | { PCI_VDEVICE(PROMISE, 0x3318), board_20319 }, | 246 | { PCI_VDEVICE(PROMISE, 0x3318), board_20319 }, |
248 | { PCI_VDEVICE(PROMISE, 0x3319), board_20319 }, | 247 | { PCI_VDEVICE(PROMISE, 0x3319), board_20319 }, |
249 | { PCI_VDEVICE(PROMISE, 0x3515), board_20319 }, | 248 | { PCI_VDEVICE(PROMISE, 0x3515), board_20319 }, |
250 | { PCI_VDEVICE(PROMISE, 0x3519), board_20319 }, | 249 | { PCI_VDEVICE(PROMISE, 0x3519), board_20319 }, |
251 | { PCI_VDEVICE(PROMISE, 0x3d17), board_20319 }, | 250 | { PCI_VDEVICE(PROMISE, 0x3d17), board_40518 }, |
252 | { PCI_VDEVICE(PROMISE, 0x3d18), board_40518 }, | 251 | { PCI_VDEVICE(PROMISE, 0x3d18), board_40518 }, |
253 | 252 | ||
254 | { PCI_VDEVICE(PROMISE, 0x6629), board_20619 }, | 253 | { PCI_VDEVICE(PROMISE, 0x6629), board_20619 }, |
255 | 254 | ||
256 | /* TODO: remove all associated board_20771 code, as it completely | ||
257 | * duplicates board_2037x code, unless reason for separation can be | ||
258 | * divined. | ||
259 | */ | ||
260 | #if 0 | ||
261 | { PCI_VDEVICE(PROMISE, 0x3570), board_20771 }, | ||
262 | #endif | ||
263 | { PCI_VDEVICE(PROMISE, 0x3577), board_20771 }, | ||
264 | |||
265 | { } /* terminate list */ | 255 | { } /* terminate list */ |
266 | }; | 256 | }; |
267 | 257 | ||
@@ -277,6 +267,7 @@ static struct pci_driver pdc_ata_pci_driver = { | |||
277 | static int pdc_port_start(struct ata_port *ap) | 267 | static int pdc_port_start(struct ata_port *ap) |
278 | { | 268 | { |
279 | struct device *dev = ap->host->dev; | 269 | struct device *dev = ap->host->dev; |
270 | struct pdc_host_priv *hp = ap->host->private_data; | ||
280 | struct pdc_port_priv *pp; | 271 | struct pdc_port_priv *pp; |
281 | int rc; | 272 | int rc; |
282 | 273 | ||
@@ -298,6 +289,16 @@ static int pdc_port_start(struct ata_port *ap) | |||
298 | 289 | ||
299 | ap->private_data = pp; | 290 | ap->private_data = pp; |
300 | 291 | ||
292 | /* fix up PHYMODE4 align timing */ | ||
293 | if ((hp->flags & PDC_FLAG_GEN_II) && sata_scr_valid(ap)) { | ||
294 | void __iomem *mmio = (void __iomem *) ap->ioaddr.scr_addr; | ||
295 | unsigned int tmp; | ||
296 | |||
297 | tmp = readl(mmio + 0x014); | ||
298 | tmp = (tmp & ~3) | 1; /* set bits 1:0 = 0:1 */ | ||
299 | writel(tmp, mmio + 0x014); | ||
300 | } | ||
301 | |||
301 | return 0; | 302 | return 0; |
302 | 303 | ||
303 | err_out_kfree: | 304 | err_out_kfree: |
@@ -352,12 +353,6 @@ static void pdc_reset_port(struct ata_port *ap) | |||
352 | readl(mmio); /* flush */ | 353 | readl(mmio); /* flush */ |
353 | } | 354 | } |
354 | 355 | ||
355 | static void pdc_sata_phy_reset(struct ata_port *ap) | ||
356 | { | ||
357 | pdc_reset_port(ap); | ||
358 | sata_phy_reset(ap); | ||
359 | } | ||
360 | |||
361 | static void pdc_pata_cbl_detect(struct ata_port *ap) | 356 | static void pdc_pata_cbl_detect(struct ata_port *ap) |
362 | { | 357 | { |
363 | u8 tmp; | 358 | u8 tmp; |
@@ -425,6 +420,61 @@ static void pdc_qc_prep(struct ata_queued_cmd *qc) | |||
425 | } | 420 | } |
426 | } | 421 | } |
427 | 422 | ||
423 | static void pdc_freeze(struct ata_port *ap) | ||
424 | { | ||
425 | void __iomem *mmio = (void __iomem *) ap->ioaddr.cmd_addr; | ||
426 | u32 tmp; | ||
427 | |||
428 | tmp = readl(mmio + PDC_CTLSTAT); | ||
429 | tmp |= PDC_IRQ_DISABLE; | ||
430 | tmp &= ~PDC_DMA_ENABLE; | ||
431 | writel(tmp, mmio + PDC_CTLSTAT); | ||
432 | readl(mmio + PDC_CTLSTAT); /* flush */ | ||
433 | } | ||
434 | |||
435 | static void pdc_thaw(struct ata_port *ap) | ||
436 | { | ||
437 | void __iomem *mmio = (void __iomem *) ap->ioaddr.cmd_addr; | ||
438 | u32 tmp; | ||
439 | |||
440 | /* clear IRQ */ | ||
441 | readl(mmio + PDC_INT_SEQMASK); | ||
442 | |||
443 | /* turn IRQ back on */ | ||
444 | tmp = readl(mmio + PDC_CTLSTAT); | ||
445 | tmp &= ~PDC_IRQ_DISABLE; | ||
446 | writel(tmp, mmio + PDC_CTLSTAT); | ||
447 | readl(mmio + PDC_CTLSTAT); /* flush */ | ||
448 | } | ||
449 | |||
450 | static void pdc_error_handler(struct ata_port *ap) | ||
451 | { | ||
452 | ata_reset_fn_t hardreset; | ||
453 | |||
454 | if (!(ap->pflags & ATA_PFLAG_FROZEN)) | ||
455 | pdc_reset_port(ap); | ||
456 | |||
457 | hardreset = NULL; | ||
458 | if (sata_scr_valid(ap)) | ||
459 | hardreset = sata_std_hardreset; | ||
460 | |||
461 | /* perform recovery */ | ||
462 | ata_do_eh(ap, ata_std_prereset, ata_std_softreset, hardreset, | ||
463 | ata_std_postreset); | ||
464 | } | ||
465 | |||
466 | static void pdc_post_internal_cmd(struct ata_queued_cmd *qc) | ||
467 | { | ||
468 | struct ata_port *ap = qc->ap; | ||
469 | |||
470 | if (qc->flags & ATA_QCFLAG_FAILED) | ||
471 | qc->err_mask |= AC_ERR_OTHER; | ||
472 | |||
473 | /* make DMA engine forget about the failed command */ | ||
474 | if (qc->err_mask) | ||
475 | pdc_reset_port(ap); | ||
476 | } | ||
477 | |||
428 | static void pdc_eng_timeout(struct ata_port *ap) | 478 | static void pdc_eng_timeout(struct ata_port *ap) |
429 | { | 479 | { |
430 | struct ata_host *host = ap->host; | 480 | struct ata_host *host = ap->host; |
@@ -631,18 +681,25 @@ static void pdc_host_init(unsigned int chip_id, struct ata_probe_ent *pe) | |||
631 | { | 681 | { |
632 | void __iomem *mmio = pe->mmio_base; | 682 | void __iomem *mmio = pe->mmio_base; |
633 | struct pdc_host_priv *hp = pe->private_data; | 683 | struct pdc_host_priv *hp = pe->private_data; |
634 | int hotplug_offset = hp->hotplug_offset; | 684 | int hotplug_offset; |
635 | u32 tmp; | 685 | u32 tmp; |
636 | 686 | ||
687 | if (hp->flags & PDC_FLAG_GEN_II) | ||
688 | hotplug_offset = PDC2_SATA_PLUG_CSR; | ||
689 | else | ||
690 | hotplug_offset = PDC_SATA_PLUG_CSR; | ||
691 | |||
637 | /* | 692 | /* |
638 | * Except for the hotplug stuff, this is voodoo from the | 693 | * Except for the hotplug stuff, this is voodoo from the |
639 | * Promise driver. Label this entire section | 694 | * Promise driver. Label this entire section |
640 | * "TODO: figure out why we do this" | 695 | * "TODO: figure out why we do this" |
641 | */ | 696 | */ |
642 | 697 | ||
643 | /* change FIFO_SHD to 8 dwords, enable BMR_BURST */ | 698 | /* enable BMR_BURST, maybe change FIFO_SHD to 8 dwords */ |
644 | tmp = readl(mmio + PDC_FLASH_CTL); | 699 | tmp = readl(mmio + PDC_FLASH_CTL); |
645 | tmp |= 0x12000; /* bit 16 (fifo 8 dw) and 13 (bmr burst?) */ | 700 | tmp |= 0x02000; /* bit 13 (enable bmr burst) */ |
701 | if (!(hp->flags & PDC_FLAG_GEN_II)) | ||
702 | tmp |= 0x10000; /* bit 16 (fifo threshold at 8 dw) */ | ||
646 | writel(tmp, mmio + PDC_FLASH_CTL); | 703 | writel(tmp, mmio + PDC_FLASH_CTL); |
647 | 704 | ||
648 | /* clear plug/unplug flags for all ports */ | 705 | /* clear plug/unplug flags for all ports */ |
@@ -653,6 +710,10 @@ static void pdc_host_init(unsigned int chip_id, struct ata_probe_ent *pe) | |||
653 | tmp = readl(mmio + hotplug_offset); | 710 | tmp = readl(mmio + hotplug_offset); |
654 | writel(tmp | 0xff0000, mmio + hotplug_offset); | 711 | writel(tmp | 0xff0000, mmio + hotplug_offset); |
655 | 712 | ||
713 | /* don't initialise TBG or SLEW on 2nd generation chips */ | ||
714 | if (hp->flags & PDC_FLAG_GEN_II) | ||
715 | return; | ||
716 | |||
656 | /* reduce TBG clock to 133 Mhz. */ | 717 | /* reduce TBG clock to 133 Mhz. */ |
657 | tmp = readl(mmio + PDC_TBG_MODE); | 718 | tmp = readl(mmio + PDC_TBG_MODE); |
658 | tmp &= ~0x30000; /* clear bit 17, 16*/ | 719 | tmp &= ~0x30000; /* clear bit 17, 16*/ |
@@ -722,8 +783,6 @@ static int pdc_ata_init_one (struct pci_dev *pdev, const struct pci_device_id *e | |||
722 | goto err_out_free_ent; | 783 | goto err_out_free_ent; |
723 | } | 784 | } |
724 | 785 | ||
725 | /* Set default hotplug offset */ | ||
726 | hp->hotplug_offset = PDC_SATA_PLUG_CSR; | ||
727 | probe_ent->private_data = hp; | 786 | probe_ent->private_data = hp; |
728 | 787 | ||
729 | probe_ent->sht = pdc_port_info[board_idx].sht; | 788 | probe_ent->sht = pdc_port_info[board_idx].sht; |
@@ -746,8 +805,7 @@ static int pdc_ata_init_one (struct pci_dev *pdev, const struct pci_device_id *e | |||
746 | /* notice 4-port boards */ | 805 | /* notice 4-port boards */ |
747 | switch (board_idx) { | 806 | switch (board_idx) { |
748 | case board_40518: | 807 | case board_40518: |
749 | /* Override hotplug offset for SATAII150 */ | 808 | hp->flags |= PDC_FLAG_GEN_II; |
750 | hp->hotplug_offset = PDC2_SATA_PLUG_CSR; | ||
751 | /* Fall through */ | 809 | /* Fall through */ |
752 | case board_20319: | 810 | case board_20319: |
753 | probe_ent->n_ports = 4; | 811 | probe_ent->n_ports = 4; |
@@ -759,15 +817,11 @@ static int pdc_ata_init_one (struct pci_dev *pdev, const struct pci_device_id *e | |||
759 | probe_ent->port[3].scr_addr = base + 0x700; | 817 | probe_ent->port[3].scr_addr = base + 0x700; |
760 | break; | 818 | break; |
761 | case board_2057x: | 819 | case board_2057x: |
762 | /* Override hotplug offset for SATAII150 */ | 820 | hp->flags |= PDC_FLAG_GEN_II; |
763 | hp->hotplug_offset = PDC2_SATA_PLUG_CSR; | ||
764 | /* Fall through */ | 821 | /* Fall through */ |
765 | case board_2037x: | 822 | case board_2037x: |
766 | probe_ent->n_ports = 2; | 823 | probe_ent->n_ports = 2; |
767 | break; | 824 | break; |
768 | case board_20771: | ||
769 | probe_ent->n_ports = 2; | ||
770 | break; | ||
771 | case board_20619: | 825 | case board_20619: |
772 | probe_ent->n_ports = 4; | 826 | probe_ent->n_ports = 4; |
773 | 827 | ||