aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/ata/sata_mv.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/ata/sata_mv.c')
-rw-r--r--drivers/ata/sata_mv.c20
1 files changed, 19 insertions, 1 deletions
diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c
index b0c929d36234..d689fb9ceb96 100644
--- a/drivers/ata/sata_mv.c
+++ b/drivers/ata/sata_mv.c
@@ -1296,7 +1296,25 @@ static int mv_scr_write(struct ata_link *link, unsigned int sc_reg_in, u32 val)
1296 unsigned int ofs = mv_scr_offset(sc_reg_in); 1296 unsigned int ofs = mv_scr_offset(sc_reg_in);
1297 1297
1298 if (ofs != 0xffffffffU) { 1298 if (ofs != 0xffffffffU) {
1299 writelfl(val, mv_ap_base(link->ap) + ofs); 1299 void __iomem *addr = mv_ap_base(link->ap) + ofs;
1300 if (sc_reg_in == SCR_CONTROL) {
1301 /*
1302 * Workaround for 88SX60x1 FEr SATA#26:
1303 *
1304 * COMRESETs have to take care not to accidently
1305 * put the drive to sleep when writing SCR_CONTROL.
1306 * Setting bits 12..15 prevents this problem.
1307 *
1308 * So if we see an outbound COMMRESET, set those bits.
1309 * Ditto for the followup write that clears the reset.
1310 *
1311 * The proprietary driver does this for
1312 * all chip versions, and so do we.
1313 */
1314 if ((val & 0xf) == 1 || (readl(addr) & 0xf) == 1)
1315 val |= 0xf000;
1316 }
1317 writelfl(val, addr);
1300 return 0; 1318 return 0;
1301 } else 1319 } else
1302 return -EINVAL; 1320 return -EINVAL;