diff options
Diffstat (limited to 'drivers/ata/sata_inic162x.c')
-rw-r--r-- | drivers/ata/sata_inic162x.c | 34 |
1 files changed, 21 insertions, 13 deletions
diff --git a/drivers/ata/sata_inic162x.c b/drivers/ata/sata_inic162x.c index fdbed8ecdfc2..08595f34b3e8 100644 --- a/drivers/ata/sata_inic162x.c +++ b/drivers/ata/sata_inic162x.c | |||
@@ -285,7 +285,7 @@ static void inic_irq_clear(struct ata_port *ap) | |||
285 | static void inic_host_intr(struct ata_port *ap) | 285 | static void inic_host_intr(struct ata_port *ap) |
286 | { | 286 | { |
287 | void __iomem *port_base = inic_port_base(ap); | 287 | void __iomem *port_base = inic_port_base(ap); |
288 | struct ata_eh_info *ehi = &ap->eh_info; | 288 | struct ata_eh_info *ehi = &ap->link.eh_info; |
289 | u8 irq_stat; | 289 | u8 irq_stat; |
290 | 290 | ||
291 | /* fetch and clear irq */ | 291 | /* fetch and clear irq */ |
@@ -293,7 +293,8 @@ static void inic_host_intr(struct ata_port *ap) | |||
293 | writeb(irq_stat, port_base + PORT_IRQ_STAT); | 293 | writeb(irq_stat, port_base + PORT_IRQ_STAT); |
294 | 294 | ||
295 | if (likely(!(irq_stat & PIRQ_ERR))) { | 295 | if (likely(!(irq_stat & PIRQ_ERR))) { |
296 | struct ata_queued_cmd *qc = ata_qc_from_tag(ap, ap->active_tag); | 296 | struct ata_queued_cmd *qc = |
297 | ata_qc_from_tag(ap, ap->link.active_tag); | ||
297 | 298 | ||
298 | if (unlikely(!qc || (qc->tf.flags & ATA_TFLAG_POLLING))) { | 299 | if (unlikely(!qc || (qc->tf.flags & ATA_TFLAG_POLLING))) { |
299 | ata_chk_status(ap); /* clear ATA interrupt */ | 300 | ata_chk_status(ap); /* clear ATA interrupt */ |
@@ -416,12 +417,13 @@ static void inic_thaw(struct ata_port *ap) | |||
416 | * SRST and SControl hardreset don't give valid signature on this | 417 | * SRST and SControl hardreset don't give valid signature on this |
417 | * controller. Only controller specific hardreset mechanism works. | 418 | * controller. Only controller specific hardreset mechanism works. |
418 | */ | 419 | */ |
419 | static int inic_hardreset(struct ata_port *ap, unsigned int *class, | 420 | static int inic_hardreset(struct ata_link *link, unsigned int *class, |
420 | unsigned long deadline) | 421 | unsigned long deadline) |
421 | { | 422 | { |
423 | struct ata_port *ap = link->ap; | ||
422 | void __iomem *port_base = inic_port_base(ap); | 424 | void __iomem *port_base = inic_port_base(ap); |
423 | void __iomem *idma_ctl = port_base + PORT_IDMA_CTL; | 425 | void __iomem *idma_ctl = port_base + PORT_IDMA_CTL; |
424 | const unsigned long *timing = sata_ehc_deb_timing(&ap->eh_context); | 426 | const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context); |
425 | u16 val; | 427 | u16 val; |
426 | int rc; | 428 | int rc; |
427 | 429 | ||
@@ -434,15 +436,15 @@ static int inic_hardreset(struct ata_port *ap, unsigned int *class, | |||
434 | msleep(1); | 436 | msleep(1); |
435 | writew(val & ~IDMA_CTL_RST_ATA, idma_ctl); | 437 | writew(val & ~IDMA_CTL_RST_ATA, idma_ctl); |
436 | 438 | ||
437 | rc = sata_phy_resume(ap, timing, deadline); | 439 | rc = sata_link_resume(link, timing, deadline); |
438 | if (rc) { | 440 | if (rc) { |
439 | ata_port_printk(ap, KERN_WARNING, "failed to resume " | 441 | ata_link_printk(link, KERN_WARNING, "failed to resume " |
440 | "link after reset (errno=%d)\n", rc); | 442 | "link after reset (errno=%d)\n", rc); |
441 | return rc; | 443 | return rc; |
442 | } | 444 | } |
443 | 445 | ||
444 | *class = ATA_DEV_NONE; | 446 | *class = ATA_DEV_NONE; |
445 | if (ata_port_online(ap)) { | 447 | if (ata_link_online(link)) { |
446 | struct ata_taskfile tf; | 448 | struct ata_taskfile tf; |
447 | 449 | ||
448 | /* wait a while before checking status */ | 450 | /* wait a while before checking status */ |
@@ -451,7 +453,7 @@ static int inic_hardreset(struct ata_port *ap, unsigned int *class, | |||
451 | rc = ata_wait_ready(ap, deadline); | 453 | rc = ata_wait_ready(ap, deadline); |
452 | /* link occupied, -ENODEV too is an error */ | 454 | /* link occupied, -ENODEV too is an error */ |
453 | if (rc) { | 455 | if (rc) { |
454 | ata_port_printk(ap, KERN_WARNING, "device not ready " | 456 | ata_link_printk(link, KERN_WARNING, "device not ready " |
455 | "after hardreset (errno=%d)\n", rc); | 457 | "after hardreset (errno=%d)\n", rc); |
456 | return rc; | 458 | return rc; |
457 | } | 459 | } |
@@ -550,7 +552,6 @@ static int inic_port_start(struct ata_port *ap) | |||
550 | } | 552 | } |
551 | 553 | ||
552 | static struct ata_port_operations inic_port_ops = { | 554 | static struct ata_port_operations inic_port_ops = { |
553 | .port_disable = ata_port_disable, | ||
554 | .tf_load = ata_tf_load, | 555 | .tf_load = ata_tf_load, |
555 | .tf_read = ata_tf_read, | 556 | .tf_read = ata_tf_read, |
556 | .check_status = ata_check_status, | 557 | .check_status = ata_check_status, |
@@ -567,7 +568,6 @@ static struct ata_port_operations inic_port_ops = { | |||
567 | 568 | ||
568 | .irq_clear = inic_irq_clear, | 569 | .irq_clear = inic_irq_clear, |
569 | .irq_on = ata_irq_on, | 570 | .irq_on = ata_irq_on, |
570 | .irq_ack = ata_irq_ack, | ||
571 | 571 | ||
572 | .qc_prep = ata_qc_prep, | 572 | .qc_prep = ata_qc_prep, |
573 | .qc_issue = inic_qc_issue, | 573 | .qc_issue = inic_qc_issue, |
@@ -693,16 +693,24 @@ static int inic_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
693 | host->iomap = iomap = pcim_iomap_table(pdev); | 693 | host->iomap = iomap = pcim_iomap_table(pdev); |
694 | 694 | ||
695 | for (i = 0; i < NR_PORTS; i++) { | 695 | for (i = 0; i < NR_PORTS; i++) { |
696 | struct ata_ioports *port = &host->ports[i]->ioaddr; | 696 | struct ata_port *ap = host->ports[i]; |
697 | void __iomem *port_base = iomap[MMIO_BAR] + i * PORT_SIZE; | 697 | struct ata_ioports *port = &ap->ioaddr; |
698 | unsigned int offset = i * PORT_SIZE; | ||
698 | 699 | ||
699 | port->cmd_addr = iomap[2 * i]; | 700 | port->cmd_addr = iomap[2 * i]; |
700 | port->altstatus_addr = | 701 | port->altstatus_addr = |
701 | port->ctl_addr = (void __iomem *) | 702 | port->ctl_addr = (void __iomem *) |
702 | ((unsigned long)iomap[2 * i + 1] | ATA_PCI_CTL_OFS); | 703 | ((unsigned long)iomap[2 * i + 1] | ATA_PCI_CTL_OFS); |
703 | port->scr_addr = port_base + PORT_SCR; | 704 | port->scr_addr = iomap[MMIO_BAR] + offset + PORT_SCR; |
704 | 705 | ||
705 | ata_std_ports(port); | 706 | ata_std_ports(port); |
707 | |||
708 | ata_port_pbar_desc(ap, MMIO_BAR, -1, "mmio"); | ||
709 | ata_port_pbar_desc(ap, MMIO_BAR, offset, "port"); | ||
710 | ata_port_desc(ap, "cmd 0x%llx ctl 0x%llx", | ||
711 | (unsigned long long)pci_resource_start(pdev, 2 * i), | ||
712 | (unsigned long long)pci_resource_start(pdev, (2 * i + 1)) | | ||
713 | ATA_PCI_CTL_OFS); | ||
706 | } | 714 | } |
707 | 715 | ||
708 | hpriv->cached_hctl = readw(iomap[MMIO_BAR] + HOST_CTL); | 716 | hpriv->cached_hctl = readw(iomap[MMIO_BAR] + HOST_CTL); |