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Diffstat (limited to 'drivers/ata/sata_fsl.c')
-rw-r--r--drivers/ata/sata_fsl.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/ata/sata_fsl.c b/drivers/ata/sata_fsl.c
index 0f91e583892e..35a71d875d0e 100644
--- a/drivers/ata/sata_fsl.c
+++ b/drivers/ata/sata_fsl.c
@@ -42,7 +42,7 @@ enum {
42 42
43 /* 43 /*
44 * SATA-FSL host controller supports a max. of (15+1) direct PRDEs, and 44 * SATA-FSL host controller supports a max. of (15+1) direct PRDEs, and
45 * chained indirect PRDEs upto a max count of 63. 45 * chained indirect PRDEs up to a max count of 63.
46 * We are allocating an array of 63 PRDEs contiguously, but PRDE#15 will 46 * We are allocating an array of 63 PRDEs contiguously, but PRDE#15 will
47 * be setup as an indirect descriptor, pointing to it's next 47 * be setup as an indirect descriptor, pointing to it's next
48 * (contiguous) PRDE. Though chained indirect PRDE arrays are 48 * (contiguous) PRDE. Though chained indirect PRDE arrays are
@@ -907,7 +907,7 @@ static int sata_fsl_softreset(struct ata_link *link, unsigned int *class,
907 ata_msleep(ap, 1); 907 ata_msleep(ap, 1);
908 908
909 /* 909 /*
910 * SATA device enters reset state after receving a Control register 910 * SATA device enters reset state after receiving a Control register
911 * FIS with SRST bit asserted and it awaits another H2D Control reg. 911 * FIS with SRST bit asserted and it awaits another H2D Control reg.
912 * FIS with SRST bit cleared, then the device does internal diags & 912 * FIS with SRST bit cleared, then the device does internal diags &
913 * initialization, followed by indicating it's initialization status 913 * initialization, followed by indicating it's initialization status