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path: root/drivers/ata/pata_sl82c105.c
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Diffstat (limited to 'drivers/ata/pata_sl82c105.c')
-rw-r--r--drivers/ata/pata_sl82c105.c67
1 files changed, 13 insertions, 54 deletions
diff --git a/drivers/ata/pata_sl82c105.c b/drivers/ata/pata_sl82c105.c
index 81ef207f8265..70d94fb28a5f 100644
--- a/drivers/ata/pata_sl82c105.c
+++ b/drivers/ata/pata_sl82c105.c
@@ -60,13 +60,7 @@ static int sl82c105_pre_reset(struct ata_link *link, unsigned long deadline)
60 60
61 if (ap->port_no && !pci_test_config_bits(pdev, &sl82c105_enable_bits[ap->port_no])) 61 if (ap->port_no && !pci_test_config_bits(pdev, &sl82c105_enable_bits[ap->port_no]))
62 return -ENOENT; 62 return -ENOENT;
63 return ata_std_prereset(link, deadline); 63 return ata_sff_prereset(link, deadline);
64}
65
66
67static void sl82c105_error_handler(struct ata_port *ap)
68{
69 ata_bmdma_drive_eh(ap, sl82c105_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
70} 64}
71 65
72 66
@@ -235,55 +229,17 @@ static int sl82c105_qc_defer(struct ata_queued_cmd *qc)
235} 229}
236 230
237static struct scsi_host_template sl82c105_sht = { 231static struct scsi_host_template sl82c105_sht = {
238 .module = THIS_MODULE, 232 ATA_BMDMA_SHT(DRV_NAME),
239 .name = DRV_NAME,
240 .ioctl = ata_scsi_ioctl,
241 .queuecommand = ata_scsi_queuecmd,
242 .can_queue = ATA_DEF_QUEUE,
243 .this_id = ATA_SHT_THIS_ID,
244 .sg_tablesize = LIBATA_MAX_PRD,
245 .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
246 .emulated = ATA_SHT_EMULATED,
247 .use_clustering = ATA_SHT_USE_CLUSTERING,
248 .proc_name = DRV_NAME,
249 .dma_boundary = ATA_DMA_BOUNDARY,
250 .slave_configure = ata_scsi_slave_config,
251 .slave_destroy = ata_scsi_slave_destroy,
252 .bios_param = ata_std_bios_param,
253}; 233};
254 234
255static struct ata_port_operations sl82c105_port_ops = { 235static struct ata_port_operations sl82c105_port_ops = {
256 .set_piomode = sl82c105_set_piomode, 236 .inherits = &ata_bmdma_port_ops,
257 .mode_filter = ata_pci_default_filter, 237 .qc_defer = sl82c105_qc_defer,
258
259 .tf_load = ata_tf_load,
260 .tf_read = ata_tf_read,
261 .check_status = ata_check_status,
262 .exec_command = ata_exec_command,
263 .dev_select = ata_std_dev_select,
264
265 .freeze = ata_bmdma_freeze,
266 .thaw = ata_bmdma_thaw,
267 .error_handler = sl82c105_error_handler,
268 .post_internal_cmd = ata_bmdma_post_internal_cmd,
269 .cable_detect = ata_cable_40wire,
270
271 .bmdma_setup = ata_bmdma_setup,
272 .bmdma_start = sl82c105_bmdma_start, 238 .bmdma_start = sl82c105_bmdma_start,
273 .bmdma_stop = sl82c105_bmdma_stop, 239 .bmdma_stop = sl82c105_bmdma_stop,
274 .bmdma_status = ata_bmdma_status, 240 .cable_detect = ata_cable_40wire,
275 241 .set_piomode = sl82c105_set_piomode,
276 .qc_defer = sl82c105_qc_defer, 242 .prereset = sl82c105_pre_reset,
277 .qc_prep = ata_qc_prep,
278 .qc_issue = ata_qc_issue_prot,
279
280 .data_xfer = ata_data_xfer,
281
282 .irq_handler = ata_interrupt,
283 .irq_clear = ata_bmdma_irq_clear,
284 .irq_on = ata_irq_on,
285
286 .port_start = ata_sff_port_start,
287}; 243};
288 244
289/** 245/**
@@ -327,14 +283,12 @@ static int sl82c105_bridge_revision(struct pci_dev *pdev)
327static int sl82c105_init_one(struct pci_dev *dev, const struct pci_device_id *id) 283static int sl82c105_init_one(struct pci_dev *dev, const struct pci_device_id *id)
328{ 284{
329 static const struct ata_port_info info_dma = { 285 static const struct ata_port_info info_dma = {
330 .sht = &sl82c105_sht,
331 .flags = ATA_FLAG_SLAVE_POSS, 286 .flags = ATA_FLAG_SLAVE_POSS,
332 .pio_mask = 0x1f, 287 .pio_mask = 0x1f,
333 .mwdma_mask = 0x07, 288 .mwdma_mask = 0x07,
334 .port_ops = &sl82c105_port_ops 289 .port_ops = &sl82c105_port_ops
335 }; 290 };
336 static const struct ata_port_info info_early = { 291 static const struct ata_port_info info_early = {
337 .sht = &sl82c105_sht,
338 .flags = ATA_FLAG_SLAVE_POSS, 292 .flags = ATA_FLAG_SLAVE_POSS,
339 .pio_mask = 0x1f, 293 .pio_mask = 0x1f,
340 .port_ops = &sl82c105_port_ops 294 .port_ops = &sl82c105_port_ops
@@ -344,6 +298,11 @@ static int sl82c105_init_one(struct pci_dev *dev, const struct pci_device_id *id
344 NULL }; 298 NULL };
345 u32 val; 299 u32 val;
346 int rev; 300 int rev;
301 int rc;
302
303 rc = pcim_enable_device(dev);
304 if (rc)
305 return rc;
347 306
348 rev = sl82c105_bridge_revision(dev); 307 rev = sl82c105_bridge_revision(dev);
349 308
@@ -358,7 +317,7 @@ static int sl82c105_init_one(struct pci_dev *dev, const struct pci_device_id *id
358 val |= CTRL_P0EN | CTRL_P0F16 | CTRL_P1F16; 317 val |= CTRL_P0EN | CTRL_P0F16 | CTRL_P1F16;
359 pci_write_config_dword(dev, 0x40, val); 318 pci_write_config_dword(dev, 0x40, val);
360 319
361 return ata_pci_init_one(dev, ppi); 320 return ata_pci_sff_init_one(dev, ppi, &sl82c105_sht, NULL);
362} 321}
363 322
364static const struct pci_device_id sl82c105[] = { 323static const struct pci_device_id sl82c105[] = {