diff options
Diffstat (limited to 'drivers/ata/pata_scc.c')
-rw-r--r-- | drivers/ata/pata_scc.c | 257 |
1 files changed, 118 insertions, 139 deletions
diff --git a/drivers/ata/pata_scc.c b/drivers/ata/pata_scc.c index 6c016deeaed8..e965b251ca24 100644 --- a/drivers/ata/pata_scc.c +++ b/drivers/ata/pata_scc.c | |||
@@ -266,7 +266,7 @@ unsigned long scc_mode_filter(struct ata_device *adev, unsigned long mask) | |||
266 | printk(KERN_INFO "%s: limit ATAPI UDMA to UDMA4\n", DRV_NAME); | 266 | printk(KERN_INFO "%s: limit ATAPI UDMA to UDMA4\n", DRV_NAME); |
267 | mask &= ~(0xE0 << ATA_SHIFT_UDMA); | 267 | mask &= ~(0xE0 << ATA_SHIFT_UDMA); |
268 | } | 268 | } |
269 | return ata_pci_default_filter(adev, mask); | 269 | return ata_bmdma_mode_filter(adev, mask); |
270 | } | 270 | } |
271 | 271 | ||
272 | /** | 272 | /** |
@@ -274,7 +274,7 @@ unsigned long scc_mode_filter(struct ata_device *adev, unsigned long mask) | |||
274 | * @ap: Port to which output is sent | 274 | * @ap: Port to which output is sent |
275 | * @tf: ATA taskfile register set | 275 | * @tf: ATA taskfile register set |
276 | * | 276 | * |
277 | * Note: Original code is ata_tf_load(). | 277 | * Note: Original code is ata_sff_tf_load(). |
278 | */ | 278 | */ |
279 | 279 | ||
280 | static void scc_tf_load (struct ata_port *ap, const struct ata_taskfile *tf) | 280 | static void scc_tf_load (struct ata_port *ap, const struct ata_taskfile *tf) |
@@ -341,7 +341,7 @@ static u8 scc_check_status (struct ata_port *ap) | |||
341 | * @ap: Port from which input is read | 341 | * @ap: Port from which input is read |
342 | * @tf: ATA taskfile register set for storing input | 342 | * @tf: ATA taskfile register set for storing input |
343 | * | 343 | * |
344 | * Note: Original code is ata_tf_read(). | 344 | * Note: Original code is ata_sff_tf_read(). |
345 | */ | 345 | */ |
346 | 346 | ||
347 | static void scc_tf_read (struct ata_port *ap, struct ata_taskfile *tf) | 347 | static void scc_tf_read (struct ata_port *ap, struct ata_taskfile *tf) |
@@ -373,7 +373,7 @@ static void scc_tf_read (struct ata_port *ap, struct ata_taskfile *tf) | |||
373 | * @ap: port to which command is being issued | 373 | * @ap: port to which command is being issued |
374 | * @tf: ATA taskfile register set | 374 | * @tf: ATA taskfile register set |
375 | * | 375 | * |
376 | * Note: Original code is ata_exec_command(). | 376 | * Note: Original code is ata_sff_exec_command(). |
377 | */ | 377 | */ |
378 | 378 | ||
379 | static void scc_exec_command (struct ata_port *ap, | 379 | static void scc_exec_command (struct ata_port *ap, |
@@ -382,7 +382,7 @@ static void scc_exec_command (struct ata_port *ap, | |||
382 | DPRINTK("ata%u: cmd 0x%X\n", ap->print_id, tf->command); | 382 | DPRINTK("ata%u: cmd 0x%X\n", ap->print_id, tf->command); |
383 | 383 | ||
384 | out_be32(ap->ioaddr.command_addr, tf->command); | 384 | out_be32(ap->ioaddr.command_addr, tf->command); |
385 | ata_pause(ap); | 385 | ata_sff_pause(ap); |
386 | } | 386 | } |
387 | 387 | ||
388 | /** | 388 | /** |
@@ -396,14 +396,14 @@ static u8 scc_check_altstatus (struct ata_port *ap) | |||
396 | } | 396 | } |
397 | 397 | ||
398 | /** | 398 | /** |
399 | * scc_std_dev_select - Select device 0/1 on ATA bus | 399 | * scc_dev_select - Select device 0/1 on ATA bus |
400 | * @ap: ATA channel to manipulate | 400 | * @ap: ATA channel to manipulate |
401 | * @device: ATA device (numbered from zero) to select | 401 | * @device: ATA device (numbered from zero) to select |
402 | * | 402 | * |
403 | * Note: Original code is ata_std_dev_select(). | 403 | * Note: Original code is ata_sff_dev_select(). |
404 | */ | 404 | */ |
405 | 405 | ||
406 | static void scc_std_dev_select (struct ata_port *ap, unsigned int device) | 406 | static void scc_dev_select (struct ata_port *ap, unsigned int device) |
407 | { | 407 | { |
408 | u8 tmp; | 408 | u8 tmp; |
409 | 409 | ||
@@ -413,7 +413,7 @@ static void scc_std_dev_select (struct ata_port *ap, unsigned int device) | |||
413 | tmp = ATA_DEVICE_OBS | ATA_DEV1; | 413 | tmp = ATA_DEVICE_OBS | ATA_DEV1; |
414 | 414 | ||
415 | out_be32(ap->ioaddr.device_addr, tmp); | 415 | out_be32(ap->ioaddr.device_addr, tmp); |
416 | ata_pause(ap); | 416 | ata_sff_pause(ap); |
417 | } | 417 | } |
418 | 418 | ||
419 | /** | 419 | /** |
@@ -441,7 +441,7 @@ static void scc_bmdma_setup (struct ata_queued_cmd *qc) | |||
441 | out_be32(mmio + SCC_DMA_CMD, dmactl); | 441 | out_be32(mmio + SCC_DMA_CMD, dmactl); |
442 | 442 | ||
443 | /* issue r/w command */ | 443 | /* issue r/w command */ |
444 | ap->ops->exec_command(ap, &qc->tf); | 444 | ap->ops->sff_exec_command(ap, &qc->tf); |
445 | } | 445 | } |
446 | 446 | ||
447 | /** | 447 | /** |
@@ -476,7 +476,7 @@ static unsigned int scc_devchk (struct ata_port *ap, | |||
476 | struct ata_ioports *ioaddr = &ap->ioaddr; | 476 | struct ata_ioports *ioaddr = &ap->ioaddr; |
477 | u8 nsect, lbal; | 477 | u8 nsect, lbal; |
478 | 478 | ||
479 | ap->ops->dev_select(ap, device); | 479 | ap->ops->sff_dev_select(ap, device); |
480 | 480 | ||
481 | out_be32(ioaddr->nsect_addr, 0x55); | 481 | out_be32(ioaddr->nsect_addr, 0x55); |
482 | out_be32(ioaddr->lbal_addr, 0xaa); | 482 | out_be32(ioaddr->lbal_addr, 0xaa); |
@@ -497,57 +497,78 @@ static unsigned int scc_devchk (struct ata_port *ap, | |||
497 | } | 497 | } |
498 | 498 | ||
499 | /** | 499 | /** |
500 | * scc_bus_post_reset - PATA device post reset | 500 | * scc_wait_after_reset - wait for devices to become ready after reset |
501 | * | 501 | * |
502 | * Note: Original code is ata_bus_post_reset(). | 502 | * Note: Original code is ata_sff_wait_after_reset |
503 | */ | 503 | */ |
504 | 504 | ||
505 | static int scc_bus_post_reset(struct ata_port *ap, unsigned int devmask, | 505 | int scc_wait_after_reset(struct ata_link *link, unsigned int devmask, |
506 | unsigned long deadline) | 506 | unsigned long deadline) |
507 | { | 507 | { |
508 | struct ata_port *ap = link->ap; | ||
508 | struct ata_ioports *ioaddr = &ap->ioaddr; | 509 | struct ata_ioports *ioaddr = &ap->ioaddr; |
509 | unsigned int dev0 = devmask & (1 << 0); | 510 | unsigned int dev0 = devmask & (1 << 0); |
510 | unsigned int dev1 = devmask & (1 << 1); | 511 | unsigned int dev1 = devmask & (1 << 1); |
511 | int rc; | 512 | int rc, ret = 0; |
512 | 513 | ||
513 | /* if device 0 was found in ata_devchk, wait for its | 514 | /* Spec mandates ">= 2ms" before checking status. We wait |
514 | * BSY bit to clear | 515 | * 150ms, because that was the magic delay used for ATAPI |
516 | * devices in Hale Landis's ATADRVR, for the period of time | ||
517 | * between when the ATA command register is written, and then | ||
518 | * status is checked. Because waiting for "a while" before | ||
519 | * checking status is fine, post SRST, we perform this magic | ||
520 | * delay here as well. | ||
521 | * | ||
522 | * Old drivers/ide uses the 2mS rule and then waits for ready. | ||
515 | */ | 523 | */ |
516 | if (dev0) { | 524 | msleep(150); |
517 | rc = ata_wait_ready(ap, deadline); | ||
518 | if (rc && rc != -ENODEV) | ||
519 | return rc; | ||
520 | } | ||
521 | 525 | ||
522 | /* if device 1 was found in ata_devchk, wait for | 526 | /* always check readiness of the master device */ |
523 | * register access, then wait for BSY to clear | 527 | rc = ata_sff_wait_ready(link, deadline); |
528 | /* -ENODEV means the odd clown forgot the D7 pulldown resistor | ||
529 | * and TF status is 0xff, bail out on it too. | ||
524 | */ | 530 | */ |
525 | while (dev1) { | 531 | if (rc) |
526 | u8 nsect, lbal; | 532 | return rc; |
527 | 533 | ||
528 | ap->ops->dev_select(ap, 1); | 534 | /* if device 1 was found in ata_devchk, wait for register |
529 | nsect = in_be32(ioaddr->nsect_addr); | 535 | * access briefly, then wait for BSY to clear. |
530 | lbal = in_be32(ioaddr->lbal_addr); | 536 | */ |
531 | if ((nsect == 1) && (lbal == 1)) | ||
532 | break; | ||
533 | if (time_after(jiffies, deadline)) | ||
534 | return -EBUSY; | ||
535 | msleep(50); /* give drive a breather */ | ||
536 | } | ||
537 | if (dev1) { | 537 | if (dev1) { |
538 | rc = ata_wait_ready(ap, deadline); | 538 | int i; |
539 | if (rc && rc != -ENODEV) | 539 | |
540 | return rc; | 540 | ap->ops->sff_dev_select(ap, 1); |
541 | |||
542 | /* Wait for register access. Some ATAPI devices fail | ||
543 | * to set nsect/lbal after reset, so don't waste too | ||
544 | * much time on it. We're gonna wait for !BSY anyway. | ||
545 | */ | ||
546 | for (i = 0; i < 2; i++) { | ||
547 | u8 nsect, lbal; | ||
548 | |||
549 | nsect = in_be32(ioaddr->nsect_addr); | ||
550 | lbal = in_be32(ioaddr->lbal_addr); | ||
551 | if ((nsect == 1) && (lbal == 1)) | ||
552 | break; | ||
553 | msleep(50); /* give drive a breather */ | ||
554 | } | ||
555 | |||
556 | rc = ata_sff_wait_ready(link, deadline); | ||
557 | if (rc) { | ||
558 | if (rc != -ENODEV) | ||
559 | return rc; | ||
560 | ret = rc; | ||
561 | } | ||
541 | } | 562 | } |
542 | 563 | ||
543 | /* is all this really necessary? */ | 564 | /* is all this really necessary? */ |
544 | ap->ops->dev_select(ap, 0); | 565 | ap->ops->sff_dev_select(ap, 0); |
545 | if (dev1) | 566 | if (dev1) |
546 | ap->ops->dev_select(ap, 1); | 567 | ap->ops->sff_dev_select(ap, 1); |
547 | if (dev0) | 568 | if (dev0) |
548 | ap->ops->dev_select(ap, 0); | 569 | ap->ops->sff_dev_select(ap, 0); |
549 | 570 | ||
550 | return 0; | 571 | return ret; |
551 | } | 572 | } |
552 | 573 | ||
553 | /** | 574 | /** |
@@ -570,32 +591,22 @@ static unsigned int scc_bus_softreset(struct ata_port *ap, unsigned int devmask, | |||
570 | udelay(20); | 591 | udelay(20); |
571 | out_be32(ioaddr->ctl_addr, ap->ctl); | 592 | out_be32(ioaddr->ctl_addr, ap->ctl); |
572 | 593 | ||
573 | /* wait a while before checking status */ | 594 | scc_wait_after_reset(&ap->link, devmask, deadline); |
574 | ata_wait_after_reset(ap, deadline); | ||
575 | |||
576 | /* Before we perform post reset processing we want to see if | ||
577 | * the bus shows 0xFF because the odd clown forgets the D7 | ||
578 | * pulldown resistor. | ||
579 | */ | ||
580 | if (scc_check_status(ap) == 0xFF) | ||
581 | return 0; | ||
582 | |||
583 | scc_bus_post_reset(ap, devmask, deadline); | ||
584 | 595 | ||
585 | return 0; | 596 | return 0; |
586 | } | 597 | } |
587 | 598 | ||
588 | /** | 599 | /** |
589 | * scc_std_softreset - reset host port via ATA SRST | 600 | * scc_softreset - reset host port via ATA SRST |
590 | * @ap: port to reset | 601 | * @ap: port to reset |
591 | * @classes: resulting classes of attached devices | 602 | * @classes: resulting classes of attached devices |
592 | * @deadline: deadline jiffies for the operation | 603 | * @deadline: deadline jiffies for the operation |
593 | * | 604 | * |
594 | * Note: Original code is ata_std_softreset(). | 605 | * Note: Original code is ata_sff_softreset(). |
595 | */ | 606 | */ |
596 | 607 | ||
597 | static int scc_std_softreset(struct ata_link *link, unsigned int *classes, | 608 | static int scc_softreset(struct ata_link *link, unsigned int *classes, |
598 | unsigned long deadline) | 609 | unsigned long deadline) |
599 | { | 610 | { |
600 | struct ata_port *ap = link->ap; | 611 | struct ata_port *ap = link->ap; |
601 | unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; | 612 | unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; |
@@ -604,11 +615,6 @@ static int scc_std_softreset(struct ata_link *link, unsigned int *classes, | |||
604 | 615 | ||
605 | DPRINTK("ENTER\n"); | 616 | DPRINTK("ENTER\n"); |
606 | 617 | ||
607 | if (ata_link_offline(link)) { | ||
608 | classes[0] = ATA_DEV_NONE; | ||
609 | goto out; | ||
610 | } | ||
611 | |||
612 | /* determine if device 0/1 are present */ | 618 | /* determine if device 0/1 are present */ |
613 | if (scc_devchk(ap, 0)) | 619 | if (scc_devchk(ap, 0)) |
614 | devmask |= (1 << 0); | 620 | devmask |= (1 << 0); |
@@ -616,7 +622,7 @@ static int scc_std_softreset(struct ata_link *link, unsigned int *classes, | |||
616 | devmask |= (1 << 1); | 622 | devmask |= (1 << 1); |
617 | 623 | ||
618 | /* select device 0 again */ | 624 | /* select device 0 again */ |
619 | ap->ops->dev_select(ap, 0); | 625 | ap->ops->sff_dev_select(ap, 0); |
620 | 626 | ||
621 | /* issue bus reset */ | 627 | /* issue bus reset */ |
622 | DPRINTK("about to softreset, devmask=%x\n", devmask); | 628 | DPRINTK("about to softreset, devmask=%x\n", devmask); |
@@ -628,13 +634,12 @@ static int scc_std_softreset(struct ata_link *link, unsigned int *classes, | |||
628 | } | 634 | } |
629 | 635 | ||
630 | /* determine by signature whether we have ATA or ATAPI devices */ | 636 | /* determine by signature whether we have ATA or ATAPI devices */ |
631 | classes[0] = ata_dev_try_classify(&ap->link.device[0], | 637 | classes[0] = ata_sff_dev_classify(&ap->link.device[0], |
632 | devmask & (1 << 0), &err); | 638 | devmask & (1 << 0), &err); |
633 | if (slave_possible && err != 0x81) | 639 | if (slave_possible && err != 0x81) |
634 | classes[1] = ata_dev_try_classify(&ap->link.device[1], | 640 | classes[1] = ata_sff_dev_classify(&ap->link.device[1], |
635 | devmask & (1 << 1), &err); | 641 | devmask & (1 << 1), &err); |
636 | 642 | ||
637 | out: | ||
638 | DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]); | 643 | DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]); |
639 | return 0; | 644 | return 0; |
640 | } | 645 | } |
@@ -695,7 +700,7 @@ static void scc_bmdma_stop (struct ata_queued_cmd *qc) | |||
695 | printk(KERN_WARNING "%s: Internal Bus Error\n", DRV_NAME); | 700 | printk(KERN_WARNING "%s: Internal Bus Error\n", DRV_NAME); |
696 | out_be32(bmid_base + SCC_DMA_INTST, INTSTS_BMSINT); | 701 | out_be32(bmid_base + SCC_DMA_INTST, INTSTS_BMSINT); |
697 | /* TBD: SW reset */ | 702 | /* TBD: SW reset */ |
698 | scc_std_softreset(&ap->link, &classes, deadline); | 703 | scc_softreset(&ap->link, &classes, deadline); |
699 | continue; | 704 | continue; |
700 | } | 705 | } |
701 | 706 | ||
@@ -721,7 +726,7 @@ static void scc_bmdma_stop (struct ata_queued_cmd *qc) | |||
721 | in_be32(bmid_base + SCC_DMA_CMD) & ~ATA_DMA_START); | 726 | in_be32(bmid_base + SCC_DMA_CMD) & ~ATA_DMA_START); |
722 | 727 | ||
723 | /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */ | 728 | /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */ |
724 | ata_altstatus(ap); /* dummy read */ | 729 | ata_sff_altstatus(ap); /* dummy read */ |
725 | } | 730 | } |
726 | 731 | ||
727 | /** | 732 | /** |
@@ -742,7 +747,7 @@ static u8 scc_bmdma_status (struct ata_port *ap) | |||
742 | return host_stat; | 747 | return host_stat; |
743 | 748 | ||
744 | /* errata A252,A308 workaround: Step4 */ | 749 | /* errata A252,A308 workaround: Step4 */ |
745 | if ((ata_altstatus(ap) & ATA_ERR) && (int_status & INTSTS_INTRQ)) | 750 | if ((ata_sff_altstatus(ap) & ATA_ERR) && (int_status & INTSTS_INTRQ)) |
746 | return (host_stat | ATA_DMA_INTR); | 751 | return (host_stat | ATA_DMA_INTR); |
747 | 752 | ||
748 | /* errata A308 workaround Step5 */ | 753 | /* errata A308 workaround Step5 */ |
@@ -773,7 +778,7 @@ static u8 scc_bmdma_status (struct ata_port *ap) | |||
773 | * @buflen: buffer length | 778 | * @buflen: buffer length |
774 | * @rw: read/write | 779 | * @rw: read/write |
775 | * | 780 | * |
776 | * Note: Original code is ata_data_xfer(). | 781 | * Note: Original code is ata_sff_data_xfer(). |
777 | */ | 782 | */ |
778 | 783 | ||
779 | static unsigned int scc_data_xfer (struct ata_device *dev, unsigned char *buf, | 784 | static unsigned int scc_data_xfer (struct ata_device *dev, unsigned char *buf, |
@@ -782,28 +787,28 @@ static unsigned int scc_data_xfer (struct ata_device *dev, unsigned char *buf, | |||
782 | struct ata_port *ap = dev->link->ap; | 787 | struct ata_port *ap = dev->link->ap; |
783 | unsigned int words = buflen >> 1; | 788 | unsigned int words = buflen >> 1; |
784 | unsigned int i; | 789 | unsigned int i; |
785 | u16 *buf16 = (u16 *) buf; | 790 | __le16 *buf16 = (__le16 *) buf; |
786 | void __iomem *mmio = ap->ioaddr.data_addr; | 791 | void __iomem *mmio = ap->ioaddr.data_addr; |
787 | 792 | ||
788 | /* Transfer multiple of 2 bytes */ | 793 | /* Transfer multiple of 2 bytes */ |
789 | if (rw == READ) | 794 | if (rw == READ) |
790 | for (i = 0; i < words; i++) | 795 | for (i = 0; i < words; i++) |
791 | buf16[i] = le16_to_cpu(in_be32(mmio)); | 796 | buf16[i] = cpu_to_le16(in_be32(mmio)); |
792 | else | 797 | else |
793 | for (i = 0; i < words; i++) | 798 | for (i = 0; i < words; i++) |
794 | out_be32(mmio, cpu_to_le16(buf16[i])); | 799 | out_be32(mmio, le16_to_cpu(buf16[i])); |
795 | 800 | ||
796 | /* Transfer trailing 1 byte, if any. */ | 801 | /* Transfer trailing 1 byte, if any. */ |
797 | if (unlikely(buflen & 0x01)) { | 802 | if (unlikely(buflen & 0x01)) { |
798 | u16 align_buf[1] = { 0 }; | 803 | __le16 align_buf[1] = { 0 }; |
799 | unsigned char *trailing_buf = buf + buflen - 1; | 804 | unsigned char *trailing_buf = buf + buflen - 1; |
800 | 805 | ||
801 | if (rw == READ) { | 806 | if (rw == READ) { |
802 | align_buf[0] = le16_to_cpu(in_be32(mmio)); | 807 | align_buf[0] = cpu_to_le16(in_be32(mmio)); |
803 | memcpy(trailing_buf, align_buf, 1); | 808 | memcpy(trailing_buf, align_buf, 1); |
804 | } else { | 809 | } else { |
805 | memcpy(align_buf, trailing_buf, 1); | 810 | memcpy(align_buf, trailing_buf, 1); |
806 | out_be32(mmio, cpu_to_le16(align_buf[0])); | 811 | out_be32(mmio, le16_to_cpu(align_buf[0])); |
807 | } | 812 | } |
808 | words++; | 813 | words++; |
809 | } | 814 | } |
@@ -815,7 +820,7 @@ static unsigned int scc_data_xfer (struct ata_device *dev, unsigned char *buf, | |||
815 | * scc_irq_on - Enable interrupts on a port. | 820 | * scc_irq_on - Enable interrupts on a port. |
816 | * @ap: Port on which interrupts are enabled. | 821 | * @ap: Port on which interrupts are enabled. |
817 | * | 822 | * |
818 | * Note: Original code is ata_irq_on(). | 823 | * Note: Original code is ata_sff_irq_on(). |
819 | */ | 824 | */ |
820 | 825 | ||
821 | static u8 scc_irq_on (struct ata_port *ap) | 826 | static u8 scc_irq_on (struct ata_port *ap) |
@@ -829,19 +834,19 @@ static u8 scc_irq_on (struct ata_port *ap) | |||
829 | out_be32(ioaddr->ctl_addr, ap->ctl); | 834 | out_be32(ioaddr->ctl_addr, ap->ctl); |
830 | tmp = ata_wait_idle(ap); | 835 | tmp = ata_wait_idle(ap); |
831 | 836 | ||
832 | ap->ops->irq_clear(ap); | 837 | ap->ops->sff_irq_clear(ap); |
833 | 838 | ||
834 | return tmp; | 839 | return tmp; |
835 | } | 840 | } |
836 | 841 | ||
837 | /** | 842 | /** |
838 | * scc_bmdma_freeze - Freeze BMDMA controller port | 843 | * scc_freeze - Freeze BMDMA controller port |
839 | * @ap: port to freeze | 844 | * @ap: port to freeze |
840 | * | 845 | * |
841 | * Note: Original code is ata_bmdma_freeze(). | 846 | * Note: Original code is ata_sff_freeze(). |
842 | */ | 847 | */ |
843 | 848 | ||
844 | static void scc_bmdma_freeze (struct ata_port *ap) | 849 | static void scc_freeze (struct ata_port *ap) |
845 | { | 850 | { |
846 | struct ata_ioports *ioaddr = &ap->ioaddr; | 851 | struct ata_ioports *ioaddr = &ap->ioaddr; |
847 | 852 | ||
@@ -854,9 +859,9 @@ static void scc_bmdma_freeze (struct ata_port *ap) | |||
854 | * ATA_NIEN manipulation. Also, many controllers fail to mask | 859 | * ATA_NIEN manipulation. Also, many controllers fail to mask |
855 | * previously pending IRQ on ATA_NIEN assertion. Clear it. | 860 | * previously pending IRQ on ATA_NIEN assertion. Clear it. |
856 | */ | 861 | */ |
857 | ata_chk_status(ap); | 862 | ap->ops->sff_check_status(ap); |
858 | 863 | ||
859 | ap->ops->irq_clear(ap); | 864 | ap->ops->sff_irq_clear(ap); |
860 | } | 865 | } |
861 | 866 | ||
862 | /** | 867 | /** |
@@ -868,18 +873,18 @@ static void scc_bmdma_freeze (struct ata_port *ap) | |||
868 | static int scc_pata_prereset(struct ata_link *link, unsigned long deadline) | 873 | static int scc_pata_prereset(struct ata_link *link, unsigned long deadline) |
869 | { | 874 | { |
870 | link->ap->cbl = ATA_CBL_PATA80; | 875 | link->ap->cbl = ATA_CBL_PATA80; |
871 | return ata_std_prereset(link, deadline); | 876 | return ata_sff_prereset(link, deadline); |
872 | } | 877 | } |
873 | 878 | ||
874 | /** | 879 | /** |
875 | * scc_std_postreset - standard postreset callback | 880 | * scc_postreset - standard postreset callback |
876 | * @ap: the target ata_port | 881 | * @ap: the target ata_port |
877 | * @classes: classes of attached devices | 882 | * @classes: classes of attached devices |
878 | * | 883 | * |
879 | * Note: Original code is ata_std_postreset(). | 884 | * Note: Original code is ata_sff_postreset(). |
880 | */ | 885 | */ |
881 | 886 | ||
882 | static void scc_std_postreset(struct ata_link *link, unsigned int *classes) | 887 | static void scc_postreset(struct ata_link *link, unsigned int *classes) |
883 | { | 888 | { |
884 | struct ata_port *ap = link->ap; | 889 | struct ata_port *ap = link->ap; |
885 | 890 | ||
@@ -887,9 +892,9 @@ static void scc_std_postreset(struct ata_link *link, unsigned int *classes) | |||
887 | 892 | ||
888 | /* is double-select really necessary? */ | 893 | /* is double-select really necessary? */ |
889 | if (classes[0] != ATA_DEV_NONE) | 894 | if (classes[0] != ATA_DEV_NONE) |
890 | ap->ops->dev_select(ap, 1); | 895 | ap->ops->sff_dev_select(ap, 1); |
891 | if (classes[1] != ATA_DEV_NONE) | 896 | if (classes[1] != ATA_DEV_NONE) |
892 | ap->ops->dev_select(ap, 0); | 897 | ap->ops->sff_dev_select(ap, 0); |
893 | 898 | ||
894 | /* bail out if no device is present */ | 899 | /* bail out if no device is present */ |
895 | if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) { | 900 | if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) { |
@@ -905,24 +910,13 @@ static void scc_std_postreset(struct ata_link *link, unsigned int *classes) | |||
905 | } | 910 | } |
906 | 911 | ||
907 | /** | 912 | /** |
908 | * scc_error_handler - Stock error handler for BMDMA controller | 913 | * scc_irq_clear - Clear PCI IDE BMDMA interrupt. |
909 | * @ap: port to handle error for | ||
910 | */ | ||
911 | |||
912 | static void scc_error_handler (struct ata_port *ap) | ||
913 | { | ||
914 | ata_bmdma_drive_eh(ap, scc_pata_prereset, scc_std_softreset, NULL, | ||
915 | scc_std_postreset); | ||
916 | } | ||
917 | |||
918 | /** | ||
919 | * scc_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt. | ||
920 | * @ap: Port associated with this ATA transaction. | 914 | * @ap: Port associated with this ATA transaction. |
921 | * | 915 | * |
922 | * Note: Original code is ata_bmdma_irq_clear(). | 916 | * Note: Original code is ata_sff_irq_clear(). |
923 | */ | 917 | */ |
924 | 918 | ||
925 | static void scc_bmdma_irq_clear (struct ata_port *ap) | 919 | static void scc_irq_clear (struct ata_port *ap) |
926 | { | 920 | { |
927 | void __iomem *mmio = ap->ioaddr.bmdma_addr; | 921 | void __iomem *mmio = ap->ioaddr.bmdma_addr; |
928 | 922 | ||
@@ -968,52 +962,37 @@ static void scc_port_stop (struct ata_port *ap) | |||
968 | } | 962 | } |
969 | 963 | ||
970 | static struct scsi_host_template scc_sht = { | 964 | static struct scsi_host_template scc_sht = { |
971 | .module = THIS_MODULE, | 965 | ATA_BMDMA_SHT(DRV_NAME), |
972 | .name = DRV_NAME, | ||
973 | .ioctl = ata_scsi_ioctl, | ||
974 | .queuecommand = ata_scsi_queuecmd, | ||
975 | .can_queue = ATA_DEF_QUEUE, | ||
976 | .this_id = ATA_SHT_THIS_ID, | ||
977 | .sg_tablesize = LIBATA_MAX_PRD, | ||
978 | .cmd_per_lun = ATA_SHT_CMD_PER_LUN, | ||
979 | .emulated = ATA_SHT_EMULATED, | ||
980 | .use_clustering = ATA_SHT_USE_CLUSTERING, | ||
981 | .proc_name = DRV_NAME, | ||
982 | .dma_boundary = ATA_DMA_BOUNDARY, | ||
983 | .slave_configure = ata_scsi_slave_config, | ||
984 | .slave_destroy = ata_scsi_slave_destroy, | ||
985 | .bios_param = ata_std_bios_param, | ||
986 | }; | 966 | }; |
987 | 967 | ||
988 | static const struct ata_port_operations scc_pata_ops = { | 968 | static struct ata_port_operations scc_pata_ops = { |
969 | .inherits = &ata_bmdma_port_ops, | ||
970 | |||
989 | .set_piomode = scc_set_piomode, | 971 | .set_piomode = scc_set_piomode, |
990 | .set_dmamode = scc_set_dmamode, | 972 | .set_dmamode = scc_set_dmamode, |
991 | .mode_filter = scc_mode_filter, | 973 | .mode_filter = scc_mode_filter, |
992 | 974 | ||
993 | .tf_load = scc_tf_load, | 975 | .sff_tf_load = scc_tf_load, |
994 | .tf_read = scc_tf_read, | 976 | .sff_tf_read = scc_tf_read, |
995 | .exec_command = scc_exec_command, | 977 | .sff_exec_command = scc_exec_command, |
996 | .check_status = scc_check_status, | 978 | .sff_check_status = scc_check_status, |
997 | .check_altstatus = scc_check_altstatus, | 979 | .sff_check_altstatus = scc_check_altstatus, |
998 | .dev_select = scc_std_dev_select, | 980 | .sff_dev_select = scc_dev_select, |
999 | 981 | ||
1000 | .bmdma_setup = scc_bmdma_setup, | 982 | .bmdma_setup = scc_bmdma_setup, |
1001 | .bmdma_start = scc_bmdma_start, | 983 | .bmdma_start = scc_bmdma_start, |
1002 | .bmdma_stop = scc_bmdma_stop, | 984 | .bmdma_stop = scc_bmdma_stop, |
1003 | .bmdma_status = scc_bmdma_status, | 985 | .bmdma_status = scc_bmdma_status, |
1004 | .data_xfer = scc_data_xfer, | 986 | .sff_data_xfer = scc_data_xfer, |
1005 | |||
1006 | .qc_prep = ata_qc_prep, | ||
1007 | .qc_issue = ata_qc_issue_prot, | ||
1008 | |||
1009 | .freeze = scc_bmdma_freeze, | ||
1010 | .thaw = ata_bmdma_thaw, | ||
1011 | 987 | ||
1012 | .error_handler = scc_error_handler, | 988 | .freeze = scc_freeze, |
989 | .prereset = scc_pata_prereset, | ||
990 | .softreset = scc_softreset, | ||
991 | .postreset = scc_postreset, | ||
1013 | .post_internal_cmd = scc_bmdma_stop, | 992 | .post_internal_cmd = scc_bmdma_stop, |
1014 | 993 | ||
1015 | .irq_clear = scc_bmdma_irq_clear, | 994 | .sff_irq_clear = scc_irq_clear, |
1016 | .irq_on = scc_irq_on, | 995 | .sff_irq_on = scc_irq_on, |
1017 | 996 | ||
1018 | .port_start = scc_port_start, | 997 | .port_start = scc_port_start, |
1019 | .port_stop = scc_port_stop, | 998 | .port_stop = scc_port_stop, |
@@ -1166,8 +1145,8 @@ static int scc_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | |||
1166 | if (rc) | 1145 | if (rc) |
1167 | return rc; | 1146 | return rc; |
1168 | 1147 | ||
1169 | return ata_host_activate(host, pdev->irq, ata_interrupt, IRQF_SHARED, | 1148 | return ata_host_activate(host, pdev->irq, ata_sff_interrupt, |
1170 | &scc_sht); | 1149 | IRQF_SHARED, &scc_sht); |
1171 | } | 1150 | } |
1172 | 1151 | ||
1173 | static struct pci_driver scc_pci_driver = { | 1152 | static struct pci_driver scc_pci_driver = { |