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Diffstat (limited to 'drivers/ata/pata_ninja32.c')
-rw-r--r--drivers/ata/pata_ninja32.c9
1 files changed, 7 insertions, 2 deletions
diff --git a/drivers/ata/pata_ninja32.c b/drivers/ata/pata_ninja32.c
index 1c1b83541d13..15dd649f89ee 100644
--- a/drivers/ata/pata_ninja32.c
+++ b/drivers/ata/pata_ninja32.c
@@ -17,6 +17,7 @@
17 * Base + 0x00 IRQ Status 17 * Base + 0x00 IRQ Status
18 * Base + 0x01 IRQ control 18 * Base + 0x01 IRQ control
19 * Base + 0x02 Chipset control 19 * Base + 0x02 Chipset control
20 * Base + 0x03 Unknown
20 * Base + 0x04 VDMA and reset control + wait bits 21 * Base + 0x04 VDMA and reset control + wait bits
21 * Base + 0x08 BMIMBA 22 * Base + 0x08 BMIMBA
22 * Base + 0x0C DMA Length 23 * Base + 0x0C DMA Length
@@ -174,8 +175,12 @@ static int ninja32_init_one(struct pci_dev *dev, const struct pci_device_id *id)
174 ata_std_ports(&ap->ioaddr); 175 ata_std_ports(&ap->ioaddr);
175 176
176 iowrite8(0x05, base + 0x01); /* Enable interrupt lines */ 177 iowrite8(0x05, base + 0x01); /* Enable interrupt lines */
177 iowrite8(0xB3, base + 0x02); /* Burst, ?? setup */ 178 iowrite8(0xBE, base + 0x02); /* Burst, ?? setup */
178 iowrite8(0x00, base + 0x04); /* WAIT0 ? */ 179 iowrite8(0x01, base + 0x03); /* Unknown */
180 iowrite8(0x20, base + 0x04); /* WAIT0 */
181 iowrite8(0x8f, base + 0x05); /* Unknown */
182 iowrite8(0xa4, base + 0x1c); /* Unknown */
183 iowrite8(0x83, base + 0x1d); /* BMDMA control: WAIT0 */
179 /* FIXME: Should we disable them at remove ? */ 184 /* FIXME: Should we disable them at remove ? */
180 return ata_host_activate(host, dev->irq, ata_interrupt, 185 return ata_host_activate(host, dev->irq, ata_interrupt,
181 IRQF_SHARED, &ninja32_sht); 186 IRQF_SHARED, &ninja32_sht);