1 files changed, 31 insertions, 38 deletions

diff --git a/drivers/ata/pata_hpt3x2n.c b/drivers/ata/pata_hpt3x2n.c
index 269b5dbe51bb..b131c8f824d7 100644
--- a/drivers/ata/pata_hpt3x2n.c
+++ b/drivers/ata/pata_hpt3x2n.c
@@ -25,7 +25,7 @@
 #include <linux/libata.h>
 
 #define DRV_NAME        "pata_hpt3x2n"
-#define DRV_VERSION     "0.3.9"
+#define DRV_VERSION     "0.3.10"
 
 enum {
         HPT_PCI_FAST    =       (1 << 31),
@@ -161,20 +161,12 @@ static int hpt3x2n_pre_reset(struct ata_link *link, unsigned long deadline)
         return ata_sff_prereset(link, deadline);
 }
 
-/**
- *      hpt3x2n_set_piomode             -       PIO setup
- *      @ap: ATA interface
- *      @adev: device on the interface
- *
- *      Perform PIO mode setup.
- */
-
-static void hpt3x2n_set_piomode(struct ata_port *ap, struct ata_device *adev)
+static void hpt3x2n_set_mode(struct ata_port *ap, struct ata_device *adev,
+                             u8 mode)
 {
         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
         u32 addr1, addr2;
-        u32 reg;
-        u32 mode;
+        u32 reg, timing, mask;
         u8 fast;
 
         addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no);
@@ -185,11 +177,32 @@ static void hpt3x2n_set_piomode(struct ata_port *ap, struct ata_device *adev)
         fast &= ~0x07;
         pci_write_config_byte(pdev, addr2, fast);
 
+        /* Determine timing mask and find matching mode entry */
+        if (mode < XFER_MW_DMA_0)
+                mask = 0xcfc3ffff;
+        else if (mode < XFER_UDMA_0)
+                mask = 0x31c001ff;
+        else
+                mask = 0x303c0000;
+
+        timing = hpt3x2n_find_mode(ap, mode);
+
         pci_read_config_dword(pdev, addr1, &reg);
-        mode = hpt3x2n_find_mode(ap, adev->pio_mode);
-        mode &= 0xCFC3FFFF;     /* Leave DMA bits alone */
-        reg &= ~0xCFC3FFFF;     /* Strip timing bits */
-        pci_write_config_dword(pdev, addr1, reg | mode);
+        reg = (reg & ~mask) | (timing & mask);
+        pci_write_config_dword(pdev, addr1, reg);
+}
+
+/**
+ *      hpt3x2n_set_piomode             -       PIO setup
+ *      @ap: ATA interface
+ *      @adev: device on the interface
+ *
+ *      Perform PIO mode setup.
+ */
+
+static void hpt3x2n_set_piomode(struct ata_port *ap, struct ata_device *adev)
+{
+        hpt3x2n_set_mode(ap, adev, adev->pio_mode);
 }
 
 /**
@@ -197,32 +210,12 @@ static void hpt3x2n_set_piomode(struct ata_port *ap, struct ata_device *adev)
  *      @ap: ATA interface
  *      @adev: Device being configured
  *
- *      Set up the channel for MWDMA or UDMA modes. Much the same as with
- *      PIO, load the mode number and then set MWDMA or UDMA flag.
+ *      Set up the channel for MWDMA or UDMA modes.
  */
 
 static void hpt3x2n_set_dmamode(struct ata_port *ap, struct ata_device *adev)
 {
-        struct pci_dev *pdev = to_pci_dev(ap->host->dev);
-        u32 addr1, addr2;
-        u32 reg, mode, mask;
-        u8 fast;
-
-        addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no);
-        addr2 = 0x51 + 4 * ap->port_no;
-
-        /* Fast interrupt prediction disable, hold off interrupt disable */
-        pci_read_config_byte(pdev, addr2, &fast);
-        fast &= ~0x07;
-        pci_write_config_byte(pdev, addr2, fast);
-
-        mask = adev->dma_mode < XFER_UDMA_0 ? 0x31C001FF : 0x303C0000;
-
-        pci_read_config_dword(pdev, addr1, &reg);
-        mode = hpt3x2n_find_mode(ap, adev->dma_mode);
-        mode &= mask;
-        reg &= ~mask;
-        pci_write_config_dword(pdev, addr1, reg | mode);
+        hpt3x2n_set_mode(ap, adev, adev->dma_mode);
 }
 
 /**