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path: root/drivers/ata/pata_cmd64x.c
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Diffstat (limited to 'drivers/ata/pata_cmd64x.c')
-rw-r--r--drivers/ata/pata_cmd64x.c137
1 files changed, 27 insertions, 110 deletions
diff --git a/drivers/ata/pata_cmd64x.c b/drivers/ata/pata_cmd64x.c
index 7acbbd9ee469..ddd09b7d98c9 100644
--- a/drivers/ata/pata_cmd64x.c
+++ b/drivers/ata/pata_cmd64x.c
@@ -266,120 +266,30 @@ static void cmd646r1_bmdma_stop(struct ata_queued_cmd *qc)
266} 266}
267 267
268static struct scsi_host_template cmd64x_sht = { 268static struct scsi_host_template cmd64x_sht = {
269 .module = THIS_MODULE, 269 ATA_BMDMA_SHT(DRV_NAME),
270 .name = DRV_NAME,
271 .ioctl = ata_scsi_ioctl,
272 .queuecommand = ata_scsi_queuecmd,
273 .can_queue = ATA_DEF_QUEUE,
274 .this_id = ATA_SHT_THIS_ID,
275 .sg_tablesize = LIBATA_MAX_PRD,
276 .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
277 .emulated = ATA_SHT_EMULATED,
278 .use_clustering = ATA_SHT_USE_CLUSTERING,
279 .proc_name = DRV_NAME,
280 .dma_boundary = ATA_DMA_BOUNDARY,
281 .slave_configure = ata_scsi_slave_config,
282 .slave_destroy = ata_scsi_slave_destroy,
283 .bios_param = ata_std_bios_param,
284}; 270};
285 271
286static struct ata_port_operations cmd64x_port_ops = { 272static const struct ata_port_operations cmd64x_base_ops = {
273 .inherits = &ata_bmdma_port_ops,
287 .set_piomode = cmd64x_set_piomode, 274 .set_piomode = cmd64x_set_piomode,
288 .set_dmamode = cmd64x_set_dmamode, 275 .set_dmamode = cmd64x_set_dmamode,
289 .mode_filter = ata_pci_default_filter,
290 .tf_load = ata_tf_load,
291 .tf_read = ata_tf_read,
292 .check_status = ata_check_status,
293 .exec_command = ata_exec_command,
294 .dev_select = ata_std_dev_select,
295
296 .freeze = ata_bmdma_freeze,
297 .thaw = ata_bmdma_thaw,
298 .error_handler = ata_bmdma_error_handler,
299 .post_internal_cmd = ata_bmdma_post_internal_cmd,
300 .cable_detect = ata_cable_40wire,
301
302 .bmdma_setup = ata_bmdma_setup,
303 .bmdma_start = ata_bmdma_start,
304 .bmdma_stop = ata_bmdma_stop,
305 .bmdma_status = ata_bmdma_status,
306
307 .qc_prep = ata_qc_prep,
308 .qc_issue = ata_qc_issue_prot,
309
310 .data_xfer = ata_data_xfer,
311
312 .irq_handler = ata_interrupt,
313 .irq_clear = ata_bmdma_irq_clear,
314 .irq_on = ata_irq_on,
315
316 .port_start = ata_port_start,
317}; 276};
318 277
319static struct ata_port_operations cmd646r1_port_ops = { 278static struct ata_port_operations cmd64x_port_ops = {
320 .set_piomode = cmd64x_set_piomode, 279 .inherits = &cmd64x_base_ops,
321 .set_dmamode = cmd64x_set_dmamode,
322 .mode_filter = ata_pci_default_filter,
323 .tf_load = ata_tf_load,
324 .tf_read = ata_tf_read,
325 .check_status = ata_check_status,
326 .exec_command = ata_exec_command,
327 .dev_select = ata_std_dev_select,
328
329 .freeze = ata_bmdma_freeze,
330 .thaw = ata_bmdma_thaw,
331 .error_handler = ata_bmdma_error_handler,
332 .post_internal_cmd = ata_bmdma_post_internal_cmd,
333 .cable_detect = ata_cable_40wire, 280 .cable_detect = ata_cable_40wire,
281};
334 282
335 .bmdma_setup = ata_bmdma_setup, 283static struct ata_port_operations cmd646r1_port_ops = {
336 .bmdma_start = ata_bmdma_start, 284 .inherits = &cmd64x_base_ops,
337 .bmdma_stop = cmd646r1_bmdma_stop, 285 .bmdma_stop = cmd646r1_bmdma_stop,
338 .bmdma_status = ata_bmdma_status, 286 .cable_detect = ata_cable_40wire,
339
340 .qc_prep = ata_qc_prep,
341 .qc_issue = ata_qc_issue_prot,
342
343 .data_xfer = ata_data_xfer,
344
345 .irq_handler = ata_interrupt,
346 .irq_clear = ata_bmdma_irq_clear,
347 .irq_on = ata_irq_on,
348
349 .port_start = ata_port_start,
350}; 287};
351 288
352static struct ata_port_operations cmd648_port_ops = { 289static struct ata_port_operations cmd648_port_ops = {
353 .set_piomode = cmd64x_set_piomode, 290 .inherits = &cmd64x_base_ops,
354 .set_dmamode = cmd64x_set_dmamode,
355 .mode_filter = ata_pci_default_filter,
356 .tf_load = ata_tf_load,
357 .tf_read = ata_tf_read,
358 .check_status = ata_check_status,
359 .exec_command = ata_exec_command,
360 .dev_select = ata_std_dev_select,
361
362 .freeze = ata_bmdma_freeze,
363 .thaw = ata_bmdma_thaw,
364 .error_handler = ata_bmdma_error_handler,
365 .post_internal_cmd = ata_bmdma_post_internal_cmd,
366 .cable_detect = cmd648_cable_detect,
367
368 .bmdma_setup = ata_bmdma_setup,
369 .bmdma_start = ata_bmdma_start,
370 .bmdma_stop = cmd648_bmdma_stop, 291 .bmdma_stop = cmd648_bmdma_stop,
371 .bmdma_status = ata_bmdma_status, 292 .cable_detect = cmd648_cable_detect,
372
373 .qc_prep = ata_qc_prep,
374 .qc_issue = ata_qc_issue_prot,
375
376 .data_xfer = ata_data_xfer,
377
378 .irq_handler = ata_interrupt,
379 .irq_clear = ata_bmdma_irq_clear,
380 .irq_on = ata_irq_on,
381
382 .port_start = ata_port_start,
383}; 293};
384 294
385static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id) 295static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
@@ -388,21 +298,18 @@ static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
388 298
389 static const struct ata_port_info cmd_info[6] = { 299 static const struct ata_port_info cmd_info[6] = {
390 { /* CMD 643 - no UDMA */ 300 { /* CMD 643 - no UDMA */
391 .sht = &cmd64x_sht,
392 .flags = ATA_FLAG_SLAVE_POSS, 301 .flags = ATA_FLAG_SLAVE_POSS,
393 .pio_mask = 0x1f, 302 .pio_mask = 0x1f,
394 .mwdma_mask = 0x07, 303 .mwdma_mask = 0x07,
395 .port_ops = &cmd64x_port_ops 304 .port_ops = &cmd64x_port_ops
396 }, 305 },
397 { /* CMD 646 with broken UDMA */ 306 { /* CMD 646 with broken UDMA */
398 .sht = &cmd64x_sht,
399 .flags = ATA_FLAG_SLAVE_POSS, 307 .flags = ATA_FLAG_SLAVE_POSS,
400 .pio_mask = 0x1f, 308 .pio_mask = 0x1f,
401 .mwdma_mask = 0x07, 309 .mwdma_mask = 0x07,
402 .port_ops = &cmd64x_port_ops 310 .port_ops = &cmd64x_port_ops
403 }, 311 },
404 { /* CMD 646 with working UDMA */ 312 { /* CMD 646 with working UDMA */
405 .sht = &cmd64x_sht,
406 .flags = ATA_FLAG_SLAVE_POSS, 313 .flags = ATA_FLAG_SLAVE_POSS,
407 .pio_mask = 0x1f, 314 .pio_mask = 0x1f,
408 .mwdma_mask = 0x07, 315 .mwdma_mask = 0x07,
@@ -410,14 +317,12 @@ static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
410 .port_ops = &cmd64x_port_ops 317 .port_ops = &cmd64x_port_ops
411 }, 318 },
412 { /* CMD 646 rev 1 */ 319 { /* CMD 646 rev 1 */
413 .sht = &cmd64x_sht,
414 .flags = ATA_FLAG_SLAVE_POSS, 320 .flags = ATA_FLAG_SLAVE_POSS,
415 .pio_mask = 0x1f, 321 .pio_mask = 0x1f,
416 .mwdma_mask = 0x07, 322 .mwdma_mask = 0x07,
417 .port_ops = &cmd646r1_port_ops 323 .port_ops = &cmd646r1_port_ops
418 }, 324 },
419 { /* CMD 648 */ 325 { /* CMD 648 */
420 .sht = &cmd64x_sht,
421 .flags = ATA_FLAG_SLAVE_POSS, 326 .flags = ATA_FLAG_SLAVE_POSS,
422 .pio_mask = 0x1f, 327 .pio_mask = 0x1f,
423 .mwdma_mask = 0x07, 328 .mwdma_mask = 0x07,
@@ -425,7 +330,6 @@ static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
425 .port_ops = &cmd648_port_ops 330 .port_ops = &cmd648_port_ops
426 }, 331 },
427 { /* CMD 649 */ 332 { /* CMD 649 */
428 .sht = &cmd64x_sht,
429 .flags = ATA_FLAG_SLAVE_POSS, 333 .flags = ATA_FLAG_SLAVE_POSS,
430 .pio_mask = 0x1f, 334 .pio_mask = 0x1f,
431 .mwdma_mask = 0x07, 335 .mwdma_mask = 0x07,
@@ -435,12 +339,17 @@ static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
435 }; 339 };
436 const struct ata_port_info *ppi[] = { &cmd_info[id->driver_data], NULL }; 340 const struct ata_port_info *ppi[] = { &cmd_info[id->driver_data], NULL };
437 u8 mrdmode; 341 u8 mrdmode;
342 int rc;
343
344 rc = pcim_enable_device(pdev);
345 if (rc)
346 return rc;
438 347
439 pci_read_config_dword(pdev, PCI_CLASS_REVISION, &class_rev); 348 pci_read_config_dword(pdev, PCI_CLASS_REVISION, &class_rev);
440 class_rev &= 0xFF; 349 class_rev &= 0xFF;
441 350
442 if (id->driver_data == 0) /* 643 */ 351 if (id->driver_data == 0) /* 643 */
443 ata_pci_clear_simplex(pdev); 352 ata_pci_bmdma_clear_simplex(pdev);
444 353
445 if (pdev->device == PCI_DEVICE_ID_CMD_646) { 354 if (pdev->device == PCI_DEVICE_ID_CMD_646) {
446 /* Does UDMA work ? */ 355 /* Does UDMA work ? */
@@ -464,13 +373,20 @@ static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
464 pci_write_config_byte(pdev, UDIDETCR0, 0xF0); 373 pci_write_config_byte(pdev, UDIDETCR0, 0xF0);
465#endif 374#endif
466 375
467 return ata_pci_init_one(pdev, ppi); 376 return ata_pci_sff_init_one(pdev, ppi, &cmd64x_sht, NULL);
468} 377}
469 378
470#ifdef CONFIG_PM 379#ifdef CONFIG_PM
471static int cmd64x_reinit_one(struct pci_dev *pdev) 380static int cmd64x_reinit_one(struct pci_dev *pdev)
472{ 381{
382 struct ata_host *host = dev_get_drvdata(&pdev->dev);
473 u8 mrdmode; 383 u8 mrdmode;
384 int rc;
385
386 rc = ata_pci_device_do_resume(pdev);
387 if (rc)
388 return rc;
389
474 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 64); 390 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 64);
475 pci_read_config_byte(pdev, MRDMODE, &mrdmode); 391 pci_read_config_byte(pdev, MRDMODE, &mrdmode);
476 mrdmode &= ~ 0x30; /* IRQ set up */ 392 mrdmode &= ~ 0x30; /* IRQ set up */
@@ -479,7 +395,8 @@ static int cmd64x_reinit_one(struct pci_dev *pdev)
479#ifdef CONFIG_PPC 395#ifdef CONFIG_PPC
480 pci_write_config_byte(pdev, UDIDETCR0, 0xF0); 396 pci_write_config_byte(pdev, UDIDETCR0, 0xF0);
481#endif 397#endif
482 return ata_pci_device_resume(pdev); 398 ata_host_resume(host);
399 return 0;
483} 400}
484#endif 401#endif
485 402