1 files changed, 19 insertions, 3 deletions

diff --git a/drivers/ata/pata_at91.c b/drivers/ata/pata_at91.c
index 0da0dcc7dd08..a5fdbdcb0faf 100644
--- a/drivers/ata/pata_at91.c
+++ b/drivers/ata/pata_at91.c
@@ -33,11 +33,12 @@
 
 
 #define DRV_NAME "pata_at91"
-#define DRV_VERSION "0.1"
+#define DRV_VERSION "0.2"
 
 #define CF_IDE_OFFSET       0x00c00000
 #define CF_ALT_IDE_OFFSET   0x00e00000
 #define CF_IDE_RES_SIZE     0x08
+#define NCS_RD_PULSE_LIMIT  0x3f /* maximal value for pulse bitfields */
 
 struct at91_ide_info {
         unsigned long mode;
@@ -49,8 +50,18 @@ struct at91_ide_info {
         void __iomem *alt_addr;
 };
 
-static const struct ata_timing initial_timing =
-        {XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0};
+static const struct ata_timing initial_timing = {
+        .mode           = XFER_PIO_0,
+        .setup          = 70,
+        .act8b          = 290,
+        .rec8b          = 240,
+        .cyc8b          = 600,
+        .active         = 165,
+        .recover        = 150,
+        .dmack_hold     = 0,
+        .cycle          = 600,
+        .udma           = 0
+};
 
 static unsigned long calc_mck_cycles(unsigned long ns, unsigned long mck_hz)
 {
@@ -109,6 +120,11 @@ static void set_smc_timing(struct device *dev,
         /* (CS0, CS1, DIR, OE) <= (CFCE1, CFCE2, CFRNW, NCSX) timings */
         ncs_read_setup = 1;
         ncs_read_pulse = read_cycle - 2;
+        if (ncs_read_pulse > NCS_RD_PULSE_LIMIT) {
+                ncs_read_pulse = NCS_RD_PULSE_LIMIT;
+                dev_warn(dev, "ncs_read_pulse limited to maximal value %lu\n",
+                        ncs_read_pulse);
+        }
 
         /* Write timings same as read timings */
         write_cycle = read_cycle;