diff options
Diffstat (limited to 'drivers/ata/ata_piix.c')
-rw-r--r-- | drivers/ata/ata_piix.c | 93 |
1 files changed, 64 insertions, 29 deletions
diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c index 328ce8a08426..483269db2c7d 100644 --- a/drivers/ata/ata_piix.c +++ b/drivers/ata/ata_piix.c | |||
@@ -119,18 +119,19 @@ enum { | |||
119 | PIIX_80C_SEC = (1 << 7) | (1 << 6), | 119 | PIIX_80C_SEC = (1 << 7) | (1 << 6), |
120 | 120 | ||
121 | /* controller IDs */ | 121 | /* controller IDs */ |
122 | piix_pata_33 = 0, /* PIIX4 at 33Mhz */ | 122 | piix_pata_mwdma = 0, /* PIIX3 MWDMA only */ |
123 | ich_pata_33 = 1, /* ICH up to UDMA 33 only */ | 123 | piix_pata_33, /* PIIX4 at 33Mhz */ |
124 | ich_pata_66 = 2, /* ICH up to 66 Mhz */ | 124 | ich_pata_33, /* ICH up to UDMA 33 only */ |
125 | ich_pata_100 = 3, /* ICH up to UDMA 100 */ | 125 | ich_pata_66, /* ICH up to 66 Mhz */ |
126 | ich5_sata = 5, | 126 | ich_pata_100, /* ICH up to UDMA 100 */ |
127 | ich6_sata = 6, | 127 | ich5_sata, |
128 | ich6_sata_ahci = 7, | 128 | ich6_sata, |
129 | ich6m_sata_ahci = 8, | 129 | ich6_sata_ahci, |
130 | ich8_sata_ahci = 9, | 130 | ich6m_sata_ahci, |
131 | piix_pata_mwdma = 10, /* PIIX3 MWDMA only */ | 131 | ich8_sata_ahci, |
132 | tolapai_sata_ahci = 11, | 132 | ich8_2port_sata, |
133 | ich9_2port_sata = 12, | 133 | ich8m_apple_sata_ahci, /* locks up on second port enable */ |
134 | tolapai_sata_ahci, | ||
134 | 135 | ||
135 | /* constants for mapping table */ | 136 | /* constants for mapping table */ |
136 | P0 = 0, /* port 0 */ | 137 | P0 = 0, /* port 0 */ |
@@ -239,19 +240,21 @@ static const struct pci_device_id piix_pci_tbl[] = { | |||
239 | /* SATA Controller 1 IDE (ICH8) */ | 240 | /* SATA Controller 1 IDE (ICH8) */ |
240 | { 0x8086, 0x2820, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci }, | 241 | { 0x8086, 0x2820, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci }, |
241 | /* SATA Controller 2 IDE (ICH8) */ | 242 | /* SATA Controller 2 IDE (ICH8) */ |
242 | { 0x8086, 0x2825, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich9_2port_sata }, | 243 | { 0x8086, 0x2825, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata }, |
243 | /* Mobile SATA Controller IDE (ICH8M) */ | 244 | /* Mobile SATA Controller IDE (ICH8M) */ |
244 | { 0x8086, 0x2828, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci }, | 245 | { 0x8086, 0x2828, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci }, |
246 | /* Mobile SATA Controller IDE (ICH8M), Apple */ | ||
247 | { 0x8086, 0x2828, 0x106b, 0x00a0, 0, 0, ich8m_apple_sata_ahci }, | ||
245 | /* SATA Controller IDE (ICH9) */ | 248 | /* SATA Controller IDE (ICH9) */ |
246 | { 0x8086, 0x2920, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci }, | 249 | { 0x8086, 0x2920, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci }, |
247 | /* SATA Controller IDE (ICH9) */ | 250 | /* SATA Controller IDE (ICH9) */ |
248 | { 0x8086, 0x2921, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich9_2port_sata }, | 251 | { 0x8086, 0x2921, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata }, |
249 | /* SATA Controller IDE (ICH9) */ | 252 | /* SATA Controller IDE (ICH9) */ |
250 | { 0x8086, 0x2926, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich9_2port_sata }, | 253 | { 0x8086, 0x2926, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata }, |
251 | /* SATA Controller IDE (ICH9M) */ | 254 | /* SATA Controller IDE (ICH9M) */ |
252 | { 0x8086, 0x2928, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich9_2port_sata }, | 255 | { 0x8086, 0x2928, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata }, |
253 | /* SATA Controller IDE (ICH9M) */ | 256 | /* SATA Controller IDE (ICH9M) */ |
254 | { 0x8086, 0x292d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich9_2port_sata }, | 257 | { 0x8086, 0x292d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata }, |
255 | /* SATA Controller IDE (ICH9M) */ | 258 | /* SATA Controller IDE (ICH9M) */ |
256 | { 0x8086, 0x292e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci }, | 259 | { 0x8086, 0x292e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci }, |
257 | /* SATA Controller IDE (Tolapai) */ | 260 | /* SATA Controller IDE (Tolapai) */ |
@@ -427,7 +430,7 @@ static const struct piix_map_db ich6m_map_db = { | |||
427 | 430 | ||
428 | static const struct piix_map_db ich8_map_db = { | 431 | static const struct piix_map_db ich8_map_db = { |
429 | .mask = 0x3, | 432 | .mask = 0x3, |
430 | .port_enable = 0x3, | 433 | .port_enable = 0xf, |
431 | .map = { | 434 | .map = { |
432 | /* PM PS SM SS MAP */ | 435 | /* PM PS SM SS MAP */ |
433 | { P0, P2, P1, P3 }, /* 00b (hardwired when in AHCI) */ | 436 | { P0, P2, P1, P3 }, /* 00b (hardwired when in AHCI) */ |
@@ -437,7 +440,7 @@ static const struct piix_map_db ich8_map_db = { | |||
437 | }, | 440 | }, |
438 | }; | 441 | }; |
439 | 442 | ||
440 | static const struct piix_map_db tolapai_map_db = { | 443 | static const struct piix_map_db ich8_2port_map_db = { |
441 | .mask = 0x3, | 444 | .mask = 0x3, |
442 | .port_enable = 0x3, | 445 | .port_enable = 0x3, |
443 | .map = { | 446 | .map = { |
@@ -449,7 +452,19 @@ static const struct piix_map_db tolapai_map_db = { | |||
449 | }, | 452 | }, |
450 | }; | 453 | }; |
451 | 454 | ||
452 | static const struct piix_map_db ich9_2port_map_db = { | 455 | static const struct piix_map_db ich8m_apple_map_db = { |
456 | .mask = 0x3, | ||
457 | .port_enable = 0x1, | ||
458 | .map = { | ||
459 | /* PM PS SM SS MAP */ | ||
460 | { P0, NA, NA, NA }, /* 00b */ | ||
461 | { RV, RV, RV, RV }, | ||
462 | { P0, P2, IDE, IDE }, /* 10b */ | ||
463 | { RV, RV, RV, RV }, | ||
464 | }, | ||
465 | }; | ||
466 | |||
467 | static const struct piix_map_db tolapai_map_db = { | ||
453 | .mask = 0x3, | 468 | .mask = 0x3, |
454 | .port_enable = 0x3, | 469 | .port_enable = 0x3, |
455 | .map = { | 470 | .map = { |
@@ -467,11 +482,21 @@ static const struct piix_map_db *piix_map_db_table[] = { | |||
467 | [ich6_sata_ahci] = &ich6_map_db, | 482 | [ich6_sata_ahci] = &ich6_map_db, |
468 | [ich6m_sata_ahci] = &ich6m_map_db, | 483 | [ich6m_sata_ahci] = &ich6m_map_db, |
469 | [ich8_sata_ahci] = &ich8_map_db, | 484 | [ich8_sata_ahci] = &ich8_map_db, |
485 | [ich8_2port_sata] = &ich8_2port_map_db, | ||
486 | [ich8m_apple_sata_ahci] = &ich8m_apple_map_db, | ||
470 | [tolapai_sata_ahci] = &tolapai_map_db, | 487 | [tolapai_sata_ahci] = &tolapai_map_db, |
471 | [ich9_2port_sata] = &ich9_2port_map_db, | ||
472 | }; | 488 | }; |
473 | 489 | ||
474 | static struct ata_port_info piix_port_info[] = { | 490 | static struct ata_port_info piix_port_info[] = { |
491 | [piix_pata_mwdma] = /* PIIX3 MWDMA only */ | ||
492 | { | ||
493 | .sht = &piix_sht, | ||
494 | .flags = PIIX_PATA_FLAGS, | ||
495 | .pio_mask = 0x1f, /* pio0-4 */ | ||
496 | .mwdma_mask = 0x06, /* mwdma1-2 ?? CHECK 0 should be ok but slow */ | ||
497 | .port_ops = &piix_pata_ops, | ||
498 | }, | ||
499 | |||
475 | [piix_pata_33] = /* PIIX4 at 33MHz */ | 500 | [piix_pata_33] = /* PIIX4 at 33MHz */ |
476 | { | 501 | { |
477 | .sht = &piix_sht, | 502 | .sht = &piix_sht, |
@@ -565,13 +590,15 @@ static struct ata_port_info piix_port_info[] = { | |||
565 | .port_ops = &piix_sata_ops, | 590 | .port_ops = &piix_sata_ops, |
566 | }, | 591 | }, |
567 | 592 | ||
568 | [piix_pata_mwdma] = /* PIIX3 MWDMA only */ | 593 | [ich8_2port_sata] = |
569 | { | 594 | { |
570 | .sht = &piix_sht, | 595 | .sht = &piix_sht, |
571 | .flags = PIIX_PATA_FLAGS, | 596 | .flags = PIIX_SATA_FLAGS | PIIX_FLAG_SCR | |
597 | PIIX_FLAG_AHCI, | ||
572 | .pio_mask = 0x1f, /* pio0-4 */ | 598 | .pio_mask = 0x1f, /* pio0-4 */ |
573 | .mwdma_mask = 0x06, /* mwdma1-2 ?? CHECK 0 should be ok but slow */ | 599 | .mwdma_mask = 0x07, /* mwdma0-2 */ |
574 | .port_ops = &piix_pata_ops, | 600 | .udma_mask = ATA_UDMA6, |
601 | .port_ops = &piix_sata_ops, | ||
575 | }, | 602 | }, |
576 | 603 | ||
577 | [tolapai_sata_ahci] = | 604 | [tolapai_sata_ahci] = |
@@ -585,7 +612,7 @@ static struct ata_port_info piix_port_info[] = { | |||
585 | .port_ops = &piix_sata_ops, | 612 | .port_ops = &piix_sata_ops, |
586 | }, | 613 | }, |
587 | 614 | ||
588 | [ich9_2port_sata] = | 615 | [ich8m_apple_sata_ahci] = |
589 | { | 616 | { |
590 | .sht = &piix_sht, | 617 | .sht = &piix_sht, |
591 | .flags = PIIX_SATA_FLAGS | PIIX_FLAG_SCR | | 618 | .flags = PIIX_SATA_FLAGS | PIIX_FLAG_SCR | |
@@ -595,6 +622,7 @@ static struct ata_port_info piix_port_info[] = { | |||
595 | .udma_mask = ATA_UDMA6, | 622 | .udma_mask = ATA_UDMA6, |
596 | .port_ops = &piix_sata_ops, | 623 | .port_ops = &piix_sata_ops, |
597 | }, | 624 | }, |
625 | |||
598 | }; | 626 | }; |
599 | 627 | ||
600 | static struct pci_bits piix_enable_bits[] = { | 628 | static struct pci_bits piix_enable_bits[] = { |
@@ -974,6 +1002,13 @@ static int piix_broken_suspend(void) | |||
974 | }, | 1002 | }, |
975 | }, | 1003 | }, |
976 | { | 1004 | { |
1005 | .ident = "SATELLITE U205", | ||
1006 | .matches = { | ||
1007 | DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), | ||
1008 | DMI_MATCH(DMI_PRODUCT_NAME, "SATELLITE U205"), | ||
1009 | }, | ||
1010 | }, | ||
1011 | { | ||
977 | .ident = "Portege M500", | 1012 | .ident = "Portege M500", |
978 | .matches = { | 1013 | .matches = { |
979 | DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), | 1014 | DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), |
@@ -1086,12 +1121,12 @@ static int piix_disable_ahci(struct pci_dev *pdev) | |||
1086 | if (!mmio) | 1121 | if (!mmio) |
1087 | return -ENOMEM; | 1122 | return -ENOMEM; |
1088 | 1123 | ||
1089 | tmp = readl(mmio + AHCI_GLOBAL_CTL); | 1124 | tmp = ioread32(mmio + AHCI_GLOBAL_CTL); |
1090 | if (tmp & AHCI_ENABLE) { | 1125 | if (tmp & AHCI_ENABLE) { |
1091 | tmp &= ~AHCI_ENABLE; | 1126 | tmp &= ~AHCI_ENABLE; |
1092 | writel(tmp, mmio + AHCI_GLOBAL_CTL); | 1127 | iowrite32(tmp, mmio + AHCI_GLOBAL_CTL); |
1093 | 1128 | ||
1094 | tmp = readl(mmio + AHCI_GLOBAL_CTL); | 1129 | tmp = ioread32(mmio + AHCI_GLOBAL_CTL); |
1095 | if (tmp & AHCI_ENABLE) | 1130 | if (tmp & AHCI_ENABLE) |
1096 | rc = -EIO; | 1131 | rc = -EIO; |
1097 | } | 1132 | } |