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-rw-r--r--drivers/ata/ata_piix.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c
index cdec4ab3b159..0bc3fd6c3fdb 100644
--- a/drivers/ata/ata_piix.c
+++ b/drivers/ata/ata_piix.c
@@ -38,16 +38,16 @@
38 * Hardware documentation available at http://developer.intel.com/ 38 * Hardware documentation available at http://developer.intel.com/
39 * 39 *
40 * Documentation 40 * Documentation
41 * Publically available from Intel web site. Errata documentation 41 * Publicly available from Intel web site. Errata documentation
42 * is also publically available. As an aide to anyone hacking on this 42 * is also publicly available. As an aide to anyone hacking on this
43 * driver the list of errata that are relevant is below, going back to 43 * driver the list of errata that are relevant is below, going back to
44 * PIIX4. Older device documentation is now a bit tricky to find. 44 * PIIX4. Older device documentation is now a bit tricky to find.
45 * 45 *
46 * The chipsets all follow very much the same design. The original Triton 46 * The chipsets all follow very much the same design. The original Triton
47 * series chipsets do _not_ support independant device timings, but this 47 * series chipsets do _not_ support independent device timings, but this
48 * is fixed in Triton II. With the odd mobile exception the chips then 48 * is fixed in Triton II. With the odd mobile exception the chips then
49 * change little except in gaining more modes until SATA arrives. This 49 * change little except in gaining more modes until SATA arrives. This
50 * driver supports only the chips with independant timing (that is those 50 * driver supports only the chips with independent timing (that is those
51 * with SITRE and the 0x44 timing register). See pata_oldpiix and pata_mpiix 51 * with SITRE and the 0x44 timing register). See pata_oldpiix and pata_mpiix
52 * for the early chip drivers. 52 * for the early chip drivers.
53 * 53 *
@@ -122,7 +122,7 @@ enum {
122 P2 = 2, /* port 2 */ 122 P2 = 2, /* port 2 */
123 P3 = 3, /* port 3 */ 123 P3 = 3, /* port 3 */
124 IDE = -1, /* IDE */ 124 IDE = -1, /* IDE */
125 NA = -2, /* not avaliable */ 125 NA = -2, /* not available */
126 RV = -3, /* reserved */ 126 RV = -3, /* reserved */
127 127
128 PIIX_AHCI_DEVICE = 6, 128 PIIX_AHCI_DEVICE = 6,