1 files changed, 16 insertions, 0 deletions

diff --git a/drivers/ata/ahci.h b/drivers/ata/ahci.h
index 57eb1c212a4c..9be471200a07 100644
--- a/drivers/ata/ahci.h
+++ b/drivers/ata/ahci.h
@@ -35,6 +35,7 @@
 #ifndef _AHCI_H
 #define _AHCI_H
 
+#include <linux/clk.h>
 #include <linux/libata.h>
 
 /* Enclosure Management Control */
@@ -115,6 +116,9 @@ enum {
         HOST_CAP2_BOH           = (1 << 0),  /* BIOS/OS handoff supported */
         HOST_CAP2_NVMHCI        = (1 << 1),  /* NVMHCI supported */
         HOST_CAP2_APST          = (1 << 2),  /* Automatic partial to slumber */
+        HOST_CAP2_SDS           = (1 << 3),  /* Support device sleep */
+        HOST_CAP2_SADM          = (1 << 4),  /* Support aggressive DevSlp */
+        HOST_CAP2_DESO          = (1 << 5),  /* DevSlp from slumber only */
 
         /* registers for each SATA port */
         PORT_LST_ADDR           = 0x00, /* command list DMA addr */
@@ -133,6 +137,7 @@ enum {
         PORT_SCR_ACT            = 0x34, /* SATA phy register: SActive */
         PORT_SCR_NTF            = 0x3c, /* SATA phy register: SNotification */
         PORT_FBS                = 0x40, /* FIS-based Switching */
+        PORT_DEVSLP             = 0x44, /* device sleep */
 
         /* PORT_IRQ_{STAT,MASK} bits */
         PORT_IRQ_COLD_PRES      = (1 << 31), /* cold presence detect */
@@ -186,6 +191,7 @@ enum {
         PORT_CMD_ICC_PARTIAL    = (0x2 << 28), /* Put i/f in partial state */
         PORT_CMD_ICC_SLUMBER    = (0x6 << 28), /* Put i/f in slumber state */
 
+        /* PORT_FBS bits */
         PORT_FBS_DWE_OFFSET     = 16, /* FBS device with error offset */
         PORT_FBS_ADO_OFFSET     = 12, /* FBS active dev optimization offset */
         PORT_FBS_DEV_OFFSET     = 8,  /* FBS device to issue offset */
@@ -194,6 +200,15 @@ enum {
         PORT_FBS_DEC            = (1 << 1), /* FBS device error clear */
         PORT_FBS_EN             = (1 << 0), /* Enable FBS */
 
+        /* PORT_DEVSLP bits */
+        PORT_DEVSLP_DM_OFFSET   = 25,             /* DITO multiplier offset */
+        PORT_DEVSLP_DM_MASK     = (0xf << 25),    /* DITO multiplier mask */
+        PORT_DEVSLP_DITO_OFFSET = 15,             /* DITO offset */
+        PORT_DEVSLP_MDAT_OFFSET = 10,             /* Minimum assertion time */
+        PORT_DEVSLP_DETO_OFFSET = 2,              /* DevSlp exit timeout */
+        PORT_DEVSLP_DSP         = (1 << 1),       /* DevSlp present */
+        PORT_DEVSLP_ADSE        = (1 << 0),       /* Aggressive DevSlp enable */
+
         /* hpriv->flags bits */
 
 #define AHCI_HFLAGS(flags)              .private_data   = (void *)(flags)
@@ -302,6 +317,7 @@ struct ahci_host_priv {
         u32                     em_loc; /* enclosure management location */
         u32                     em_buf_sz;      /* EM buffer size in byte */
         u32                     em_msg_type;    /* EM message type */
+        struct clk              *clk;           /* Only for platforms supporting clk */
 };
 
 extern int ahci_ignore_sss;