1 files changed, 102 insertions, 30 deletions

diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index e3a92a6da39a..c81d809c111b 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -61,6 +61,7 @@ enum board_ids {
         /* board IDs by feature in alphabetical order */
         board_ahci,
         board_ahci_ign_iferr,
+        board_ahci_noncq,
         board_ahci_nosntf,
         board_ahci_yes_fbs,
 
@@ -83,6 +84,8 @@ enum board_ids {
 static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent);
 static int ahci_vt8251_hardreset(struct ata_link *link, unsigned int *class,
                                  unsigned long deadline);
+static void ahci_mcp89_apple_enable(struct pci_dev *pdev);
+static bool is_mcp89_apple(struct pci_dev *pdev);
 static int ahci_p5wdh_hardreset(struct ata_link *link, unsigned int *class,
                                 unsigned long deadline);
 #ifdef CONFIG_PM
@@ -119,6 +122,13 @@ static const struct ata_port_info ahci_port_info[] = {
                 .udma_mask      = ATA_UDMA6,
                 .port_ops       = &ahci_ops,
         },
+        [board_ahci_noncq] = {
+                AHCI_HFLAGS     (AHCI_HFLAG_NO_NCQ),
+                .flags          = AHCI_FLAG_COMMON,
+                .pio_mask       = ATA_PIO4,
+                .udma_mask      = ATA_UDMA6,
+                .port_ops       = &ahci_ops,
+        },
         [board_ahci_nosntf] = {
                 AHCI_HFLAGS     (AHCI_HFLAG_NO_SNTF),
                 .flags          = AHCI_FLAG_COMMON,
@@ -450,6 +460,12 @@ static const struct pci_device_id ahci_pci_tbl[] = {
         { PCI_VDEVICE(ASMEDIA, 0x0611), board_ahci },   /* ASM1061 */
         { PCI_VDEVICE(ASMEDIA, 0x0612), board_ahci },   /* ASM1062 */
 
+        /*
+         * Samsung SSDs found on some macbooks.  NCQ times out.
+         * https://bugzilla.kernel.org/show_bug.cgi?id=60731
+         */
+        { PCI_VDEVICE(SAMSUNG, 0x1600), board_ahci_noncq },
+
         /* Enmotus */
         { PCI_DEVICE(0x1c44, 0x8000), board_ahci },
 
@@ -664,6 +680,10 @@ static int ahci_pci_device_resume(struct pci_dev *pdev)
         if (rc)
                 return rc;
 
+        /* Apple BIOS helpfully mangles the registers on resume */
+        if (is_mcp89_apple(pdev))
+                ahci_mcp89_apple_enable(pdev);
+
         if (pdev->dev.power.power_state.event == PM_EVENT_SUSPEND) {
                 rc = ahci_pci_reset_controller(host);
                 if (rc)
@@ -780,6 +800,48 @@ static void ahci_p5wdh_workaround(struct ata_host *host)
         }
 }
 
+/*
+ * Macbook7,1 firmware forcibly disables MCP89 AHCI and changes PCI ID when
+ * booting in BIOS compatibility mode.  We restore the registers but not ID.
+ */
+static void ahci_mcp89_apple_enable(struct pci_dev *pdev)
+{
+        u32 val;
+
+        printk(KERN_INFO "ahci: enabling MCP89 AHCI mode\n");
+
+        pci_read_config_dword(pdev, 0xf8, &val);
+        val |= 1 << 0x1b;
+        /* the following changes the device ID, but appears not to affect function */
+        /* val = (val & ~0xf0000000) | 0x80000000; */
+        pci_write_config_dword(pdev, 0xf8, val);
+
+        pci_read_config_dword(pdev, 0x54c, &val);
+        val |= 1 << 0xc;
+        pci_write_config_dword(pdev, 0x54c, val);
+
+        pci_read_config_dword(pdev, 0x4a4, &val);
+        val &= 0xff;
+        val |= 0x01060100;
+        pci_write_config_dword(pdev, 0x4a4, val);
+
+        pci_read_config_dword(pdev, 0x54c, &val);
+        val &= ~(1 << 0xc);
+        pci_write_config_dword(pdev, 0x54c, val);
+
+        pci_read_config_dword(pdev, 0xf8, &val);
+        val &= ~(1 << 0x1b);
+        pci_write_config_dword(pdev, 0xf8, val);
+}
+
+static bool is_mcp89_apple(struct pci_dev *pdev)
+{
+        return pdev->vendor == PCI_VENDOR_ID_NVIDIA &&
+                pdev->device == PCI_DEVICE_ID_NVIDIA_NFORCE_MCP89_SATA &&
+                pdev->subsystem_vendor == PCI_VENDOR_ID_APPLE &&
+                pdev->subsystem_device == 0xcb89;
+}
+
 /* only some SB600 ahci controllers can do 64bit DMA */
 static bool ahci_sb600_enable_64bit(struct pci_dev *pdev)
 {
@@ -1100,26 +1162,42 @@ static inline void ahci_gtf_filter_workaround(struct ata_host *host)
 {}
 #endif
 
-int ahci_init_interrupts(struct pci_dev *pdev, struct ahci_host_priv *hpriv)
+static int ahci_init_interrupts(struct pci_dev *pdev, unsigned int n_ports,
+                         struct ahci_host_priv *hpriv)
 {
-        int rc;
-        unsigned int maxvec;
+        int rc, nvec;
 
-        if (!(hpriv->flags & AHCI_HFLAG_NO_MSI)) {
-                rc = pci_enable_msi_block_auto(pdev, &maxvec);
-                if (rc > 0) {
-                        if ((rc == maxvec) || (rc == 1))
-                                return rc;
-                        /*
-                         * Assume that advantage of multipe MSIs is negated,
-                         * so fallback to single MSI mode to save resources
-                         */
-                        pci_disable_msi(pdev);
-                        if (!pci_enable_msi(pdev))
-                                return 1;
-                }
-        }
+        if (hpriv->flags & AHCI_HFLAG_NO_MSI)
+                goto intx;
+
+        rc = pci_msi_vec_count(pdev);
+        if (rc < 0)
+                goto intx;
+
+        /*
+         * If number of MSIs is less than number of ports then Sharing Last
+         * Message mode could be enforced. In this case assume that advantage
+         * of multipe MSIs is negated and use single MSI mode instead.
+         */
+        if (rc < n_ports)
+                goto single_msi;
+
+        nvec = rc;
+        rc = pci_enable_msi_block(pdev, nvec);
+        if (rc < 0)
+                goto intx;
+        else if (rc > 0)
+                goto single_msi;
+
+        return nvec;
 
+single_msi:
+        rc = pci_enable_msi(pdev);
+        if (rc)
+                goto intx;
+        return 1;
+
+intx:
         pci_intx(pdev, 1);
         return 0;
 }
@@ -1212,15 +1290,9 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
         if (pdev->vendor == PCI_VENDOR_ID_MARVELL && !marvell_enable)
                 return -ENODEV;
 
-        /*
-         * For some reason, MCP89 on MacBook 7,1 doesn't work with
-         * ahci, use ata_generic instead.
-         */
-        if (pdev->vendor == PCI_VENDOR_ID_NVIDIA &&
-            pdev->device == PCI_DEVICE_ID_NVIDIA_NFORCE_MCP89_SATA &&
-            pdev->subsystem_vendor == PCI_VENDOR_ID_APPLE &&
-            pdev->subsystem_device == 0xcb89)
-                return -ENODEV;
+        /* Apple BIOS on MCP89 prevents us using AHCI */
+        if (is_mcp89_apple(pdev))
+                ahci_mcp89_apple_enable(pdev);
 
         /* Promise's PDC42819 is a SAS/SATA controller that has an AHCI mode.
          * At the moment, we can only use the AHCI mode. Let the users know
@@ -1286,10 +1358,6 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
 
         hpriv->mmio = pcim_iomap_table(pdev)[ahci_pci_bar];
 
-        n_msis = ahci_init_interrupts(pdev, hpriv);
-        if (n_msis > 1)
-                hpriv->flags |= AHCI_HFLAG_MULTI_MSI;
-
         /* save initial config */
         ahci_pci_save_initial_config(pdev, hpriv);
 
@@ -1344,6 +1412,10 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
          */
         n_ports = max(ahci_nr_ports(hpriv->cap), fls(hpriv->port_map));
 
+        n_msis = ahci_init_interrupts(pdev, n_ports, hpriv);
+        if (n_msis > 1)
+                hpriv->flags |= AHCI_HFLAG_MULTI_MSI;
+
         host = ata_host_alloc_pinfo(&pdev->dev, ppi, n_ports);
         if (!host)
                 return -ENOMEM;