81 files changed, 508 insertions, 398 deletions
diff --git a/arch/alpha/include/asm/futex.h b/arch/alpha/include/asm/futex.h
index e8a761aee088..f939794363ac 100644
--- a/arch/alpha/include/asm/futex.h
+++ b/arch/alpha/include/asm/futex.h
@@ -108,7 +108,7 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
        "       lda     $31,3b-2b(%0)\n"
        "       .previous\n"
        :       "+r"(ret), "=&r"(prev), "=&r"(cmp)
-        :       "r"(uaddr), "r"((long)oldval), "r"(newval)
+        :       "r"(uaddr), "r"((long)(int)oldval), "r"(newval)
        :       "memory");
        *uval = prev;
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 1655c0734d72..9673bbad16f6 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1283,7 +1283,7 @@ config ARM_ERRATA_743622
        depends on CPU_V7
        help
          This option enables the workaround for the 743622 Cortex-A9
-          (r2p0..r2p2) erratum. Under very rare conditions, a faulty
+          (r2p*) erratum. Under very rare conditions, a faulty
          optimisation in the Cortex-A9 Store Buffer may lead to data
          corruption. This workaround sets a specific bit in the diagnostic
          register of the Cortex-A9 which disables the Store Buffer
diff --git a/arch/arm/boot/.gitignore b/arch/arm/boot/.gitignore
index ce1c5ff746e7..3c79f85975aa 100644
--- a/arch/arm/boot/.gitignore
+++ b/arch/arm/boot/.gitignore
@@ -3,3 +3,4 @@ zImage
 xipImage
 bootpImage
 uImage
+*.dtb
diff --git a/arch/arm/include/asm/pmu.h b/arch/arm/include/asm/pmu.h
index b5a5be2536c1..90114faa9f3c 100644
--- a/arch/arm/include/asm/pmu.h
+++ b/arch/arm/include/asm/pmu.h
@@ -134,7 +134,7 @@ int __init armpmu_register(struct arm_pmu *armpmu, char *name, int type);
 u64 armpmu_event_update(struct perf_event *event,
                        struct hw_perf_event *hwc,
-                        int idx, int overflow);
+                        int idx);
 int armpmu_event_set_period(struct perf_event *event,
                            struct hw_perf_event *hwc,
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile
index 43b740d0e374..f16d7652f34b 100644
--- a/arch/arm/kernel/Makefile
+++ b/arch/arm/kernel/Makefile
@@ -62,9 +62,6 @@ obj-$(CONFIG_SWP_EMULATE)	+= swp_emulate.o
 CFLAGS_swp_emulate.o            := -Wa,-march=armv7-a
 obj-$(CONFIG_HAVE_HW_BREAKPOINT)        += hw_breakpoint.o
-obj-$(CONFIG_CRUNCH)            += crunch.o crunch-bits.o
-AFLAGS_crunch-bits.o            := -Wa,-mcpu=ep9312
 obj-$(CONFIG_CPU_XSCALE)        += xscale-cp0.o
 obj-$(CONFIG_CPU_XSC3)          += xscale-cp0.o
 obj-$(CONFIG_CPU_MOHAWK)        += xscale-cp0.o
diff --git a/arch/arm/kernel/ecard.c b/arch/arm/kernel/ecard.c
index 4dd0edab6a65..1651d4950744 100644
--- a/arch/arm/kernel/ecard.c
+++ b/arch/arm/kernel/ecard.c
@@ -242,6 +242,7 @@ static void ecard_init_pgtables(struct mm_struct *mm)
        memcpy(dst_pgd, src_pgd, sizeof(pgd_t) * (EASI_SIZE / PGDIR_SIZE));
+        vma.vm_flags = VM_EXEC;
        vma.vm_mm = mm;
        flush_tlb_range(&vma, IO_START, IO_START + IO_SIZE);
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index 5bb91bf3d47f..b2abfa18f137 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -180,7 +180,7 @@ armpmu_event_set_period(struct perf_event *event,
 u64
 armpmu_event_update(struct perf_event *event,
                    struct hw_perf_event *hwc,
-                    int idx, int overflow)
+                    int idx)
 {
        struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
        u64 delta, prev_raw_count, new_raw_count;
@@ -193,13 +193,7 @@ again:
                             new_raw_count) != prev_raw_count)
                goto again;
-        new_raw_count &= armpmu->max_period;
+        delta = (new_raw_count - prev_raw_count) & armpmu->max_period;
-        prev_raw_count &= armpmu->max_period;
-        if (overflow)
-                delta = armpmu->max_period - prev_raw_count + new_raw_count + 1;
-        else
-                delta = new_raw_count - prev_raw_count;
        local64_add(delta, &event->count);
        local64_sub(delta, &hwc->period_left);
@@ -216,7 +210,7 @@ armpmu_read(struct perf_event *event)
        if (hwc->idx < 0)
                return;
-        armpmu_event_update(event, hwc, hwc->idx, 0);
+        armpmu_event_update(event, hwc, hwc->idx);
 }
 static void
@@ -232,7 +226,7 @@ armpmu_stop(struct perf_event *event, int flags)
        if (!(hwc->state & PERF_HES_STOPPED)) {
                armpmu->disable(hwc, hwc->idx);
                barrier(); /* why? */
-                armpmu_event_update(event, hwc, hwc->idx, 0);
+                armpmu_event_update(event, hwc, hwc->idx);
                hwc->state |= PERF_HES_STOPPED | PERF_HES_UPTODATE;
        }
 }
@@ -518,7 +512,13 @@ __hw_perf_event_init(struct perf_event *event)
        hwc->config_base            |= (unsigned long)mapping;
        if (!hwc->sample_period) {
-                hwc->sample_period  = armpmu->max_period;
+                /*
+                 * For non-sampling runs, limit the sample_period to half
+                 * of the counter width. That way, the new counter value
+                 * is far less likely to overtake the previous one unless
+                 * you have some serious IRQ latency issues.
+                 */
+                hwc->sample_period  = armpmu->max_period >> 1;
                hwc->last_period    = hwc->sample_period;
                local64_set(&hwc->period_left, hwc->sample_period);
        }
@@ -680,6 +680,28 @@ static void __init cpu_pmu_init(struct arm_pmu *armpmu)
 }
 /*
+ * PMU hardware loses all context when a CPU goes offline.
+ * When a CPU is hotplugged back in, since some hardware registers are
+ * UNKNOWN at reset, the PMU must be explicitly reset to avoid reading
+ * junk values out of them.
+ */
+static int __cpuinit pmu_cpu_notify(struct notifier_block *b,
+                                        unsigned long action, void *hcpu)
+{
+        if ((action & ~CPU_TASKS_FROZEN) != CPU_STARTING)
+                return NOTIFY_DONE;
+        if (cpu_pmu && cpu_pmu->reset)
+                cpu_pmu->reset(NULL);
+        return NOTIFY_OK;
+}
+static struct notifier_block __cpuinitdata pmu_cpu_notifier = {
+        .notifier_call = pmu_cpu_notify,
+};
+/*
 * CPU PMU identification and registration.
 */
 static int __init
@@ -730,6 +752,7 @@ init_hw_perf_events(void)
                pr_info("enabled with %s PMU driver, %d counters available\n",
                        cpu_pmu->name, cpu_pmu->num_events);
                cpu_pmu_init(cpu_pmu);
+                register_cpu_notifier(&pmu_cpu_notifier);
                armpmu_register(cpu_pmu, "cpu", PERF_TYPE_RAW);
        } else {
                pr_info("no hardware support available\n");
diff --git a/arch/arm/kernel/perf_event_v6.c b/arch/arm/kernel/perf_event_v6.c
index 533be9930ec2..b78af0cc6ef3 100644
--- a/arch/arm/kernel/perf_event_v6.c
+++ b/arch/arm/kernel/perf_event_v6.c
@@ -467,23 +467,6 @@ armv6pmu_enable_event(struct hw_perf_event *hwc,
        raw_spin_unlock_irqrestore(&events->pmu_lock, flags);
 }
-static int counter_is_active(unsigned long pmcr, int idx)
-{
-        unsigned long mask = 0;
-        if (idx == ARMV6_CYCLE_COUNTER)
-                mask = ARMV6_PMCR_CCOUNT_IEN;
-        else if (idx == ARMV6_COUNTER0)
-                mask = ARMV6_PMCR_COUNT0_IEN;
-        else if (idx == ARMV6_COUNTER1)
-                mask = ARMV6_PMCR_COUNT1_IEN;
-        if (mask)
-                return pmcr & mask;
-        WARN_ONCE(1, "invalid counter number (%d)\n", idx);
-        return 0;
-}
 static irqreturn_t
 armv6pmu_handle_irq(int irq_num,
                    void *dev)
@@ -513,7 +496,8 @@ armv6pmu_handle_irq(int irq_num,
                struct perf_event *event = cpuc->events[idx];
                struct hw_perf_event *hwc;
-                if (!counter_is_active(pmcr, idx))
+                /* Ignore if we don't have an event. */
+                if (!event)
                        continue;
                /*
@@ -524,7 +508,7 @@ armv6pmu_handle_irq(int irq_num,
                        continue;
                hwc = &event->hw;
-                armpmu_event_update(event, hwc, idx, 1);
+                armpmu_event_update(event, hwc, idx);
                data.period = event->hw.last_period;
                if (!armpmu_event_set_period(event, hwc, idx))
                        continue;
diff --git a/arch/arm/kernel/perf_event_v7.c b/arch/arm/kernel/perf_event_v7.c
index 6933244c68f9..4d7095af2ab3 100644
--- a/arch/arm/kernel/perf_event_v7.c
+++ b/arch/arm/kernel/perf_event_v7.c
@@ -809,6 +809,11 @@ static inline int armv7_pmnc_disable_intens(int idx)
        counter = ARMV7_IDX_TO_COUNTER(idx);
        asm volatile("mcr p15, 0, %0, c9, c14, 2" : : "r" (BIT(counter)));
+        isb();
+        /* Clear the overflow flag in case an interrupt is pending. */
+        asm volatile("mcr p15, 0, %0, c9, c12, 3" : : "r" (BIT(counter)));
+        isb();
        return idx;
 }
@@ -955,6 +960,10 @@ static irqreturn_t armv7pmu_handle_irq(int irq_num, void *dev)
                struct perf_event *event = cpuc->events[idx];
                struct hw_perf_event *hwc;
+                /* Ignore if we don't have an event. */
+                if (!event)
+                        continue;
                /*
                 * We have a single interrupt for all counters. Check that
                 * each counter has overflowed before we process it.
@@ -963,7 +972,7 @@ static irqreturn_t armv7pmu_handle_irq(int irq_num, void *dev)
                        continue;
                hwc = &event->hw;
-                armpmu_event_update(event, hwc, idx, 1);
+                armpmu_event_update(event, hwc, idx);
                data.period = event->hw.last_period;
                if (!armpmu_event_set_period(event, hwc, idx))
                        continue;
diff --git a/arch/arm/kernel/perf_event_xscale.c b/arch/arm/kernel/perf_event_xscale.c
index 3b99d8269829..71a21e6712f5 100644
--- a/arch/arm/kernel/perf_event_xscale.c
+++ b/arch/arm/kernel/perf_event_xscale.c
@@ -255,11 +255,14 @@ xscale1pmu_handle_irq(int irq_num, void *dev)
                struct perf_event *event = cpuc->events[idx];
                struct hw_perf_event *hwc;
+                if (!event)
+                        continue;
                if (!xscale1_pmnc_counter_has_overflowed(pmnc, idx))
                        continue;
                hwc = &event->hw;
-                armpmu_event_update(event, hwc, idx, 1);
+                armpmu_event_update(event, hwc, idx);
                data.period = event->hw.last_period;
                if (!armpmu_event_set_period(event, hwc, idx))
                        continue;
@@ -592,11 +595,14 @@ xscale2pmu_handle_irq(int irq_num, void *dev)
                struct perf_event *event = cpuc->events[idx];
                struct hw_perf_event *hwc;
-                if (!xscale2_pmnc_counter_has_overflowed(pmnc, idx))
+                if (!event)
+                        continue;
+                if (!xscale2_pmnc_counter_has_overflowed(of_flags, idx))
                        continue;
                hwc = &event->hw;
-                armpmu_event_update(event, hwc, idx, 1);
+                armpmu_event_update(event, hwc, idx);
                data.period = event->hw.last_period;
                if (!armpmu_event_set_period(event, hwc, idx))
                        continue;
@@ -663,7 +669,7 @@ xscale2pmu_enable_event(struct hw_perf_event *hwc, int idx)
 static void
 xscale2pmu_disable_event(struct hw_perf_event *hwc, int idx)
 {
-        unsigned long flags, ien, evtsel;
+        unsigned long flags, ien, evtsel, of_flags;
        struct pmu_hw_events *events = cpu_pmu->get_hw_events();
        ien = xscale2pmu_read_int_enable();
@@ -672,26 +678,31 @@ xscale2pmu_disable_event(struct hw_perf_event *hwc, int idx)
        switch (idx) {
        case XSCALE_CYCLE_COUNTER:
                ien &= ~XSCALE2_CCOUNT_INT_EN;
+                of_flags = XSCALE2_CCOUNT_OVERFLOW;
                break;
        case XSCALE_COUNTER0:
                ien &= ~XSCALE2_COUNT0_INT_EN;
                evtsel &= ~XSCALE2_COUNT0_EVT_MASK;
                evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT0_EVT_SHFT;
+                of_flags = XSCALE2_COUNT0_OVERFLOW;
                break;
        case XSCALE_COUNTER1:
                ien &= ~XSCALE2_COUNT1_INT_EN;
                evtsel &= ~XSCALE2_COUNT1_EVT_MASK;
                evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT1_EVT_SHFT;
+                of_flags = XSCALE2_COUNT1_OVERFLOW;
                break;
        case XSCALE_COUNTER2:
                ien &= ~XSCALE2_COUNT2_INT_EN;
                evtsel &= ~XSCALE2_COUNT2_EVT_MASK;
                evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT2_EVT_SHFT;
+                of_flags = XSCALE2_COUNT2_OVERFLOW;
                break;
        case XSCALE_COUNTER3:
                ien &= ~XSCALE2_COUNT3_INT_EN;
                evtsel &= ~XSCALE2_COUNT3_EVT_MASK;
                evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT3_EVT_SHFT;
+                of_flags = XSCALE2_COUNT3_OVERFLOW;
                break;
        default:
                WARN_ONCE(1, "invalid counter number (%d)\n", idx);
@@ -701,6 +712,7 @@ xscale2pmu_disable_event(struct hw_perf_event *hwc, int idx)
        raw_spin_lock_irqsave(&events->pmu_lock, flags);
        xscale2pmu_write_event_select(evtsel);
        xscale2pmu_write_int_enable(ien);
+        xscale2pmu_write_overflow_flags(of_flags);
        raw_spin_unlock_irqrestore(&events->pmu_lock, flags);
 }
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index b7582dd10dc3..96e2adcd5a84 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -38,10 +38,6 @@
 #if defined(CONFIG_AT_HDMAC) || defined(CONFIG_AT_HDMAC_MODULE)
 static u64 hdmac_dmamask = DMA_BIT_MASK(32);
-static struct at_dma_platform_data atdma_pdata = {
-        .nr_channels    = 8,
-};
 static struct resource hdmac_resources[] = {
        [0] = {
                .start  = AT91SAM9G45_BASE_DMA,
@@ -56,12 +52,11 @@ static struct resource hdmac_resources[] = {
 };
 static struct platform_device at_hdmac_device = {
-        .name           = "at_hdmac",
+        .name           = "at91sam9g45_dma",
        .id             = -1,
        .dev            = {
                                .dma_mask               = &hdmac_dmamask,
                                .coherent_dma_mask      = DMA_BIT_MASK(32),
-                                .platform_data          = &atdma_pdata,
        },
        .resource       = hdmac_resources,
        .num_resources  = ARRAY_SIZE(hdmac_resources),
@@ -69,9 +64,15 @@ static struct platform_device at_hdmac_device = {
 void __init at91_add_device_hdmac(void)
 {
-        dma_cap_set(DMA_MEMCPY, atdma_pdata.cap_mask);
+#if defined(CONFIG_OF)
-        dma_cap_set(DMA_SLAVE, atdma_pdata.cap_mask);
+        struct device_node *of_node =
-        platform_device_register(&at_hdmac_device);
+                of_find_node_by_name(NULL, "dma-controller");
+        if (of_node)
+                of_node_put(of_node);
+        else
+#endif
+                platform_device_register(&at_hdmac_device);
 }
 #else
 void __init at91_add_device_hdmac(void) {}
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c
index 61908dce9784..9be71c11d0f0 100644
--- a/arch/arm/mach-at91/at91sam9rl_devices.c
+++ b/arch/arm/mach-at91/at91sam9rl_devices.c
@@ -33,10 +33,6 @@
 #if defined(CONFIG_AT_HDMAC) || defined(CONFIG_AT_HDMAC_MODULE)
 static u64 hdmac_dmamask = DMA_BIT_MASK(32);
-static struct at_dma_platform_data atdma_pdata = {
-        .nr_channels    = 2,
-};
 static struct resource hdmac_resources[] = {
        [0] = {
                .start  = AT91SAM9RL_BASE_DMA,
@@ -51,12 +47,11 @@ static struct resource hdmac_resources[] = {
 };
 static struct platform_device at_hdmac_device = {
-        .name           = "at_hdmac",
+        .name           = "at91sam9rl_dma",
        .id             = -1,
        .dev            = {
                                .dma_mask               = &hdmac_dmamask,
                                .coherent_dma_mask      = DMA_BIT_MASK(32),
-                                .platform_data          = &atdma_pdata,
        },
        .resource       = hdmac_resources,
        .num_resources  = ARRAY_SIZE(hdmac_resources),
@@ -64,7 +59,6 @@ static struct platform_device at_hdmac_device = {
 void __init at91_add_device_hdmac(void)
 {
-        dma_cap_set(DMA_MEMCPY, atdma_pdata.cap_mask);
        platform_device_register(&at_hdmac_device);
 }
 #else
diff --git a/arch/arm/mach-ep93xx/Makefile b/arch/arm/mach-ep93xx/Makefile
index 574209d9e246..0dc51f9462de 100644
--- a/arch/arm/mach-ep93xx/Makefile
+++ b/arch/arm/mach-ep93xx/Makefile
@@ -8,6 +8,9 @@ obj-			:=
 obj-$(CONFIG_EP93XX_DMA)        += dma.o
+obj-$(CONFIG_CRUNCH)            += crunch.o crunch-bits.o
+AFLAGS_crunch-bits.o            := -Wa,-mcpu=ep9312
 obj-$(CONFIG_MACH_ADSSPHERE)    += adssphere.o
 obj-$(CONFIG_MACH_EDB93XX)      += edb93xx.o
 obj-$(CONFIG_MACH_GESBC9312)    += gesbc9312.o
diff --git a/arch/arm/mach-ep93xx/adssphere.c b/arch/arm/mach-ep93xx/adssphere.c
index 681e939407d4..2d45947a3034 100644
--- a/arch/arm/mach-ep93xx/adssphere.c
+++ b/arch/arm/mach-ep93xx/adssphere.c
@@ -20,6 +20,7 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
+#include "soc.h"
 static struct ep93xx_eth_data __initdata adssphere_eth_data = {
        .phy_id         = 1,
diff --git a/arch/arm/mach-ep93xx/clock.c b/arch/arm/mach-ep93xx/clock.c
index ca4de7105097..c95dbce2468e 100644
--- a/arch/arm/mach-ep93xx/clock.c
+++ b/arch/arm/mach-ep93xx/clock.c
@@ -25,6 +25,7 @@
 #include <asm/div64.h>
+#include "soc.h"
 struct clk {
        struct clk      *parent;
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index 903edb02fe4f..8d2589588713 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -46,6 +46,7 @@
 #include <asm/hardware/vic.h>
+#include "soc.h"
 /*************************************************************************
 * Static I/O mappings that are needed for all EP93xx platforms
@@ -204,7 +205,6 @@ void ep93xx_syscon_swlocked_write(unsigned int val, void __iomem *reg)
        spin_unlock_irqrestore(&syscon_swlock, flags);
 }
-EXPORT_SYMBOL(ep93xx_syscon_swlocked_write);
 void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits)
 {
@@ -221,7 +221,6 @@ void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits)
        spin_unlock_irqrestore(&syscon_swlock, flags);
 }
-EXPORT_SYMBOL(ep93xx_devcfg_set_clear);
 /**
 * ep93xx_chip_revision() - returns the EP93xx chip revision
@@ -648,9 +647,19 @@ static struct platform_device ep93xx_fb_device = {
        .resource               = ep93xx_fb_resource,
 };
+/* The backlight use a single register in the framebuffer's register space */
+#define EP93XX_RASTER_REG_BRIGHTNESS 0x20
+static struct resource ep93xx_bl_resources[] = {
+        DEFINE_RES_MEM(EP93XX_RASTER_PHYS_BASE +
+                       EP93XX_RASTER_REG_BRIGHTNESS, 0x04),
+};
 static struct platform_device ep93xx_bl_device = {
        .name           = "ep93xx-bl",
        .id             = -1,
+        .num_resources  = ARRAY_SIZE(ep93xx_bl_resources),
+        .resource       = ep93xx_bl_resources,
 };
 /**
@@ -783,23 +792,12 @@ void __init ep93xx_register_i2s(void)
 #define EP93XX_I2SCLKDIV_MASK           (EP93XX_SYSCON_I2SCLKDIV_ORIDE | \
                                         EP93XX_SYSCON_I2SCLKDIV_SPOL)
-int ep93xx_i2s_acquire(unsigned i2s_pins, unsigned i2s_config)
+int ep93xx_i2s_acquire(void)
 {
        unsigned val;
-        /* Sanity check */
+        ep93xx_devcfg_set_clear(EP93XX_SYSCON_DEVCFG_I2SONAC97,
-        if (i2s_pins & ~EP93XX_SYSCON_DEVCFG_I2S_MASK)
+                        EP93XX_SYSCON_DEVCFG_I2S_MASK);
-                return -EINVAL;
-        if (i2s_config & ~EP93XX_I2SCLKDIV_MASK)
-                return -EINVAL;
-        /* Must have only one of I2SONSSP/I2SONAC97 set */
-        if ((i2s_pins & EP93XX_SYSCON_DEVCFG_I2SONSSP) ==
-            (i2s_pins & EP93XX_SYSCON_DEVCFG_I2SONAC97))
-                return -EINVAL;
-        ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2S_MASK);
-        ep93xx_devcfg_set_bits(i2s_pins);
        /*
         * This is potentially racy with the clock api for i2s_mclk, sclk and 
@@ -809,7 +807,7 @@ int ep93xx_i2s_acquire(unsigned i2s_pins, unsigned i2s_config)
         */
        val = __raw_readl(EP93XX_SYSCON_I2SCLKDIV);
        val &= ~EP93XX_I2SCLKDIV_MASK;
-        val |= i2s_config;
+        val |= EP93XX_SYSCON_I2SCLKDIV_ORIDE | EP93XX_SYSCON_I2SCLKDIV_SPOL;
        ep93xx_syscon_swlocked_write(val, EP93XX_SYSCON_I2SCLKDIV);
        return 0;
@@ -856,11 +854,32 @@ void __init ep93xx_register_ac97(void)
        platform_device_register(&ep93xx_pcm_device);
 }
+/*************************************************************************
+ * EP93xx Watchdog
+ *************************************************************************/
+static struct resource ep93xx_wdt_resources[] = {
+        DEFINE_RES_MEM(EP93XX_WATCHDOG_PHYS_BASE, 0x08),
+};
+static struct platform_device ep93xx_wdt_device = {
+        .name           = "ep93xx-wdt",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(ep93xx_wdt_resources),
+        .resource       = ep93xx_wdt_resources,
+};
 void __init ep93xx_init_devices(void)
 {
        /* Disallow access to MaverickCrunch initially */
        ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_CPENA);
+        /* Default all ports to GPIO */
+        ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS |
+                               EP93XX_SYSCON_DEVCFG_GONK |
+                               EP93XX_SYSCON_DEVCFG_EONIDE |
+                               EP93XX_SYSCON_DEVCFG_GONIDE |
+                               EP93XX_SYSCON_DEVCFG_HONIDE);
        /* Get the GPIO working early, other devices need it */
        platform_device_register(&ep93xx_gpio_device);
@@ -871,6 +890,7 @@ void __init ep93xx_init_devices(void)
        platform_device_register(&ep93xx_rtc_device);
        platform_device_register(&ep93xx_ohci_device);
        platform_device_register(&ep93xx_leds);
+        platform_device_register(&ep93xx_wdt_device);
 }
 void ep93xx_restart(char mode, const char *cmd)
diff --git a/arch/arm/kernel/crunch-bits.S b/arch/arm/mach-ep93xx/crunch-bits.S
index 0ec9bb48fab9..0ec9bb48fab9 100644
--- a/arch/arm/kernel/crunch-bits.S
+++ b/arch/arm/mach-ep93xx/crunch-bits.S
diff --git a/arch/arm/kernel/crunch.c b/arch/arm/mach-ep93xx/crunch.c
index 25ef223ba7f3..74753e2df603 100644
--- a/arch/arm/kernel/crunch.c
+++ b/arch/arm/mach-ep93xx/crunch.c
@@ -16,9 +16,11 @@
 #include <linux/sched.h>
 #include <linux/init.h>
 #include <linux/io.h>
-#include <mach/ep93xx-regs.h>
 #include <asm/thread_notify.h>
+#include "soc.h"
 struct crunch_state *crunch_owner;
 void crunch_task_release(struct thread_info *thread)
diff --git a/arch/arm/mach-ep93xx/dma.c b/arch/arm/mach-ep93xx/dma.c
index 5a2570881255..16976d7bdc8a 100644
--- a/arch/arm/mach-ep93xx/dma.c
+++ b/arch/arm/mach-ep93xx/dma.c
@@ -28,6 +28,8 @@
 #include <mach/dma.h>
 #include <mach/hardware.h>
+#include "soc.h"
 #define DMA_CHANNEL(_name, _base, _irq) \
        { .name = (_name), .base = (_base), .irq = (_irq) }
diff --git a/arch/arm/mach-ep93xx/edb93xx.c b/arch/arm/mach-ep93xx/edb93xx.c
index d115653edca3..da9047d726f0 100644
--- a/arch/arm/mach-ep93xx/edb93xx.c
+++ b/arch/arm/mach-ep93xx/edb93xx.c
@@ -43,6 +43,7 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
+#include "soc.h"
 static void __init edb93xx_register_flash(void)
 {
diff --git a/arch/arm/mach-ep93xx/gesbc9312.c b/arch/arm/mach-ep93xx/gesbc9312.c
index af46970dc58e..fcdffbe49dcc 100644
--- a/arch/arm/mach-ep93xx/gesbc9312.c
+++ b/arch/arm/mach-ep93xx/gesbc9312.c
@@ -20,6 +20,7 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
+#include "soc.h"
 static struct ep93xx_eth_data __initdata gesbc9312_eth_data = {
        .phy_id         = 1,
diff --git a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
index c4a7b84ef06d..c64d74246602 100644
--- a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
+++ b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
@@ -6,40 +6,6 @@
 #define __ASM_ARCH_EP93XX_REGS_H
 /*
- * EP93xx Physical Memory Map:
- *
- * The ASDO pin is sampled at system reset to select a synchronous or
- * asynchronous boot configuration.  When ASDO is "1" (i.e. pulled-up)
- * the synchronous boot mode is selected.  When ASDO is "0" (i.e
- * pulled-down) the asynchronous boot mode is selected.
- *
- * In synchronous boot mode nSDCE3 is decoded starting at physical address
- * 0x00000000 and nCS0 is decoded starting at 0xf0000000.  For asynchronous
- * boot mode they are swapped with nCS0 decoded at 0x00000000 ann nSDCE3
- * decoded at 0xf0000000.
- *
- * There is known errata for the EP93xx dealing with External Memory
- * Configurations.  Please refer to "AN273: EP93xx Silicon Rev E Design
- * Guidelines" for more information.  This document can be found at:
- *
- *      http://www.cirrus.com/en/pubs/appNote/AN273REV4.pdf
- */
-#define EP93XX_CS0_PHYS_BASE_ASYNC      0x00000000      /* ASDO Pin = 0 */
-#define EP93XX_SDCE3_PHYS_BASE_SYNC     0x00000000      /* ASDO Pin = 1 */
-#define EP93XX_CS1_PHYS_BASE            0x10000000
-#define EP93XX_CS2_PHYS_BASE            0x20000000
-#define EP93XX_CS3_PHYS_BASE            0x30000000
-#define EP93XX_PCMCIA_PHYS_BASE         0x40000000
-#define EP93XX_CS6_PHYS_BASE            0x60000000
-#define EP93XX_CS7_PHYS_BASE            0x70000000
-#define EP93XX_SDCE0_PHYS_BASE          0xc0000000
-#define EP93XX_SDCE1_PHYS_BASE          0xd0000000
-#define EP93XX_SDCE2_PHYS_BASE          0xe0000000
-#define EP93XX_SDCE3_PHYS_BASE_ASYNC    0xf0000000      /* ASDO Pin = 0 */
-#define EP93XX_CS0_PHYS_BASE_SYNC       0xf0000000      /* ASDO Pin = 1 */
-/*
 * EP93xx linux memory map:
 *
 * virt         phys            size
@@ -62,58 +28,7 @@
 #define EP93XX_APB_PHYS(x)              (EP93XX_APB_PHYS_BASE + (x))
 #define EP93XX_APB_IOMEM(x)             IOMEM(EP93XX_APB_VIRT_BASE + (x))
+/* APB UARTs */
-/* AHB peripherals */
-#define EP93XX_DMA_BASE                 EP93XX_AHB_IOMEM(0x00000000)
-#define EP93XX_ETHERNET_PHYS_BASE       EP93XX_AHB_PHYS(0x00010000)
-#define EP93XX_ETHERNET_BASE            EP93XX_AHB_IOMEM(0x00010000)
-#define EP93XX_USB_PHYS_BASE            EP93XX_AHB_PHYS(0x00020000)
-#define EP93XX_USB_BASE                 EP93XX_AHB_IOMEM(0x00020000)
-#define EP93XX_RASTER_PHYS_BASE         EP93XX_AHB_PHYS(0x00030000)
-#define EP93XX_RASTER_BASE              EP93XX_AHB_IOMEM(0x00030000)
-#define EP93XX_GRAPHICS_ACCEL_BASE      EP93XX_AHB_IOMEM(0x00040000)
-#define EP93XX_SDRAM_CONTROLLER_BASE    EP93XX_AHB_IOMEM(0x00060000)
-#define EP93XX_PCMCIA_CONTROLLER_BASE   EP93XX_AHB_IOMEM(0x00080000)
-#define EP93XX_BOOT_ROM_BASE            EP93XX_AHB_IOMEM(0x00090000)
-#define EP93XX_IDE_BASE                 EP93XX_AHB_IOMEM(0x000a0000)
-#define EP93XX_VIC1_BASE                EP93XX_AHB_IOMEM(0x000b0000)
-#define EP93XX_VIC2_BASE                EP93XX_AHB_IOMEM(0x000c0000)
-/* APB peripherals */
-#define EP93XX_TIMER_BASE               EP93XX_APB_IOMEM(0x00010000)
-#define EP93XX_I2S_PHYS_BASE            EP93XX_APB_PHYS(0x00020000)
-#define EP93XX_I2S_BASE                 EP93XX_APB_IOMEM(0x00020000)
-#define EP93XX_SECURITY_BASE            EP93XX_APB_IOMEM(0x00030000)
-#define EP93XX_GPIO_PHYS_BASE           EP93XX_APB_PHYS(0x00040000)
-#define EP93XX_GPIO_BASE                EP93XX_APB_IOMEM(0x00040000)
-#define EP93XX_GPIO_REG(x)              (EP93XX_GPIO_BASE + (x))
-#define EP93XX_GPIO_F_INT_STATUS        EP93XX_GPIO_REG(0x5c)
-#define EP93XX_GPIO_A_INT_STATUS        EP93XX_GPIO_REG(0xa0)
-#define EP93XX_GPIO_B_INT_STATUS        EP93XX_GPIO_REG(0xbc)
-#define EP93XX_GPIO_EEDRIVE             EP93XX_GPIO_REG(0xc8)
-#define EP93XX_AAC_PHYS_BASE            EP93XX_APB_PHYS(0x00080000)
-#define EP93XX_AAC_BASE                 EP93XX_APB_IOMEM(0x00080000)
-#define EP93XX_SPI_PHYS_BASE            EP93XX_APB_PHYS(0x000a0000)
-#define EP93XX_SPI_BASE                 EP93XX_APB_IOMEM(0x000a0000)
-#define EP93XX_IRDA_BASE                EP93XX_APB_IOMEM(0x000b0000)
 #define EP93XX_UART1_PHYS_BASE          EP93XX_APB_PHYS(0x000c0000)
 #define EP93XX_UART1_BASE               EP93XX_APB_IOMEM(0x000c0000)
@@ -123,108 +38,4 @@
 #define EP93XX_UART3_PHYS_BASE          EP93XX_APB_PHYS(0x000e0000)
 #define EP93XX_UART3_BASE               EP93XX_APB_IOMEM(0x000e0000)
-#define EP93XX_KEY_MATRIX_PHYS_BASE     EP93XX_APB_PHYS(0x000f0000)
-#define EP93XX_KEY_MATRIX_BASE          EP93XX_APB_IOMEM(0x000f0000)
-#define EP93XX_ADC_BASE                 EP93XX_APB_IOMEM(0x00100000)
-#define EP93XX_TOUCHSCREEN_BASE         EP93XX_APB_IOMEM(0x00100000)
-#define EP93XX_PWM_PHYS_BASE            EP93XX_APB_PHYS(0x00110000)
-#define EP93XX_PWM_BASE                 EP93XX_APB_IOMEM(0x00110000)
-#define EP93XX_RTC_PHYS_BASE            EP93XX_APB_PHYS(0x00120000)
-#define EP93XX_RTC_BASE                 EP93XX_APB_IOMEM(0x00120000)
-#define EP93XX_SYSCON_BASE              EP93XX_APB_IOMEM(0x00130000)
-#define EP93XX_SYSCON_REG(x)            (EP93XX_SYSCON_BASE + (x))
-#define EP93XX_SYSCON_POWER_STATE       EP93XX_SYSCON_REG(0x00)
-#define EP93XX_SYSCON_PWRCNT            EP93XX_SYSCON_REG(0x04)
-#define EP93XX_SYSCON_PWRCNT_FIR_EN     (1<<31)
-#define EP93XX_SYSCON_PWRCNT_UARTBAUD   (1<<29)
-#define EP93XX_SYSCON_PWRCNT_USH_EN     (1<<28)
-#define EP93XX_SYSCON_PWRCNT_DMA_M2M1   (1<<27)
-#define EP93XX_SYSCON_PWRCNT_DMA_M2M0   (1<<26)
-#define EP93XX_SYSCON_PWRCNT_DMA_M2P8   (1<<25)
-#define EP93XX_SYSCON_PWRCNT_DMA_M2P9   (1<<24)
-#define EP93XX_SYSCON_PWRCNT_DMA_M2P6   (1<<23)
-#define EP93XX_SYSCON_PWRCNT_DMA_M2P7   (1<<22)
-#define EP93XX_SYSCON_PWRCNT_DMA_M2P4   (1<<21)
-#define EP93XX_SYSCON_PWRCNT_DMA_M2P5   (1<<20)
-#define EP93XX_SYSCON_PWRCNT_DMA_M2P2   (1<<19)
-#define EP93XX_SYSCON_PWRCNT_DMA_M2P3   (1<<18)
-#define EP93XX_SYSCON_PWRCNT_DMA_M2P0   (1<<17)
-#define EP93XX_SYSCON_PWRCNT_DMA_M2P1   (1<<16)
-#define EP93XX_SYSCON_HALT              EP93XX_SYSCON_REG(0x08)
-#define EP93XX_SYSCON_STANDBY           EP93XX_SYSCON_REG(0x0c)
-#define EP93XX_SYSCON_CLKSET1           EP93XX_SYSCON_REG(0x20)
-#define EP93XX_SYSCON_CLKSET1_NBYP1     (1<<23)
-#define EP93XX_SYSCON_CLKSET2           EP93XX_SYSCON_REG(0x24)
-#define EP93XX_SYSCON_CLKSET2_NBYP2     (1<<19)
-#define EP93XX_SYSCON_CLKSET2_PLL2_EN   (1<<18)
-#define EP93XX_SYSCON_DEVCFG            EP93XX_SYSCON_REG(0x80)
-#define EP93XX_SYSCON_DEVCFG_SWRST      (1<<31)
-#define EP93XX_SYSCON_DEVCFG_D1ONG      (1<<30)
-#define EP93XX_SYSCON_DEVCFG_D0ONG      (1<<29)
-#define EP93XX_SYSCON_DEVCFG_IONU2      (1<<28)
-#define EP93XX_SYSCON_DEVCFG_GONK       (1<<27)
-#define EP93XX_SYSCON_DEVCFG_TONG       (1<<26)
-#define EP93XX_SYSCON_DEVCFG_MONG       (1<<25)
-#define EP93XX_SYSCON_DEVCFG_U3EN       (1<<24)
-#define EP93XX_SYSCON_DEVCFG_CPENA      (1<<23)
-#define EP93XX_SYSCON_DEVCFG_A2ONG      (1<<22)
-#define EP93XX_SYSCON_DEVCFG_A1ONG      (1<<21)
-#define EP93XX_SYSCON_DEVCFG_U2EN       (1<<20)
-#define EP93XX_SYSCON_DEVCFG_EXVC       (1<<19)
-#define EP93XX_SYSCON_DEVCFG_U1EN       (1<<18)
-#define EP93XX_SYSCON_DEVCFG_TIN        (1<<17)
-#define EP93XX_SYSCON_DEVCFG_HC3IN      (1<<15)
-#define EP93XX_SYSCON_DEVCFG_HC3EN      (1<<14)
-#define EP93XX_SYSCON_DEVCFG_HC1IN      (1<<13)
-#define EP93XX_SYSCON_DEVCFG_HC1EN      (1<<12)
-#define EP93XX_SYSCON_DEVCFG_HONIDE     (1<<11)
-#define EP93XX_SYSCON_DEVCFG_GONIDE     (1<<10)
-#define EP93XX_SYSCON_DEVCFG_PONG       (1<<9)
-#define EP93XX_SYSCON_DEVCFG_EONIDE     (1<<8)
-#define EP93XX_SYSCON_DEVCFG_I2SONSSP   (1<<7)
-#define EP93XX_SYSCON_DEVCFG_I2SONAC97  (1<<6)
-#define EP93XX_SYSCON_DEVCFG_RASONP3    (1<<4)
-#define EP93XX_SYSCON_DEVCFG_RAS        (1<<3)
-#define EP93XX_SYSCON_DEVCFG_ADCPD      (1<<2)
-#define EP93XX_SYSCON_DEVCFG_KEYS       (1<<1)
-#define EP93XX_SYSCON_DEVCFG_SHENA      (1<<0)
-#define EP93XX_SYSCON_VIDCLKDIV         EP93XX_SYSCON_REG(0x84)
-#define EP93XX_SYSCON_CLKDIV_ENABLE     (1<<15)
-#define EP93XX_SYSCON_CLKDIV_ESEL       (1<<14)
-#define EP93XX_SYSCON_CLKDIV_PSEL       (1<<13)
-#define EP93XX_SYSCON_CLKDIV_PDIV_SHIFT 8
-#define EP93XX_SYSCON_I2SCLKDIV         EP93XX_SYSCON_REG(0x8c)
-#define EP93XX_SYSCON_I2SCLKDIV_SENA    (1<<31)
-#define EP93XX_SYSCON_I2SCLKDIV_ORIDE   (1<<29)
-#define EP93XX_SYSCON_I2SCLKDIV_SPOL    (1<<19)
-#define EP93XX_I2SCLKDIV_SDIV           (1 << 16)
-#define EP93XX_I2SCLKDIV_LRDIV32        (0 << 17)
-#define EP93XX_I2SCLKDIV_LRDIV64        (1 << 17)
-#define EP93XX_I2SCLKDIV_LRDIV128       (2 << 17)
-#define EP93XX_I2SCLKDIV_LRDIV_MASK     (3 << 17)
-#define EP93XX_SYSCON_KEYTCHCLKDIV      EP93XX_SYSCON_REG(0x90)
-#define EP93XX_SYSCON_KEYTCHCLKDIV_TSEN (1<<31)
-#define EP93XX_SYSCON_KEYTCHCLKDIV_ADIV (1<<16)
-#define EP93XX_SYSCON_KEYTCHCLKDIV_KEN  (1<<15)
-#define EP93XX_SYSCON_KEYTCHCLKDIV_KDIV (1<<0)
-#define EP93XX_SYSCON_SYSCFG            EP93XX_SYSCON_REG(0x9c)
-#define EP93XX_SYSCON_SYSCFG_REV_MASK   (0xf0000000)
-#define EP93XX_SYSCON_SYSCFG_REV_SHIFT  (28)
-#define EP93XX_SYSCON_SYSCFG_SBOOT      (1<<8)
-#define EP93XX_SYSCON_SYSCFG_LCSN7      (1<<7)
-#define EP93XX_SYSCON_SYSCFG_LCSN6      (1<<6)
-#define EP93XX_SYSCON_SYSCFG_LASDO      (1<<5)
-#define EP93XX_SYSCON_SYSCFG_LEEDA      (1<<4)
-#define EP93XX_SYSCON_SYSCFG_LEECLK     (1<<3)
-#define EP93XX_SYSCON_SYSCFG_LCSN2      (1<<1)
-#define EP93XX_SYSCON_SYSCFG_LCSN1      (1<<0)
-#define EP93XX_SYSCON_SWLOCK            EP93XX_SYSCON_REG(0xc0)
-#define EP93XX_WATCHDOG_BASE            EP93XX_APB_IOMEM(0x00140000)
 #endif
diff --git a/arch/arm/mach-ep93xx/include/mach/gpio-ep93xx.h b/arch/arm/mach-ep93xx/include/mach/gpio-ep93xx.h
index 8aff2ea35877..6d7c571a519f 100644
--- a/arch/arm/mach-ep93xx/include/mach/gpio-ep93xx.h
+++ b/arch/arm/mach-ep93xx/include/mach/gpio-ep93xx.h
@@ -3,6 +3,16 @@
 #ifndef __GPIO_EP93XX_H
 #define __GPIO_EP93XX_H
+#include <mach/ep93xx-regs.h>
+#define EP93XX_GPIO_PHYS_BASE           EP93XX_APB_PHYS(0x00040000)
+#define EP93XX_GPIO_BASE                EP93XX_APB_IOMEM(0x00040000)
+#define EP93XX_GPIO_REG(x)              (EP93XX_GPIO_BASE + (x))
+#define EP93XX_GPIO_F_INT_STATUS        EP93XX_GPIO_REG(0x5c)
+#define EP93XX_GPIO_A_INT_STATUS        EP93XX_GPIO_REG(0xa0)
+#define EP93XX_GPIO_B_INT_STATUS        EP93XX_GPIO_REG(0xbc)
+#define EP93XX_GPIO_EEDRIVE             EP93XX_GPIO_REG(0xc8)
 /* GPIO port A.  */
 #define EP93XX_GPIO_LINE_A(x)           ((x) + 0)
 #define EP93XX_GPIO_LINE_EGPIO0         EP93XX_GPIO_LINE_A(0)
diff --git a/arch/arm/mach-ep93xx/include/mach/hardware.h b/arch/arm/mach-ep93xx/include/mach/hardware.h
index 4df842897eae..efcd47815a91 100644
--- a/arch/arm/mach-ep93xx/include/mach/hardware.h
+++ b/arch/arm/mach-ep93xx/include/mach/hardware.h
@@ -5,7 +5,6 @@
 #ifndef __ASM_ARCH_HARDWARE_H
 #define __ASM_ARCH_HARDWARE_H
-#include <mach/ep93xx-regs.h>
 #include <mach/platform.h>
 /*
diff --git a/arch/arm/mach-ep93xx/include/mach/platform.h b/arch/arm/mach-ep93xx/include/mach/platform.h
index d4c934931f9d..602bd87fd0ab 100644
--- a/arch/arm/mach-ep93xx/include/mach/platform.h
+++ b/arch/arm/mach-ep93xx/include/mach/platform.h
@@ -21,20 +21,6 @@ struct ep93xx_eth_data
 void ep93xx_map_io(void);
 void ep93xx_init_irq(void);
-/* EP93xx System Controller software locked register write */
-void ep93xx_syscon_swlocked_write(unsigned int val, void __iomem *reg);
-void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits);
-static inline void ep93xx_devcfg_set_bits(unsigned int bits)
-{
-        ep93xx_devcfg_set_clear(bits, 0x00);
-}
-static inline void ep93xx_devcfg_clear_bits(unsigned int bits)
-{
-        ep93xx_devcfg_set_clear(0x00, bits);
-}
 #define EP93XX_CHIP_REV_D0      3
 #define EP93XX_CHIP_REV_D1      4
 #define EP93XX_CHIP_REV_E0      5
@@ -59,7 +45,7 @@ void ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data);
 int ep93xx_keypad_acquire_gpio(struct platform_device *pdev);
 void ep93xx_keypad_release_gpio(struct platform_device *pdev);
 void ep93xx_register_i2s(void);
-int ep93xx_i2s_acquire(unsigned i2s_pins, unsigned i2s_config);
+int ep93xx_i2s_acquire(void);
 void ep93xx_i2s_release(void);
 void ep93xx_register_ac97(void);
diff --git a/arch/arm/mach-ep93xx/micro9.c b/arch/arm/mach-ep93xx/micro9.c
index 7b98084f0c97..dc431c5f04ce 100644
--- a/arch/arm/mach-ep93xx/micro9.c
+++ b/arch/arm/mach-ep93xx/micro9.c
@@ -22,6 +22,7 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
+#include "soc.h"
 /*************************************************************************
 * Micro9 NOR Flash
diff --git a/arch/arm/mach-ep93xx/simone.c b/arch/arm/mach-ep93xx/simone.c
index f4e553eca21c..f40c2987e545 100644
--- a/arch/arm/mach-ep93xx/simone.c
+++ b/arch/arm/mach-ep93xx/simone.c
@@ -29,6 +29,8 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
+#include "soc.h"
 static struct ep93xx_eth_data __initdata simone_eth_data = {
        .phy_id         = 1,
 };
diff --git a/arch/arm/mach-ep93xx/snappercl15.c b/arch/arm/mach-ep93xx/snappercl15.c
index fd846331ddff..0c00852ef160 100644
--- a/arch/arm/mach-ep93xx/snappercl15.c
+++ b/arch/arm/mach-ep93xx/snappercl15.c
@@ -35,6 +35,8 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
+#include "soc.h"
 #define SNAPPERCL15_NAND_BASE   (EP93XX_CS7_PHYS_BASE + SZ_16M)
 #define SNAPPERCL15_NAND_WPN    (1 << 8)  /* Write protect (active low) */
diff --git a/arch/arm/mach-ep93xx/soc.h b/arch/arm/mach-ep93xx/soc.h
new file mode 100644
index 000000000000..979fba722926
--- /dev/null
+++ b/arch/arm/mach-ep93xx/soc.h
@@ -0,0 +1,213 @@
+/*
+ * arch/arm/mach-ep93xx/soc.h
+ *
+ * Copyright (C) 2012 Open Kernel Labs <www.ok-labs.com>
+ * Copyright (C) 2012 Ryan Mallon <rmallon@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or (at
+ * your option) any later version.
+ */
+#ifndef _EP93XX_SOC_H
+#define _EP93XX_SOC_H
+#include <mach/ep93xx-regs.h>
+/*
+ * EP93xx Physical Memory Map:
+ *
+ * The ASDO pin is sampled at system reset to select a synchronous or
+ * asynchronous boot configuration.  When ASDO is "1" (i.e. pulled-up)
+ * the synchronous boot mode is selected.  When ASDO is "0" (i.e
+ * pulled-down) the asynchronous boot mode is selected.
+ *
+ * In synchronous boot mode nSDCE3 is decoded starting at physical address
+ * 0x00000000 and nCS0 is decoded starting at 0xf0000000.  For asynchronous
+ * boot mode they are swapped with nCS0 decoded at 0x00000000 ann nSDCE3
+ * decoded at 0xf0000000.
+ *
+ * There is known errata for the EP93xx dealing with External Memory
+ * Configurations.  Please refer to "AN273: EP93xx Silicon Rev E Design
+ * Guidelines" for more information.  This document can be found at:
+ *
+ *      http://www.cirrus.com/en/pubs/appNote/AN273REV4.pdf
+ */
+#define EP93XX_CS0_PHYS_BASE_ASYNC      0x00000000      /* ASDO Pin = 0 */
+#define EP93XX_SDCE3_PHYS_BASE_SYNC     0x00000000      /* ASDO Pin = 1 */
+#define EP93XX_CS1_PHYS_BASE            0x10000000
+#define EP93XX_CS2_PHYS_BASE            0x20000000
+#define EP93XX_CS3_PHYS_BASE            0x30000000
+#define EP93XX_PCMCIA_PHYS_BASE         0x40000000
+#define EP93XX_CS6_PHYS_BASE            0x60000000
+#define EP93XX_CS7_PHYS_BASE            0x70000000
+#define EP93XX_SDCE0_PHYS_BASE          0xc0000000
+#define EP93XX_SDCE1_PHYS_BASE          0xd0000000
+#define EP93XX_SDCE2_PHYS_BASE          0xe0000000
+#define EP93XX_SDCE3_PHYS_BASE_ASYNC    0xf0000000      /* ASDO Pin = 0 */
+#define EP93XX_CS0_PHYS_BASE_SYNC       0xf0000000      /* ASDO Pin = 1 */
+/* AHB peripherals */
+#define EP93XX_DMA_BASE                 EP93XX_AHB_IOMEM(0x00000000)
+#define EP93XX_ETHERNET_PHYS_BASE       EP93XX_AHB_PHYS(0x00010000)
+#define EP93XX_ETHERNET_BASE            EP93XX_AHB_IOMEM(0x00010000)
+#define EP93XX_USB_PHYS_BASE            EP93XX_AHB_PHYS(0x00020000)
+#define EP93XX_USB_BASE                 EP93XX_AHB_IOMEM(0x00020000)
+#define EP93XX_RASTER_PHYS_BASE         EP93XX_AHB_PHYS(0x00030000)
+#define EP93XX_RASTER_BASE              EP93XX_AHB_IOMEM(0x00030000)
+#define EP93XX_GRAPHICS_ACCEL_BASE      EP93XX_AHB_IOMEM(0x00040000)
+#define EP93XX_SDRAM_CONTROLLER_BASE    EP93XX_AHB_IOMEM(0x00060000)
+#define EP93XX_PCMCIA_CONTROLLER_BASE   EP93XX_AHB_IOMEM(0x00080000)
+#define EP93XX_BOOT_ROM_BASE            EP93XX_AHB_IOMEM(0x00090000)
+#define EP93XX_IDE_BASE                 EP93XX_AHB_IOMEM(0x000a0000)
+#define EP93XX_VIC1_BASE                EP93XX_AHB_IOMEM(0x000b0000)
+#define EP93XX_VIC2_BASE                EP93XX_AHB_IOMEM(0x000c0000)
+/* APB peripherals */
+#define EP93XX_TIMER_BASE               EP93XX_APB_IOMEM(0x00010000)
+#define EP93XX_I2S_PHYS_BASE            EP93XX_APB_PHYS(0x00020000)
+#define EP93XX_I2S_BASE                 EP93XX_APB_IOMEM(0x00020000)
+#define EP93XX_SECURITY_BASE            EP93XX_APB_IOMEM(0x00030000)
+#define EP93XX_AAC_PHYS_BASE            EP93XX_APB_PHYS(0x00080000)
+#define EP93XX_AAC_BASE                 EP93XX_APB_IOMEM(0x00080000)
+#define EP93XX_SPI_PHYS_BASE            EP93XX_APB_PHYS(0x000a0000)
+#define EP93XX_SPI_BASE                 EP93XX_APB_IOMEM(0x000a0000)
+#define EP93XX_IRDA_BASE                EP93XX_APB_IOMEM(0x000b0000)
+#define EP93XX_KEY_MATRIX_PHYS_BASE     EP93XX_APB_PHYS(0x000f0000)
+#define EP93XX_KEY_MATRIX_BASE          EP93XX_APB_IOMEM(0x000f0000)
+#define EP93XX_ADC_BASE                 EP93XX_APB_IOMEM(0x00100000)
+#define EP93XX_TOUCHSCREEN_BASE         EP93XX_APB_IOMEM(0x00100000)
+#define EP93XX_PWM_PHYS_BASE            EP93XX_APB_PHYS(0x00110000)
+#define EP93XX_PWM_BASE                 EP93XX_APB_IOMEM(0x00110000)
+#define EP93XX_RTC_PHYS_BASE            EP93XX_APB_PHYS(0x00120000)
+#define EP93XX_RTC_BASE                 EP93XX_APB_IOMEM(0x00120000)
+#define EP93XX_WATCHDOG_PHYS_BASE       EP93XX_APB_PHYS(0x00140000)
+#define EP93XX_WATCHDOG_BASE            EP93XX_APB_IOMEM(0x00140000)
+/* System controller */
+#define EP93XX_SYSCON_BASE              EP93XX_APB_IOMEM(0x00130000)
+#define EP93XX_SYSCON_REG(x)            (EP93XX_SYSCON_BASE + (x))
+#define EP93XX_SYSCON_POWER_STATE       EP93XX_SYSCON_REG(0x00)
+#define EP93XX_SYSCON_PWRCNT            EP93XX_SYSCON_REG(0x04)
+#define EP93XX_SYSCON_PWRCNT_FIR_EN     (1<<31)
+#define EP93XX_SYSCON_PWRCNT_UARTBAUD   (1<<29)
+#define EP93XX_SYSCON_PWRCNT_USH_EN     (1<<28)
+#define EP93XX_SYSCON_PWRCNT_DMA_M2M1   (1<<27)
+#define EP93XX_SYSCON_PWRCNT_DMA_M2M0   (1<<26)
+#define EP93XX_SYSCON_PWRCNT_DMA_M2P8   (1<<25)
+#define EP93XX_SYSCON_PWRCNT_DMA_M2P9   (1<<24)
+#define EP93XX_SYSCON_PWRCNT_DMA_M2P6   (1<<23)
+#define EP93XX_SYSCON_PWRCNT_DMA_M2P7   (1<<22)
+#define EP93XX_SYSCON_PWRCNT_DMA_M2P4   (1<<21)
+#define EP93XX_SYSCON_PWRCNT_DMA_M2P5   (1<<20)
+#define EP93XX_SYSCON_PWRCNT_DMA_M2P2   (1<<19)
+#define EP93XX_SYSCON_PWRCNT_DMA_M2P3   (1<<18)
+#define EP93XX_SYSCON_PWRCNT_DMA_M2P0   (1<<17)
+#define EP93XX_SYSCON_PWRCNT_DMA_M2P1   (1<<16)
+#define EP93XX_SYSCON_HALT              EP93XX_SYSCON_REG(0x08)
+#define EP93XX_SYSCON_STANDBY           EP93XX_SYSCON_REG(0x0c)
+#define EP93XX_SYSCON_CLKSET1           EP93XX_SYSCON_REG(0x20)
+#define EP93XX_SYSCON_CLKSET1_NBYP1     (1<<23)
+#define EP93XX_SYSCON_CLKSET2           EP93XX_SYSCON_REG(0x24)
+#define EP93XX_SYSCON_CLKSET2_NBYP2     (1<<19)
+#define EP93XX_SYSCON_CLKSET2_PLL2_EN   (1<<18)
+#define EP93XX_SYSCON_DEVCFG            EP93XX_SYSCON_REG(0x80)
+#define EP93XX_SYSCON_DEVCFG_SWRST      (1<<31)
+#define EP93XX_SYSCON_DEVCFG_D1ONG      (1<<30)
+#define EP93XX_SYSCON_DEVCFG_D0ONG      (1<<29)
+#define EP93XX_SYSCON_DEVCFG_IONU2      (1<<28)
+#define EP93XX_SYSCON_DEVCFG_GONK       (1<<27)
+#define EP93XX_SYSCON_DEVCFG_TONG       (1<<26)
+#define EP93XX_SYSCON_DEVCFG_MONG       (1<<25)
+#define EP93XX_SYSCON_DEVCFG_U3EN       (1<<24)
+#define EP93XX_SYSCON_DEVCFG_CPENA      (1<<23)
+#define EP93XX_SYSCON_DEVCFG_A2ONG      (1<<22)
+#define EP93XX_SYSCON_DEVCFG_A1ONG      (1<<21)
+#define EP93XX_SYSCON_DEVCFG_U2EN       (1<<20)
+#define EP93XX_SYSCON_DEVCFG_EXVC       (1<<19)
+#define EP93XX_SYSCON_DEVCFG_U1EN       (1<<18)
+#define EP93XX_SYSCON_DEVCFG_TIN        (1<<17)
+#define EP93XX_SYSCON_DEVCFG_HC3IN      (1<<15)
+#define EP93XX_SYSCON_DEVCFG_HC3EN      (1<<14)
+#define EP93XX_SYSCON_DEVCFG_HC1IN      (1<<13)
+#define EP93XX_SYSCON_DEVCFG_HC1EN      (1<<12)
+#define EP93XX_SYSCON_DEVCFG_HONIDE     (1<<11)
+#define EP93XX_SYSCON_DEVCFG_GONIDE     (1<<10)
+#define EP93XX_SYSCON_DEVCFG_PONG       (1<<9)
+#define EP93XX_SYSCON_DEVCFG_EONIDE     (1<<8)
+#define EP93XX_SYSCON_DEVCFG_I2SONSSP   (1<<7)
+#define EP93XX_SYSCON_DEVCFG_I2SONAC97  (1<<6)
+#define EP93XX_SYSCON_DEVCFG_RASONP3    (1<<4)
+#define EP93XX_SYSCON_DEVCFG_RAS        (1<<3)
+#define EP93XX_SYSCON_DEVCFG_ADCPD      (1<<2)
+#define EP93XX_SYSCON_DEVCFG_KEYS       (1<<1)
+#define EP93XX_SYSCON_DEVCFG_SHENA      (1<<0)
+#define EP93XX_SYSCON_VIDCLKDIV         EP93XX_SYSCON_REG(0x84)
+#define EP93XX_SYSCON_CLKDIV_ENABLE     (1<<15)
+#define EP93XX_SYSCON_CLKDIV_ESEL       (1<<14)
+#define EP93XX_SYSCON_CLKDIV_PSEL       (1<<13)
+#define EP93XX_SYSCON_CLKDIV_PDIV_SHIFT 8
+#define EP93XX_SYSCON_I2SCLKDIV         EP93XX_SYSCON_REG(0x8c)
+#define EP93XX_SYSCON_I2SCLKDIV_SENA    (1<<31)
+#define EP93XX_SYSCON_I2SCLKDIV_ORIDE   (1<<29)
+#define EP93XX_SYSCON_I2SCLKDIV_SPOL    (1<<19)
+#define EP93XX_I2SCLKDIV_SDIV           (1 << 16)
+#define EP93XX_I2SCLKDIV_LRDIV32        (0 << 17)
+#define EP93XX_I2SCLKDIV_LRDIV64        (1 << 17)
+#define EP93XX_I2SCLKDIV_LRDIV128       (2 << 17)
+#define EP93XX_I2SCLKDIV_LRDIV_MASK     (3 << 17)
+#define EP93XX_SYSCON_KEYTCHCLKDIV      EP93XX_SYSCON_REG(0x90)
+#define EP93XX_SYSCON_KEYTCHCLKDIV_TSEN (1<<31)
+#define EP93XX_SYSCON_KEYTCHCLKDIV_ADIV (1<<16)
+#define EP93XX_SYSCON_KEYTCHCLKDIV_KEN  (1<<15)
+#define EP93XX_SYSCON_KEYTCHCLKDIV_KDIV (1<<0)
+#define EP93XX_SYSCON_SYSCFG            EP93XX_SYSCON_REG(0x9c)
+#define EP93XX_SYSCON_SYSCFG_REV_MASK   (0xf0000000)
+#define EP93XX_SYSCON_SYSCFG_REV_SHIFT  (28)
+#define EP93XX_SYSCON_SYSCFG_SBOOT      (1<<8)
+#define EP93XX_SYSCON_SYSCFG_LCSN7      (1<<7)
+#define EP93XX_SYSCON_SYSCFG_LCSN6      (1<<6)
+#define EP93XX_SYSCON_SYSCFG_LASDO      (1<<5)
+#define EP93XX_SYSCON_SYSCFG_LEEDA      (1<<4)
+#define EP93XX_SYSCON_SYSCFG_LEECLK     (1<<3)
+#define EP93XX_SYSCON_SYSCFG_LCSN2      (1<<1)
+#define EP93XX_SYSCON_SYSCFG_LCSN1      (1<<0)
+#define EP93XX_SYSCON_SWLOCK            EP93XX_SYSCON_REG(0xc0)
+/* EP93xx System Controller software locked register write */
+void ep93xx_syscon_swlocked_write(unsigned int val, void __iomem *reg);
+void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits);
+static inline void ep93xx_devcfg_set_bits(unsigned int bits)
+{
+        ep93xx_devcfg_set_clear(bits, 0x00);
+}
+static inline void ep93xx_devcfg_clear_bits(unsigned int bits)
+{
+        ep93xx_devcfg_set_clear(0x00, bits);
+}
+#endif /* _EP93XX_SOC_H */
diff --git a/arch/arm/mach-ep93xx/ts72xx.c b/arch/arm/mach-ep93xx/ts72xx.c
index 79f8ecf07a19..5ea790942e94 100644
--- a/arch/arm/mach-ep93xx/ts72xx.c
+++ b/arch/arm/mach-ep93xx/ts72xx.c
@@ -28,6 +28,7 @@
 #include <asm/mach/map.h>
 #include <asm/mach/arch.h>
+#include "soc.h"
 static struct map_desc ts72xx_io_desc[] __initdata = {
        {
diff --git a/arch/arm/mach-ep93xx/vision_ep9307.c b/arch/arm/mach-ep93xx/vision_ep9307.c
index d5fb44f16d31..ba156eb225e8 100644
--- a/arch/arm/mach-ep93xx/vision_ep9307.c
+++ b/arch/arm/mach-ep93xx/vision_ep9307.c
@@ -34,10 +34,13 @@
 #include <mach/ep93xx_spi.h>
 #include <mach/gpio-ep93xx.h>
+#include <asm/hardware/vic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/map.h>
 #include <asm/mach/arch.h>
+#include "soc.h"
 /*************************************************************************
 * Static I/O mappings for the FPGA
 *************************************************************************/
@@ -361,6 +364,7 @@ MACHINE_START(VISION_EP9307, "Vision Engraving Systems EP9307")
        .atag_offset    = 0x100,
        .map_io         = vision_map_io,
        .init_irq       = ep93xx_init_irq,
+        .handle_irq     = vic_handle_irq,
        .timer          = &ep93xx_timer,
        .init_machine   = vision_init_machine,
        .restart        = ep93xx_restart,
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c
index e00d8e26d525..5ca91ec12642 100644
--- a/arch/arm/mach-exynos/mach-universal_c210.c
+++ b/arch/arm/mach-exynos/mach-universal_c210.c
@@ -13,6 +13,7 @@
 #include <linux/i2c.h>
 #include <linux/gpio_keys.h>
 #include <linux/gpio.h>
+#include <linux/interrupt.h>
 #include <linux/fb.h>
 #include <linux/mfd/max8998.h>
 #include <linux/regulator/machine.h>
@@ -595,6 +596,7 @@ static struct mxt_platform_data qt602240_platform_data = {
        .threshold      = 0x28,
        .voltage        = 2800000,              /* 2.8V */
        .orient         = MXT_DIAGONAL,
+        .irqflags       = IRQF_TRIGGER_FALLING,
 };
 static struct i2c_board_info i2c3_devs[] __initdata = {
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 6c5826605eae..719ee423abe2 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -343,6 +343,7 @@ static void __init omap3_check_revision(const char **cpu_rev)
        case 0xb944:
                omap_revision = AM335X_REV_ES1_0;
                *cpu_rev = "1.0";
+                break;
        case 0xb8f2:
                switch (rev) {
                case 0:
diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c
index 2cc1aa004b94..415a6f1cf419 100644
--- a/arch/arm/mach-omap2/mailbox.c
+++ b/arch/arm/mach-omap2/mailbox.c
@@ -420,8 +420,7 @@ static void __exit omap2_mbox_exit(void)
        platform_driver_unregister(&omap2_mbox_driver);
 }
-/* must be ready before omap3isp is probed */
+module_init(omap2_mbox_init);
-subsys_initcall(omap2_mbox_init);
 module_exit(omap2_mbox_exit);
 MODULE_LICENSE("GPL v2");
diff --git a/arch/arm/mach-omap2/omap-iommu.c b/arch/arm/mach-omap2/omap-iommu.c
index b8822048e409..ac49384d0285 100644
--- a/arch/arm/mach-omap2/omap-iommu.c
+++ b/arch/arm/mach-omap2/omap-iommu.c
@@ -150,7 +150,8 @@ err_out:
                platform_device_put(omap_iommu_pdev[i]);
        return err;
 }
-module_init(omap_iommu_init);
+/* must be ready before omap3isp is probed */
+subsys_initcall(omap_iommu_init);
 static void __exit omap_iommu_exit(void)
 {
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index ebc595091312..70de277f5c15 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -31,6 +31,7 @@
 #include "common.h"
 #include "omap4-sar-layout.h"
+#include <linux/export.h>
 #ifdef CONFIG_CACHE_L2X0
 static void __iomem *l2cache_base;
@@ -55,6 +56,7 @@ void omap_bus_sync(void)
                isb();
        }
 }
+EXPORT_SYMBOL(omap_bus_sync);
 /* Steal one page physical memory for barrier implementation */
 int __init omap_barrier_reserve_memblock(void)
diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c
index 10b20c652e5d..4b57757bf9d1 100644
--- a/arch/arm/mach-omap2/twl-common.c
+++ b/arch/arm/mach-omap2/twl-common.c
@@ -270,7 +270,6 @@ static struct regulator_init_data omap4_vusb_idata = {
        .constraints = {
                .min_uV                 = 3300000,
                .max_uV                 = 3300000,
-                .apply_uV               = true,
                .valid_modes_mask       = REGULATOR_MODE_NORMAL
                                        | REGULATOR_MODE_STANDBY,
                .valid_ops_mask         = REGULATOR_CHANGE_MODE
diff --git a/arch/arm/mach-pxa/generic.h b/arch/arm/mach-pxa/generic.h
index 0d729e6619df..42d5cca66257 100644
--- a/arch/arm/mach-pxa/generic.h
+++ b/arch/arm/mach-pxa/generic.h
@@ -49,7 +49,6 @@ extern unsigned pxa3xx_get_clk_frequency_khz(int);
 #endif
 extern struct syscore_ops pxa_irq_syscore_ops;
-extern struct syscore_ops pxa_gpio_syscore_ops;
 extern struct syscore_ops pxa2xx_mfp_syscore_ops;
 extern struct syscore_ops pxa3xx_mfp_syscore_ops;
diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach-pxa/mfp-pxa2xx.c
index f14775536b83..29b62afc6f7c 100644
--- a/arch/arm/mach-pxa/mfp-pxa2xx.c
+++ b/arch/arm/mach-pxa/mfp-pxa2xx.c
@@ -226,6 +226,12 @@ static void __init pxa25x_mfp_init(void)
 {
        int i;
+        /* running before pxa_gpio_probe() */
+#ifdef CONFIG_CPU_PXA26x
+        pxa_last_gpio = 89;
+#else
+        pxa_last_gpio = 84;
+#endif
        for (i = 0; i <= pxa_last_gpio; i++)
                gpio_desc[i].valid = 1;
@@ -295,6 +301,7 @@ static void __init pxa27x_mfp_init(void)
 {
        int i, gpio;
+        pxa_last_gpio = 120;    /* running before pxa_gpio_probe() */
        for (i = 0; i <= pxa_last_gpio; i++) {
                /* skip GPIO2, 5, 6, 7, 8, they are not
                 * valid pins allow configuration
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index 00d6eacab8e4..3352b37b60cf 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -208,6 +208,7 @@ static struct clk_lookup pxa25x_clkregs[] = {
        INIT_CLKREG(&clk_pxa25x_gpio11, NULL, "GPIO11_CLK"),
        INIT_CLKREG(&clk_pxa25x_gpio12, NULL, "GPIO12_CLK"),
        INIT_CLKREG(&clk_pxa25x_mem, "pxa2xx-pcmcia", NULL),
+        INIT_CLKREG(&clk_dummy, "pxa-gpio", NULL),
 };
 static struct clk_lookup pxa25x_hwuart_clkreg =
@@ -367,7 +368,6 @@ static int __init pxa25x_init(void)
                register_syscore_ops(&pxa_irq_syscore_ops);
                register_syscore_ops(&pxa2xx_mfp_syscore_ops);
-                register_syscore_ops(&pxa_gpio_syscore_ops);
                register_syscore_ops(&pxa2xx_clock_syscore_ops);
                ret = platform_add_devices(pxa25x_devices,
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index c1673b3441d4..6bce78edce7a 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -229,6 +229,7 @@ static struct clk_lookup pxa27x_clkregs[] = {
        INIT_CLKREG(&clk_pxa27x_im, NULL, "IMCLK"),
        INIT_CLKREG(&clk_pxa27x_memc, NULL, "MEMCLK"),
        INIT_CLKREG(&clk_pxa27x_mem, "pxa2xx-pcmcia", NULL),
+        INIT_CLKREG(&clk_dummy, "pxa-gpio", NULL),
 };
 #ifdef CONFIG_PM
@@ -455,7 +456,6 @@ static int __init pxa27x_init(void)
                register_syscore_ops(&pxa_irq_syscore_ops);
                register_syscore_ops(&pxa2xx_mfp_syscore_ops);
-                register_syscore_ops(&pxa_gpio_syscore_ops);
                register_syscore_ops(&pxa2xx_clock_syscore_ops);
                ret = platform_add_devices(devices, ARRAY_SIZE(devices));
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index 4f402afa6609..3918a672238e 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -462,7 +462,6 @@ static int __init pxa3xx_init(void)
                register_syscore_ops(&pxa_irq_syscore_ops);
                register_syscore_ops(&pxa3xx_mfp_syscore_ops);
-                register_syscore_ops(&pxa_gpio_syscore_ops);
                register_syscore_ops(&pxa3xx_clock_syscore_ops);
                ret = platform_add_devices(devices, ARRAY_SIZE(devices));
diff --git a/arch/arm/mach-pxa/pxa95x.c b/arch/arm/mach-pxa/pxa95x.c
index d082a583df78..5ce434b95e87 100644
--- a/arch/arm/mach-pxa/pxa95x.c
+++ b/arch/arm/mach-pxa/pxa95x.c
@@ -283,7 +283,6 @@ static int __init pxa95x_init(void)
                        return ret;
                register_syscore_ops(&pxa_irq_syscore_ops);
-                register_syscore_ops(&pxa_gpio_syscore_ops);
                register_syscore_ops(&pxa3xx_clock_syscore_ops);
                ret = platform_add_devices(devices, ARRAY_SIZE(devices));
diff --git a/arch/arm/mach-s3c24xx/common.h b/arch/arm/mach-s3c24xx/common.h
deleted file mode 100644
index 62a2e196a68e..000000000000
--- a/arch/arm/mach-s3c24xx/common.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * Copyright (c) 2011 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com
- *
- * Common Header for S3C2410 machines
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef __ARCH_ARM_MACH_S3C2410_COMMON_H
-#define __ARCH_ARM_MACH_S3C2410_COMMON_H
-#ifdef CONFIG_CPU_S3C2410
-void s3c2410_restart(char mode, const char *cmd);
-#endif
-#ifdef CONFIG_CPU_S3C2440
-void s3c2440_restart(char mode, const char *cmd);
-#endif
-#endif /* __ARCH_ARM_MACH_S3C2410_COMMON_H */
diff --git a/arch/arm/mach-s3c24xx/mach-anubis.c b/arch/arm/mach-s3c24xx/mach-anubis.c
index 9e0f74515bb1..60c72c54c21e 100644
--- a/arch/arm/mach-s3c24xx/mach-anubis.c
+++ b/arch/arm/mach-s3c24xx/mach-anubis.c
@@ -488,5 +488,5 @@ MACHINE_START(ANUBIS, "Simtec-Anubis")
        .init_machine   = anubis_init,
        .init_irq       = s3c24xx_init_irq,
        .timer          = &s3c24xx_timer,
-        .restart        = s3c2440_restart,
+        .restart        = s3c244x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/mach-at2440evb.c b/arch/arm/mach-s3c24xx/mach-at2440evb.c
index d6a9763110cd..d7ae49c90118 100644
--- a/arch/arm/mach-s3c24xx/mach-at2440evb.c
+++ b/arch/arm/mach-s3c24xx/mach-at2440evb.c
@@ -222,5 +222,5 @@ MACHINE_START(AT2440EVB, "AT2440EVB")
        .init_machine   = at2440evb_init,
        .init_irq       = s3c24xx_init_irq,
        .timer          = &s3c24xx_timer,
-        .restart        = s3c2440_restart,
+        .restart        = s3c244x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/mach-gta02.c b/arch/arm/mach-s3c24xx/mach-gta02.c
index d0e0ad4e6598..ba5d85394105 100644
--- a/arch/arm/mach-s3c24xx/mach-gta02.c
+++ b/arch/arm/mach-s3c24xx/mach-gta02.c
@@ -601,5 +601,5 @@ MACHINE_START(NEO1973_GTA02, "GTA02")
        .init_irq       = s3c24xx_init_irq,
        .init_machine   = gta02_machine_init,
        .timer          = &s3c24xx_timer,
-        .restart        = s3c2440_restart,
+        .restart        = s3c244x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/mach-mini2440.c b/arch/arm/mach-s3c24xx/mach-mini2440.c
index adbbb85bc4cd..5d66fb218a41 100644
--- a/arch/arm/mach-s3c24xx/mach-mini2440.c
+++ b/arch/arm/mach-s3c24xx/mach-mini2440.c
@@ -701,5 +701,5 @@ MACHINE_START(MINI2440, "MINI2440")
        .init_machine   = mini2440_init,
        .init_irq       = s3c24xx_init_irq,
        .timer          = &s3c24xx_timer,
-        .restart        = s3c2440_restart,
+        .restart        = s3c244x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/mach-nexcoder.c b/arch/arm/mach-s3c24xx/mach-nexcoder.c
index 40eaf844bc1f..5198e3e1c5be 100644
--- a/arch/arm/mach-s3c24xx/mach-nexcoder.c
+++ b/arch/arm/mach-s3c24xx/mach-nexcoder.c
@@ -158,5 +158,5 @@ MACHINE_START(NEXCODER_2440, "NexVision - Nexcoder 2440")
        .init_machine   = nexcoder_init,
        .init_irq       = s3c24xx_init_irq,
        .timer          = &s3c24xx_timer,
-        .restart        = s3c2440_restart,
+        .restart        = s3c244x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/mach-osiris.c b/arch/arm/mach-s3c24xx/mach-osiris.c
index 4c480ef734f6..c5daeb612a88 100644
--- a/arch/arm/mach-s3c24xx/mach-osiris.c
+++ b/arch/arm/mach-s3c24xx/mach-osiris.c
@@ -436,5 +436,5 @@ MACHINE_START(OSIRIS, "Simtec-OSIRIS")
        .init_irq       = s3c24xx_init_irq,
        .init_machine   = osiris_init,
        .timer          = &s3c24xx_timer,
-        .restart        = s3c2440_restart,
+        .restart        = s3c244x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/mach-rx1950.c b/arch/arm/mach-s3c24xx/mach-rx1950.c
index 4a8e2d34994c..200debb4c72d 100644
--- a/arch/arm/mach-s3c24xx/mach-rx1950.c
+++ b/arch/arm/mach-s3c24xx/mach-rx1950.c
@@ -822,5 +822,5 @@ MACHINE_START(RX1950, "HP iPAQ RX1950")
        .init_irq = s3c24xx_init_irq,
        .init_machine = rx1950_init_machine,
        .timer = &s3c24xx_timer,
-        .restart        = s3c2440_restart,
+        .restart        = s3c244x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/mach-rx3715.c b/arch/arm/mach-s3c24xx/mach-rx3715.c
index 20103bafbd4b..56af35447598 100644
--- a/arch/arm/mach-s3c24xx/mach-rx3715.c
+++ b/arch/arm/mach-s3c24xx/mach-rx3715.c
@@ -213,5 +213,5 @@ MACHINE_START(RX3715, "IPAQ-RX3715")
        .init_irq       = rx3715_init_irq,
        .init_machine   = rx3715_init_machine,
        .timer          = &s3c24xx_timer,
-        .restart        = s3c2440_restart,
+        .restart        = s3c244x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/mach-smdk2440.c b/arch/arm/mach-s3c24xx/mach-smdk2440.c
index 1deb60d12a60..83a1036d7dcb 100644
--- a/arch/arm/mach-s3c24xx/mach-smdk2440.c
+++ b/arch/arm/mach-s3c24xx/mach-smdk2440.c
@@ -183,5 +183,5 @@ MACHINE_START(S3C2440, "SMDK2440")
        .map_io         = smdk2440_map_io,
        .init_machine   = smdk2440_machine_init,
        .timer          = &s3c24xx_timer,
-        .restart        = s3c2440_restart,
+        .restart        = s3c244x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/s3c2440.c b/arch/arm/mach-s3c24xx/s3c2440.c
index 517623a09fc5..2b3dddb49af7 100644
--- a/arch/arm/mach-s3c24xx/s3c2440.c
+++ b/arch/arm/mach-s3c24xx/s3c2440.c
@@ -35,7 +35,6 @@
 #include <plat/cpu.h>
 #include <plat/s3c244x.h>
 #include <plat/pm.h>
-#include <plat/watchdog-reset.h>
 #include <plat/gpio-core.h>
 #include <plat/gpio-cfg.h>
@@ -74,15 +73,3 @@ void __init s3c2440_map_io(void)
        s3c24xx_gpiocfg_default.set_pull = s3c24xx_gpio_setpull_1up;
        s3c24xx_gpiocfg_default.get_pull = s3c24xx_gpio_getpull_1up;
 }
-void s3c2440_restart(char mode, const char *cmd)
-{
-        if (mode == 's') {
-                soft_restart(0);
-        }
-        arch_wdt_reset();
-        /* we'll take a jump through zero as a poor second */
-        soft_restart(0);
-}
diff --git a/arch/arm/mach-s3c24xx/s3c244x.c b/arch/arm/mach-s3c24xx/s3c244x.c
index 36bc60f61d0a..d15852f642b7 100644
--- a/arch/arm/mach-s3c24xx/s3c244x.c
+++ b/arch/arm/mach-s3c24xx/s3c244x.c
@@ -46,6 +46,7 @@
 #include <plat/pm.h>
 #include <plat/pll.h>
 #include <plat/nand-core.h>
+#include <plat/watchdog-reset.h>
 static struct map_desc s3c244x_iodesc[] __initdata = {
        IODESC_ENT(CLKPWR),
@@ -196,3 +197,14 @@ struct syscore_ops s3c244x_pm_syscore_ops = {
        .suspend        = s3c244x_suspend,
        .resume         = s3c244x_resume,
 };
+void s3c244x_restart(char mode, const char *cmd)
+{
+        if (mode == 's')
+                soft_restart(0);
+        arch_wdt_reset();
+        /* we'll take a jump through zero as a poor second */
+        soft_restart(0);
+}
diff --git a/arch/arm/mach-ux500/Kconfig b/arch/arm/mach-ux500/Kconfig
index 52af00446a63..c59e8b892d6b 100644
--- a/arch/arm/mach-ux500/Kconfig
+++ b/arch/arm/mach-ux500/Kconfig
@@ -5,7 +5,7 @@ config UX500_SOC_COMMON
        default y
        select ARM_GIC
        select HAS_MTU
-        select ARM_ERRATA_753970
+        select PL310_ERRATA_753970
        select ARM_ERRATA_754322
        select ARM_ERRATA_764369
diff --git a/arch/arm/mach-vexpress/Kconfig b/arch/arm/mach-vexpress/Kconfig
index 9b3d0fbaee72..88c3ba151e87 100644
--- a/arch/arm/mach-vexpress/Kconfig
+++ b/arch/arm/mach-vexpress/Kconfig
@@ -7,7 +7,7 @@ config ARCH_VEXPRESS_CA9X4
        select ARM_GIC
        select ARM_ERRATA_720789
        select ARM_ERRATA_751472
-        select ARM_ERRATA_753970
+        select PL310_ERRATA_753970
        select HAVE_SMP
        select MIGHT_HAVE_CACHE_L2X0
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 0404ccbb8aa3..f1c8486f7501 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -230,9 +230,7 @@ __v7_setup:
        mcreq   p15, 0, r10, c15, c0, 1         @ write diagnostic register
 #endif
 #ifdef CONFIG_ARM_ERRATA_743622
-        teq     r6, #0x20                       @ present in r2p0
+        teq     r5, #0x00200000                 @ only present in r2p*
-        teqne   r6, #0x21                       @ present in r2p1
-        teqne   r6, #0x22                       @ present in r2p2
        mrceq   p15, 0, r10, c15, c0, 1         @ read diagnostic register
        orreq   r10, r10, #1 << 6               @ set bit #6
        mcreq   p15, 0, r10, c15, c0, 1         @ write diagnostic register
diff --git a/arch/arm/plat-omap/include/plat/irqs.h b/arch/arm/plat-omap/include/plat/irqs.h
index 2efd6454bce0..37bbbbb981b2 100644
--- a/arch/arm/plat-omap/include/plat/irqs.h
+++ b/arch/arm/plat-omap/include/plat/irqs.h
@@ -428,8 +428,16 @@
 #define OMAP_GPMC_NR_IRQS       8
 #define OMAP_GPMC_IRQ_END       (OMAP_GPMC_IRQ_BASE + OMAP_GPMC_NR_IRQS)
+/* PRCM IRQ handler */
+#ifdef CONFIG_ARCH_OMAP2PLUS
+#define OMAP_PRCM_IRQ_BASE      (OMAP_GPMC_IRQ_END)
+#define OMAP_PRCM_NR_IRQS       64
+#define OMAP_PRCM_IRQ_END       (OMAP_PRCM_IRQ_BASE + OMAP_PRCM_NR_IRQS)
+#else
+#define OMAP_PRCM_IRQ_END       OMAP_GPMC_IRQ_END
+#endif
-#define NR_IRQS                 OMAP_GPMC_IRQ_END
+#define NR_IRQS                 OMAP_PRCM_IRQ_END
 #define OMAP_IRQ_BIT(irq)       (1 << ((irq) % 32))
diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c
index 9fe35348e03b..2bab4c99a234 100644
--- a/arch/arm/plat-s3c24xx/dma.c
+++ b/arch/arm/plat-s3c24xx/dma.c
@@ -1249,7 +1249,7 @@ static void s3c2410_dma_resume(void)
        struct s3c2410_dma_chan *cp = s3c2410_chans + dma_channels - 1;
        int channel;
-        for (channel = dma_channels - 1; channel >= 0; cp++, channel--)
+        for (channel = dma_channels - 1; channel >= 0; cp--, channel--)
                s3c2410_dma_resume_chan(cp);
 }
diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c
index 98b864777a31..d322ba883f2f 100644
--- a/arch/arm/plat-samsung/devs.c
+++ b/arch/arm/plat-samsung/devs.c
@@ -1398,7 +1398,7 @@ void __init s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd)
 #ifdef CONFIG_S3C_DEV_USB_HSOTG
 static struct resource s3c_usb_hsotg_resources[] = {
-        [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_16K),
+        [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_128K),
        [1] = DEFINE_RES_IRQ(IRQ_OTG),
 };
diff --git a/arch/arm/plat-spear/time.c b/arch/arm/plat-spear/time.c
index 0c77e4298675..abb5bdecd509 100644
--- a/arch/arm/plat-spear/time.c
+++ b/arch/arm/plat-spear/time.c
@@ -145,11 +145,13 @@ static void clockevent_set_mode(enum clock_event_mode mode,
 static int clockevent_next_event(unsigned long cycles,
                                 struct clock_event_device *clk_event_dev)
 {
-        u16 val;
+        u16 val = readw(gpt_base + CR(CLKEVT));
+        if (val & CTRL_ENABLE)
+                writew(val & ~CTRL_ENABLE, gpt_base + CR(CLKEVT));
        writew(cycles, gpt_base + LOAD(CLKEVT));
-        val = readw(gpt_base + CR(CLKEVT));
        val |= CTRL_ENABLE | CTRL_INT_ENABLE;
        writew(val, gpt_base + CR(CLKEVT));
diff --git a/arch/c6x/include/asm/processor.h b/arch/c6x/include/asm/processor.h
index 8154c4ee8c9c..77ecbded1f37 100644
--- a/arch/c6x/include/asm/processor.h
+++ b/arch/c6x/include/asm/processor.h
@@ -122,8 +122,8 @@ extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
 extern unsigned long get_wchan(struct task_struct *p);
-#define KSTK_EIP(tsk)   (task_pt_regs(task)->pc)
+#define KSTK_EIP(task)  (task_pt_regs(task)->pc)
-#define KSTK_ESP(tsk)   (task_pt_regs(task)->sp)
+#define KSTK_ESP(task)  (task_pt_regs(task)->sp)
 #define cpu_relax()             do { } while (0)
diff --git a/arch/mips/alchemy/common/time.c b/arch/mips/alchemy/common/time.c
index 7da4d0081487..a7193ae13a5d 100644
--- a/arch/mips/alchemy/common/time.c
+++ b/arch/mips/alchemy/common/time.c
@@ -146,7 +146,7 @@ static int __init alchemy_time_init(unsigned int m2int)
        cd->shift = 32;
        cd->mult = div_sc(32768, NSEC_PER_SEC, cd->shift);
        cd->max_delta_ns = clockevent_delta2ns(0xffffffff, cd);
-        cd->min_delta_ns = clockevent_delta2ns(8, cd);  /* ~0.25ms */
+        cd->min_delta_ns = clockevent_delta2ns(9, cd);  /* ~0.28ms */
        clockevents_register_device(cd);
        setup_irq(m2int, &au1x_rtcmatch2_irqaction);
diff --git a/arch/mips/ath79/dev-wmac.c b/arch/mips/ath79/dev-wmac.c
index 24f546985b69..e21507052066 100644
--- a/arch/mips/ath79/dev-wmac.c
+++ b/arch/mips/ath79/dev-wmac.c
@@ -96,7 +96,7 @@ void __init ath79_register_wmac(u8 *cal_data)
 {
        if (soc_is_ar913x())
                ar913x_wmac_setup();
-        if (soc_is_ar933x())
+        else if (soc_is_ar933x())
                ar933x_wmac_setup();
        else
                BUG();
diff --git a/arch/mips/configs/nlm_xlp_defconfig b/arch/mips/configs/nlm_xlp_defconfig
index 4479fd669ac1..28c6b276c216 100644
--- a/arch/mips/configs/nlm_xlp_defconfig
+++ b/arch/mips/configs/nlm_xlp_defconfig
@@ -8,7 +8,7 @@ CONFIG_HIGH_RES_TIMERS=y
 # CONFIG_SECCOMP is not set
 CONFIG_USE_OF=y
 CONFIG_EXPERIMENTAL=y
-CONFIG_CROSS_COMPILE="mips-linux-gnu-"
+CONFIG_CROSS_COMPILE=""
 # CONFIG_LOCALVERSION_AUTO is not set
 CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
@@ -22,7 +22,7 @@ CONFIG_AUDIT=y
 CONFIG_CGROUPS=y
 CONFIG_NAMESPACES=y
 CONFIG_BLK_DEV_INITRD=y
-CONFIG_INITRAMFS_SOURCE="usr/dev_file_list usr/rootfs.xlp"
+CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_BZIP2=y
 CONFIG_RD_LZMA=y
 CONFIG_INITRAMFS_COMPRESSION_LZMA=y
diff --git a/arch/mips/configs/nlm_xlr_defconfig b/arch/mips/configs/nlm_xlr_defconfig
index 7c68666fdd64..d0b857d98c91 100644
--- a/arch/mips/configs/nlm_xlr_defconfig
+++ b/arch/mips/configs/nlm_xlr_defconfig
@@ -8,7 +8,7 @@ CONFIG_HIGH_RES_TIMERS=y
 CONFIG_PREEMPT_VOLUNTARY=y
 CONFIG_KEXEC=y
 CONFIG_EXPERIMENTAL=y
-CONFIG_CROSS_COMPILE="mips-linux-gnu-"
+CONFIG_CROSS_COMPILE=""
 # CONFIG_LOCALVERSION_AUTO is not set
 CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
@@ -22,7 +22,7 @@ CONFIG_AUDIT=y
 CONFIG_NAMESPACES=y
 CONFIG_SCHED_AUTOGROUP=y
 CONFIG_BLK_DEV_INITRD=y
-CONFIG_INITRAMFS_SOURCE="usr/dev_file_list usr/rootfs.xlr"
+CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_BZIP2=y
 CONFIG_RD_LZMA=y
 CONFIG_INITRAMFS_COMPRESSION_GZIP=y
diff --git a/arch/mips/configs/powertv_defconfig b/arch/mips/configs/powertv_defconfig
index 3b0b6e8c8533..7fda0ce5f692 100644
--- a/arch/mips/configs/powertv_defconfig
+++ b/arch/mips/configs/powertv_defconfig
@@ -6,7 +6,7 @@ CONFIG_HZ_1000=y
 CONFIG_PREEMPT=y
 # CONFIG_SECCOMP is not set
 CONFIG_EXPERIMENTAL=y
-CONFIG_CROSS_COMPILE="mips-linux-"
+CONFIG_CROSS_COMPILE=""
 # CONFIG_SWAP is not set
 CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=16
diff --git a/arch/mips/include/asm/mach-au1x00/gpio-au1300.h b/arch/mips/include/asm/mach-au1x00/gpio-au1300.h
index 556e1be20bf6..fb9975c74c57 100644
--- a/arch/mips/include/asm/mach-au1x00/gpio-au1300.h
+++ b/arch/mips/include/asm/mach-au1x00/gpio-au1300.h
@@ -11,6 +11,9 @@
 #include <asm/io.h>
 #include <asm/mach-au1x00/au1000.h>
+struct gpio;
+struct gpio_chip;
 /* with the current GPIC design, up to 128 GPIOs are possible.
 * The only implementation so far is in the Au1300, which has 75 externally
 * available GPIOs.
@@ -203,7 +206,22 @@ static inline int gpio_request(unsigned int gpio, const char *label)
        return 0;
 }
-static inline void gpio_free(unsigned int gpio)
+static inline int gpio_request_one(unsigned gpio,
+                                        unsigned long flags, const char *label)
+{
+        return 0;
+}
+static inline int gpio_request_array(struct gpio *array, size_t num)
+{
+        return 0;
+}
+static inline void gpio_free(unsigned gpio)
+{
+}
+static inline void gpio_free_array(struct gpio *array, size_t num)
 {
 }
diff --git a/arch/mips/include/asm/page.h b/arch/mips/include/asm/page.h
index d41790928c64..da9bd7d270d1 100644
--- a/arch/mips/include/asm/page.h
+++ b/arch/mips/include/asm/page.h
@@ -39,9 +39,6 @@
 #define HPAGE_MASK      (~(HPAGE_SIZE - 1))
 #define HUGETLB_PAGE_ORDER      (HPAGE_SHIFT - PAGE_SHIFT)
 #else /* !CONFIG_HUGETLB_PAGE */
-# ifndef BUILD_BUG
-#  define BUILD_BUG() do { extern void __build_bug(void); __build_bug(); } while (0)
-# endif
 #define HPAGE_SHIFT     ({BUILD_BUG(); 0; })
 #define HPAGE_SIZE      ({BUILD_BUG(); 0; })
 #define HPAGE_MASK      ({BUILD_BUG(); 0; })
diff --git a/arch/mips/kernel/smp-bmips.c b/arch/mips/kernel/smp-bmips.c
index 58fe71afd879..d5e950ab8527 100644
--- a/arch/mips/kernel/smp-bmips.c
+++ b/arch/mips/kernel/smp-bmips.c
@@ -8,7 +8,6 @@
 * SMP support for BMIPS
 */
-#include <linux/version.h>
 #include <linux/init.h>
 #include <linux/sched.h>
 #include <linux/mm.h>
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index cc4a3f120f54..d79ae5437b58 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1135,7 +1135,7 @@ asmlinkage void do_mt(struct pt_regs *regs)
                printk(KERN_DEBUG "YIELD Scheduler Exception\n");
                break;
        case 5:
-                printk(KERN_DEBUG "Gating Storage Schedulier Exception\n");
+                printk(KERN_DEBUG "Gating Storage Scheduler Exception\n");
                break;
        default:
                printk(KERN_DEBUG "*** UNKNOWN THREAD EXCEPTION %d ***\n",
diff --git a/arch/mips/kernel/vmlinux.lds.S b/arch/mips/kernel/vmlinux.lds.S
index a81176f44c74..924da5eb7031 100644
--- a/arch/mips/kernel/vmlinux.lds.S
+++ b/arch/mips/kernel/vmlinux.lds.S
@@ -69,7 +69,6 @@ SECTIONS
        RODATA
        /* writeable */
-        _sdata = .;                             /* Start of data section */
        .data : {       /* Data */
                . = . + DATAOFFSET;             /* for CONFIG_MAPPED_KERNEL */
diff --git a/arch/mips/mm/fault.c b/arch/mips/mm/fault.c
index 937cf3368164..69ebd586d7ff 100644
--- a/arch/mips/mm/fault.c
+++ b/arch/mips/mm/fault.c
@@ -42,6 +42,8 @@ asmlinkage void __kprobes do_page_fault(struct pt_regs *regs, unsigned long writ
        const int field = sizeof(unsigned long) * 2;
        siginfo_t info;
        int fault;
+        unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE |
+                                                 (write ? FAULT_FLAG_WRITE : 0);
 #if 0
        printk("Cpu%d[%s:%d:%0*lx:%ld:%0*lx]\n", raw_smp_processor_id(),
@@ -91,6 +93,7 @@ asmlinkage void __kprobes do_page_fault(struct pt_regs *regs, unsigned long writ
        if (in_atomic() || !mm)
                goto bad_area_nosemaphore;
+retry:
        down_read(&mm->mmap_sem);
        vma = find_vma(mm, address);
        if (!vma)
@@ -144,7 +147,11 @@ good_area:
         * make sure we exit gracefully rather than endlessly redo
         * the fault.
         */
-        fault = handle_mm_fault(mm, vma, address, write ? FAULT_FLAG_WRITE : 0);
+        fault = handle_mm_fault(mm, vma, address, flags);
+        if ((fault & VM_FAULT_RETRY) && fatal_signal_pending(current))
+                return;
        perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, address);
        if (unlikely(fault & VM_FAULT_ERROR)) {
                if (fault & VM_FAULT_OOM)
@@ -153,12 +160,27 @@ good_area:
                        goto do_sigbus;
                BUG();
        }
-        if (fault & VM_FAULT_MAJOR) {
+        if (flags & FAULT_FLAG_ALLOW_RETRY) {
-                perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, regs, address);
+                if (fault & VM_FAULT_MAJOR) {
-                tsk->maj_flt++;
+                        perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1,
-        } else {
+                                                  regs, address);
-                perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, regs, address);
+                        tsk->maj_flt++;
-                tsk->min_flt++;
+                } else {
+                        perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1,
+                                                  regs, address);
+                        tsk->min_flt++;
+                }
+                if (fault & VM_FAULT_RETRY) {
+                        flags &= ~FAULT_FLAG_ALLOW_RETRY;
+                        /*
+                         * No need to up_read(&mm->mmap_sem) as we would
+                         * have already released it in __lock_page_or_retry
+                         * in mm/filemap.c.
+                         */
+                        goto retry;
+                }
        }
        up_read(&mm->mmap_sem);
diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c
index aec2b111d35b..15521505ebe8 100644
--- a/arch/mips/pci/pci.c
+++ b/arch/mips/pci/pci.c
@@ -279,7 +279,6 @@ void __devinit pcibios_fixup_bus(struct pci_bus *bus)
 {
        /* Propagate hose info into the subordinate devices.  */
-        struct list_head *ln;
        struct pci_dev *dev = bus->self;
        if (pci_probe_only && dev &&
@@ -288,9 +287,7 @@ void __devinit pcibios_fixup_bus(struct pci_bus *bus)
                pcibios_fixup_device_resources(dev, bus);
        }
-        for (ln = bus->devices.next; ln != &bus->devices; ln = ln->next) {
+        list_for_each_entry(dev, &bus->devices, bus_list) {
-                dev = pci_dev_b(ln);
                if ((dev->class >> 8) != PCI_CLASS_BRIDGE_PCI)
                        pcibios_fixup_device_resources(dev, bus);
        }
diff --git a/arch/mips/pmc-sierra/yosemite/ht-irq.c b/arch/mips/pmc-sierra/yosemite/ht-irq.c
index 86b98e98fb4f..62ead6601c69 100644
--- a/arch/mips/pmc-sierra/yosemite/ht-irq.c
+++ b/arch/mips/pmc-sierra/yosemite/ht-irq.c
@@ -35,16 +35,6 @@
 */
 void __init titan_ht_pcibios_fixup_bus(struct pci_bus *bus)
 {
-        struct pci_bus *current_bus = bus;
-        struct pci_dev *devices;
-        struct list_head *devices_link;
-        list_for_each(devices_link, &(current_bus->devices)) {
-                devices = pci_dev_b(devices_link);
-                if (devices == NULL)
-                        continue;
-        }
        /*
         * PLX and SPKT related changes go here
         */
diff --git a/arch/mips/txx9/generic/7segled.c b/arch/mips/txx9/generic/7segled.c
index 8e93b2122524..4642f56e70e5 100644
--- a/arch/mips/txx9/generic/7segled.c
+++ b/arch/mips/txx9/generic/7segled.c
@@ -102,7 +102,7 @@ static int __init tx_7segled_init_sysfs(void)
                        break;
                }
                dev->id = i;
-                dev->dev = &tx_7segled_subsys;
+                dev->bus = &tx_7segled_subsys;
                error = device_register(dev);
                if (!error) {
                        device_create_file(dev, &dev_attr_ascii);
diff --git a/arch/x86/ia32/ia32_aout.c b/arch/x86/ia32/ia32_aout.c
index fd843877e841..39e49091f648 100644
--- a/arch/x86/ia32/ia32_aout.c
+++ b/arch/x86/ia32/ia32_aout.c
@@ -315,6 +315,13 @@ static int load_aout_binary(struct linux_binprm *bprm, struct pt_regs *regs)
        current->mm->free_area_cache = TASK_UNMAPPED_BASE;
        current->mm->cached_hole_size = 0;
+        retval = setup_arg_pages(bprm, IA32_STACK_TOP, EXSTACK_DEFAULT);
+        if (retval < 0) {
+                /* Someone check-me: is this error path enough? */
+                send_sig(SIGKILL, current, 0);
+                return retval;
+        }
        install_exec_creds(bprm);
        current->flags &= ~PF_FORKNOEXEC;
@@ -410,13 +417,6 @@ beyond_if:
        set_brk(current->mm->start_brk, current->mm->brk);
-        retval = setup_arg_pages(bprm, IA32_STACK_TOP, EXSTACK_DEFAULT);
-        if (retval < 0) {
-                /* Someone check-me: is this error path enough? */
-                send_sig(SIGKILL, current, 0);
-                return retval;
-        }
        current->mm->start_stack =
                (unsigned long)create_aout_tables((char __user *)bprm->p, bprm);
        /* start thread */
diff --git a/arch/x86/lib/delay.c b/arch/x86/lib/delay.c
index fc45ba887d05..e395693abdb1 100644
--- a/arch/x86/lib/delay.c
+++ b/arch/x86/lib/delay.c
@@ -48,9 +48,9 @@ static void delay_loop(unsigned long loops)
 }
 /* TSC based delay: */
-static void delay_tsc(unsigned long loops)
+static void delay_tsc(unsigned long __loops)
 {
-        unsigned long bclock, now;
+        u32 bclock, now, loops = __loops;
        int cpu;
        preempt_disable();
diff --git a/arch/x86/mm/hugetlbpage.c b/arch/x86/mm/hugetlbpage.c
index f581a18c0d4d..8ecbb4bba4b3 100644
--- a/arch/x86/mm/hugetlbpage.c
+++ b/arch/x86/mm/hugetlbpage.c
@@ -333,13 +333,15 @@ try_again:
                 * Lookup failure means no vma is above this address,
                 * i.e. return with success:
                 */
-                if (!(vma = find_vma_prev(mm, addr, &prev_vma)))
+                vma = find_vma(mm, addr);
+                if (!vma)
                        return addr;
                /*
                 * new region fits between prev_vma->vm_end and
                 * vma->vm_start, use it:
                 */
+                prev_vma = vma->vm_prev;
                if (addr + len <= vma->vm_start &&
                            (!prev_vma || (addr >= prev_vma->vm_end))) {
                        /* remember the address as a hint for next time */
diff --git a/arch/x86/pci/acpi.c b/arch/x86/pci/acpi.c
index a312e76063a7..49a5cb55429b 100644
--- a/arch/x86/pci/acpi.c
+++ b/arch/x86/pci/acpi.c
@@ -60,6 +60,16 @@ static const struct dmi_system_id pci_use_crs_table[] __initconst = {
                        DMI_MATCH(DMI_BIOS_VENDOR, "American Megatrends Inc."),
                },
        },
+        /* https://bugzilla.kernel.org/show_bug.cgi?id=42619 */
+        {
+                .callback = set_use_crs,
+                .ident = "MSI MS-7253",
+                .matches = {
+                        DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
+                        DMI_MATCH(DMI_BOARD_NAME, "MS-7253"),
+                        DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies, LTD"),
+                },
+        },
        /* Now for the blacklist.. */
@@ -282,9 +292,6 @@ static void add_resources(struct pci_root_info *info)
        int i;
        struct resource *res, *root, *conflict;
-        if (!pci_use_crs)
-                return;
        coalesce_windows(info, IORESOURCE_MEM);
        coalesce_windows(info, IORESOURCE_IO);
@@ -336,8 +343,13 @@ get_current_resources(struct acpi_device *device, int busnum,
        acpi_walk_resources(device->handle, METHOD_NAME__CRS, setup_resource,
                                &info);
-        add_resources(&info);
+        if (pci_use_crs) {
-        return;
+                add_resources(&info);
+                return;
+        }
+        kfree(info.name);
 name_alloc_fail:
        kfree(info.res);