diff options
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-omap2/clock44xx_data.c | 33 |
1 files changed, 22 insertions, 11 deletions
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index 4821a23aa26c..c426adccad06 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c | |||
@@ -339,7 +339,8 @@ static struct clk abe_24m_fclk = { | |||
339 | .name = "abe_24m_fclk", | 339 | .name = "abe_24m_fclk", |
340 | .parent = &dpll_abe_m2x2_ck, | 340 | .parent = &dpll_abe_m2x2_ck, |
341 | .ops = &clkops_null, | 341 | .ops = &clkops_null, |
342 | .recalc = &followparent_recalc, | 342 | .fixed_div = 8, |
343 | .recalc = &omap_fixed_divisor_recalc, | ||
343 | }; | 344 | }; |
344 | 345 | ||
345 | static const struct clksel_rate div3_1to4_rates[] = { | 346 | static const struct clksel_rate div3_1to4_rates[] = { |
@@ -505,7 +506,8 @@ static struct clk ddrphy_ck = { | |||
505 | .name = "ddrphy_ck", | 506 | .name = "ddrphy_ck", |
506 | .parent = &dpll_core_m2_ck, | 507 | .parent = &dpll_core_m2_ck, |
507 | .ops = &clkops_null, | 508 | .ops = &clkops_null, |
508 | .recalc = &followparent_recalc, | 509 | .fixed_div = 2, |
510 | .recalc = &omap_fixed_divisor_recalc, | ||
509 | }; | 511 | }; |
510 | 512 | ||
511 | static struct clk dpll_core_m5x2_ck = { | 513 | static struct clk dpll_core_m5x2_ck = { |
@@ -590,7 +592,8 @@ static struct clk dll_clk_div_ck = { | |||
590 | .name = "dll_clk_div_ck", | 592 | .name = "dll_clk_div_ck", |
591 | .parent = &dpll_core_m4x2_ck, | 593 | .parent = &dpll_core_m4x2_ck, |
592 | .ops = &clkops_null, | 594 | .ops = &clkops_null, |
593 | .recalc = &followparent_recalc, | 595 | .fixed_div = 2, |
596 | .recalc = &omap_fixed_divisor_recalc, | ||
594 | }; | 597 | }; |
595 | 598 | ||
596 | static const struct clksel dpll_abe_m2_div[] = { | 599 | static const struct clksel dpll_abe_m2_div[] = { |
@@ -772,7 +775,8 @@ static struct clk per_hs_clk_div_ck = { | |||
772 | .name = "per_hs_clk_div_ck", | 775 | .name = "per_hs_clk_div_ck", |
773 | .parent = &dpll_abe_m3x2_ck, | 776 | .parent = &dpll_abe_m3x2_ck, |
774 | .ops = &clkops_null, | 777 | .ops = &clkops_null, |
775 | .recalc = &followparent_recalc, | 778 | .fixed_div = 2, |
779 | .recalc = &omap_fixed_divisor_recalc, | ||
776 | }; | 780 | }; |
777 | 781 | ||
778 | static const struct clksel per_hsd_byp_clk_mux_sel[] = { | 782 | static const struct clksel per_hsd_byp_clk_mux_sel[] = { |
@@ -986,7 +990,8 @@ static struct clk usb_hs_clk_div_ck = { | |||
986 | .name = "usb_hs_clk_div_ck", | 990 | .name = "usb_hs_clk_div_ck", |
987 | .parent = &dpll_abe_m3x2_ck, | 991 | .parent = &dpll_abe_m3x2_ck, |
988 | .ops = &clkops_null, | 992 | .ops = &clkops_null, |
989 | .recalc = &followparent_recalc, | 993 | .fixed_div = 3, |
994 | .recalc = &omap_fixed_divisor_recalc, | ||
990 | }; | 995 | }; |
991 | 996 | ||
992 | /* DPLL_USB */ | 997 | /* DPLL_USB */ |
@@ -1066,21 +1071,24 @@ static struct clk func_12m_fclk = { | |||
1066 | .name = "func_12m_fclk", | 1071 | .name = "func_12m_fclk", |
1067 | .parent = &dpll_per_m2x2_ck, | 1072 | .parent = &dpll_per_m2x2_ck, |
1068 | .ops = &clkops_null, | 1073 | .ops = &clkops_null, |
1069 | .recalc = &followparent_recalc, | 1074 | .fixed_div = 16, |
1075 | .recalc = &omap_fixed_divisor_recalc, | ||
1070 | }; | 1076 | }; |
1071 | 1077 | ||
1072 | static struct clk func_24m_clk = { | 1078 | static struct clk func_24m_clk = { |
1073 | .name = "func_24m_clk", | 1079 | .name = "func_24m_clk", |
1074 | .parent = &dpll_per_m2_ck, | 1080 | .parent = &dpll_per_m2_ck, |
1075 | .ops = &clkops_null, | 1081 | .ops = &clkops_null, |
1076 | .recalc = &followparent_recalc, | 1082 | .fixed_div = 4, |
1083 | .recalc = &omap_fixed_divisor_recalc, | ||
1077 | }; | 1084 | }; |
1078 | 1085 | ||
1079 | static struct clk func_24mc_fclk = { | 1086 | static struct clk func_24mc_fclk = { |
1080 | .name = "func_24mc_fclk", | 1087 | .name = "func_24mc_fclk", |
1081 | .parent = &dpll_per_m2x2_ck, | 1088 | .parent = &dpll_per_m2x2_ck, |
1082 | .ops = &clkops_null, | 1089 | .ops = &clkops_null, |
1083 | .recalc = &followparent_recalc, | 1090 | .fixed_div = 8, |
1091 | .recalc = &omap_fixed_divisor_recalc, | ||
1084 | }; | 1092 | }; |
1085 | 1093 | ||
1086 | static const struct clksel_rate div2_4to8_rates[] = { | 1094 | static const struct clksel_rate div2_4to8_rates[] = { |
@@ -1110,7 +1118,8 @@ static struct clk func_48mc_fclk = { | |||
1110 | .name = "func_48mc_fclk", | 1118 | .name = "func_48mc_fclk", |
1111 | .parent = &dpll_per_m2x2_ck, | 1119 | .parent = &dpll_per_m2x2_ck, |
1112 | .ops = &clkops_null, | 1120 | .ops = &clkops_null, |
1113 | .recalc = &followparent_recalc, | 1121 | .fixed_div = 4, |
1122 | .recalc = &omap_fixed_divisor_recalc, | ||
1114 | }; | 1123 | }; |
1115 | 1124 | ||
1116 | static const struct clksel_rate div2_2to4_rates[] = { | 1125 | static const struct clksel_rate div2_2to4_rates[] = { |
@@ -1227,7 +1236,8 @@ static struct clk lp_clk_div_ck = { | |||
1227 | .name = "lp_clk_div_ck", | 1236 | .name = "lp_clk_div_ck", |
1228 | .parent = &dpll_abe_m2x2_ck, | 1237 | .parent = &dpll_abe_m2x2_ck, |
1229 | .ops = &clkops_null, | 1238 | .ops = &clkops_null, |
1230 | .recalc = &followparent_recalc, | 1239 | .fixed_div = 16, |
1240 | .recalc = &omap_fixed_divisor_recalc, | ||
1231 | }; | 1241 | }; |
1232 | 1242 | ||
1233 | static const struct clksel l4_wkup_clk_mux_sel[] = { | 1243 | static const struct clksel l4_wkup_clk_mux_sel[] = { |
@@ -1295,7 +1305,8 @@ static struct clk per_abe_24m_fclk = { | |||
1295 | .name = "per_abe_24m_fclk", | 1305 | .name = "per_abe_24m_fclk", |
1296 | .parent = &dpll_abe_m2_ck, | 1306 | .parent = &dpll_abe_m2_ck, |
1297 | .ops = &clkops_null, | 1307 | .ops = &clkops_null, |
1298 | .recalc = &followparent_recalc, | 1308 | .fixed_div = 4, |
1309 | .recalc = &omap_fixed_divisor_recalc, | ||
1299 | }; | 1310 | }; |
1300 | 1311 | ||
1301 | static const struct clksel pmd_stm_clock_mux_sel[] = { | 1312 | static const struct clksel pmd_stm_clock_mux_sel[] = { |