aboutsummaryrefslogtreecommitdiffstats
path: root/arch
diff options
context:
space:
mode:
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/Kconfig3
-rw-r--r--arch/arm/boot/dts/imx51-babbage.dts17
-rw-r--r--arch/arm/boot/dts/imx51.dtsi20
-rw-r--r--arch/arm/boot/dts/imx53-ard.dts18
-rw-r--r--arch/arm/boot/dts/imx53-evk.dts17
-rw-r--r--arch/arm/boot/dts/imx53-qsb.dts18
-rw-r--r--arch/arm/boot/dts/imx53-smd.dts19
-rw-r--r--arch/arm/boot/dts/imx53.dtsi34
-rw-r--r--arch/arm/boot/dts/imx6q-arm2.dts (renamed from arch/arm/boot/dts/imx6q-sabreauto.dts)12
-rw-r--r--arch/arm/boot/dts/imx6q-sabrelite.dts49
-rw-r--r--arch/arm/boot/dts/imx6q.dtsi34
-rw-r--r--arch/arm/configs/imx_v4_v5_defconfig1
-rw-r--r--arch/arm/configs/omap1_defconfig5
-rw-r--r--arch/arm/include/asm/unwind.h16
-rw-r--r--arch/arm/kernel/perf_event.c9
-rw-r--r--arch/arm/kernel/setup.c14
-rw-r--r--arch/arm/kernel/unwind.c129
-rw-r--r--arch/arm/mach-at91/at91rm9200_devices.c2
-rw-r--r--arch/arm/mach-at91/at91sam9260.c6
-rw-r--r--arch/arm/mach-at91/at91sam9260_devices.c2
-rw-r--r--arch/arm/mach-at91/at91sam9261_devices.c2
-rw-r--r--arch/arm/mach-at91/at91sam9263_devices.c2
-rw-r--r--arch/arm/mach-at91/include/mach/system_rev.h2
-rw-r--r--arch/arm/mach-davinci/board-da850-evm.c2
-rw-r--r--arch/arm/mach-davinci/board-dm365-evm.c2
-rw-r--r--arch/arm/mach-davinci/board-dm646x-evm.c6
-rw-r--r--arch/arm/mach-davinci/dm646x.c1
-rw-r--r--arch/arm/mach-davinci/include/mach/psc.h5
-rw-r--r--arch/arm/mach-davinci/psc.c18
-rw-r--r--arch/arm/mach-exynos/mct.c13
-rw-r--r--arch/arm/mach-imx/Kconfig1
-rw-r--r--arch/arm/mach-imx/Makefile.boot3
-rw-r--r--arch/arm/mach-imx/mach-apf9328.c10
-rw-r--r--arch/arm/mach-imx/mach-imx6q.c33
-rw-r--r--arch/arm/mach-imx/mach-mx31_3ds.c2
-rw-r--r--arch/arm/mach-msm/devices-iommu.c1
-rw-r--r--arch/arm/mach-mx5/board-mx51_babbage.c2
-rw-r--r--arch/arm/mach-mx5/board-mx53_evk.c2
-rw-r--r--arch/arm/mach-mx5/board-mx53_loco.c2
-rw-r--r--arch/arm/mach-mx5/board-mx53_smd.c2
-rw-r--r--arch/arm/mach-mx5/imx51-dt.c12
-rw-r--r--arch/arm/mach-mx5/imx53-dt.c12
-rw-r--r--arch/arm/mach-mxs/include/mach/mx28.h4
-rw-r--r--arch/arm/mach-mxs/include/mach/mxs.h1
-rw-r--r--arch/arm/mach-mxs/mach-m28evk.c2
-rw-r--r--arch/arm/mach-mxs/mach-stmp378x_devb.c2
-rw-r--r--arch/arm/mach-mxs/module-tx28.c4
-rw-r--r--arch/arm/mach-omap1/clock_data.c12
-rw-r--r--arch/arm/mach-omap2/Kconfig16
-rw-r--r--arch/arm/mach-omap2/Makefile1
-rw-r--r--arch/arm/mach-omap2/board-4430sdp.c6
-rw-r--r--arch/arm/mach-omap2/board-cm-t35.c82
-rw-r--r--arch/arm/mach-omap2/board-rx51-peripherals.c48
-rw-r--r--arch/arm/mach-omap2/board-ti8168evm.c42
-rw-r--r--arch/arm/mach-omap2/clock.c2
-rw-r--r--arch/arm/mach-omap2/clock.h2
-rw-r--r--arch/arm/mach-omap2/clock3xxx_data.c6
-rw-r--r--arch/arm/mach-omap2/common.c48
-rw-r--r--arch/arm/mach-omap2/common.h23
-rw-r--r--arch/arm/mach-omap2/control.h8
-rw-r--r--arch/arm/mach-omap2/devices.c22
-rw-r--r--arch/arm/mach-omap2/id.c52
-rw-r--r--arch/arm/mach-omap2/include/mach/debug-macro.S12
-rw-r--r--arch/arm/mach-omap2/io.c38
-rw-r--r--arch/arm/mach-omap2/irq.c2
-rw-r--r--arch/arm/mach-omap2/mcbsp.c6
-rw-r--r--arch/arm/mach-omap2/omap_phy_internal.c35
-rw-r--r--arch/arm/mach-omap2/opp2xxx.h2
-rw-r--r--arch/arm/mach-omap2/sdram-nokia.c25
-rw-r--r--arch/arm/mach-omap2/serial.c6
-rw-r--r--arch/arm/mach-omap2/usb-musb.c3
-rw-r--r--arch/arm/mach-prima2/pm.c1
-rw-r--r--arch/arm/mach-prima2/prima2.c1
-rw-r--r--arch/arm/mach-pxa/mioa701.c29
-rw-r--r--arch/arm/mach-s3c2440/mach-mini2440.c18
-rw-r--r--arch/arm/mach-s3c64xx/Kconfig6
-rw-r--r--arch/arm/mach-s3c64xx/dev-spi.c1
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/crag6410.h6
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/gpio.h2
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/irqs.h2
-rw-r--r--arch/arm/mach-s3c64xx/mach-crag6410-module.c56
-rw-r--r--arch/arm/mach-s3c64xx/mach-crag6410.c39
-rw-r--r--arch/arm/mach-s3c64xx/pm.c15
-rw-r--r--arch/arm/mach-s3c64xx/s3c6400.c2
-rw-r--r--arch/arm/mach-s3c64xx/setup-fb-24bpp.c2
-rw-r--r--arch/arm/mach-s5pv210/mach-smdkv210.c1
-rw-r--r--arch/arm/mach-sa1100/Makefile.boot4
-rw-r--r--arch/arm/mach-tegra/Makefile1
-rw-r--r--arch/arm/mach-tegra/board-dt-tegra20.c16
-rw-r--r--arch/arm/mach-tegra/board-harmony-pcie.c10
-rw-r--r--arch/arm/mach-tegra/board-harmony-pinmux.c22
-rw-r--r--arch/arm/mach-tegra/board-paz00-pinmux.c24
-rw-r--r--arch/arm/mach-tegra/board-paz00.c27
-rw-r--r--arch/arm/mach-tegra/board-paz00.h3
-rw-r--r--arch/arm/mach-tegra/board-pinmux.c104
-rw-r--r--arch/arm/mach-tegra/board-pinmux.h38
-rw-r--r--arch/arm/mach-tegra/board-seaboard-pinmux.c120
-rw-r--r--arch/arm/mach-tegra/board-trimslice-pinmux.c26
-rw-r--r--arch/arm/mach-tegra/pcie.c1
-rw-r--r--arch/arm/plat-mxc/cpufreq.c1
-rw-r--r--arch/arm/plat-mxc/include/mach/iomux-mx25.h4
-rw-r--r--arch/arm/plat-mxc/pwm.c7
-rw-r--r--arch/arm/plat-omap/Makefile1
-rw-r--r--arch/arm/plat-omap/include/plat/am33xx.h25
-rw-r--r--arch/arm/plat-omap/include/plat/clock.h4
-rw-r--r--arch/arm/plat-omap/include/plat/cpu.h56
-rw-r--r--arch/arm/plat-omap/include/plat/hardware.h3
-rw-r--r--arch/arm/plat-omap/include/plat/io.h12
-rw-r--r--arch/arm/plat-omap/include/plat/omap34xx.h2
-rw-r--r--arch/arm/plat-omap/include/plat/serial.h14
-rw-r--r--arch/arm/plat-omap/include/plat/ti81xx.h (renamed from arch/arm/plat-omap/include/plat/ti816x.h)18
-rw-r--r--arch/arm/plat-omap/include/plat/uncompress.h11
-rw-r--r--arch/arm/plat-omap/include/plat/usb.h32
-rw-r--r--arch/arm/plat-samsung/Kconfig8
-rw-r--r--arch/arm/plat-samsung/dev-backlight.c1
-rw-r--r--arch/m68k/include/asm/unistd.h4
-rw-r--r--arch/m68k/kernel/syscalltable.S2
-rw-r--r--arch/mips/kernel/perf_event_mipsxx.c8
-rw-r--r--arch/s390/include/asm/pgtable.h8
-rw-r--r--arch/s390/kernel/ptrace.c30
-rw-r--r--arch/s390/kernel/setup.c2
-rw-r--r--arch/s390/kernel/signal.c8
-rw-r--r--arch/sparc/kernel/ds.c6
-rw-r--r--arch/sparc/kernel/prom_common.c4
-rw-r--r--arch/sparc/mm/btfixup.c3
-rw-r--r--arch/tile/include/asm/irq.h10
-rw-r--r--arch/tile/kernel/irq.c16
-rw-r--r--arch/tile/kernel/pci-dma.c1
-rw-r--r--arch/tile/kernel/pci.c1
-rw-r--r--arch/tile/kernel/sysfs.c1
-rw-r--r--arch/tile/lib/exports.c3
-rw-r--r--arch/tile/mm/homecache.c9
-rw-r--r--arch/x86/Kconfig8
-rw-r--r--arch/x86/include/asm/intel_scu_ipc.h14
-rw-r--r--arch/x86/include/asm/mrst.h9
-rw-r--r--arch/x86/include/asm/msr.h9
-rw-r--r--arch/x86/include/asm/system.h1
-rw-r--r--arch/x86/include/asm/timer.h23
-rw-r--r--arch/x86/include/asm/uv/uv_mmrs.h1
-rw-r--r--arch/x86/kernel/apic/x2apic_uv_x.c2
-rw-r--r--arch/x86/kernel/cpu/amd.c8
-rw-r--r--arch/x86/kernel/cpu/mtrr/generic.c2
-rw-r--r--arch/x86/kernel/cpu/perf_event.c16
-rw-r--r--arch/x86/kernel/cpu/perf_event_amd_ibs.c29
-rw-r--r--arch/x86/kernel/cpu/perf_event_intel.c8
-rw-r--r--arch/x86/kernel/cpu/perf_event_intel_ds.c6
-rw-r--r--arch/x86/kernel/cpu/perf_event_p4.c2
-rw-r--r--arch/x86/kernel/hpet.c21
-rw-r--r--arch/x86/kernel/irq_64.c3
-rw-r--r--arch/x86/kernel/microcode_core.c28
-rw-r--r--arch/x86/kernel/mpparse.c2
-rw-r--r--arch/x86/kernel/process.c8
-rw-r--r--arch/x86/kernel/quirks.c13
-rw-r--r--arch/x86/kernel/reboot.c21
-rw-r--r--arch/x86/kernel/rtc.c5
-rw-r--r--arch/x86/mm/gup.c2
-rw-r--r--arch/x86/mm/highmem_32.c2
-rw-r--r--arch/x86/oprofile/init.c7
-rw-r--r--arch/x86/platform/efi/efi_32.c48
-rw-r--r--arch/x86/platform/mrst/mrst.c68
-rw-r--r--arch/x86/xen/setup.c20
161 files changed, 1675 insertions, 675 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index abba5b8c9d74..a02385b2444c 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -220,8 +220,9 @@ config NEED_MACH_MEMORY_H
220 be avoided when possible. 220 be avoided when possible.
221 221
222config PHYS_OFFSET 222config PHYS_OFFSET
223 hex "Physical address of main memory" 223 hex "Physical address of main memory" if MMU
224 depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H 224 depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H
225 default DRAM_BASE if !MMU
225 help 226 help
226 Please provide the physical address corresponding to the 227 Please provide the physical address corresponding to the
227 location of main memory in your system. 228 location of main memory in your system.
diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts
index f8766af11215..564cb8c19f15 100644
--- a/arch/arm/boot/dts/imx51-babbage.dts
+++ b/arch/arm/boot/dts/imx51-babbage.dts
@@ -35,20 +35,19 @@
35 }; 35 };
36 36
37 esdhc@70008000 { /* ESDHC2 */ 37 esdhc@70008000 { /* ESDHC2 */
38 cd-gpios = <&gpio0 6 0>; /* GPIO1_6 */ 38 cd-gpios = <&gpio1 6 0>;
39 wp-gpios = <&gpio0 5 0>; /* GPIO1_5 */ 39 wp-gpios = <&gpio1 5 0>;
40 status = "okay"; 40 status = "okay";
41 }; 41 };
42 42
43 uart2: uart@7000c000 { /* UART3 */ 43 uart3: uart@7000c000 {
44 fsl,uart-has-rtscts; 44 fsl,uart-has-rtscts;
45 status = "okay"; 45 status = "okay";
46 }; 46 };
47 47
48 ecspi@70010000 { /* ECSPI1 */ 48 ecspi@70010000 { /* ECSPI1 */
49 fsl,spi-num-chipselects = <2>; 49 fsl,spi-num-chipselects = <2>;
50 cs-gpios = <&gpio3 24 0>, /* GPIO4_24 */ 50 cs-gpios = <&gpio4 24 0>, <&gpio4 25 0>;
51 <&gpio3 25 0>; /* GPIO4_25 */
52 status = "okay"; 51 status = "okay";
53 52
54 pmic: mc13892@0 { 53 pmic: mc13892@0 {
@@ -57,7 +56,7 @@
57 compatible = "fsl,mc13892"; 56 compatible = "fsl,mc13892";
58 spi-max-frequency = <6000000>; 57 spi-max-frequency = <6000000>;
59 reg = <0>; 58 reg = <0>;
60 mc13xxx-irq-gpios = <&gpio0 8 0>; /* GPIO1_8 */ 59 mc13xxx-irq-gpios = <&gpio1 8 0>;
61 fsl,mc13xxx-uses-regulator; 60 fsl,mc13xxx-uses-regulator;
62 }; 61 };
63 62
@@ -91,12 +90,12 @@
91 reg = <0x73fa8000 0x4000>; 90 reg = <0x73fa8000 0x4000>;
92 }; 91 };
93 92
94 uart0: uart@73fbc000 { 93 uart1: uart@73fbc000 {
95 fsl,uart-has-rtscts; 94 fsl,uart-has-rtscts;
96 status = "okay"; 95 status = "okay";
97 }; 96 };
98 97
99 uart1: uart@73fc0000 { 98 uart2: uart@73fc0000 {
100 status = "okay"; 99 status = "okay";
101 }; 100 };
102 }; 101 };
@@ -127,7 +126,7 @@
127 126
128 power { 127 power {
129 label = "Power Button"; 128 label = "Power Button";
130 gpios = <&gpio1 21 0>; 129 gpios = <&gpio2 21 0>;
131 linux,code = <116>; /* KEY_POWER */ 130 linux,code = <116>; /* KEY_POWER */
132 gpio-key,wakeup; 131 gpio-key,wakeup;
133 }; 132 };
diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi
index 327ab8e3a4c8..6663986fe1c8 100644
--- a/arch/arm/boot/dts/imx51.dtsi
+++ b/arch/arm/boot/dts/imx51.dtsi
@@ -14,9 +14,9 @@
14 14
15/ { 15/ {
16 aliases { 16 aliases {
17 serial0 = &uart0; 17 serial0 = &uart1;
18 serial1 = &uart1; 18 serial1 = &uart2;
19 serial2 = &uart2; 19 serial2 = &uart3;
20 }; 20 };
21 21
22 tzic: tz-interrupt-controller@e0000000 { 22 tzic: tz-interrupt-controller@e0000000 {
@@ -86,7 +86,7 @@
86 status = "disabled"; 86 status = "disabled";
87 }; 87 };
88 88
89 uart2: uart@7000c000 { /* UART3 */ 89 uart3: uart@7000c000 {
90 compatible = "fsl,imx51-uart", "fsl,imx21-uart"; 90 compatible = "fsl,imx51-uart", "fsl,imx21-uart";
91 reg = <0x7000c000 0x4000>; 91 reg = <0x7000c000 0x4000>;
92 interrupts = <33>; 92 interrupts = <33>;
@@ -117,7 +117,7 @@
117 }; 117 };
118 }; 118 };
119 119
120 gpio0: gpio@73f84000 { /* GPIO1 */ 120 gpio1: gpio@73f84000 {
121 compatible = "fsl,imx51-gpio", "fsl,imx31-gpio"; 121 compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
122 reg = <0x73f84000 0x4000>; 122 reg = <0x73f84000 0x4000>;
123 interrupts = <50 51>; 123 interrupts = <50 51>;
@@ -127,7 +127,7 @@
127 #interrupt-cells = <1>; 127 #interrupt-cells = <1>;
128 }; 128 };
129 129
130 gpio1: gpio@73f88000 { /* GPIO2 */ 130 gpio2: gpio@73f88000 {
131 compatible = "fsl,imx51-gpio", "fsl,imx31-gpio"; 131 compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
132 reg = <0x73f88000 0x4000>; 132 reg = <0x73f88000 0x4000>;
133 interrupts = <52 53>; 133 interrupts = <52 53>;
@@ -137,7 +137,7 @@
137 #interrupt-cells = <1>; 137 #interrupt-cells = <1>;
138 }; 138 };
139 139
140 gpio2: gpio@73f8c000 { /* GPIO3 */ 140 gpio3: gpio@73f8c000 {
141 compatible = "fsl,imx51-gpio", "fsl,imx31-gpio"; 141 compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
142 reg = <0x73f8c000 0x4000>; 142 reg = <0x73f8c000 0x4000>;
143 interrupts = <54 55>; 143 interrupts = <54 55>;
@@ -147,7 +147,7 @@
147 #interrupt-cells = <1>; 147 #interrupt-cells = <1>;
148 }; 148 };
149 149
150 gpio3: gpio@73f90000 { /* GPIO4 */ 150 gpio4: gpio@73f90000 {
151 compatible = "fsl,imx51-gpio", "fsl,imx31-gpio"; 151 compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
152 reg = <0x73f90000 0x4000>; 152 reg = <0x73f90000 0x4000>;
153 interrupts = <56 57>; 153 interrupts = <56 57>;
@@ -171,14 +171,14 @@
171 status = "disabled"; 171 status = "disabled";
172 }; 172 };
173 173
174 uart0: uart@73fbc000 { 174 uart1: uart@73fbc000 {
175 compatible = "fsl,imx51-uart", "fsl,imx21-uart"; 175 compatible = "fsl,imx51-uart", "fsl,imx21-uart";
176 reg = <0x73fbc000 0x4000>; 176 reg = <0x73fbc000 0x4000>;
177 interrupts = <31>; 177 interrupts = <31>;
178 status = "disabled"; 178 status = "disabled";
179 }; 179 };
180 180
181 uart1: uart@73fc0000 { 181 uart2: uart@73fc0000 {
182 compatible = "fsl,imx51-uart", "fsl,imx21-uart"; 182 compatible = "fsl,imx51-uart", "fsl,imx21-uart";
183 reg = <0x73fc0000 0x4000>; 183 reg = <0x73fc0000 0x4000>;
184 interrupts = <32>; 184 interrupts = <32>;
diff --git a/arch/arm/boot/dts/imx53-ard.dts b/arch/arm/boot/dts/imx53-ard.dts
index 2ab7f80a0a35..2dccce46ed81 100644
--- a/arch/arm/boot/dts/imx53-ard.dts
+++ b/arch/arm/boot/dts/imx53-ard.dts
@@ -29,8 +29,8 @@
29 aips@50000000 { /* AIPS1 */ 29 aips@50000000 { /* AIPS1 */
30 spba@50000000 { 30 spba@50000000 {
31 esdhc@50004000 { /* ESDHC1 */ 31 esdhc@50004000 { /* ESDHC1 */
32 cd-gpios = <&gpio0 1 0>; /* GPIO1_1 */ 32 cd-gpios = <&gpio1 1 0>;
33 wp-gpios = <&gpio0 9 0>; /* GPIO1_9 */ 33 wp-gpios = <&gpio1 9 0>;
34 status = "okay"; 34 status = "okay";
35 }; 35 };
36 }; 36 };
@@ -44,7 +44,7 @@
44 reg = <0x53fa8000 0x4000>; 44 reg = <0x53fa8000 0x4000>;
45 }; 45 };
46 46
47 uart0: uart@53fbc000 { /* UART1 */ 47 uart1: uart@53fbc000 {
48 status = "okay"; 48 status = "okay";
49 }; 49 };
50 }; 50 };
@@ -67,7 +67,7 @@
67 compatible = "smsc,lan9220", "smsc,lan9115"; 67 compatible = "smsc,lan9220", "smsc,lan9115";
68 reg = <0xf4000000 0x2000000>; 68 reg = <0xf4000000 0x2000000>;
69 phy-mode = "mii"; 69 phy-mode = "mii";
70 interrupt-parent = <&gpio1>; 70 interrupt-parent = <&gpio2>;
71 interrupts = <31>; 71 interrupts = <31>;
72 reg-io-width = <4>; 72 reg-io-width = <4>;
73 smsc,irq-push-pull; 73 smsc,irq-push-pull;
@@ -79,34 +79,34 @@
79 79
80 home { 80 home {
81 label = "Home"; 81 label = "Home";
82 gpios = <&gpio4 10 0>; /* GPIO5_10 */ 82 gpios = <&gpio5 10 0>;
83 linux,code = <102>; /* KEY_HOME */ 83 linux,code = <102>; /* KEY_HOME */
84 gpio-key,wakeup; 84 gpio-key,wakeup;
85 }; 85 };
86 86
87 back { 87 back {
88 label = "Back"; 88 label = "Back";
89 gpios = <&gpio4 11 0>; /* GPIO5_11 */ 89 gpios = <&gpio5 11 0>;
90 linux,code = <158>; /* KEY_BACK */ 90 linux,code = <158>; /* KEY_BACK */
91 gpio-key,wakeup; 91 gpio-key,wakeup;
92 }; 92 };
93 93
94 program { 94 program {
95 label = "Program"; 95 label = "Program";
96 gpios = <&gpio4 12 0>; /* GPIO5_12 */ 96 gpios = <&gpio5 12 0>;
97 linux,code = <362>; /* KEY_PROGRAM */ 97 linux,code = <362>; /* KEY_PROGRAM */
98 gpio-key,wakeup; 98 gpio-key,wakeup;
99 }; 99 };
100 100
101 volume-up { 101 volume-up {
102 label = "Volume Up"; 102 label = "Volume Up";
103 gpios = <&gpio4 13 0>; /* GPIO5_13 */ 103 gpios = <&gpio5 13 0>;
104 linux,code = <115>; /* KEY_VOLUMEUP */ 104 linux,code = <115>; /* KEY_VOLUMEUP */
105 }; 105 };
106 106
107 volume-down { 107 volume-down {
108 label = "Volume Down"; 108 label = "Volume Down";
109 gpios = <&gpio3 0 0>; /* GPIO4_0 */ 109 gpios = <&gpio4 0 0>;
110 linux,code = <114>; /* KEY_VOLUMEDOWN */ 110 linux,code = <114>; /* KEY_VOLUMEDOWN */
111 }; 111 };
112 }; 112 };
diff --git a/arch/arm/boot/dts/imx53-evk.dts b/arch/arm/boot/dts/imx53-evk.dts
index 3f3a88185ff8..5bac4aa4800b 100644
--- a/arch/arm/boot/dts/imx53-evk.dts
+++ b/arch/arm/boot/dts/imx53-evk.dts
@@ -29,15 +29,14 @@
29 aips@50000000 { /* AIPS1 */ 29 aips@50000000 { /* AIPS1 */
30 spba@50000000 { 30 spba@50000000 {
31 esdhc@50004000 { /* ESDHC1 */ 31 esdhc@50004000 { /* ESDHC1 */
32 cd-gpios = <&gpio2 13 0>; /* GPIO3_13 */ 32 cd-gpios = <&gpio3 13 0>;
33 wp-gpios = <&gpio2 14 0>; /* GPIO3_14 */ 33 wp-gpios = <&gpio3 14 0>;
34 status = "okay"; 34 status = "okay";
35 }; 35 };
36 36
37 ecspi@50010000 { /* ECSPI1 */ 37 ecspi@50010000 { /* ECSPI1 */
38 fsl,spi-num-chipselects = <2>; 38 fsl,spi-num-chipselects = <2>;
39 cs-gpios = <&gpio1 30 0>, /* GPIO2_30 */ 39 cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>;
40 <&gpio2 19 0>; /* GPIO3_19 */
41 status = "okay"; 40 status = "okay";
42 41
43 flash: at45db321d@1 { 42 flash: at45db321d@1 {
@@ -61,8 +60,8 @@
61 }; 60 };
62 61
63 esdhc@50020000 { /* ESDHC3 */ 62 esdhc@50020000 { /* ESDHC3 */
64 cd-gpios = <&gpio2 11 0>; /* GPIO3_11 */ 63 cd-gpios = <&gpio3 11 0>;
65 wp-gpios = <&gpio2 12 0>; /* GPIO3_12 */ 64 wp-gpios = <&gpio3 12 0>;
66 status = "okay"; 65 status = "okay";
67 }; 66 };
68 }; 67 };
@@ -76,7 +75,7 @@
76 reg = <0x53fa8000 0x4000>; 75 reg = <0x53fa8000 0x4000>;
77 }; 76 };
78 77
79 uart0: uart@53fbc000 { /* UART1 */ 78 uart1: uart@53fbc000 {
80 status = "okay"; 79 status = "okay";
81 }; 80 };
82 }; 81 };
@@ -102,7 +101,7 @@
102 101
103 fec@63fec000 { 102 fec@63fec000 {
104 phy-mode = "rmii"; 103 phy-mode = "rmii";
105 phy-reset-gpios = <&gpio6 6 0>; /* GPIO7_6 */ 104 phy-reset-gpios = <&gpio7 6 0>;
106 status = "okay"; 105 status = "okay";
107 }; 106 };
108 }; 107 };
@@ -113,7 +112,7 @@
113 112
114 green { 113 green {
115 label = "Heartbeat"; 114 label = "Heartbeat";
116 gpios = <&gpio6 7 0>; /* GPIO7_7 */ 115 gpios = <&gpio7 7 0>;
117 linux,default-trigger = "heartbeat"; 116 linux,default-trigger = "heartbeat";
118 }; 117 };
119 }; 118 };
diff --git a/arch/arm/boot/dts/imx53-qsb.dts b/arch/arm/boot/dts/imx53-qsb.dts
index ae6de6d0c3f1..5c57c8672c36 100644
--- a/arch/arm/boot/dts/imx53-qsb.dts
+++ b/arch/arm/boot/dts/imx53-qsb.dts
@@ -29,13 +29,13 @@
29 aips@50000000 { /* AIPS1 */ 29 aips@50000000 { /* AIPS1 */
30 spba@50000000 { 30 spba@50000000 {
31 esdhc@50004000 { /* ESDHC1 */ 31 esdhc@50004000 { /* ESDHC1 */
32 cd-gpios = <&gpio2 13 0>; /* GPIO3_13 */ 32 cd-gpios = <&gpio3 13 0>;
33 status = "okay"; 33 status = "okay";
34 }; 34 };
35 35
36 esdhc@50020000 { /* ESDHC3 */ 36 esdhc@50020000 { /* ESDHC3 */
37 cd-gpios = <&gpio2 11 0>; /* GPIO3_11 */ 37 cd-gpios = <&gpio3 11 0>;
38 wp-gpios = <&gpio2 12 0>; /* GPIO3_12 */ 38 wp-gpios = <&gpio3 12 0>;
39 status = "okay"; 39 status = "okay";
40 }; 40 };
41 }; 41 };
@@ -49,7 +49,7 @@
49 reg = <0x53fa8000 0x4000>; 49 reg = <0x53fa8000 0x4000>;
50 }; 50 };
51 51
52 uart0: uart@53fbc000 { /* UART1 */ 52 uart1: uart@53fbc000 {
53 status = "okay"; 53 status = "okay";
54 }; 54 };
55 }; 55 };
@@ -84,7 +84,7 @@
84 84
85 fec@63fec000 { 85 fec@63fec000 {
86 phy-mode = "rmii"; 86 phy-mode = "rmii";
87 phy-reset-gpios = <&gpio6 6 0>; /* GPIO7_6 */ 87 phy-reset-gpios = <&gpio7 6 0>;
88 status = "okay"; 88 status = "okay";
89 }; 89 };
90 }; 90 };
@@ -95,20 +95,20 @@
95 95
96 power { 96 power {
97 label = "Power Button"; 97 label = "Power Button";
98 gpios = <&gpio0 8 0>; /* GPIO1_8 */ 98 gpios = <&gpio1 8 0>;
99 linux,code = <116>; /* KEY_POWER */ 99 linux,code = <116>; /* KEY_POWER */
100 gpio-key,wakeup; 100 gpio-key,wakeup;
101 }; 101 };
102 102
103 volume-up { 103 volume-up {
104 label = "Volume Up"; 104 label = "Volume Up";
105 gpios = <&gpio1 14 0>; /* GPIO2_14 */ 105 gpios = <&gpio2 14 0>;
106 linux,code = <115>; /* KEY_VOLUMEUP */ 106 linux,code = <115>; /* KEY_VOLUMEUP */
107 }; 107 };
108 108
109 volume-down { 109 volume-down {
110 label = "Volume Down"; 110 label = "Volume Down";
111 gpios = <&gpio1 15 0>; /* GPIO2_15 */ 111 gpios = <&gpio2 15 0>;
112 linux,code = <114>; /* KEY_VOLUMEDOWN */ 112 linux,code = <114>; /* KEY_VOLUMEDOWN */
113 }; 113 };
114 }; 114 };
@@ -118,7 +118,7 @@
118 118
119 user { 119 user {
120 label = "Heartbeat"; 120 label = "Heartbeat";
121 gpios = <&gpio6 7 0>; /* GPIO7_7 */ 121 gpios = <&gpio7 7 0>;
122 linux,default-trigger = "heartbeat"; 122 linux,default-trigger = "heartbeat";
123 }; 123 };
124 }; 124 };
diff --git a/arch/arm/boot/dts/imx53-smd.dts b/arch/arm/boot/dts/imx53-smd.dts
index b1c062eea715..c7ee86c2dfb5 100644
--- a/arch/arm/boot/dts/imx53-smd.dts
+++ b/arch/arm/boot/dts/imx53-smd.dts
@@ -29,8 +29,8 @@
29 aips@50000000 { /* AIPS1 */ 29 aips@50000000 { /* AIPS1 */
30 spba@50000000 { 30 spba@50000000 {
31 esdhc@50004000 { /* ESDHC1 */ 31 esdhc@50004000 { /* ESDHC1 */
32 cd-gpios = <&gpio2 13 0>; /* GPIO3_13 */ 32 cd-gpios = <&gpio3 13 0>;
33 wp-gpios = <&gpio3 11 0>; /* GPIO4_11 */ 33 wp-gpios = <&gpio4 11 0>;
34 status = "okay"; 34 status = "okay";
35 }; 35 };
36 36
@@ -39,15 +39,14 @@
39 status = "okay"; 39 status = "okay";
40 }; 40 };
41 41
42 uart2: uart@5000c000 { /* UART3 */ 42 uart3: uart@5000c000 {
43 fsl,uart-has-rtscts; 43 fsl,uart-has-rtscts;
44 status = "okay"; 44 status = "okay";
45 }; 45 };
46 46
47 ecspi@50010000 { /* ECSPI1 */ 47 ecspi@50010000 { /* ECSPI1 */
48 fsl,spi-num-chipselects = <2>; 48 fsl,spi-num-chipselects = <2>;
49 cs-gpios = <&gpio1 30 0>, /* GPIO2_30 */ 49 cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>;
50 <&gpio2 19 0>; /* GPIO3_19 */
51 status = "okay"; 50 status = "okay";
52 51
53 zigbee: mc1323@0 { 52 zigbee: mc1323@0 {
@@ -91,11 +90,11 @@
91 reg = <0x53fa8000 0x4000>; 90 reg = <0x53fa8000 0x4000>;
92 }; 91 };
93 92
94 uart0: uart@53fbc000 { /* UART1 */ 93 uart1: uart@53fbc000 {
95 status = "okay"; 94 status = "okay";
96 }; 95 };
97 96
98 uart1: uart@53fc0000 { /* UART2 */ 97 uart2: uart@53fc0000 {
99 status = "okay"; 98 status = "okay";
100 }; 99 };
101 }; 100 };
@@ -145,7 +144,7 @@
145 144
146 fec@63fec000 { 145 fec@63fec000 {
147 phy-mode = "rmii"; 146 phy-mode = "rmii";
148 phy-reset-gpios = <&gpio6 6 0>; /* GPIO7_6 */ 147 phy-reset-gpios = <&gpio7 6 0>;
149 status = "okay"; 148 status = "okay";
150 }; 149 };
151 }; 150 };
@@ -156,13 +155,13 @@
156 155
157 volume-up { 156 volume-up {
158 label = "Volume Up"; 157 label = "Volume Up";
159 gpios = <&gpio1 14 0>; /* GPIO2_14 */ 158 gpios = <&gpio2 14 0>;
160 linux,code = <115>; /* KEY_VOLUMEUP */ 159 linux,code = <115>; /* KEY_VOLUMEUP */
161 }; 160 };
162 161
163 volume-down { 162 volume-down {
164 label = "Volume Down"; 163 label = "Volume Down";
165 gpios = <&gpio1 15 0>; /* GPIO2_15 */ 164 gpios = <&gpio2 15 0>;
166 linux,code = <114>; /* KEY_VOLUMEDOWN */ 165 linux,code = <114>; /* KEY_VOLUMEDOWN */
167 }; 166 };
168 }; 167 };
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
index 099cd84ee372..5dd91b942c91 100644
--- a/arch/arm/boot/dts/imx53.dtsi
+++ b/arch/arm/boot/dts/imx53.dtsi
@@ -14,11 +14,11 @@
14 14
15/ { 15/ {
16 aliases { 16 aliases {
17 serial0 = &uart0; 17 serial0 = &uart1;
18 serial1 = &uart1; 18 serial1 = &uart2;
19 serial2 = &uart2; 19 serial2 = &uart3;
20 serial3 = &uart3; 20 serial3 = &uart4;
21 serial4 = &uart4; 21 serial4 = &uart5;
22 }; 22 };
23 23
24 tzic: tz-interrupt-controller@0fffc000 { 24 tzic: tz-interrupt-controller@0fffc000 {
@@ -88,7 +88,7 @@
88 status = "disabled"; 88 status = "disabled";
89 }; 89 };
90 90
91 uart2: uart@5000c000 { /* UART3 */ 91 uart3: uart@5000c000 {
92 compatible = "fsl,imx53-uart", "fsl,imx21-uart"; 92 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
93 reg = <0x5000c000 0x4000>; 93 reg = <0x5000c000 0x4000>;
94 interrupts = <33>; 94 interrupts = <33>;
@@ -119,7 +119,7 @@
119 }; 119 };
120 }; 120 };
121 121
122 gpio0: gpio@53f84000 { /* GPIO1 */ 122 gpio1: gpio@53f84000 {
123 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; 123 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
124 reg = <0x53f84000 0x4000>; 124 reg = <0x53f84000 0x4000>;
125 interrupts = <50 51>; 125 interrupts = <50 51>;
@@ -129,7 +129,7 @@
129 #interrupt-cells = <1>; 129 #interrupt-cells = <1>;
130 }; 130 };
131 131
132 gpio1: gpio@53f88000 { /* GPIO2 */ 132 gpio2: gpio@53f88000 {
133 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; 133 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
134 reg = <0x53f88000 0x4000>; 134 reg = <0x53f88000 0x4000>;
135 interrupts = <52 53>; 135 interrupts = <52 53>;
@@ -139,7 +139,7 @@
139 #interrupt-cells = <1>; 139 #interrupt-cells = <1>;
140 }; 140 };
141 141
142 gpio2: gpio@53f8c000 { /* GPIO3 */ 142 gpio3: gpio@53f8c000 {
143 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; 143 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
144 reg = <0x53f8c000 0x4000>; 144 reg = <0x53f8c000 0x4000>;
145 interrupts = <54 55>; 145 interrupts = <54 55>;
@@ -149,7 +149,7 @@
149 #interrupt-cells = <1>; 149 #interrupt-cells = <1>;
150 }; 150 };
151 151
152 gpio3: gpio@53f90000 { /* GPIO4 */ 152 gpio4: gpio@53f90000 {
153 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; 153 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
154 reg = <0x53f90000 0x4000>; 154 reg = <0x53f90000 0x4000>;
155 interrupts = <56 57>; 155 interrupts = <56 57>;
@@ -173,21 +173,21 @@
173 status = "disabled"; 173 status = "disabled";
174 }; 174 };
175 175
176 uart0: uart@53fbc000 { /* UART1 */ 176 uart1: uart@53fbc000 {
177 compatible = "fsl,imx53-uart", "fsl,imx21-uart"; 177 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
178 reg = <0x53fbc000 0x4000>; 178 reg = <0x53fbc000 0x4000>;
179 interrupts = <31>; 179 interrupts = <31>;
180 status = "disabled"; 180 status = "disabled";
181 }; 181 };
182 182
183 uart1: uart@53fc0000 { /* UART2 */ 183 uart2: uart@53fc0000 {
184 compatible = "fsl,imx53-uart", "fsl,imx21-uart"; 184 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
185 reg = <0x53fc0000 0x4000>; 185 reg = <0x53fc0000 0x4000>;
186 interrupts = <32>; 186 interrupts = <32>;
187 status = "disabled"; 187 status = "disabled";
188 }; 188 };
189 189
190 gpio4: gpio@53fdc000 { /* GPIO5 */ 190 gpio5: gpio@53fdc000 {
191 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; 191 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
192 reg = <0x53fdc000 0x4000>; 192 reg = <0x53fdc000 0x4000>;
193 interrupts = <103 104>; 193 interrupts = <103 104>;
@@ -197,7 +197,7 @@
197 #interrupt-cells = <1>; 197 #interrupt-cells = <1>;
198 }; 198 };
199 199
200 gpio5: gpio@53fe0000 { /* GPIO6 */ 200 gpio6: gpio@53fe0000 {
201 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; 201 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
202 reg = <0x53fe0000 0x4000>; 202 reg = <0x53fe0000 0x4000>;
203 interrupts = <105 106>; 203 interrupts = <105 106>;
@@ -207,7 +207,7 @@
207 #interrupt-cells = <1>; 207 #interrupt-cells = <1>;
208 }; 208 };
209 209
210 gpio6: gpio@53fe4000 { /* GPIO7 */ 210 gpio7: gpio@53fe4000 {
211 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; 211 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
212 reg = <0x53fe4000 0x4000>; 212 reg = <0x53fe4000 0x4000>;
213 interrupts = <107 108>; 213 interrupts = <107 108>;
@@ -226,7 +226,7 @@
226 status = "disabled"; 226 status = "disabled";
227 }; 227 };
228 228
229 uart3: uart@53ff0000 { /* UART4 */ 229 uart4: uart@53ff0000 {
230 compatible = "fsl,imx53-uart", "fsl,imx21-uart"; 230 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
231 reg = <0x53ff0000 0x4000>; 231 reg = <0x53ff0000 0x4000>;
232 interrupts = <13>; 232 interrupts = <13>;
@@ -241,7 +241,7 @@
241 reg = <0x60000000 0x10000000>; 241 reg = <0x60000000 0x10000000>;
242 ranges; 242 ranges;
243 243
244 uart4: uart@63f90000 { /* UART5 */ 244 uart5: uart@63f90000 {
245 compatible = "fsl,imx53-uart", "fsl,imx21-uart"; 245 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
246 reg = <0x63f90000 0x4000>; 246 reg = <0x63f90000 0x4000>;
247 interrupts = <86>; 247 interrupts = <86>;
diff --git a/arch/arm/boot/dts/imx6q-sabreauto.dts b/arch/arm/boot/dts/imx6q-arm2.dts
index 072974e443f2..c3977e0478b9 100644
--- a/arch/arm/boot/dts/imx6q-sabreauto.dts
+++ b/arch/arm/boot/dts/imx6q-arm2.dts
@@ -14,8 +14,8 @@
14/include/ "imx6q.dtsi" 14/include/ "imx6q.dtsi"
15 15
16/ { 16/ {
17 model = "Freescale i.MX6 Quad SABRE Automotive Board"; 17 model = "Freescale i.MX6 Quad Armadillo2 Board";
18 compatible = "fsl,imx6q-sabreauto", "fsl,imx6q"; 18 compatible = "fsl,imx6q-arm2", "fsl,imx6q";
19 19
20 chosen { 20 chosen {
21 bootargs = "console=ttymxc0,115200 root=/dev/mmcblk3p3 rootwait"; 21 bootargs = "console=ttymxc0,115200 root=/dev/mmcblk3p3 rootwait";
@@ -34,8 +34,8 @@
34 }; 34 };
35 35
36 usdhc@02198000 { /* uSDHC3 */ 36 usdhc@02198000 { /* uSDHC3 */
37 cd-gpios = <&gpio5 11 0>; /* GPIO6_11 */ 37 cd-gpios = <&gpio6 11 0>;
38 wp-gpios = <&gpio5 14 0>; /* GPIO6_14 */ 38 wp-gpios = <&gpio6 14 0>;
39 status = "okay"; 39 status = "okay";
40 }; 40 };
41 41
@@ -44,7 +44,7 @@
44 status = "okay"; 44 status = "okay";
45 }; 45 };
46 46
47 uart3: uart@021f0000 { /* UART4 */ 47 uart4: uart@021f0000 {
48 status = "okay"; 48 status = "okay";
49 }; 49 };
50 }; 50 };
@@ -55,7 +55,7 @@
55 55
56 debug-led { 56 debug-led {
57 label = "Heartbeat"; 57 label = "Heartbeat";
58 gpios = <&gpio2 25 0>; /* GPIO3_25 */ 58 gpios = <&gpio3 25 0>;
59 linux,default-trigger = "heartbeat"; 59 linux,default-trigger = "heartbeat";
60 }; 60 };
61 }; 61 };
diff --git a/arch/arm/boot/dts/imx6q-sabrelite.dts b/arch/arm/boot/dts/imx6q-sabrelite.dts
new file mode 100644
index 000000000000..08d920de7286
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-sabrelite.dts
@@ -0,0 +1,49 @@
1/*
2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13/dts-v1/;
14/include/ "imx6q.dtsi"
15
16/ {
17 model = "Freescale i.MX6 Quad SABRE Lite Board";
18 compatible = "fsl,imx6q-sabrelite", "fsl,imx6q";
19
20 memory {
21 reg = <0x10000000 0x40000000>;
22 };
23
24 soc {
25 aips-bus@02100000 { /* AIPS2 */
26 enet@02188000 {
27 phy-mode = "rgmii";
28 phy-reset-gpios = <&gpio3 23 0>;
29 status = "okay";
30 };
31
32 usdhc@02198000 { /* uSDHC3 */
33 cd-gpios = <&gpio7 0 0>;
34 wp-gpios = <&gpio7 1 0>;
35 status = "okay";
36 };
37
38 usdhc@0219c000 { /* uSDHC4 */
39 cd-gpios = <&gpio2 6 0>;
40 wp-gpios = <&gpio2 7 0>;
41 status = "okay";
42 };
43
44 uart2: uart@021e8000 {
45 status = "okay";
46 };
47 };
48 };
49};
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index 7dda599558cc..263e8f3664b5 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -14,11 +14,11 @@
14 14
15/ { 15/ {
16 aliases { 16 aliases {
17 serial0 = &uart0; 17 serial0 = &uart1;
18 serial1 = &uart1; 18 serial1 = &uart2;
19 serial2 = &uart2; 19 serial2 = &uart3;
20 serial3 = &uart3; 20 serial3 = &uart4;
21 serial4 = &uart4; 21 serial4 = &uart5;
22 }; 22 };
23 23
24 cpus { 24 cpus {
@@ -165,7 +165,7 @@
165 status = "disabled"; 165 status = "disabled";
166 }; 166 };
167 167
168 uart0: uart@02020000 { /* UART1 */ 168 uart1: uart@02020000 {
169 compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; 169 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
170 reg = <0x02020000 0x4000>; 170 reg = <0x02020000 0x4000>;
171 interrupts = <0 26 0x04>; 171 interrupts = <0 26 0x04>;
@@ -247,7 +247,7 @@
247 interrupts = <0 55 0x04>; 247 interrupts = <0 55 0x04>;
248 }; 248 };
249 249
250 gpio0: gpio@0209c000 { /* GPIO1 */ 250 gpio1: gpio@0209c000 {
251 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; 251 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
252 reg = <0x0209c000 0x4000>; 252 reg = <0x0209c000 0x4000>;
253 interrupts = <0 66 0x04 0 67 0x04>; 253 interrupts = <0 66 0x04 0 67 0x04>;
@@ -257,7 +257,7 @@
257 #interrupt-cells = <1>; 257 #interrupt-cells = <1>;
258 }; 258 };
259 259
260 gpio1: gpio@020a0000 { /* GPIO2 */ 260 gpio2: gpio@020a0000 {
261 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; 261 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
262 reg = <0x020a0000 0x4000>; 262 reg = <0x020a0000 0x4000>;
263 interrupts = <0 68 0x04 0 69 0x04>; 263 interrupts = <0 68 0x04 0 69 0x04>;
@@ -267,7 +267,7 @@
267 #interrupt-cells = <1>; 267 #interrupt-cells = <1>;
268 }; 268 };
269 269
270 gpio2: gpio@020a4000 { /* GPIO3 */ 270 gpio3: gpio@020a4000 {
271 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; 271 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
272 reg = <0x020a4000 0x4000>; 272 reg = <0x020a4000 0x4000>;
273 interrupts = <0 70 0x04 0 71 0x04>; 273 interrupts = <0 70 0x04 0 71 0x04>;
@@ -277,7 +277,7 @@
277 #interrupt-cells = <1>; 277 #interrupt-cells = <1>;
278 }; 278 };
279 279
280 gpio3: gpio@020a8000 { /* GPIO4 */ 280 gpio4: gpio@020a8000 {
281 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; 281 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
282 reg = <0x020a8000 0x4000>; 282 reg = <0x020a8000 0x4000>;
283 interrupts = <0 72 0x04 0 73 0x04>; 283 interrupts = <0 72 0x04 0 73 0x04>;
@@ -287,7 +287,7 @@
287 #interrupt-cells = <1>; 287 #interrupt-cells = <1>;
288 }; 288 };
289 289
290 gpio4: gpio@020ac000 { /* GPIO5 */ 290 gpio5: gpio@020ac000 {
291 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; 291 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
292 reg = <0x020ac000 0x4000>; 292 reg = <0x020ac000 0x4000>;
293 interrupts = <0 74 0x04 0 75 0x04>; 293 interrupts = <0 74 0x04 0 75 0x04>;
@@ -297,7 +297,7 @@
297 #interrupt-cells = <1>; 297 #interrupt-cells = <1>;
298 }; 298 };
299 299
300 gpio5: gpio@020b0000 { /* GPIO6 */ 300 gpio6: gpio@020b0000 {
301 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; 301 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
302 reg = <0x020b0000 0x4000>; 302 reg = <0x020b0000 0x4000>;
303 interrupts = <0 76 0x04 0 77 0x04>; 303 interrupts = <0 76 0x04 0 77 0x04>;
@@ -307,7 +307,7 @@
307 #interrupt-cells = <1>; 307 #interrupt-cells = <1>;
308 }; 308 };
309 309
310 gpio6: gpio@020b4000 { /* GPIO7 */ 310 gpio7: gpio@020b4000 {
311 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; 311 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
312 reg = <0x020b4000 0x4000>; 312 reg = <0x020b4000 0x4000>;
313 interrupts = <0 78 0x04 0 79 0x04>; 313 interrupts = <0 78 0x04 0 79 0x04>;
@@ -543,28 +543,28 @@
543 interrupts = <0 18 0x04>; 543 interrupts = <0 18 0x04>;
544 }; 544 };
545 545
546 uart1: uart@021e8000 { /* UART2 */ 546 uart2: uart@021e8000 {
547 compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; 547 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
548 reg = <0x021e8000 0x4000>; 548 reg = <0x021e8000 0x4000>;
549 interrupts = <0 27 0x04>; 549 interrupts = <0 27 0x04>;
550 status = "disabled"; 550 status = "disabled";
551 }; 551 };
552 552
553 uart2: uart@021ec000 { /* UART3 */ 553 uart3: uart@021ec000 {
554 compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; 554 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
555 reg = <0x021ec000 0x4000>; 555 reg = <0x021ec000 0x4000>;
556 interrupts = <0 28 0x04>; 556 interrupts = <0 28 0x04>;
557 status = "disabled"; 557 status = "disabled";
558 }; 558 };
559 559
560 uart3: uart@021f0000 { /* UART4 */ 560 uart4: uart@021f0000 {
561 compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; 561 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
562 reg = <0x021f0000 0x4000>; 562 reg = <0x021f0000 0x4000>;
563 interrupts = <0 29 0x04>; 563 interrupts = <0 29 0x04>;
564 status = "disabled"; 564 status = "disabled";
565 }; 565 };
566 566
567 uart4: uart@021f4000 { /* UART5 */ 567 uart5: uart@021f4000 {
568 compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; 568 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
569 reg = <0x021f4000 0x4000>; 569 reg = <0x021f4000 0x4000>;
570 interrupts = <0 30 0x04>; 570 interrupts = <0 30 0x04>;
diff --git a/arch/arm/configs/imx_v4_v5_defconfig b/arch/arm/configs/imx_v4_v5_defconfig
index 11a4192197c8..fccb4703bacb 100644
--- a/arch/arm/configs/imx_v4_v5_defconfig
+++ b/arch/arm/configs/imx_v4_v5_defconfig
@@ -67,7 +67,6 @@ CONFIG_MTD_CFI=y
67CONFIG_MTD_CFI_ADV_OPTIONS=y 67CONFIG_MTD_CFI_ADV_OPTIONS=y
68CONFIG_MTD_CFI_GEOMETRY=y 68CONFIG_MTD_CFI_GEOMETRY=y
69# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set 69# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
70# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
71# CONFIG_MTD_CFI_I2 is not set 70# CONFIG_MTD_CFI_I2 is not set
72CONFIG_MTD_CFI_INTELEXT=y 71CONFIG_MTD_CFI_INTELEXT=y
73CONFIG_MTD_PHYSMAP=y 72CONFIG_MTD_PHYSMAP=y
diff --git a/arch/arm/configs/omap1_defconfig b/arch/arm/configs/omap1_defconfig
index a7e777581378..945a34f2a34d 100644
--- a/arch/arm/configs/omap1_defconfig
+++ b/arch/arm/configs/omap1_defconfig
@@ -48,12 +48,7 @@ CONFIG_MACH_SX1=y
48CONFIG_MACH_NOKIA770=y 48CONFIG_MACH_NOKIA770=y
49CONFIG_MACH_AMS_DELTA=y 49CONFIG_MACH_AMS_DELTA=y
50CONFIG_MACH_OMAP_GENERIC=y 50CONFIG_MACH_OMAP_GENERIC=y
51CONFIG_OMAP_ARM_216MHZ=y
52CONFIG_OMAP_ARM_195MHZ=y
53CONFIG_OMAP_ARM_192MHZ=y
54CONFIG_OMAP_ARM_182MHZ=y 51CONFIG_OMAP_ARM_182MHZ=y
55CONFIG_OMAP_ARM_168MHZ=y
56# CONFIG_OMAP_ARM_60MHZ is not set
57# CONFIG_ARM_THUMB is not set 52# CONFIG_ARM_THUMB is not set
58CONFIG_PCCARD=y 53CONFIG_PCCARD=y
59CONFIG_OMAP_CF=y 54CONFIG_OMAP_CF=y
diff --git a/arch/arm/include/asm/unwind.h b/arch/arm/include/asm/unwind.h
index a5edf421005c..d1c3f3a71c94 100644
--- a/arch/arm/include/asm/unwind.h
+++ b/arch/arm/include/asm/unwind.h
@@ -30,14 +30,15 @@ enum unwind_reason_code {
30}; 30};
31 31
32struct unwind_idx { 32struct unwind_idx {
33 unsigned long addr; 33 unsigned long addr_offset;
34 unsigned long insn; 34 unsigned long insn;
35}; 35};
36 36
37struct unwind_table { 37struct unwind_table {
38 struct list_head list; 38 struct list_head list;
39 struct unwind_idx *start; 39 const struct unwind_idx *start;
40 struct unwind_idx *stop; 40 const struct unwind_idx *origin;
41 const struct unwind_idx *stop;
41 unsigned long begin_addr; 42 unsigned long begin_addr;
42 unsigned long end_addr; 43 unsigned long end_addr;
43}; 44};
@@ -49,15 +50,6 @@ extern struct unwind_table *unwind_table_add(unsigned long start,
49extern void unwind_table_del(struct unwind_table *tab); 50extern void unwind_table_del(struct unwind_table *tab);
50extern void unwind_backtrace(struct pt_regs *regs, struct task_struct *tsk); 51extern void unwind_backtrace(struct pt_regs *regs, struct task_struct *tsk);
51 52
52#ifdef CONFIG_ARM_UNWIND
53extern int __init unwind_init(void);
54#else
55static inline int __init unwind_init(void)
56{
57 return 0;
58}
59#endif
60
61#endif /* !__ASSEMBLY__ */ 53#endif /* !__ASSEMBLY__ */
62 54
63#ifdef CONFIG_ARM_UNWIND 55#ifdef CONFIG_ARM_UNWIND
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index 172101ac97de..5bb91bf3d47f 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -346,15 +346,15 @@ validate_group(struct perf_event *event)
346 fake_pmu.used_mask = fake_used_mask; 346 fake_pmu.used_mask = fake_used_mask;
347 347
348 if (!validate_event(&fake_pmu, leader)) 348 if (!validate_event(&fake_pmu, leader))
349 return -ENOSPC; 349 return -EINVAL;
350 350
351 list_for_each_entry(sibling, &leader->sibling_list, group_entry) { 351 list_for_each_entry(sibling, &leader->sibling_list, group_entry) {
352 if (!validate_event(&fake_pmu, sibling)) 352 if (!validate_event(&fake_pmu, sibling))
353 return -ENOSPC; 353 return -EINVAL;
354 } 354 }
355 355
356 if (!validate_event(&fake_pmu, event)) 356 if (!validate_event(&fake_pmu, event))
357 return -ENOSPC; 357 return -EINVAL;
358 358
359 return 0; 359 return 0;
360} 360}
@@ -639,6 +639,9 @@ static struct platform_device_id armpmu_plat_device_ids[] = {
639 639
640static int __devinit armpmu_device_probe(struct platform_device *pdev) 640static int __devinit armpmu_device_probe(struct platform_device *pdev)
641{ 641{
642 if (!cpu_pmu)
643 return -ENODEV;
644
642 cpu_pmu->plat_device = pdev; 645 cpu_pmu->plat_device = pdev;
643 return 0; 646 return 0;
644} 647}
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 5c7094e8f6e9..095d6611c84e 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -902,8 +902,6 @@ void __init setup_arch(char **cmdline_p)
902{ 902{
903 struct machine_desc *mdesc; 903 struct machine_desc *mdesc;
904 904
905 unwind_init();
906
907 setup_processor(); 905 setup_processor();
908 mdesc = setup_machine_fdt(__atags_pointer); 906 mdesc = setup_machine_fdt(__atags_pointer);
909 if (!mdesc) 907 if (!mdesc)
@@ -911,6 +909,12 @@ void __init setup_arch(char **cmdline_p)
911 machine_desc = mdesc; 909 machine_desc = mdesc;
912 machine_name = mdesc->name; 910 machine_name = mdesc->name;
913 911
912#ifdef CONFIG_ZONE_DMA
913 if (mdesc->dma_zone_size) {
914 extern unsigned long arm_dma_zone_size;
915 arm_dma_zone_size = mdesc->dma_zone_size;
916 }
917#endif
914 if (mdesc->restart_mode) 918 if (mdesc->restart_mode)
915 reboot_setup(&mdesc->restart_mode); 919 reboot_setup(&mdesc->restart_mode);
916 920
@@ -945,12 +949,6 @@ void __init setup_arch(char **cmdline_p)
945 949
946 tcm_init(); 950 tcm_init();
947 951
948#ifdef CONFIG_ZONE_DMA
949 if (mdesc->dma_zone_size) {
950 extern unsigned long arm_dma_zone_size;
951 arm_dma_zone_size = mdesc->dma_zone_size;
952 }
953#endif
954#ifdef CONFIG_MULTI_IRQ_HANDLER 952#ifdef CONFIG_MULTI_IRQ_HANDLER
955 handle_arch_irq = mdesc->handle_irq; 953 handle_arch_irq = mdesc->handle_irq;
956#endif 954#endif
diff --git a/arch/arm/kernel/unwind.c b/arch/arm/kernel/unwind.c
index e7e8365795c3..00df012c4678 100644
--- a/arch/arm/kernel/unwind.c
+++ b/arch/arm/kernel/unwind.c
@@ -67,7 +67,7 @@ EXPORT_SYMBOL(__aeabi_unwind_cpp_pr2);
67 67
68struct unwind_ctrl_block { 68struct unwind_ctrl_block {
69 unsigned long vrs[16]; /* virtual register set */ 69 unsigned long vrs[16]; /* virtual register set */
70 unsigned long *insn; /* pointer to the current instructions word */ 70 const unsigned long *insn; /* pointer to the current instructions word */
71 int entries; /* number of entries left to interpret */ 71 int entries; /* number of entries left to interpret */
72 int byte; /* current byte number in the instructions word */ 72 int byte; /* current byte number in the instructions word */
73}; 73};
@@ -83,8 +83,9 @@ enum regs {
83 PC = 15 83 PC = 15
84}; 84};
85 85
86extern struct unwind_idx __start_unwind_idx[]; 86extern const struct unwind_idx __start_unwind_idx[];
87extern struct unwind_idx __stop_unwind_idx[]; 87static const struct unwind_idx *__origin_unwind_idx;
88extern const struct unwind_idx __stop_unwind_idx[];
88 89
89static DEFINE_SPINLOCK(unwind_lock); 90static DEFINE_SPINLOCK(unwind_lock);
90static LIST_HEAD(unwind_tables); 91static LIST_HEAD(unwind_tables);
@@ -98,45 +99,99 @@ static LIST_HEAD(unwind_tables);
98}) 99})
99 100
100/* 101/*
101 * Binary search in the unwind index. The entries entries are 102 * Binary search in the unwind index. The entries are
102 * guaranteed to be sorted in ascending order by the linker. 103 * guaranteed to be sorted in ascending order by the linker.
104 *
105 * start = first entry
106 * origin = first entry with positive offset (or stop if there is no such entry)
107 * stop - 1 = last entry
103 */ 108 */
104static struct unwind_idx *search_index(unsigned long addr, 109static const struct unwind_idx *search_index(unsigned long addr,
105 struct unwind_idx *first, 110 const struct unwind_idx *start,
106 struct unwind_idx *last) 111 const struct unwind_idx *origin,
112 const struct unwind_idx *stop)
107{ 113{
108 pr_debug("%s(%08lx, %p, %p)\n", __func__, addr, first, last); 114 unsigned long addr_prel31;
115
116 pr_debug("%s(%08lx, %p, %p, %p)\n",
117 __func__, addr, start, origin, stop);
118
119 /*
120 * only search in the section with the matching sign. This way the
121 * prel31 numbers can be compared as unsigned longs.
122 */
123 if (addr < (unsigned long)start)
124 /* negative offsets: [start; origin) */
125 stop = origin;
126 else
127 /* positive offsets: [origin; stop) */
128 start = origin;
129
130 /* prel31 for address relavive to start */
131 addr_prel31 = (addr - (unsigned long)start) & 0x7fffffff;
109 132
110 if (addr < first->addr) { 133 while (start < stop - 1) {
134 const struct unwind_idx *mid = start + ((stop - start) >> 1);
135
136 /*
137 * As addr_prel31 is relative to start an offset is needed to
138 * make it relative to mid.
139 */
140 if (addr_prel31 - ((unsigned long)mid - (unsigned long)start) <
141 mid->addr_offset)
142 stop = mid;
143 else {
144 /* keep addr_prel31 relative to start */
145 addr_prel31 -= ((unsigned long)mid -
146 (unsigned long)start);
147 start = mid;
148 }
149 }
150
151 if (likely(start->addr_offset <= addr_prel31))
152 return start;
153 else {
111 pr_warning("unwind: Unknown symbol address %08lx\n", addr); 154 pr_warning("unwind: Unknown symbol address %08lx\n", addr);
112 return NULL; 155 return NULL;
113 } else if (addr >= last->addr) 156 }
114 return last; 157}
115 158
116 while (first < last - 1) { 159static const struct unwind_idx *unwind_find_origin(
117 struct unwind_idx *mid = first + ((last - first + 1) >> 1); 160 const struct unwind_idx *start, const struct unwind_idx *stop)
161{
162 pr_debug("%s(%p, %p)\n", __func__, start, stop);
163 while (start < stop) {
164 const struct unwind_idx *mid = start + ((stop - start) >> 1);
118 165
119 if (addr < mid->addr) 166 if (mid->addr_offset >= 0x40000000)
120 last = mid; 167 /* negative offset */
168 start = mid + 1;
121 else 169 else
122 first = mid; 170 /* positive offset */
171 stop = mid;
123 } 172 }
124 173 pr_debug("%s -> %p\n", __func__, stop);
125 return first; 174 return stop;
126} 175}
127 176
128static struct unwind_idx *unwind_find_idx(unsigned long addr) 177static const struct unwind_idx *unwind_find_idx(unsigned long addr)
129{ 178{
130 struct unwind_idx *idx = NULL; 179 const struct unwind_idx *idx = NULL;
131 unsigned long flags; 180 unsigned long flags;
132 181
133 pr_debug("%s(%08lx)\n", __func__, addr); 182 pr_debug("%s(%08lx)\n", __func__, addr);
134 183
135 if (core_kernel_text(addr)) 184 if (core_kernel_text(addr)) {
185 if (unlikely(!__origin_unwind_idx))
186 __origin_unwind_idx =
187 unwind_find_origin(__start_unwind_idx,
188 __stop_unwind_idx);
189
136 /* main unwind table */ 190 /* main unwind table */
137 idx = search_index(addr, __start_unwind_idx, 191 idx = search_index(addr, __start_unwind_idx,
138 __stop_unwind_idx - 1); 192 __origin_unwind_idx,
139 else { 193 __stop_unwind_idx);
194 } else {
140 /* module unwind tables */ 195 /* module unwind tables */
141 struct unwind_table *table; 196 struct unwind_table *table;
142 197
@@ -145,7 +200,8 @@ static struct unwind_idx *unwind_find_idx(unsigned long addr)
145 if (addr >= table->begin_addr && 200 if (addr >= table->begin_addr &&
146 addr < table->end_addr) { 201 addr < table->end_addr) {
147 idx = search_index(addr, table->start, 202 idx = search_index(addr, table->start,
148 table->stop - 1); 203 table->origin,
204 table->stop);
149 /* Move-to-front to exploit common traces */ 205 /* Move-to-front to exploit common traces */
150 list_move(&table->list, &unwind_tables); 206 list_move(&table->list, &unwind_tables);
151 break; 207 break;
@@ -274,7 +330,7 @@ static int unwind_exec_insn(struct unwind_ctrl_block *ctrl)
274int unwind_frame(struct stackframe *frame) 330int unwind_frame(struct stackframe *frame)
275{ 331{
276 unsigned long high, low; 332 unsigned long high, low;
277 struct unwind_idx *idx; 333 const struct unwind_idx *idx;
278 struct unwind_ctrl_block ctrl; 334 struct unwind_ctrl_block ctrl;
279 335
280 /* only go to a higher address on the stack */ 336 /* only go to a higher address on the stack */
@@ -399,7 +455,6 @@ struct unwind_table *unwind_table_add(unsigned long start, unsigned long size,
399 unsigned long text_size) 455 unsigned long text_size)
400{ 456{
401 unsigned long flags; 457 unsigned long flags;
402 struct unwind_idx *idx;
403 struct unwind_table *tab = kmalloc(sizeof(*tab), GFP_KERNEL); 458 struct unwind_table *tab = kmalloc(sizeof(*tab), GFP_KERNEL);
404 459
405 pr_debug("%s(%08lx, %08lx, %08lx, %08lx)\n", __func__, start, size, 460 pr_debug("%s(%08lx, %08lx, %08lx, %08lx)\n", __func__, start, size,
@@ -408,15 +463,12 @@ struct unwind_table *unwind_table_add(unsigned long start, unsigned long size,
408 if (!tab) 463 if (!tab)
409 return tab; 464 return tab;
410 465
411 tab->start = (struct unwind_idx *)start; 466 tab->start = (const struct unwind_idx *)start;
412 tab->stop = (struct unwind_idx *)(start + size); 467 tab->stop = (const struct unwind_idx *)(start + size);
468 tab->origin = unwind_find_origin(tab->start, tab->stop);
413 tab->begin_addr = text_addr; 469 tab->begin_addr = text_addr;
414 tab->end_addr = text_addr + text_size; 470 tab->end_addr = text_addr + text_size;
415 471
416 /* Convert the symbol addresses to absolute values */
417 for (idx = tab->start; idx < tab->stop; idx++)
418 idx->addr = prel31_to_addr(&idx->addr);
419
420 spin_lock_irqsave(&unwind_lock, flags); 472 spin_lock_irqsave(&unwind_lock, flags);
421 list_add_tail(&tab->list, &unwind_tables); 473 list_add_tail(&tab->list, &unwind_tables);
422 spin_unlock_irqrestore(&unwind_lock, flags); 474 spin_unlock_irqrestore(&unwind_lock, flags);
@@ -437,16 +489,3 @@ void unwind_table_del(struct unwind_table *tab)
437 489
438 kfree(tab); 490 kfree(tab);
439} 491}
440
441int __init unwind_init(void)
442{
443 struct unwind_idx *idx;
444
445 /* Convert the symbol addresses to absolute values */
446 for (idx = __start_unwind_idx; idx < __stop_unwind_idx; idx++)
447 idx->addr = prel31_to_addr(&idx->addr);
448
449 pr_debug("unwind: ARM stack unwinding initialised\n");
450
451 return 0;
452}
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c
index 66591fa53e05..ad930688358c 100644
--- a/arch/arm/mach-at91/at91rm9200_devices.c
+++ b/arch/arm/mach-at91/at91rm9200_devices.c
@@ -83,7 +83,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
83 * USB Device (Gadget) 83 * USB Device (Gadget)
84 * -------------------------------------------------------------------- */ 84 * -------------------------------------------------------------------- */
85 85
86#ifdef CONFIG_USB_GADGET_AT91 86#ifdef CONFIG_USB_AT91
87static struct at91_udc_data udc_data; 87static struct at91_udc_data udc_data;
88 88
89static struct resource udc_resources[] = { 89static struct resource udc_resources[] = {
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index b84a9f642f59..0d20677fbef0 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -195,9 +195,9 @@ static struct clk_lookup periph_clocks_lookups[] = {
195 CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk), 195 CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk),
196 CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk), 196 CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk),
197 CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk), 197 CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk),
198 CLKDEV_CON_DEV_ID("t3_clk", "atmel_tcb.1", &tc3_clk), 198 CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.1", &tc3_clk),
199 CLKDEV_CON_DEV_ID("t4_clk", "atmel_tcb.1", &tc4_clk), 199 CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.1", &tc4_clk),
200 CLKDEV_CON_DEV_ID("t5_clk", "atmel_tcb.1", &tc5_clk), 200 CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.1", &tc5_clk),
201 CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc_clk), 201 CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc_clk),
202 /* more usart lookup table for DT entries */ 202 /* more usart lookup table for DT entries */
203 CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck), 203 CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index 25e3464fb07f..629fa9774972 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -84,7 +84,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
84 * USB Device (Gadget) 84 * USB Device (Gadget)
85 * -------------------------------------------------------------------- */ 85 * -------------------------------------------------------------------- */
86 86
87#ifdef CONFIG_USB_GADGET_AT91 87#ifdef CONFIG_USB_AT91
88static struct at91_udc_data udc_data; 88static struct at91_udc_data udc_data;
89 89
90static struct resource udc_resources[] = { 90static struct resource udc_resources[] = {
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
index ae78f4d03b73..a178b58b0b9c 100644
--- a/arch/arm/mach-at91/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -87,7 +87,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
87 * USB Device (Gadget) 87 * USB Device (Gadget)
88 * -------------------------------------------------------------------- */ 88 * -------------------------------------------------------------------- */
89 89
90#ifdef CONFIG_USB_GADGET_AT91 90#ifdef CONFIG_USB_AT91
91static struct at91_udc_data udc_data; 91static struct at91_udc_data udc_data;
92 92
93static struct resource udc_resources[] = { 93static struct resource udc_resources[] = {
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
index ad017eb1f8df..d5fbac9ff4fa 100644
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -92,7 +92,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
92 * USB Device (Gadget) 92 * USB Device (Gadget)
93 * -------------------------------------------------------------------- */ 93 * -------------------------------------------------------------------- */
94 94
95#ifdef CONFIG_USB_GADGET_AT91 95#ifdef CONFIG_USB_AT91
96static struct at91_udc_data udc_data; 96static struct at91_udc_data udc_data;
97 97
98static struct resource udc_resources[] = { 98static struct resource udc_resources[] = {
diff --git a/arch/arm/mach-at91/include/mach/system_rev.h b/arch/arm/mach-at91/include/mach/system_rev.h
index 8f4866045b41..ec164a4124c9 100644
--- a/arch/arm/mach-at91/include/mach/system_rev.h
+++ b/arch/arm/mach-at91/include/mach/system_rev.h
@@ -19,7 +19,7 @@
19#define BOARD_HAVE_NAND_16BIT (1 << 31) 19#define BOARD_HAVE_NAND_16BIT (1 << 31)
20static inline int board_have_nand_16bit(void) 20static inline int board_have_nand_16bit(void)
21{ 21{
22 return system_rev & BOARD_HAVE_NAND_16BIT; 22 return (system_rev & BOARD_HAVE_NAND_16BIT) ? 1 : 0;
23} 23}
24 24
25#endif /* __ARCH_SYSTEM_REV_H__ */ 25#endif /* __ARCH_SYSTEM_REV_H__ */
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index 1d7d24995226..6659a90dbcad 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -753,7 +753,7 @@ static struct snd_platform_data da850_evm_snd_data = {
753 .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction), 753 .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction),
754 .tdm_slots = 2, 754 .tdm_slots = 2,
755 .serial_dir = da850_iis_serializer_direction, 755 .serial_dir = da850_iis_serializer_direction,
756 .asp_chan_q = EVENTQ_1, 756 .asp_chan_q = EVENTQ_0,
757 .version = MCASP_VERSION_2, 757 .version = MCASP_VERSION_2,
758 .txnumevt = 1, 758 .txnumevt = 1,
759 .rxnumevt = 1, 759 .rxnumevt = 1,
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c
index 1918ae711428..46e1f4173b97 100644
--- a/arch/arm/mach-davinci/board-dm365-evm.c
+++ b/arch/arm/mach-davinci/board-dm365-evm.c
@@ -107,7 +107,7 @@ static struct mtd_partition davinci_nand_partitions[] = {
107 /* UBL (a few copies) plus U-Boot */ 107 /* UBL (a few copies) plus U-Boot */
108 .name = "bootloader", 108 .name = "bootloader",
109 .offset = 0, 109 .offset = 0,
110 .size = 28 * NAND_BLOCK_SIZE, 110 .size = 30 * NAND_BLOCK_SIZE,
111 .mask_flags = MTD_WRITEABLE, /* force read-only */ 111 .mask_flags = MTD_WRITEABLE, /* force read-only */
112 }, { 112 }, {
113 /* U-Boot environment */ 113 /* U-Boot environment */
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c
index e574d7f837a8..635bf7740157 100644
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
@@ -564,7 +564,7 @@ static int setup_vpif_input_channel_mode(int mux_mode)
564 int val; 564 int val;
565 u32 value; 565 u32 value;
566 566
567 if (!vpif_vsclkdis_reg || !cpld_client) 567 if (!vpif_vidclkctl_reg || !cpld_client)
568 return -ENXIO; 568 return -ENXIO;
569 569
570 val = i2c_smbus_read_byte(cpld_client); 570 val = i2c_smbus_read_byte(cpld_client);
@@ -572,7 +572,7 @@ static int setup_vpif_input_channel_mode(int mux_mode)
572 return val; 572 return val;
573 573
574 spin_lock_irqsave(&vpif_reg_lock, flags); 574 spin_lock_irqsave(&vpif_reg_lock, flags);
575 value = __raw_readl(vpif_vsclkdis_reg); 575 value = __raw_readl(vpif_vidclkctl_reg);
576 if (mux_mode) { 576 if (mux_mode) {
577 val &= VPIF_INPUT_TWO_CHANNEL; 577 val &= VPIF_INPUT_TWO_CHANNEL;
578 value |= VIDCH1CLK; 578 value |= VIDCH1CLK;
@@ -580,7 +580,7 @@ static int setup_vpif_input_channel_mode(int mux_mode)
580 val |= VPIF_INPUT_ONE_CHANNEL; 580 val |= VPIF_INPUT_ONE_CHANNEL;
581 value &= ~VIDCH1CLK; 581 value &= ~VIDCH1CLK;
582 } 582 }
583 __raw_writel(value, vpif_vsclkdis_reg); 583 __raw_writel(value, vpif_vidclkctl_reg);
584 spin_unlock_irqrestore(&vpif_reg_lock, flags); 584 spin_unlock_irqrestore(&vpif_reg_lock, flags);
585 585
586 err = i2c_smbus_write_byte(cpld_client, val); 586 err = i2c_smbus_write_byte(cpld_client, val);
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 0b68ed534f8e..af27c130595f 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -161,7 +161,6 @@ static struct clk dsp_clk = {
161 .name = "dsp", 161 .name = "dsp",
162 .parent = &pll1_sysclk1, 162 .parent = &pll1_sysclk1,
163 .lpsc = DM646X_LPSC_C64X_CPU, 163 .lpsc = DM646X_LPSC_C64X_CPU,
164 .flags = PSC_DSP,
165 .usecount = 1, /* REVISIT how to disable? */ 164 .usecount = 1, /* REVISIT how to disable? */
166}; 165};
167 166
diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h
index fa59c097223d..8bc3fc256171 100644
--- a/arch/arm/mach-davinci/include/mach/psc.h
+++ b/arch/arm/mach-davinci/include/mach/psc.h
@@ -233,7 +233,7 @@
233#define PTCMD 0x120 233#define PTCMD 0x120
234#define PTSTAT 0x128 234#define PTSTAT 0x128
235#define PDSTAT 0x200 235#define PDSTAT 0x200
236#define PDCTL1 0x304 236#define PDCTL 0x300
237#define MDSTAT 0x800 237#define MDSTAT 0x800
238#define MDCTL 0xA00 238#define MDCTL 0xA00
239 239
@@ -244,7 +244,10 @@
244#define PSC_STATE_ENABLE 3 244#define PSC_STATE_ENABLE 3
245 245
246#define MDSTAT_STATE_MASK 0x3f 246#define MDSTAT_STATE_MASK 0x3f
247#define PDSTAT_STATE_MASK 0x1f
247#define MDCTL_FORCE BIT(31) 248#define MDCTL_FORCE BIT(31)
249#define PDCTL_NEXT BIT(1)
250#define PDCTL_EPCGOOD BIT(8)
248 251
249#ifndef __ASSEMBLER__ 252#ifndef __ASSEMBLER__
250 253
diff --git a/arch/arm/mach-davinci/psc.c b/arch/arm/mach-davinci/psc.c
index 1fb6bdff38c1..d7e210f4b55c 100644
--- a/arch/arm/mach-davinci/psc.c
+++ b/arch/arm/mach-davinci/psc.c
@@ -52,7 +52,7 @@ int __init davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id)
52void davinci_psc_config(unsigned int domain, unsigned int ctlr, 52void davinci_psc_config(unsigned int domain, unsigned int ctlr,
53 unsigned int id, bool enable, u32 flags) 53 unsigned int id, bool enable, u32 flags)
54{ 54{
55 u32 epcpr, ptcmd, ptstat, pdstat, pdctl1, mdstat, mdctl; 55 u32 epcpr, ptcmd, ptstat, pdstat, pdctl, mdstat, mdctl;
56 void __iomem *psc_base; 56 void __iomem *psc_base;
57 struct davinci_soc_info *soc_info = &davinci_soc_info; 57 struct davinci_soc_info *soc_info = &davinci_soc_info;
58 u32 next_state = PSC_STATE_ENABLE; 58 u32 next_state = PSC_STATE_ENABLE;
@@ -79,11 +79,11 @@ void davinci_psc_config(unsigned int domain, unsigned int ctlr,
79 mdctl |= MDCTL_FORCE; 79 mdctl |= MDCTL_FORCE;
80 __raw_writel(mdctl, psc_base + MDCTL + 4 * id); 80 __raw_writel(mdctl, psc_base + MDCTL + 4 * id);
81 81
82 pdstat = __raw_readl(psc_base + PDSTAT); 82 pdstat = __raw_readl(psc_base + PDSTAT + 4 * domain);
83 if ((pdstat & 0x00000001) == 0) { 83 if ((pdstat & PDSTAT_STATE_MASK) == 0) {
84 pdctl1 = __raw_readl(psc_base + PDCTL1); 84 pdctl = __raw_readl(psc_base + PDCTL + 4 * domain);
85 pdctl1 |= 0x1; 85 pdctl |= PDCTL_NEXT;
86 __raw_writel(pdctl1, psc_base + PDCTL1); 86 __raw_writel(pdctl, psc_base + PDCTL + 4 * domain);
87 87
88 ptcmd = 1 << domain; 88 ptcmd = 1 << domain;
89 __raw_writel(ptcmd, psc_base + PTCMD); 89 __raw_writel(ptcmd, psc_base + PTCMD);
@@ -92,9 +92,9 @@ void davinci_psc_config(unsigned int domain, unsigned int ctlr,
92 epcpr = __raw_readl(psc_base + EPCPR); 92 epcpr = __raw_readl(psc_base + EPCPR);
93 } while ((((epcpr >> domain) & 1) == 0)); 93 } while ((((epcpr >> domain) & 1) == 0));
94 94
95 pdctl1 = __raw_readl(psc_base + PDCTL1); 95 pdctl = __raw_readl(psc_base + PDCTL + 4 * domain);
96 pdctl1 |= 0x100; 96 pdctl |= PDCTL_EPCGOOD;
97 __raw_writel(pdctl1, psc_base + PDCTL1); 97 __raw_writel(pdctl, psc_base + PDCTL + 4 * domain);
98 } else { 98 } else {
99 ptcmd = 1 << domain; 99 ptcmd = 1 << domain;
100 __raw_writel(ptcmd, psc_base + PTCMD); 100 __raw_writel(ptcmd, psc_base + PTCMD);
diff --git a/arch/arm/mach-exynos/mct.c b/arch/arm/mach-exynos/mct.c
index 97343df8f132..85b5527d0918 100644
--- a/arch/arm/mach-exynos/mct.c
+++ b/arch/arm/mach-exynos/mct.c
@@ -44,8 +44,6 @@ struct mct_clock_event_device {
44 char name[10]; 44 char name[10];
45}; 45};
46 46
47static DEFINE_PER_CPU(struct mct_clock_event_device, percpu_mct_tick);
48
49static void exynos4_mct_write(unsigned int value, void *addr) 47static void exynos4_mct_write(unsigned int value, void *addr)
50{ 48{
51 void __iomem *stat_addr; 49 void __iomem *stat_addr;
@@ -264,6 +262,9 @@ static void exynos4_clockevent_init(void)
264} 262}
265 263
266#ifdef CONFIG_LOCAL_TIMERS 264#ifdef CONFIG_LOCAL_TIMERS
265
266static DEFINE_PER_CPU(struct mct_clock_event_device, percpu_mct_tick);
267
267/* Clock event handling */ 268/* Clock event handling */
268static void exynos4_mct_tick_stop(struct mct_clock_event_device *mevt) 269static void exynos4_mct_tick_stop(struct mct_clock_event_device *mevt)
269{ 270{
@@ -428,9 +429,13 @@ int __cpuinit local_timer_setup(struct clock_event_device *evt)
428 429
429void local_timer_stop(struct clock_event_device *evt) 430void local_timer_stop(struct clock_event_device *evt)
430{ 431{
432 unsigned int cpu = smp_processor_id();
431 evt->set_mode(CLOCK_EVT_MODE_UNUSED, evt); 433 evt->set_mode(CLOCK_EVT_MODE_UNUSED, evt);
432 if (mct_int_type == MCT_INT_SPI) 434 if (mct_int_type == MCT_INT_SPI)
433 disable_irq(evt->irq); 435 if (cpu == 0)
436 remove_irq(evt->irq, &mct_tick0_event_irq);
437 else
438 remove_irq(evt->irq, &mct_tick1_event_irq);
434 else 439 else
435 disable_percpu_irq(IRQ_MCT_LOCALTIMER); 440 disable_percpu_irq(IRQ_MCT_LOCALTIMER);
436} 441}
@@ -443,6 +448,7 @@ static void __init exynos4_timer_resources(void)
443 448
444 clk_rate = clk_get_rate(mct_clk); 449 clk_rate = clk_get_rate(mct_clk);
445 450
451#ifdef CONFIG_LOCAL_TIMERS
446 if (mct_int_type == MCT_INT_PPI) { 452 if (mct_int_type == MCT_INT_PPI) {
447 int err; 453 int err;
448 454
@@ -452,6 +458,7 @@ static void __init exynos4_timer_resources(void)
452 WARN(err, "MCT: can't request IRQ %d (%d)\n", 458 WARN(err, "MCT: can't request IRQ %d (%d)\n",
453 IRQ_MCT_LOCALTIMER, err); 459 IRQ_MCT_LOCALTIMER, err);
454 } 460 }
461#endif /* CONFIG_LOCAL_TIMERS */
455} 462}
456 463
457static void __init exynos4_timer_init(void) 464static void __init exynos4_timer_init(void)
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index c44aa974e79c..d0a27303edb8 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -98,6 +98,7 @@ config MACH_SCB9328
98config MACH_APF9328 98config MACH_APF9328
99 bool "APF9328" 99 bool "APF9328"
100 select SOC_IMX1 100 select SOC_IMX1
101 select IMX_HAVE_PLATFORM_IMX_I2C
101 select IMX_HAVE_PLATFORM_IMX_UART 102 select IMX_HAVE_PLATFORM_IMX_UART
102 help 103 help
103 Say Yes here if you are using the Armadeus APF9328 development board 104 Say Yes here if you are using the Armadeus APF9328 development board
diff --git a/arch/arm/mach-imx/Makefile.boot b/arch/arm/mach-imx/Makefile.boot
index cfede5768aa0..5f4d06af4912 100644
--- a/arch/arm/mach-imx/Makefile.boot
+++ b/arch/arm/mach-imx/Makefile.boot
@@ -25,3 +25,6 @@ initrd_phys-$(CONFIG_SOC_IMX35) := 0x80800000
25zreladdr-$(CONFIG_SOC_IMX6Q) += 0x10008000 25zreladdr-$(CONFIG_SOC_IMX6Q) += 0x10008000
26params_phys-$(CONFIG_SOC_IMX6Q) := 0x10000100 26params_phys-$(CONFIG_SOC_IMX6Q) := 0x10000100
27initrd_phys-$(CONFIG_SOC_IMX6Q) := 0x10800000 27initrd_phys-$(CONFIG_SOC_IMX6Q) := 0x10800000
28
29dtb-$(CONFIG_SOC_IMX6Q) += imx6q-arm2.dtb \
30 imx6q-sabrelite.dtb
diff --git a/arch/arm/mach-imx/mach-apf9328.c b/arch/arm/mach-imx/mach-apf9328.c
index 1e486e67dabb..c71dbcc37b11 100644
--- a/arch/arm/mach-imx/mach-apf9328.c
+++ b/arch/arm/mach-imx/mach-apf9328.c
@@ -18,6 +18,7 @@
18#include <linux/platform_device.h> 18#include <linux/platform_device.h>
19#include <linux/mtd/physmap.h> 19#include <linux/mtd/physmap.h>
20#include <linux/dm9000.h> 20#include <linux/dm9000.h>
21#include <linux/i2c.h>
21 22
22#include <asm/mach-types.h> 23#include <asm/mach-types.h>
23#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
@@ -41,6 +42,9 @@ static const int apf9328_pins[] __initconst = {
41 PB29_PF_UART2_RTS, 42 PB29_PF_UART2_RTS,
42 PB30_PF_UART2_TXD, 43 PB30_PF_UART2_TXD,
43 PB31_PF_UART2_RXD, 44 PB31_PF_UART2_RXD,
45 /* I2C */
46 PA15_PF_I2C_SDA,
47 PA16_PF_I2C_SCL,
44}; 48};
45 49
46/* 50/*
@@ -103,6 +107,10 @@ static const struct imxuart_platform_data uart1_pdata __initconst = {
103 .flags = IMXUART_HAVE_RTSCTS, 107 .flags = IMXUART_HAVE_RTSCTS,
104}; 108};
105 109
110static const struct imxi2c_platform_data apf9328_i2c_data __initconst = {
111 .bitrate = 100000,
112};
113
106static struct platform_device *devices[] __initdata = { 114static struct platform_device *devices[] __initdata = {
107 &apf9328_flash_device, 115 &apf9328_flash_device,
108 &dm9000x_device, 116 &dm9000x_device,
@@ -119,6 +127,8 @@ static void __init apf9328_init(void)
119 imx1_add_imx_uart0(NULL); 127 imx1_add_imx_uart0(NULL);
120 imx1_add_imx_uart1(&uart1_pdata); 128 imx1_add_imx_uart1(&uart1_pdata);
121 129
130 imx1_add_imx_i2c(&apf9328_i2c_data);
131
122 platform_add_devices(devices, ARRAY_SIZE(devices)); 132 platform_add_devices(devices, ARRAY_SIZE(devices));
123} 133}
124 134
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index 9cd860a27af5..bee633496f7b 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -16,6 +16,8 @@
16#include <linux/of.h> 16#include <linux/of.h>
17#include <linux/of_irq.h> 17#include <linux/of_irq.h>
18#include <linux/of_platform.h> 18#include <linux/of_platform.h>
19#include <linux/phy.h>
20#include <linux/micrel_phy.h>
19#include <asm/hardware/cache-l2x0.h> 21#include <asm/hardware/cache-l2x0.h>
20#include <asm/hardware/gic.h> 22#include <asm/hardware/gic.h>
21#include <asm/mach/arch.h> 23#include <asm/mach/arch.h>
@@ -23,8 +25,27 @@
23#include <mach/common.h> 25#include <mach/common.h>
24#include <mach/hardware.h> 26#include <mach/hardware.h>
25 27
28/* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */
29static int ksz9021rn_phy_fixup(struct phy_device *phydev)
30{
31 /* min rx data delay */
32 phy_write(phydev, 0x0b, 0x8105);
33 phy_write(phydev, 0x0c, 0x0000);
34
35 /* max rx/tx clock delay, min rx/tx control delay */
36 phy_write(phydev, 0x0b, 0x8104);
37 phy_write(phydev, 0x0c, 0xf0f0);
38 phy_write(phydev, 0x0b, 0x104);
39
40 return 0;
41}
42
26static void __init imx6q_init_machine(void) 43static void __init imx6q_init_machine(void)
27{ 44{
45 if (of_machine_is_compatible("fsl,imx6q-sabrelite"))
46 phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
47 ksz9021rn_phy_fixup);
48
28 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 49 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
29 50
30 imx6q_pm_init(); 51 imx6q_pm_init();
@@ -37,14 +58,15 @@ static void __init imx6q_map_io(void)
37 imx6q_clock_map_io(); 58 imx6q_clock_map_io();
38} 59}
39 60
40static void __init imx6q_gpio_add_irq_domain(struct device_node *np, 61static int __init imx6q_gpio_add_irq_domain(struct device_node *np,
41 struct device_node *interrupt_parent) 62 struct device_node *interrupt_parent)
42{ 63{
43 static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS - 64 static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
44 32 * 7; /* imx6q gets 7 gpio ports */
45 65
66 gpio_irq_base -= 32;
46 irq_domain_add_simple(np, gpio_irq_base); 67 irq_domain_add_simple(np, gpio_irq_base);
47 gpio_irq_base += 32; 68
69 return 0;
48} 70}
49 71
50static const struct of_device_id imx6q_irq_match[] __initconst = { 72static const struct of_device_id imx6q_irq_match[] __initconst = {
@@ -71,7 +93,8 @@ static struct sys_timer imx6q_timer = {
71}; 93};
72 94
73static const char *imx6q_dt_compat[] __initdata = { 95static const char *imx6q_dt_compat[] __initdata = {
74 "fsl,imx6q-sabreauto", 96 "fsl,imx6q-arm2",
97 "fsl,imx6q-sabrelite",
75 NULL, 98 NULL,
76}; 99};
77 100
diff --git a/arch/arm/mach-imx/mach-mx31_3ds.c b/arch/arm/mach-imx/mach-mx31_3ds.c
index b8c54b840185..00bb308ce1cd 100644
--- a/arch/arm/mach-imx/mach-mx31_3ds.c
+++ b/arch/arm/mach-imx/mach-mx31_3ds.c
@@ -492,7 +492,7 @@ static struct mc13xxx_platform_data mc13783_pdata = {
492 .regulators = mx31_3ds_regulators, 492 .regulators = mx31_3ds_regulators,
493 .num_regulators = ARRAY_SIZE(mx31_3ds_regulators), 493 .num_regulators = ARRAY_SIZE(mx31_3ds_regulators),
494 }, 494 },
495 .flags = MC13XXX_USE_TOUCHSCREEN, 495 .flags = MC13XXX_USE_TOUCHSCREEN | MC13XXX_USE_RTC,
496}; 496};
497 497
498/* SPI */ 498/* SPI */
diff --git a/arch/arm/mach-msm/devices-iommu.c b/arch/arm/mach-msm/devices-iommu.c
index 24030d0da6e3..0fb7a17df398 100644
--- a/arch/arm/mach-msm/devices-iommu.c
+++ b/arch/arm/mach-msm/devices-iommu.c
@@ -18,6 +18,7 @@
18#include <linux/kernel.h> 18#include <linux/kernel.h>
19#include <linux/platform_device.h> 19#include <linux/platform_device.h>
20#include <linux/bootmem.h> 20#include <linux/bootmem.h>
21#include <linux/module.h>
21#include <mach/irqs.h> 22#include <mach/irqs.h>
22#include <mach/iommu.h> 23#include <mach/iommu.h>
23 24
diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c
index 5c837603ff0f..24994bb52147 100644
--- a/arch/arm/mach-mx5/board-mx51_babbage.c
+++ b/arch/arm/mach-mx5/board-mx51_babbage.c
@@ -362,7 +362,7 @@ static void __init mx51_babbage_init(void)
362{ 362{
363 iomux_v3_cfg_t usbh1stp = MX51_PAD_USBH1_STP__USBH1_STP; 363 iomux_v3_cfg_t usbh1stp = MX51_PAD_USBH1_STP__USBH1_STP;
364 iomux_v3_cfg_t power_key = NEW_PAD_CTRL(MX51_PAD_EIM_A27__GPIO2_21, 364 iomux_v3_cfg_t power_key = NEW_PAD_CTRL(MX51_PAD_EIM_A27__GPIO2_21,
365 PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH | PAD_CTL_PUS_100K_UP); 365 PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH);
366 366
367 imx51_soc_init(); 367 imx51_soc_init();
368 368
diff --git a/arch/arm/mach-mx5/board-mx53_evk.c b/arch/arm/mach-mx5/board-mx53_evk.c
index 6bea31ab8f85..64bbfcea6f35 100644
--- a/arch/arm/mach-mx5/board-mx53_evk.c
+++ b/arch/arm/mach-mx5/board-mx53_evk.c
@@ -106,7 +106,7 @@ static inline void mx53_evk_fec_reset(void)
106 gpio_set_value(MX53_EVK_FEC_PHY_RST, 1); 106 gpio_set_value(MX53_EVK_FEC_PHY_RST, 1);
107} 107}
108 108
109static struct fec_platform_data mx53_evk_fec_pdata = { 109static const struct fec_platform_data mx53_evk_fec_pdata __initconst = {
110 .phy = PHY_INTERFACE_MODE_RMII, 110 .phy = PHY_INTERFACE_MODE_RMII,
111}; 111};
112 112
diff --git a/arch/arm/mach-mx5/board-mx53_loco.c b/arch/arm/mach-mx5/board-mx53_loco.c
index 7678f7734db6..237bdecd9331 100644
--- a/arch/arm/mach-mx5/board-mx53_loco.c
+++ b/arch/arm/mach-mx5/board-mx53_loco.c
@@ -242,7 +242,7 @@ static inline void mx53_loco_fec_reset(void)
242 gpio_set_value(LOCO_FEC_PHY_RST, 1); 242 gpio_set_value(LOCO_FEC_PHY_RST, 1);
243} 243}
244 244
245static struct fec_platform_data mx53_loco_fec_data = { 245static const struct fec_platform_data mx53_loco_fec_data __initconst = {
246 .phy = PHY_INTERFACE_MODE_RMII, 246 .phy = PHY_INTERFACE_MODE_RMII,
247}; 247};
248 248
diff --git a/arch/arm/mach-mx5/board-mx53_smd.c b/arch/arm/mach-mx5/board-mx53_smd.c
index 59c0845eb4a6..d42132a80e8f 100644
--- a/arch/arm/mach-mx5/board-mx53_smd.c
+++ b/arch/arm/mach-mx5/board-mx53_smd.c
@@ -104,7 +104,7 @@ static inline void mx53_smd_fec_reset(void)
104 gpio_set_value(SMD_FEC_PHY_RST, 1); 104 gpio_set_value(SMD_FEC_PHY_RST, 1);
105} 105}
106 106
107static struct fec_platform_data mx53_smd_fec_data = { 107static const struct fec_platform_data mx53_smd_fec_data __initconst = {
108 .phy = PHY_INTERFACE_MODE_RMII, 108 .phy = PHY_INTERFACE_MODE_RMII,
109}; 109};
110 110
diff --git a/arch/arm/mach-mx5/imx51-dt.c b/arch/arm/mach-mx5/imx51-dt.c
index ccc61585659b..596edd967dbf 100644
--- a/arch/arm/mach-mx5/imx51-dt.c
+++ b/arch/arm/mach-mx5/imx51-dt.c
@@ -44,20 +44,22 @@ static const struct of_dev_auxdata imx51_auxdata_lookup[] __initconst = {
44 { /* sentinel */ } 44 { /* sentinel */ }
45}; 45};
46 46
47static void __init imx51_tzic_add_irq_domain(struct device_node *np, 47static int __init imx51_tzic_add_irq_domain(struct device_node *np,
48 struct device_node *interrupt_parent) 48 struct device_node *interrupt_parent)
49{ 49{
50 irq_domain_add_simple(np, 0); 50 irq_domain_add_simple(np, 0);
51 return 0;
51} 52}
52 53
53static void __init imx51_gpio_add_irq_domain(struct device_node *np, 54static int __init imx51_gpio_add_irq_domain(struct device_node *np,
54 struct device_node *interrupt_parent) 55 struct device_node *interrupt_parent)
55{ 56{
56 static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS - 57 static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
57 32 * 4; /* imx51 gets 4 gpio ports */
58 58
59 gpio_irq_base -= 32;
59 irq_domain_add_simple(np, gpio_irq_base); 60 irq_domain_add_simple(np, gpio_irq_base);
60 gpio_irq_base += 32; 61
62 return 0;
61} 63}
62 64
63static const struct of_device_id imx51_irq_match[] __initconst = { 65static const struct of_device_id imx51_irq_match[] __initconst = {
diff --git a/arch/arm/mach-mx5/imx53-dt.c b/arch/arm/mach-mx5/imx53-dt.c
index ccaa0b81b768..85bfd5ff21b0 100644
--- a/arch/arm/mach-mx5/imx53-dt.c
+++ b/arch/arm/mach-mx5/imx53-dt.c
@@ -48,20 +48,22 @@ static const struct of_dev_auxdata imx53_auxdata_lookup[] __initconst = {
48 { /* sentinel */ } 48 { /* sentinel */ }
49}; 49};
50 50
51static void __init imx53_tzic_add_irq_domain(struct device_node *np, 51static int __init imx53_tzic_add_irq_domain(struct device_node *np,
52 struct device_node *interrupt_parent) 52 struct device_node *interrupt_parent)
53{ 53{
54 irq_domain_add_simple(np, 0); 54 irq_domain_add_simple(np, 0);
55 return 0;
55} 56}
56 57
57static void __init imx53_gpio_add_irq_domain(struct device_node *np, 58static int __init imx53_gpio_add_irq_domain(struct device_node *np,
58 struct device_node *interrupt_parent) 59 struct device_node *interrupt_parent)
59{ 60{
60 static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS - 61 static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
61 32 * 7; /* imx53 gets 7 gpio ports */
62 62
63 gpio_irq_base -= 32;
63 irq_domain_add_simple(np, gpio_irq_base); 64 irq_domain_add_simple(np, gpio_irq_base);
64 gpio_irq_base += 32; 65
66 return 0;
65} 67}
66 68
67static const struct of_device_id imx53_irq_match[] __initconst = { 69static const struct of_device_id imx53_irq_match[] __initconst = {
diff --git a/arch/arm/mach-mxs/include/mach/mx28.h b/arch/arm/mach-mxs/include/mach/mx28.h
index 75d86118b76a..30c7990f3c01 100644
--- a/arch/arm/mach-mxs/include/mach/mx28.h
+++ b/arch/arm/mach-mxs/include/mach/mx28.h
@@ -104,8 +104,8 @@
104#define MX28_INT_CAN1 9 104#define MX28_INT_CAN1 9
105#define MX28_INT_LRADC_TOUCH 10 105#define MX28_INT_LRADC_TOUCH 10
106#define MX28_INT_HSADC 13 106#define MX28_INT_HSADC 13
107#define MX28_INT_IRADC_THRESH0 14 107#define MX28_INT_LRADC_THRESH0 14
108#define MX28_INT_IRADC_THRESH1 15 108#define MX28_INT_LRADC_THRESH1 15
109#define MX28_INT_LRADC_CH0 16 109#define MX28_INT_LRADC_CH0 16
110#define MX28_INT_LRADC_CH1 17 110#define MX28_INT_LRADC_CH1 17
111#define MX28_INT_LRADC_CH2 18 111#define MX28_INT_LRADC_CH2 18
diff --git a/arch/arm/mach-mxs/include/mach/mxs.h b/arch/arm/mach-mxs/include/mach/mxs.h
index 0d2d2b470998..bde5f6634747 100644
--- a/arch/arm/mach-mxs/include/mach/mxs.h
+++ b/arch/arm/mach-mxs/include/mach/mxs.h
@@ -30,6 +30,7 @@
30 */ 30 */
31#define cpu_is_mx23() ( \ 31#define cpu_is_mx23() ( \
32 machine_is_mx23evk() || \ 32 machine_is_mx23evk() || \
33 machine_is_stmp378x() || \
33 0) 34 0)
34#define cpu_is_mx28() ( \ 35#define cpu_is_mx28() ( \
35 machine_is_mx28evk() || \ 36 machine_is_mx28evk() || \
diff --git a/arch/arm/mach-mxs/mach-m28evk.c b/arch/arm/mach-mxs/mach-m28evk.c
index 3b1681e4f49a..6b00577b7025 100644
--- a/arch/arm/mach-mxs/mach-m28evk.c
+++ b/arch/arm/mach-mxs/mach-m28evk.c
@@ -361,6 +361,6 @@ static struct sys_timer m28evk_timer = {
361MACHINE_START(M28EVK, "DENX M28 EVK") 361MACHINE_START(M28EVK, "DENX M28 EVK")
362 .map_io = mx28_map_io, 362 .map_io = mx28_map_io,
363 .init_irq = mx28_init_irq, 363 .init_irq = mx28_init_irq,
364 .init_machine = m28evk_init,
365 .timer = &m28evk_timer, 364 .timer = &m28evk_timer,
365 .init_machine = m28evk_init,
366MACHINE_END 366MACHINE_END
diff --git a/arch/arm/mach-mxs/mach-stmp378x_devb.c b/arch/arm/mach-mxs/mach-stmp378x_devb.c
index 177e53123a02..6834dea38c04 100644
--- a/arch/arm/mach-mxs/mach-stmp378x_devb.c
+++ b/arch/arm/mach-mxs/mach-stmp378x_devb.c
@@ -115,6 +115,6 @@ static struct sys_timer stmp378x_dvb_timer = {
115MACHINE_START(STMP378X, "STMP378X") 115MACHINE_START(STMP378X, "STMP378X")
116 .map_io = mx23_map_io, 116 .map_io = mx23_map_io,
117 .init_irq = mx23_init_irq, 117 .init_irq = mx23_init_irq,
118 .init_machine = stmp378x_dvb_init,
119 .timer = &stmp378x_dvb_timer, 118 .timer = &stmp378x_dvb_timer,
119 .init_machine = stmp378x_dvb_init,
120MACHINE_END 120MACHINE_END
diff --git a/arch/arm/mach-mxs/module-tx28.c b/arch/arm/mach-mxs/module-tx28.c
index 0fcff47009cf..9a7b08b2a925 100644
--- a/arch/arm/mach-mxs/module-tx28.c
+++ b/arch/arm/mach-mxs/module-tx28.c
@@ -66,11 +66,11 @@ static const iomux_cfg_t tx28_fec1_pads[] __initconst = {
66 MX28_PAD_ENET0_CRS__ENET1_RX_EN, 66 MX28_PAD_ENET0_CRS__ENET1_RX_EN,
67}; 67};
68 68
69static struct fec_platform_data tx28_fec0_data = { 69static const struct fec_platform_data tx28_fec0_data __initconst = {
70 .phy = PHY_INTERFACE_MODE_RMII, 70 .phy = PHY_INTERFACE_MODE_RMII,
71}; 71};
72 72
73static struct fec_platform_data tx28_fec1_data = { 73static const struct fec_platform_data tx28_fec1_data __initconst = {
74 .phy = PHY_INTERFACE_MODE_RMII, 74 .phy = PHY_INTERFACE_MODE_RMII,
75}; 75};
76 76
diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c
index 1297bb58869c..9ff90a744a21 100644
--- a/arch/arm/mach-omap1/clock_data.c
+++ b/arch/arm/mach-omap1/clock_data.c
@@ -16,6 +16,8 @@
16 16
17#include <linux/kernel.h> 17#include <linux/kernel.h>
18#include <linux/clk.h> 18#include <linux/clk.h>
19#include <linux/cpufreq.h>
20#include <linux/delay.h>
19#include <linux/io.h> 21#include <linux/io.h>
20 22
21#include <asm/mach-types.h> /* for machine_is_* */ 23#include <asm/mach-types.h> /* for machine_is_* */
@@ -927,16 +929,22 @@ int __init omap1_clk_init(void)
927 929
928void __init omap1_clk_late_init(void) 930void __init omap1_clk_late_init(void)
929{ 931{
930 if (ck_dpll1.rate >= OMAP1_DPLL1_SANE_VALUE) 932 unsigned long rate = ck_dpll1.rate;
933
934 if (rate >= OMAP1_DPLL1_SANE_VALUE)
931 return; 935 return;
932 936
937 /* System booting at unusable rate, force reprogramming of DPLL1 */
938 ck_dpll1_p->rate = 0;
939
933 /* Find the highest supported frequency and enable it */ 940 /* Find the highest supported frequency and enable it */
934 if (omap1_select_table_rate(&virtual_ck_mpu, ~0)) { 941 if (omap1_select_table_rate(&virtual_ck_mpu, ~0)) {
935 pr_err("System frequencies not set, using default. Check your config.\n"); 942 pr_err("System frequencies not set, using default. Check your config.\n");
936 omap_writew(0x2290, DPLL_CTL); 943 omap_writew(0x2290, DPLL_CTL);
937 omap_writew(cpu_is_omap7xx() ? 0x3005 : 0x1005, ARM_CKCTL); 944 omap_writew(cpu_is_omap7xx() ? 0x2005 : 0x0005, ARM_CKCTL);
938 ck_dpll1.rate = OMAP1_DPLL1_SANE_VALUE; 945 ck_dpll1.rate = OMAP1_DPLL1_SANE_VALUE;
939 } 946 }
940 propagate_rate(&ck_dpll1); 947 propagate_rate(&ck_dpll1);
941 omap1_show_rates(); 948 omap1_show_rates();
949 loops_per_jiffy = cpufreq_scale(loops_per_jiffy, rate, ck_dpll1.rate);
942} 950}
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index b6625130831d..5ca19d717b3f 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -76,8 +76,13 @@ config SOC_OMAP3430
76 default y 76 default y
77 select ARCH_OMAP_OTG 77 select ARCH_OMAP_OTG
78 78
79config SOC_OMAPTI816X 79config SOC_OMAPTI81XX
80 bool "TI816X support" 80 bool "TI81XX support"
81 depends on ARCH_OMAP3
82 default y
83
84config SOC_OMAPAM33XX
85 bool "AM33XX support"
81 depends on ARCH_OMAP3 86 depends on ARCH_OMAP3
82 default y 87 default y
83 88
@@ -314,7 +319,12 @@ config MACH_OMAP_3630SDP
314 319
315config MACH_TI8168EVM 320config MACH_TI8168EVM
316 bool "TI8168 Evaluation Module" 321 bool "TI8168 Evaluation Module"
317 depends on SOC_OMAPTI816X 322 depends on SOC_OMAPTI81XX
323 default y
324
325config MACH_TI8148EVM
326 bool "TI8148 Evaluation Module"
327 depends on SOC_OMAPTI81XX
318 default y 328 default y
319 329
320config MACH_OMAP_4430SDP 330config MACH_OMAP_4430SDP
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index b009f17dee56..6d226a76d057 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -232,6 +232,7 @@ obj-$(CONFIG_MACH_CRANEBOARD) += board-am3517crane.o
232 232
233obj-$(CONFIG_MACH_SBC3530) += board-omap3stalker.o 233obj-$(CONFIG_MACH_SBC3530) += board-omap3stalker.o
234obj-$(CONFIG_MACH_TI8168EVM) += board-ti8168evm.o 234obj-$(CONFIG_MACH_TI8168EVM) += board-ti8168evm.o
235obj-$(CONFIG_MACH_TI8148EVM) += board-ti8168evm.o
235 236
236# Platform specific device init code 237# Platform specific device init code
237 238
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index ef2bbc09428a..b5d9c6fe012f 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -372,11 +372,17 @@ static struct platform_device sdp4430_vbat = {
372 }, 372 },
373}; 373};
374 374
375static struct platform_device sdp4430_dmic_codec = {
376 .name = "dmic-codec",
377 .id = -1,
378};
379
375static struct platform_device *sdp4430_devices[] __initdata = { 380static struct platform_device *sdp4430_devices[] __initdata = {
376 &sdp4430_gpio_keys_device, 381 &sdp4430_gpio_keys_device,
377 &sdp4430_leds_gpio, 382 &sdp4430_leds_gpio,
378 &sdp4430_leds_pwm, 383 &sdp4430_leds_pwm,
379 &sdp4430_vbat, 384 &sdp4430_vbat,
385 &sdp4430_dmic_codec,
380}; 386};
381 387
382static struct omap_musb_board_data musb_board_data = { 388static struct omap_musb_board_data musb_board_data = {
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index 510b6a2ff0fa..b38cd7b240e8 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -53,7 +53,8 @@
53#include "hsmmc.h" 53#include "hsmmc.h"
54#include "common-board-devices.h" 54#include "common-board-devices.h"
55 55
56#define CM_T35_GPIO_PENDOWN 57 56#define CM_T35_GPIO_PENDOWN 57
57#define SB_T35_USB_HUB_RESET_GPIO 167
57 58
58#define CM_T35_SMSC911X_CS 5 59#define CM_T35_SMSC911X_CS 5
59#define CM_T35_SMSC911X_GPIO 163 60#define CM_T35_SMSC911X_GPIO 163
@@ -339,8 +340,10 @@ static struct regulator_consumer_supply cm_t35_vsim_supply[] = {
339 REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"), 340 REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
340}; 341};
341 342
342static struct regulator_consumer_supply cm_t35_vdvi_supply[] = { 343static struct regulator_consumer_supply cm_t35_vio_supplies[] = {
343 REGULATOR_SUPPLY("vdvi", "omapdss"), 344 REGULATOR_SUPPLY("vcc", "spi1.0"),
345 REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
346 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
344}; 347};
345 348
346/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ 349/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
@@ -373,6 +376,19 @@ static struct regulator_init_data cm_t35_vsim = {
373 .consumer_supplies = cm_t35_vsim_supply, 376 .consumer_supplies = cm_t35_vsim_supply,
374}; 377};
375 378
379static struct regulator_init_data cm_t35_vio = {
380 .constraints = {
381 .min_uV = 1800000,
382 .max_uV = 1800000,
383 .apply_uV = true,
384 .valid_modes_mask = REGULATOR_MODE_NORMAL
385 | REGULATOR_MODE_STANDBY,
386 .valid_ops_mask = REGULATOR_CHANGE_MODE,
387 },
388 .num_consumer_supplies = ARRAY_SIZE(cm_t35_vio_supplies),
389 .consumer_supplies = cm_t35_vio_supplies,
390};
391
376static uint32_t cm_t35_keymap[] = { 392static uint32_t cm_t35_keymap[] = {
377 KEY(0, 0, KEY_A), KEY(0, 1, KEY_B), KEY(0, 2, KEY_LEFT), 393 KEY(0, 0, KEY_A), KEY(0, 1, KEY_B), KEY(0, 2, KEY_LEFT),
378 KEY(1, 0, KEY_UP), KEY(1, 1, KEY_ENTER), KEY(1, 2, KEY_DOWN), 394 KEY(1, 0, KEY_UP), KEY(1, 1, KEY_ENTER), KEY(1, 2, KEY_DOWN),
@@ -421,6 +437,23 @@ static struct usbhs_omap_board_data usbhs_bdata __initdata = {
421 .reset_gpio_port[2] = -EINVAL 437 .reset_gpio_port[2] = -EINVAL
422}; 438};
423 439
440static void cm_t35_init_usbh(void)
441{
442 int err;
443
444 err = gpio_request_one(SB_T35_USB_HUB_RESET_GPIO,
445 GPIOF_OUT_INIT_LOW, "usb hub rst");
446 if (err) {
447 pr_err("SB-T35: usb hub rst gpio request failed: %d\n", err);
448 } else {
449 udelay(10);
450 gpio_set_value(SB_T35_USB_HUB_RESET_GPIO, 1);
451 msleep(1);
452 }
453
454 usbhs_init(&usbhs_bdata);
455}
456
424static int cm_t35_twl_gpio_setup(struct device *dev, unsigned gpio, 457static int cm_t35_twl_gpio_setup(struct device *dev, unsigned gpio,
425 unsigned ngpio) 458 unsigned ngpio)
426{ 459{
@@ -456,17 +489,14 @@ static struct twl4030_platform_data cm_t35_twldata = {
456 .gpio = &cm_t35_gpio_data, 489 .gpio = &cm_t35_gpio_data,
457 .vmmc1 = &cm_t35_vmmc1, 490 .vmmc1 = &cm_t35_vmmc1,
458 .vsim = &cm_t35_vsim, 491 .vsim = &cm_t35_vsim,
492 .vio = &cm_t35_vio,
459}; 493};
460 494
461static void __init cm_t35_init_i2c(void) 495static void __init cm_t35_init_i2c(void)
462{ 496{
463 omap3_pmic_get_config(&cm_t35_twldata, TWL_COMMON_PDATA_USB, 497 omap3_pmic_get_config(&cm_t35_twldata, TWL_COMMON_PDATA_USB,
464 TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2); 498 TWL_COMMON_REGULATOR_VDAC |
465 499 TWL_COMMON_PDATA_AUDIO);
466 cm_t35_twldata.vpll2->constraints.name = "VDVI";
467 cm_t35_twldata.vpll2->num_consumer_supplies =
468 ARRAY_SIZE(cm_t35_vdvi_supply);
469 cm_t35_twldata.vpll2->consumer_supplies = cm_t35_vdvi_supply;
470 500
471 omap3_pmic_init("tps65930", &cm_t35_twldata); 501 omap3_pmic_init("tps65930", &cm_t35_twldata);
472} 502}
@@ -570,24 +600,28 @@ static void __init cm_t3x_common_dss_mux_init(int mux_mode)
570 600
571static void __init cm_t35_init_mux(void) 601static void __init cm_t35_init_mux(void)
572{ 602{
573 omap_mux_init_signal("gpio_70", OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT); 603 int mux_mode = OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT;
574 omap_mux_init_signal("gpio_71", OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT); 604
575 omap_mux_init_signal("gpio_72", OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT); 605 omap_mux_init_signal("dss_data0.dss_data0", mux_mode);
576 omap_mux_init_signal("gpio_73", OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT); 606 omap_mux_init_signal("dss_data1.dss_data1", mux_mode);
577 omap_mux_init_signal("gpio_74", OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT); 607 omap_mux_init_signal("dss_data2.dss_data2", mux_mode);
578 omap_mux_init_signal("gpio_75", OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT); 608 omap_mux_init_signal("dss_data3.dss_data3", mux_mode);
579 cm_t3x_common_dss_mux_init(OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT); 609 omap_mux_init_signal("dss_data4.dss_data4", mux_mode);
610 omap_mux_init_signal("dss_data5.dss_data5", mux_mode);
611 cm_t3x_common_dss_mux_init(mux_mode);
580} 612}
581 613
582static void __init cm_t3730_init_mux(void) 614static void __init cm_t3730_init_mux(void)
583{ 615{
584 omap_mux_init_signal("sys_boot0", OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT); 616 int mux_mode = OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT;
585 omap_mux_init_signal("sys_boot1", OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT); 617
586 omap_mux_init_signal("sys_boot3", OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT); 618 omap_mux_init_signal("sys_boot0", mux_mode);
587 omap_mux_init_signal("sys_boot4", OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT); 619 omap_mux_init_signal("sys_boot1", mux_mode);
588 omap_mux_init_signal("sys_boot5", OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT); 620 omap_mux_init_signal("sys_boot3", mux_mode);
589 omap_mux_init_signal("sys_boot6", OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT); 621 omap_mux_init_signal("sys_boot4", mux_mode);
590 cm_t3x_common_dss_mux_init(OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT); 622 omap_mux_init_signal("sys_boot5", mux_mode);
623 omap_mux_init_signal("sys_boot6", mux_mode);
624 cm_t3x_common_dss_mux_init(mux_mode);
591} 625}
592#else 626#else
593static inline void cm_t35_init_mux(void) {} 627static inline void cm_t35_init_mux(void) {}
@@ -612,7 +646,7 @@ static void __init cm_t3x_common_init(void)
612 cm_t35_init_display(); 646 cm_t35_init_display();
613 647
614 usb_musb_init(NULL); 648 usb_musb_init(NULL);
615 usbhs_init(&usbhs_bdata); 649 cm_t35_init_usbh();
616} 650}
617 651
618static void __init cm_t35_init(void) 652static void __init cm_t35_init(void)
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c
index bd18d691c6ad..d67bcdf724d7 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -15,6 +15,7 @@
15#include <linux/input/matrix_keypad.h> 15#include <linux/input/matrix_keypad.h>
16#include <linux/spi/spi.h> 16#include <linux/spi/spi.h>
17#include <linux/wl12xx.h> 17#include <linux/wl12xx.h>
18#include <linux/spi/tsc2005.h>
18#include <linux/i2c.h> 19#include <linux/i2c.h>
19#include <linux/i2c/twl.h> 20#include <linux/i2c/twl.h>
20#include <linux/clk.h> 21#include <linux/clk.h>
@@ -58,6 +59,9 @@
58 59
59#define RX51_USB_TRANSCEIVER_RST_GPIO 67 60#define RX51_USB_TRANSCEIVER_RST_GPIO 67
60 61
62#define RX51_TSC2005_RESET_GPIO 104
63#define RX51_TSC2005_IRQ_GPIO 100
64
61/* list all spi devices here */ 65/* list all spi devices here */
62enum { 66enum {
63 RX51_SPI_WL1251, 67 RX51_SPI_WL1251,
@@ -66,6 +70,7 @@ enum {
66}; 70};
67 71
68static struct wl12xx_platform_data wl1251_pdata; 72static struct wl12xx_platform_data wl1251_pdata;
73static struct tsc2005_platform_data tsc2005_pdata;
69 74
70#if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE) 75#if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE)
71static struct tsl2563_platform_data rx51_tsl2563_platform_data = { 76static struct tsl2563_platform_data rx51_tsl2563_platform_data = {
@@ -167,10 +172,10 @@ static struct spi_board_info rx51_peripherals_spi_board_info[] __initdata = {
167 .modalias = "tsc2005", 172 .modalias = "tsc2005",
168 .bus_num = 1, 173 .bus_num = 1,
169 .chip_select = 0, 174 .chip_select = 0,
170 /* .irq = OMAP_GPIO_IRQ(RX51_TSC2005_IRQ_GPIO),*/ 175 .irq = OMAP_GPIO_IRQ(RX51_TSC2005_IRQ_GPIO),
171 .max_speed_hz = 6000000, 176 .max_speed_hz = 6000000,
172 .controller_data = &tsc2005_mcspi_config, 177 .controller_data = &tsc2005_mcspi_config,
173 /* .platform_data = &tsc2005_config,*/ 178 .platform_data = &tsc2005_pdata,
174 }, 179 },
175}; 180};
176 181
@@ -193,7 +198,7 @@ static struct platform_device rx51_charger_device = {
193static void __init rx51_charger_init(void) 198static void __init rx51_charger_init(void)
194{ 199{
195 WARN_ON(gpio_request_one(RX51_USB_TRANSCEIVER_RST_GPIO, 200 WARN_ON(gpio_request_one(RX51_USB_TRANSCEIVER_RST_GPIO,
196 GPIOF_OUT_INIT_LOW, "isp1704_reset")); 201 GPIOF_OUT_INIT_HIGH, "isp1704_reset"));
197 202
198 platform_device_register(&rx51_charger_device); 203 platform_device_register(&rx51_charger_device);
199} 204}
@@ -1086,6 +1091,42 @@ error:
1086 */ 1091 */
1087} 1092}
1088 1093
1094static struct tsc2005_platform_data tsc2005_pdata = {
1095 .ts_pressure_max = 2048,
1096 .ts_pressure_fudge = 2,
1097 .ts_x_max = 4096,
1098 .ts_x_fudge = 4,
1099 .ts_y_max = 4096,
1100 .ts_y_fudge = 7,
1101 .ts_x_plate_ohm = 280,
1102 .esd_timeout_ms = 8000,
1103};
1104
1105static void rx51_tsc2005_set_reset(bool enable)
1106{
1107 gpio_set_value(RX51_TSC2005_RESET_GPIO, enable);
1108}
1109
1110static void __init rx51_init_tsc2005(void)
1111{
1112 int r;
1113
1114 r = gpio_request_one(RX51_TSC2005_IRQ_GPIO, GPIOF_IN, "tsc2005 IRQ");
1115 if (r < 0) {
1116 printk(KERN_ERR "unable to get %s GPIO\n", "tsc2005 IRQ");
1117 rx51_peripherals_spi_board_info[RX51_SPI_TSC2005].irq = 0;
1118 }
1119
1120 r = gpio_request_one(RX51_TSC2005_RESET_GPIO, GPIOF_OUT_INIT_HIGH,
1121 "tsc2005 reset");
1122 if (r >= 0) {
1123 tsc2005_pdata.set_reset = rx51_tsc2005_set_reset;
1124 } else {
1125 printk(KERN_ERR "unable to get %s GPIO\n", "tsc2005 reset");
1126 tsc2005_pdata.esd_timeout_ms = 0;
1127 }
1128}
1129
1089void __init rx51_peripherals_init(void) 1130void __init rx51_peripherals_init(void)
1090{ 1131{
1091 rx51_i2c_init(); 1132 rx51_i2c_init();
@@ -1094,6 +1135,7 @@ void __init rx51_peripherals_init(void)
1094 board_smc91x_init(); 1135 board_smc91x_init();
1095 rx51_add_gpio_keys(); 1136 rx51_add_gpio_keys();
1096 rx51_init_wl1251(); 1137 rx51_init_wl1251();
1138 rx51_init_tsc2005();
1097 rx51_init_si4713(); 1139 rx51_init_si4713();
1098 spi_register_board_info(rx51_peripherals_spi_board_info, 1140 spi_register_board_info(rx51_peripherals_spi_board_info,
1099 ARRAY_SIZE(rx51_peripherals_spi_board_info)); 1141 ARRAY_SIZE(rx51_peripherals_spi_board_info));
diff --git a/arch/arm/mach-omap2/board-ti8168evm.c b/arch/arm/mach-omap2/board-ti8168evm.c
index 8402b39b2840..5b6ad6e3ccb4 100644
--- a/arch/arm/mach-omap2/board-ti8168evm.c
+++ b/arch/arm/mach-omap2/board-ti8168evm.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Code for TI8168 EVM. 2 * Code for TI8168/TI8148 EVM.
3 * 3 *
4 * Copyright (C) 2010 Texas Instruments, Inc. - http://www.ti.com/ 4 * Copyright (C) 2010 Texas Instruments, Inc. - http://www.ti.com/
5 * 5 *
@@ -23,29 +23,43 @@
23#include <plat/irqs.h> 23#include <plat/irqs.h>
24#include <plat/board.h> 24#include <plat/board.h>
25#include "common.h" 25#include "common.h"
26#include <plat/usb.h>
26 27
27static struct omap_board_config_kernel ti8168_evm_config[] __initdata = { 28static struct omap_musb_board_data musb_board_data = {
29 .set_phy_power = ti81xx_musb_phy_power,
30 .interface_type = MUSB_INTERFACE_ULPI,
31 .mode = MUSB_OTG,
32 .power = 500,
28}; 33};
29 34
30static void __init ti8168_evm_init(void) 35static struct omap_board_config_kernel ti81xx_evm_config[] __initdata = {
36};
37
38static void __init ti81xx_evm_init(void)
31{ 39{
32 omap_serial_init(); 40 omap_serial_init();
33 omap_sdrc_init(NULL, NULL); 41 omap_sdrc_init(NULL, NULL);
34 omap_board_config = ti8168_evm_config; 42 omap_board_config = ti81xx_evm_config;
35 omap_board_config_size = ARRAY_SIZE(ti8168_evm_config); 43 omap_board_config_size = ARRAY_SIZE(ti81xx_evm_config);
36} 44 usb_musb_init(&musb_board_data);
37
38static void __init ti8168_evm_map_io(void)
39{
40 omapti816x_map_common_io();
41} 45}
42 46
43MACHINE_START(TI8168EVM, "ti8168evm") 47MACHINE_START(TI8168EVM, "ti8168evm")
44 /* Maintainer: Texas Instruments */ 48 /* Maintainer: Texas Instruments */
45 .atag_offset = 0x100, 49 .atag_offset = 0x100,
46 .map_io = ti8168_evm_map_io, 50 .map_io = ti81xx_map_io,
47 .init_early = ti816x_init_early, 51 .init_early = ti81xx_init_early,
48 .init_irq = ti816x_init_irq, 52 .init_irq = ti81xx_init_irq,
53 .timer = &omap3_timer,
54 .init_machine = ti81xx_evm_init,
55MACHINE_END
56
57MACHINE_START(TI8148EVM, "ti8148evm")
58 /* Maintainer: Texas Instruments */
59 .atag_offset = 0x100,
60 .map_io = ti81xx_map_io,
61 .init_early = ti81xx_init_early,
62 .init_irq = ti81xx_init_irq,
49 .timer = &omap3_timer, 63 .timer = &omap3_timer,
50 .init_machine = ti8168_evm_init, 64 .init_machine = ti81xx_evm_init,
51MACHINE_END 65MACHINE_END
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 1f3481f8d695..f57ed5baeccf 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -35,7 +35,7 @@
35#include "cm-regbits-24xx.h" 35#include "cm-regbits-24xx.h"
36#include "cm-regbits-34xx.h" 36#include "cm-regbits-34xx.h"
37 37
38u8 cpu_mask; 38u16 cpu_mask;
39 39
40/* 40/*
41 * clkdm_control: if true, then when a clock is enabled in the 41 * clkdm_control: if true, then when a clock is enabled in the
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index 2311bc217226..b8c2a686481c 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -132,7 +132,7 @@ void omap2_clk_print_new_rates(const char *hfclkin_ck_name,
132 const char *core_ck_name, 132 const char *core_ck_name,
133 const char *mpu_ck_name); 133 const char *mpu_ck_name);
134 134
135extern u8 cpu_mask; 135extern u16 cpu_mask;
136 136
137extern const struct clkops clkops_omap2_dflt_wait; 137extern const struct clkops clkops_omap2_dflt_wait;
138extern const struct clkops clkops_dummy; 138extern const struct clkops clkops_dummy;
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index 5d0064a4fb5a..60424f41156b 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -3517,6 +3517,10 @@ int __init omap3xxx_clk_init(void)
3517 } else if (cpu_is_ti816x()) { 3517 } else if (cpu_is_ti816x()) {
3518 cpu_mask = RATE_IN_TI816X; 3518 cpu_mask = RATE_IN_TI816X;
3519 cpu_clkflg = CK_TI816X; 3519 cpu_clkflg = CK_TI816X;
3520 } else if (cpu_is_am33xx()) {
3521 cpu_mask = RATE_IN_AM33XX;
3522 } else if (cpu_is_ti814x()) {
3523 cpu_mask = RATE_IN_TI814X;
3520 } else if (cpu_is_omap34xx()) { 3524 } else if (cpu_is_omap34xx()) {
3521 if (omap_rev() == OMAP3430_REV_ES1_0) { 3525 if (omap_rev() == OMAP3430_REV_ES1_0) {
3522 cpu_mask = RATE_IN_3430ES1; 3526 cpu_mask = RATE_IN_3430ES1;
@@ -3600,7 +3604,7 @@ int __init omap3xxx_clk_init(void)
3600 * Lock DPLL5 -- here only until other device init code can 3604 * Lock DPLL5 -- here only until other device init code can
3601 * handle this 3605 * handle this
3602 */ 3606 */
3603 if (!cpu_is_ti816x() && (omap_rev() >= OMAP3430_REV_ES2_0)) 3607 if (!cpu_is_ti81xx() && (omap_rev() >= OMAP3430_REV_ES2_0))
3604 omap3_clk_lock_dpll5(); 3608 omap3_clk_lock_dpll5();
3605 3609
3606 /* Avoid sleeping during omap3_core_dpll_m2_set_rate() */ 3610 /* Avoid sleeping during omap3_core_dpll_m2_set_rate() */
diff --git a/arch/arm/mach-omap2/common.c b/arch/arm/mach-omap2/common.c
index 684b8a7cd401..aaf421178c91 100644
--- a/arch/arm/mach-omap2/common.c
+++ b/arch/arm/mach-omap2/common.c
@@ -110,23 +110,49 @@ void __init omap3_map_io(void)
110 110
111/* 111/*
112 * Adjust TAP register base such that omap3_check_revision accesses the correct 112 * Adjust TAP register base such that omap3_check_revision accesses the correct
113 * TI816X register for checking device ID (it adds 0x204 to tap base while 113 * TI81XX register for checking device ID (it adds 0x204 to tap base while
114 * TI816X DEVICE ID register is at offset 0x600 from control base). 114 * TI81XX DEVICE ID register is at offset 0x600 from control base).
115 */ 115 */
116#define TI816X_TAP_BASE (TI816X_CTRL_BASE + \ 116#define TI81XX_TAP_BASE (TI81XX_CTRL_BASE + \
117 TI816X_CONTROL_DEVICE_ID - 0x204) 117 TI81XX_CONTROL_DEVICE_ID - 0x204)
118 118
119static struct omap_globals ti816x_globals = { 119static struct omap_globals ti81xx_globals = {
120 .class = OMAP343X_CLASS, 120 .class = OMAP343X_CLASS,
121 .tap = OMAP2_L4_IO_ADDRESS(TI816X_TAP_BASE), 121 .tap = OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE),
122 .ctrl = OMAP2_L4_IO_ADDRESS(TI816X_CTRL_BASE), 122 .ctrl = OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE),
123 .prm = OMAP2_L4_IO_ADDRESS(TI816X_PRCM_BASE), 123 .prm = OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE),
124 .cm = OMAP2_L4_IO_ADDRESS(TI816X_PRCM_BASE), 124 .cm = OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE),
125}; 125};
126 126
127void __init omap2_set_globals_ti816x(void) 127void __init omap2_set_globals_ti81xx(void)
128{ 128{
129 __omap2_set_globals(&ti816x_globals); 129 __omap2_set_globals(&ti81xx_globals);
130}
131
132void __init ti81xx_map_io(void)
133{
134 omapti81xx_map_common_io();
135}
136
137#define AM33XX_TAP_BASE (AM33XX_CTRL_BASE + \
138 TI81XX_CONTROL_DEVICE_ID - 0x204)
139
140static struct omap_globals am33xx_globals = {
141 .class = AM335X_CLASS,
142 .tap = AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE),
143 .ctrl = AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE),
144 .prm = AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE),
145 .cm = AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE),
146};
147
148void __init omap2_set_globals_am33xx(void)
149{
150 __omap2_set_globals(&am33xx_globals);
151}
152
153void __init am33xx_map_io(void)
154{
155 omapam33xx_map_common_io();
130} 156}
131#endif 157#endif
132 158
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index 012bac7d56a5..4b2b416fafe1 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -52,10 +52,18 @@ static inline void omap34xx_map_common_io(void)
52} 52}
53#endif 53#endif
54 54
55#ifdef CONFIG_SOC_OMAPTI816X 55#ifdef CONFIG_SOC_OMAPTI81XX
56extern void omapti816x_map_common_io(void); 56extern void omapti81xx_map_common_io(void);
57#else 57#else
58static inline void omapti816x_map_common_io(void) 58static inline void omapti81xx_map_common_io(void)
59{
60}
61#endif
62
63#ifdef CONFIG_SOC_OMAPAM33XX
64extern void omapam33xx_map_common_io(void);
65#else
66static inline void omapam33xx_map_common_io(void)
59{ 67{
60} 68}
61#endif 69#endif
@@ -82,7 +90,7 @@ void omap35xx_init_early(void);
82void omap3630_init_early(void); 90void omap3630_init_early(void);
83void omap3_init_early(void); /* Do not use this one */ 91void omap3_init_early(void); /* Do not use this one */
84void am35xx_init_early(void); 92void am35xx_init_early(void);
85void ti816x_init_early(void); 93void ti81xx_init_early(void);
86void omap4430_init_early(void); 94void omap4430_init_early(void);
87 95
88/* 96/*
@@ -106,7 +114,8 @@ void omap2_set_globals_242x(void);
106void omap2_set_globals_243x(void); 114void omap2_set_globals_243x(void);
107void omap2_set_globals_3xxx(void); 115void omap2_set_globals_3xxx(void);
108void omap2_set_globals_443x(void); 116void omap2_set_globals_443x(void);
109void omap2_set_globals_ti816x(void); 117void omap2_set_globals_ti81xx(void);
118void omap2_set_globals_am33xx(void);
110 119
111/* These get called from omap2_set_globals_xxxx(), do not call these */ 120/* These get called from omap2_set_globals_xxxx(), do not call these */
112void omap2_set_globals_tap(struct omap_globals *); 121void omap2_set_globals_tap(struct omap_globals *);
@@ -117,7 +126,9 @@ void omap2_set_globals_prcm(struct omap_globals *);
117void omap242x_map_io(void); 126void omap242x_map_io(void);
118void omap243x_map_io(void); 127void omap243x_map_io(void);
119void omap3_map_io(void); 128void omap3_map_io(void);
129void am33xx_map_io(void);
120void omap4_map_io(void); 130void omap4_map_io(void);
131void ti81xx_map_io(void);
121 132
122/** 133/**
123 * omap_test_timeout - busy-loop, testing a condition 134 * omap_test_timeout - busy-loop, testing a condition
@@ -146,7 +157,7 @@ extern struct device *omap4_get_dsp_device(void);
146 157
147void omap2_init_irq(void); 158void omap2_init_irq(void);
148void omap3_init_irq(void); 159void omap3_init_irq(void);
149void ti816x_init_irq(void); 160void ti81xx_init_irq(void);
150extern int omap_irq_pending(void); 161extern int omap_irq_pending(void);
151void omap_intc_save_context(void); 162void omap_intc_save_context(void);
152void omap_intc_restore_context(void); 163void omap_intc_restore_context(void);
diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h
index d4ef75d5a382..0ba68d3764bc 100644
--- a/arch/arm/mach-omap2/control.h
+++ b/arch/arm/mach-omap2/control.h
@@ -52,8 +52,8 @@
52#define OMAP343X_CONTROL_PADCONFS_WKUP 0xa00 52#define OMAP343X_CONTROL_PADCONFS_WKUP 0xa00
53#define OMAP343X_CONTROL_GENERAL_WKUP 0xa60 53#define OMAP343X_CONTROL_GENERAL_WKUP 0xa60
54 54
55/* TI816X spefic control submodules */ 55/* TI81XX spefic control submodules */
56#define TI816X_CONTROL_DEVCONF 0x600 56#define TI81XX_CONTROL_DEVCONF 0x600
57 57
58/* Control register offsets - read/write with omap_ctrl_{read,write}{bwl}() */ 58/* Control register offsets - read/write with omap_ctrl_{read,write}{bwl}() */
59 59
@@ -244,8 +244,8 @@
244#define OMAP3_PADCONF_SAD2D_MSTANDBY 0x250 244#define OMAP3_PADCONF_SAD2D_MSTANDBY 0x250
245#define OMAP3_PADCONF_SAD2D_IDLEACK 0x254 245#define OMAP3_PADCONF_SAD2D_IDLEACK 0x254
246 246
247/* TI816X CONTROL_DEVCONF register offsets */ 247/* TI81XX CONTROL_DEVCONF register offsets */
248#define TI816X_CONTROL_DEVICE_ID (TI816X_CONTROL_DEVCONF + 0x000) 248#define TI81XX_CONTROL_DEVICE_ID (TI81XX_CONTROL_DEVCONF + 0x000)
249 249
250/* 250/*
251 * REVISIT: This list of registers is not comprehensive - there are more 251 * REVISIT: This list of registers is not comprehensive - there are more
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index c15cfada5f13..35d5dffab7e1 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -336,6 +336,27 @@ static void omap_init_mcpdm(void)
336static inline void omap_init_mcpdm(void) {} 336static inline void omap_init_mcpdm(void) {}
337#endif 337#endif
338 338
339#if defined(CONFIG_SND_OMAP_SOC_DMIC) || \
340 defined(CONFIG_SND_OMAP_SOC_DMIC_MODULE)
341
342static void omap_init_dmic(void)
343{
344 struct omap_hwmod *oh;
345 struct platform_device *pdev;
346
347 oh = omap_hwmod_lookup("dmic");
348 if (!oh) {
349 printk(KERN_ERR "Could not look up mcpdm hw_mod\n");
350 return;
351 }
352
353 pdev = omap_device_build("omap-dmic", -1, oh, NULL, 0, NULL, 0, 0);
354 WARN(IS_ERR(pdev), "Can't build omap_device for omap-dmic.\n");
355}
356#else
357static inline void omap_init_dmic(void) {}
358#endif
359
339#if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE) 360#if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)
340 361
341#include <plat/mcspi.h> 362#include <plat/mcspi.h>
@@ -681,6 +702,7 @@ static int __init omap2_init_devices(void)
681 */ 702 */
682 omap_init_audio(); 703 omap_init_audio();
683 omap_init_mcpdm(); 704 omap_init_mcpdm();
705 omap_init_dmic();
684 omap_init_camera(); 706 omap_init_camera();
685 omap_init_mbox(); 707 omap_init_mbox();
686 omap_init_mcspi(); 708 omap_init_mcspi();
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 27ad722df637..6c5826605eae 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -226,7 +226,7 @@ static void __init omap4_check_features(void)
226 } 226 }
227} 227}
228 228
229static void __init ti816x_check_features(void) 229static void __init ti81xx_check_features(void)
230{ 230{
231 omap_features = OMAP3_HAS_NEON; 231 omap_features = OMAP3_HAS_NEON;
232} 232}
@@ -340,6 +340,29 @@ static void __init omap3_check_revision(const char **cpu_rev)
340 break; 340 break;
341 } 341 }
342 break; 342 break;
343 case 0xb944:
344 omap_revision = AM335X_REV_ES1_0;
345 *cpu_rev = "1.0";
346 case 0xb8f2:
347 switch (rev) {
348 case 0:
349 /* FALLTHROUGH */
350 case 1:
351 omap_revision = TI8148_REV_ES1_0;
352 *cpu_rev = "1.0";
353 break;
354 case 2:
355 omap_revision = TI8148_REV_ES2_0;
356 *cpu_rev = "2.0";
357 break;
358 case 3:
359 /* FALLTHROUGH */
360 default:
361 omap_revision = TI8148_REV_ES2_1;
362 *cpu_rev = "2.1";
363 break;
364 }
365 break;
343 default: 366 default:
344 /* Unknown default to latest silicon rev as default */ 367 /* Unknown default to latest silicon rev as default */
345 omap_revision = OMAP3630_REV_ES1_2; 368 omap_revision = OMAP3630_REV_ES1_2;
@@ -367,7 +390,7 @@ static void __init omap4_check_revision(void)
367 * Few initial 4430 ES2.0 samples IDCODE is same as ES1.0 390 * Few initial 4430 ES2.0 samples IDCODE is same as ES1.0
368 * Use ARM register to detect the correct ES version 391 * Use ARM register to detect the correct ES version
369 */ 392 */
370 if (!rev && (hawkeye != 0xb94e)) { 393 if (!rev && (hawkeye != 0xb94e) && (hawkeye != 0xb975)) {
371 idcode = read_cpuid(CPUID_ID); 394 idcode = read_cpuid(CPUID_ID);
372 rev = (idcode & 0xf) - 1; 395 rev = (idcode & 0xf) - 1;
373 } 396 }
@@ -389,8 +412,11 @@ static void __init omap4_check_revision(void)
389 omap_revision = OMAP4430_REV_ES2_1; 412 omap_revision = OMAP4430_REV_ES2_1;
390 break; 413 break;
391 case 4: 414 case 4:
392 default:
393 omap_revision = OMAP4430_REV_ES2_2; 415 omap_revision = OMAP4430_REV_ES2_2;
416 break;
417 case 6:
418 default:
419 omap_revision = OMAP4430_REV_ES2_3;
394 } 420 }
395 break; 421 break;
396 case 0xb94e: 422 case 0xb94e:
@@ -401,9 +427,17 @@ static void __init omap4_check_revision(void)
401 break; 427 break;
402 } 428 }
403 break; 429 break;
430 case 0xb975:
431 switch (rev) {
432 case 0:
433 default:
434 omap_revision = OMAP4470_REV_ES1_0;
435 break;
436 }
437 break;
404 default: 438 default:
405 /* Unknown default to latest silicon rev as default */ 439 /* Unknown default to latest silicon rev as default */
406 omap_revision = OMAP4430_REV_ES2_2; 440 omap_revision = OMAP4430_REV_ES2_3;
407 } 441 }
408 442
409 pr_info("OMAP%04x ES%d.%d\n", omap_rev() >> 16, 443 pr_info("OMAP%04x ES%d.%d\n", omap_rev() >> 16,
@@ -432,6 +466,10 @@ static void __init omap3_cpuinfo(const char *cpu_rev)
432 cpu_name = (omap3_has_sgx()) ? "AM3517" : "AM3505"; 466 cpu_name = (omap3_has_sgx()) ? "AM3517" : "AM3505";
433 } else if (cpu_is_ti816x()) { 467 } else if (cpu_is_ti816x()) {
434 cpu_name = "TI816X"; 468 cpu_name = "TI816X";
469 } else if (cpu_is_am335x()) {
470 cpu_name = "AM335X";
471 } else if (cpu_is_ti814x()) {
472 cpu_name = "TI814X";
435 } else if (omap3_has_iva() && omap3_has_sgx()) { 473 } else if (omap3_has_iva() && omap3_has_sgx()) {
436 /* OMAP3430, OMAP3525, OMAP3515, OMAP3503 devices */ 474 /* OMAP3430, OMAP3525, OMAP3515, OMAP3503 devices */
437 cpu_name = "OMAP3430/3530"; 475 cpu_name = "OMAP3430/3530";
@@ -472,11 +510,11 @@ void __init omap2_check_revision(void)
472 } else if (cpu_is_omap34xx()) { 510 } else if (cpu_is_omap34xx()) {
473 omap3_check_revision(&cpu_rev); 511 omap3_check_revision(&cpu_rev);
474 512
475 /* TI816X doesn't have feature register */ 513 /* TI81XX doesn't have feature register */
476 if (!cpu_is_ti816x()) 514 if (!cpu_is_ti81xx())
477 omap3_check_features(); 515 omap3_check_features();
478 else 516 else
479 ti816x_check_features(); 517 ti81xx_check_features();
480 518
481 omap3_cpuinfo(cpu_rev); 519 omap3_cpuinfo(cpu_rev);
482 return; 520 return;
diff --git a/arch/arm/mach-omap2/include/mach/debug-macro.S b/arch/arm/mach-omap2/include/mach/debug-macro.S
index 13f98e59cfef..cdfc2a1f0e75 100644
--- a/arch/arm/mach-omap2/include/mach/debug-macro.S
+++ b/arch/arm/mach-omap2/include/mach/debug-macro.S
@@ -66,11 +66,11 @@ omap_uart_lsr: .word 0
66 beq 34f @ configure OMAP3UART4 66 beq 34f @ configure OMAP3UART4
67 cmp \rp, #OMAP4UART4 @ only on 44xx 67 cmp \rp, #OMAP4UART4 @ only on 44xx
68 beq 44f @ configure OMAP4UART4 68 beq 44f @ configure OMAP4UART4
69 cmp \rp, #TI816XUART1 @ ti816x UART offsets different 69 cmp \rp, #TI81XXUART1 @ ti81Xx UART offsets different
70 beq 81f @ configure UART1 70 beq 81f @ configure UART1
71 cmp \rp, #TI816XUART2 @ ti816x UART offsets different 71 cmp \rp, #TI81XXUART2 @ ti81Xx UART offsets different
72 beq 82f @ configure UART2 72 beq 82f @ configure UART2
73 cmp \rp, #TI816XUART3 @ ti816x UART offsets different 73 cmp \rp, #TI81XXUART3 @ ti81Xx UART offsets different
74 beq 83f @ configure UART3 74 beq 83f @ configure UART3
75 cmp \rp, #ZOOM_UART @ only on zoom2/3 75 cmp \rp, #ZOOM_UART @ only on zoom2/3
76 beq 95f @ configure ZOOM_UART 76 beq 95f @ configure ZOOM_UART
@@ -94,11 +94,11 @@ omap_uart_lsr: .word 0
94 b 98f 94 b 98f
9544: mov \rp, #UART_OFFSET(OMAP4_UART4_BASE) 9544: mov \rp, #UART_OFFSET(OMAP4_UART4_BASE)
96 b 98f 96 b 98f
9781: mov \rp, #UART_OFFSET(TI816X_UART1_BASE) 9781: mov \rp, #UART_OFFSET(TI81XX_UART1_BASE)
98 b 98f 98 b 98f
9982: mov \rp, #UART_OFFSET(TI816X_UART2_BASE) 9982: mov \rp, #UART_OFFSET(TI81XX_UART2_BASE)
100 b 98f 100 b 98f
10183: mov \rp, #UART_OFFSET(TI816X_UART3_BASE) 10183: mov \rp, #UART_OFFSET(TI81XX_UART3_BASE)
102 b 98f 102 b 98f
103 103
10495: ldr \rp, =ZOOM_UART_BASE 10495: ldr \rp, =ZOOM_UART_BASE
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 3f565dd2ea8d..73d617f0dc4a 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -176,14 +176,31 @@ static struct map_desc omap34xx_io_desc[] __initdata = {
176}; 176};
177#endif 177#endif
178 178
179#ifdef CONFIG_SOC_OMAPTI816X 179#ifdef CONFIG_SOC_OMAPTI81XX
180static struct map_desc omapti816x_io_desc[] __initdata = { 180static struct map_desc omapti81xx_io_desc[] __initdata = {
181 {
182 .virtual = L4_34XX_VIRT,
183 .pfn = __phys_to_pfn(L4_34XX_PHYS),
184 .length = L4_34XX_SIZE,
185 .type = MT_DEVICE
186 }
187};
188#endif
189
190#ifdef CONFIG_SOC_OMAPAM33XX
191static struct map_desc omapam33xx_io_desc[] __initdata = {
181 { 192 {
182 .virtual = L4_34XX_VIRT, 193 .virtual = L4_34XX_VIRT,
183 .pfn = __phys_to_pfn(L4_34XX_PHYS), 194 .pfn = __phys_to_pfn(L4_34XX_PHYS),
184 .length = L4_34XX_SIZE, 195 .length = L4_34XX_SIZE,
185 .type = MT_DEVICE 196 .type = MT_DEVICE
186 }, 197 },
198 {
199 .virtual = L4_WK_AM33XX_VIRT,
200 .pfn = __phys_to_pfn(L4_WK_AM33XX_PHYS),
201 .length = L4_WK_AM33XX_SIZE,
202 .type = MT_DEVICE
203 }
187}; 204};
188#endif 205#endif
189 206
@@ -263,10 +280,17 @@ void __init omap34xx_map_common_io(void)
263} 280}
264#endif 281#endif
265 282
266#ifdef CONFIG_SOC_OMAPTI816X 283#ifdef CONFIG_SOC_OMAPTI81XX
267void __init omapti816x_map_common_io(void) 284void __init omapti81xx_map_common_io(void)
285{
286 iotable_init(omapti81xx_io_desc, ARRAY_SIZE(omapti81xx_io_desc));
287}
288#endif
289
290#ifdef CONFIG_SOC_OMAPAM33XX
291void __init omapam33xx_map_common_io(void)
268{ 292{
269 iotable_init(omapti816x_io_desc, ARRAY_SIZE(omapti816x_io_desc)); 293 iotable_init(omapam33xx_io_desc, ARRAY_SIZE(omapam33xx_io_desc));
270} 294}
271#endif 295#endif
272 296
@@ -418,9 +442,9 @@ void __init am35xx_init_early(void)
418 omap3_init_early(); 442 omap3_init_early();
419} 443}
420 444
421void __init ti816x_init_early(void) 445void __init ti81xx_init_early(void)
422{ 446{
423 omap2_set_globals_ti816x(); 447 omap2_set_globals_ti81xx();
424 omap_common_init_early(); 448 omap_common_init_early();
425 omap3xxx_voltagedomains_init(); 449 omap3xxx_voltagedomains_init();
426 omap3xxx_powerdomains_init(); 450 omap3xxx_powerdomains_init();
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index 42b1d6591912..1fef061f7927 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -193,7 +193,7 @@ void __init omap3_init_irq(void)
193 omap_init_irq(OMAP34XX_IC_BASE, 96); 193 omap_init_irq(OMAP34XX_IC_BASE, 96);
194} 194}
195 195
196void __init ti816x_init_irq(void) 196void __init ti81xx_init_irq(void)
197{ 197{
198 omap_init_irq(OMAP34XX_IC_BASE, 128); 198 omap_init_irq(OMAP34XX_IC_BASE, 128);
199} 199}
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index 292eee3be15f..28fcb27005d2 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -145,6 +145,9 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
145 pdata->reg_size = 4; 145 pdata->reg_size = 4;
146 pdata->has_ccr = true; 146 pdata->has_ccr = true;
147 } 147 }
148 pdata->set_clk_src = omap2_mcbsp_set_clk_src;
149 if (id == 1)
150 pdata->mux_signal = omap2_mcbsp1_mux_rx_clk;
148 151
149 if (oh->class->rev == MCBSP_CONFIG_TYPE3) { 152 if (oh->class->rev == MCBSP_CONFIG_TYPE3) {
150 if (id == 2) 153 if (id == 2)
@@ -174,9 +177,6 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
174 name, oh->name); 177 name, oh->name);
175 return PTR_ERR(pdev); 178 return PTR_ERR(pdev);
176 } 179 }
177 pdata->set_clk_src = omap2_mcbsp_set_clk_src;
178 if (id == 1)
179 pdata->mux_signal = omap2_mcbsp1_mux_rx_clk;
180 omap_mcbsp_count++; 180 omap_mcbsp_count++;
181 return 0; 181 return 0;
182} 182}
diff --git a/arch/arm/mach-omap2/omap_phy_internal.c b/arch/arm/mach-omap2/omap_phy_internal.c
index 58775e3c8476..4c90477e6f82 100644
--- a/arch/arm/mach-omap2/omap_phy_internal.c
+++ b/arch/arm/mach-omap2/omap_phy_internal.c
@@ -260,3 +260,38 @@ void am35x_set_mode(u8 musb_mode)
260 260
261 omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2); 261 omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2);
262} 262}
263
264void ti81xx_musb_phy_power(u8 on)
265{
266 void __iomem *scm_base = NULL;
267 u32 usbphycfg;
268
269 scm_base = ioremap(TI81XX_SCM_BASE, SZ_2K);
270 if (!scm_base) {
271 pr_err("system control module ioremap failed\n");
272 return;
273 }
274
275 usbphycfg = __raw_readl(scm_base + USBCTRL0);
276
277 if (on) {
278 if (cpu_is_ti816x()) {
279 usbphycfg |= TI816X_USBPHY0_NORMAL_MODE;
280 usbphycfg &= ~TI816X_USBPHY_REFCLK_OSC;
281 } else if (cpu_is_ti814x()) {
282 usbphycfg &= ~(USBPHY_CM_PWRDN | USBPHY_OTG_PWRDN
283 | USBPHY_DPINPUT | USBPHY_DMINPUT);
284 usbphycfg |= (USBPHY_OTGVDET_EN | USBPHY_OTGSESSEND_EN
285 | USBPHY_DPOPBUFCTL | USBPHY_DMOPBUFCTL);
286 }
287 } else {
288 if (cpu_is_ti816x())
289 usbphycfg &= ~TI816X_USBPHY0_NORMAL_MODE;
290 else if (cpu_is_ti814x())
291 usbphycfg |= USBPHY_CM_PWRDN | USBPHY_OTG_PWRDN;
292
293 }
294 __raw_writel(usbphycfg, scm_base + USBCTRL0);
295
296 iounmap(scm_base);
297}
diff --git a/arch/arm/mach-omap2/opp2xxx.h b/arch/arm/mach-omap2/opp2xxx.h
index 8affc66a92c2..8fae534eb157 100644
--- a/arch/arm/mach-omap2/opp2xxx.h
+++ b/arch/arm/mach-omap2/opp2xxx.h
@@ -51,7 +51,7 @@ struct prcm_config {
51 unsigned long cm_clksel2_pll; /* dpllx1 or x2 out */ 51 unsigned long cm_clksel2_pll; /* dpllx1 or x2 out */
52 unsigned long cm_clksel_mdm; /* modem dividers 2430 only */ 52 unsigned long cm_clksel_mdm; /* modem dividers 2430 only */
53 unsigned long base_sdrc_rfr; /* base refresh timing for a set */ 53 unsigned long base_sdrc_rfr; /* base refresh timing for a set */
54 unsigned char flags; 54 unsigned short flags;
55}; 55};
56 56
57 57
diff --git a/arch/arm/mach-omap2/sdram-nokia.c b/arch/arm/mach-omap2/sdram-nokia.c
index ee3a8ad304cb..7479d7ea1379 100644
--- a/arch/arm/mach-omap2/sdram-nokia.c
+++ b/arch/arm/mach-omap2/sdram-nokia.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * SDRC register values for Nokia boards 2 * SDRC register values for Nokia boards
3 * 3 *
4 * Copyright (C) 2008, 2010 Nokia Corporation 4 * Copyright (C) 2008, 2010-2011 Nokia Corporation
5 * 5 *
6 * Lauri Leukkunen <lauri.leukkunen@nokia.com> 6 * Lauri Leukkunen <lauri.leukkunen@nokia.com>
7 * 7 *
@@ -107,14 +107,37 @@ static const struct sdram_timings nokia_195dot2mhz_timings[] = {
107 }, 107 },
108}; 108};
109 109
110static const struct sdram_timings nokia_200mhz_timings[] = {
111 {
112 .casl = 3,
113 .tDAL = 30000,
114 .tDPL = 15000,
115 .tRRD = 10000,
116 .tRCD = 20000,
117 .tRP = 15000,
118 .tRAS = 40000,
119 .tRC = 55000,
120 .tRFC = 140000,
121 .tXSR = 200000,
122
123 .tREF = 7800,
124
125 .tXP = 2,
126 .tCKE = 4,
127 .tWTR = 2
128 },
129};
130
110static const struct { 131static const struct {
111 long rate; 132 long rate;
112 struct sdram_timings const *data; 133 struct sdram_timings const *data;
113} nokia_timings[] = { 134} nokia_timings[] = {
114 { 83000000, nokia_166mhz_timings }, 135 { 83000000, nokia_166mhz_timings },
115 { 97600000, nokia_97dot6mhz_timings }, 136 { 97600000, nokia_97dot6mhz_timings },
137 { 100000000, nokia_200mhz_timings },
116 { 166000000, nokia_166mhz_timings }, 138 { 166000000, nokia_166mhz_timings },
117 { 195200000, nokia_195dot2mhz_timings }, 139 { 195200000, nokia_195dot2mhz_timings },
140 { 200000000, nokia_200mhz_timings },
118}; 141};
119static struct omap_sdrc_params nokia_sdrc_params[ARRAY_SIZE(nokia_timings) + 1]; 142static struct omap_sdrc_params nokia_sdrc_params[ARRAY_SIZE(nokia_timings) + 1];
120 143
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 42c326732a29..d0f009cbfb50 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -464,7 +464,7 @@ static void omap_uart_idle_init(struct omap_uart_state *uart)
464 mod_timer(&uart->timer, jiffies + uart->timeout); 464 mod_timer(&uart->timer, jiffies + uart->timeout);
465 omap_uart_smart_idle_enable(uart, 0); 465 omap_uart_smart_idle_enable(uart, 0);
466 466
467 if (cpu_is_omap34xx() && !cpu_is_ti816x()) { 467 if (cpu_is_omap34xx() && !(cpu_is_ti81xx() || cpu_is_am33xx())) {
468 u32 mod = (uart->num > 1) ? OMAP3430_PER_MOD : CORE_MOD; 468 u32 mod = (uart->num > 1) ? OMAP3430_PER_MOD : CORE_MOD;
469 u32 wk_mask = 0; 469 u32 wk_mask = 0;
470 u32 padconf = 0; 470 u32 padconf = 0;
@@ -746,7 +746,7 @@ void __init omap_serial_init_port(struct omap_board_data *bdata)
746 */ 746 */
747 uart->regshift = p->regshift; 747 uart->regshift = p->regshift;
748 uart->membase = p->membase; 748 uart->membase = p->membase;
749 if (cpu_is_omap44xx() || cpu_is_ti816x()) 749 if (cpu_is_omap44xx() || cpu_is_ti81xx())
750 uart->errata |= UART_ERRATA_FIFO_FULL_ABORT; 750 uart->errata |= UART_ERRATA_FIFO_FULL_ABORT;
751 else if ((serial_read_reg(uart, UART_OMAP_MVER) & 0xFF) 751 else if ((serial_read_reg(uart, UART_OMAP_MVER) & 0xFF)
752 >= UART_OMAP_NO_EMPTY_FIFO_READ_IP_REV) 752 >= UART_OMAP_NO_EMPTY_FIFO_READ_IP_REV)
@@ -828,7 +828,7 @@ void __init omap_serial_init_port(struct omap_board_data *bdata)
828 } 828 }
829 829
830 /* Enable the MDR1 errata for OMAP3 */ 830 /* Enable the MDR1 errata for OMAP3 */
831 if (cpu_is_omap34xx() && !cpu_is_ti816x()) 831 if (cpu_is_omap34xx() && !(cpu_is_ti81xx() || cpu_is_am33xx()))
832 uart->errata |= UART_ERRATA_i202_MDR1_ACCESS; 832 uart->errata |= UART_ERRATA_i202_MDR1_ACCESS;
833} 833}
834 834
diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c
index 267975086a7b..8d5ed775dd56 100644
--- a/arch/arm/mach-omap2/usb-musb.c
+++ b/arch/arm/mach-omap2/usb-musb.c
@@ -93,6 +93,9 @@ void __init usb_musb_init(struct omap_musb_board_data *musb_board_data)
93 if (cpu_is_omap3517() || cpu_is_omap3505()) { 93 if (cpu_is_omap3517() || cpu_is_omap3505()) {
94 oh_name = "am35x_otg_hs"; 94 oh_name = "am35x_otg_hs";
95 name = "musb-am35x"; 95 name = "musb-am35x";
96 } else if (cpu_is_ti81xx()) {
97 oh_name = "usb_otg_hs";
98 name = "musb-ti81xx";
96 } else { 99 } else {
97 oh_name = "usb_otg_hs"; 100 oh_name = "usb_otg_hs";
98 name = "musb-omap2430"; 101 name = "musb-omap2430";
diff --git a/arch/arm/mach-prima2/pm.c b/arch/arm/mach-prima2/pm.c
index cb53160f6c5d..26ebb57719df 100644
--- a/arch/arm/mach-prima2/pm.c
+++ b/arch/arm/mach-prima2/pm.c
@@ -9,6 +9,7 @@
9#include <linux/kernel.h> 9#include <linux/kernel.h>
10#include <linux/suspend.h> 10#include <linux/suspend.h>
11#include <linux/slab.h> 11#include <linux/slab.h>
12#include <linux/module.h>
12#include <linux/of.h> 13#include <linux/of.h>
13#include <linux/of_address.h> 14#include <linux/of_address.h>
14#include <linux/of_device.h> 15#include <linux/of_device.h>
diff --git a/arch/arm/mach-prima2/prima2.c b/arch/arm/mach-prima2/prima2.c
index ef555c041962..a12b689a8702 100644
--- a/arch/arm/mach-prima2/prima2.c
+++ b/arch/arm/mach-prima2/prima2.c
@@ -8,6 +8,7 @@
8 8
9#include <linux/init.h> 9#include <linux/init.h>
10#include <linux/kernel.h> 10#include <linux/kernel.h>
11#include <asm/sizes.h>
11#include <asm/mach-types.h> 12#include <asm/mach-types.h>
12#include <asm/mach/arch.h> 13#include <asm/mach/arch.h>
13#include <linux/of.h> 14#include <linux/of.h>
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c
index 4f47a760398f..f2d75217eb60 100644
--- a/arch/arm/mach-pxa/mioa701.c
+++ b/arch/arm/mach-pxa/mioa701.c
@@ -53,6 +53,7 @@
53#include <mach/pxa27x-udc.h> 53#include <mach/pxa27x-udc.h>
54#include <mach/camera.h> 54#include <mach/camera.h>
55#include <mach/audio.h> 55#include <mach/audio.h>
56#include <mach/smemc.h>
56#include <media/soc_camera.h> 57#include <media/soc_camera.h>
57 58
58#include <mach/mioa701.h> 59#include <mach/mioa701.h>
@@ -390,24 +391,19 @@ static struct pxamci_platform_data mioa701_mci_info = {
390}; 391};
391 392
392/* FlashRAM */ 393/* FlashRAM */
393static struct resource strataflash_resource = { 394static struct resource docg3_resource = {
394 .start = PXA_CS0_PHYS, 395 .start = PXA_CS0_PHYS,
395 .end = PXA_CS0_PHYS + SZ_64M - 1, 396 .end = PXA_CS0_PHYS + SZ_8K - 1,
396 .flags = IORESOURCE_MEM, 397 .flags = IORESOURCE_MEM,
397}; 398};
398 399
399static struct physmap_flash_data strataflash_data = { 400static struct platform_device docg3 = {
400 .width = 2, 401 .name = "docg3",
401 /* .set_vpp = mioa701_set_vpp, */
402};
403
404static struct platform_device strataflash = {
405 .name = "physmap-flash",
406 .id = -1, 402 .id = -1,
407 .resource = &strataflash_resource, 403 .resource = &docg3_resource,
408 .num_resources = 1, 404 .num_resources = 1,
409 .dev = { 405 .dev = {
410 .platform_data = &strataflash_data, 406 .platform_data = NULL,
411 }, 407 },
412}; 408};
413 409
@@ -685,7 +681,7 @@ static struct platform_device *devices[] __initdata = {
685 &pxa2xx_pcm, 681 &pxa2xx_pcm,
686 &mioa701_sound, 682 &mioa701_sound,
687 &power_dev, 683 &power_dev,
688 &strataflash, 684 &docg3,
689 &gpio_vbus, 685 &gpio_vbus,
690 &mioa701_camera, 686 &mioa701_camera,
691 &mioa701_board, 687 &mioa701_board,
@@ -720,6 +716,15 @@ static void __init mioa701_machine_init(void)
720 RTTR = 32768 - 1; /* Reset crazy WinCE value */ 716 RTTR = 32768 - 1; /* Reset crazy WinCE value */
721 UP2OCR = UP2OCR_HXOE; 717 UP2OCR = UP2OCR_HXOE;
722 718
719 /*
720 * Set up the flash memory : DiskOnChip G3 on first static memory bank
721 */
722 __raw_writel(0x7ff02dd8, MSC0);
723 __raw_writel(0x0001c391, MCMEM0);
724 __raw_writel(0x0001c391, MCATT0);
725 __raw_writel(0x0001c391, MCIO0);
726
727
723 pxa2xx_mfp_config(ARRAY_AND_SIZE(mioa701_pin_config)); 728 pxa2xx_mfp_config(ARRAY_AND_SIZE(mioa701_pin_config));
724 pxa_set_ffuart_info(NULL); 729 pxa_set_ffuart_info(NULL);
725 pxa_set_btuart_info(NULL); 730 pxa_set_btuart_info(NULL);
diff --git a/arch/arm/mach-s3c2440/mach-mini2440.c b/arch/arm/mach-s3c2440/mach-mini2440.c
index 91fe0b4c95f1..937eb7818c1a 100644
--- a/arch/arm/mach-s3c2440/mach-mini2440.c
+++ b/arch/arm/mach-s3c2440/mach-mini2440.c
@@ -167,6 +167,24 @@ static struct s3c2410fb_display mini2440_lcd_cfg[] __initdata = {
167 .lcdcon5 = (S3C2410_LCDCON5_FRM565 | 167 .lcdcon5 = (S3C2410_LCDCON5_FRM565 |
168 S3C2410_LCDCON5_HWSWP), 168 S3C2410_LCDCON5_HWSWP),
169 }, 169 },
170 /* mini2440 + 3.5" TFT (LCD-W35i, LQ035Q1DG06 type) + touchscreen*/
171 [3] = {
172 _LCD_DECLARE(
173 /* clock */
174 7,
175 /* xres, margin_right, margin_left, hsync */
176 320, 68, 66, 4,
177 /* yres, margin_top, margin_bottom, vsync */
178 240, 4, 4, 9,
179 /* refresh rate */
180 60),
181 .lcdcon5 = (S3C2410_LCDCON5_FRM565 |
182 S3C2410_LCDCON5_INVVDEN |
183 S3C2410_LCDCON5_INVVFRAME |
184 S3C2410_LCDCON5_INVVLINE |
185 S3C2410_LCDCON5_INVVCLK |
186 S3C2410_LCDCON5_HWSWP),
187 },
170}; 188};
171 189
172/* todo - put into gpio header */ 190/* todo - put into gpio header */
diff --git a/arch/arm/mach-s3c64xx/Kconfig b/arch/arm/mach-s3c64xx/Kconfig
index 5552e048c2be..4d8c489edc04 100644
--- a/arch/arm/mach-s3c64xx/Kconfig
+++ b/arch/arm/mach-s3c64xx/Kconfig
@@ -188,7 +188,7 @@ config SMDK6410_WM1190_EV1
188 depends on MACH_SMDK6410 188 depends on MACH_SMDK6410
189 select REGULATOR 189 select REGULATOR
190 select REGULATOR_WM8350 190 select REGULATOR_WM8350
191 select S3C24XX_GPIO_EXTRA64 191 select SAMSUNG_GPIO_EXTRA64
192 select MFD_WM8350_I2C 192 select MFD_WM8350_I2C
193 select MFD_WM8350_CONFIG_MODE_0 193 select MFD_WM8350_CONFIG_MODE_0
194 select MFD_WM8350_CONFIG_MODE_3 194 select MFD_WM8350_CONFIG_MODE_3
@@ -206,7 +206,7 @@ config SMDK6410_WM1192_EV1
206 depends on MACH_SMDK6410 206 depends on MACH_SMDK6410
207 select REGULATOR 207 select REGULATOR
208 select REGULATOR_WM831X 208 select REGULATOR_WM831X
209 select S3C24XX_GPIO_EXTRA64 209 select SAMSUNG_GPIO_EXTRA64
210 select MFD_WM831X 210 select MFD_WM831X
211 select MFD_WM831X_I2C 211 select MFD_WM831X_I2C
212 help 212 help
@@ -287,7 +287,7 @@ config MACH_WLF_CRAGG_6410
287 select S3C_DEV_WDT 287 select S3C_DEV_WDT
288 select S3C_DEV_RTC 288 select S3C_DEV_RTC
289 select S3C64XX_DEV_SPI 289 select S3C64XX_DEV_SPI
290 select S3C24XX_GPIO_EXTRA128 290 select SAMSUNG_GPIO_EXTRA128
291 select I2C 291 select I2C
292 help 292 help
293 Machine support for the Wolfson Cragganmore S3C6410 variant. 293 Machine support for the Wolfson Cragganmore S3C6410 variant.
diff --git a/arch/arm/mach-s3c64xx/dev-spi.c b/arch/arm/mach-s3c64xx/dev-spi.c
index 5e6b42089eb4..3341fd118723 100644
--- a/arch/arm/mach-s3c64xx/dev-spi.c
+++ b/arch/arm/mach-s3c64xx/dev-spi.c
@@ -10,6 +10,7 @@
10 10
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/string.h> 12#include <linux/string.h>
13#include <linux/export.h>
13#include <linux/platform_device.h> 14#include <linux/platform_device.h>
14#include <linux/dma-mapping.h> 15#include <linux/dma-mapping.h>
15#include <linux/gpio.h> 16#include <linux/gpio.h>
diff --git a/arch/arm/mach-s3c64xx/include/mach/crag6410.h b/arch/arm/mach-s3c64xx/include/mach/crag6410.h
index be9074e17dfd..5d55ab018b6b 100644
--- a/arch/arm/mach-s3c64xx/include/mach/crag6410.h
+++ b/arch/arm/mach-s3c64xx/include/mach/crag6410.h
@@ -15,9 +15,11 @@
15 15
16#define BANFF_PMIC_IRQ_BASE IRQ_BOARD_START 16#define BANFF_PMIC_IRQ_BASE IRQ_BOARD_START
17#define GLENFARCLAS_PMIC_IRQ_BASE (IRQ_BOARD_START + 64) 17#define GLENFARCLAS_PMIC_IRQ_BASE (IRQ_BOARD_START + 64)
18#define CODEC_IRQ_BASE (IRQ_BOARD_START + 128)
18 19
19#define PCA935X_GPIO_BASE GPIO_BOARD_START 20#define PCA935X_GPIO_BASE GPIO_BOARD_START
20#define CODEC_GPIO_BASE (GPIO_BOARD_START + 8) 21#define CODEC_GPIO_BASE (GPIO_BOARD_START + 8)
21#define GLENFARCLAS_PMIC_GPIO_BASE (GPIO_BOARD_START + 16) 22#define GLENFARCLAS_PMIC_GPIO_BASE (GPIO_BOARD_START + 32)
23#define BANFF_PMIC_GPIO_BASE (GPIO_BOARD_START + 64)
22 24
23#endif 25#endif
diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio.h b/arch/arm/mach-s3c64xx/include/mach/gpio.h
index 6e34c2f6e670..8b540c42d5dd 100644
--- a/arch/arm/mach-s3c64xx/include/mach/gpio.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio.h
@@ -88,6 +88,6 @@ enum s3c_gpio_number {
88/* define the number of gpios we need to the one after the GPQ() range */ 88/* define the number of gpios we need to the one after the GPQ() range */
89#define GPIO_BOARD_START (S3C64XX_GPQ(S3C64XX_GPIO_Q_NR) + 1) 89#define GPIO_BOARD_START (S3C64XX_GPQ(S3C64XX_GPIO_Q_NR) + 1)
90 90
91#define BOARD_NR_GPIOS 16 91#define BOARD_NR_GPIOS (16 + CONFIG_SAMSUNG_GPIO_EXTRA)
92 92
93#define ARCH_NR_GPIOS (GPIO_BOARD_START + BOARD_NR_GPIOS) 93#define ARCH_NR_GPIOS (GPIO_BOARD_START + BOARD_NR_GPIOS)
diff --git a/arch/arm/mach-s3c64xx/include/mach/irqs.h b/arch/arm/mach-s3c64xx/include/mach/irqs.h
index 443f85b3c203..96d60e0d9372 100644
--- a/arch/arm/mach-s3c64xx/include/mach/irqs.h
+++ b/arch/arm/mach-s3c64xx/include/mach/irqs.h
@@ -169,7 +169,7 @@
169#define IRQ_BOARD_START (IRQ_EINT_GROUP9_BASE + IRQ_EINT_GROUP9_NR + 1) 169#define IRQ_BOARD_START (IRQ_EINT_GROUP9_BASE + IRQ_EINT_GROUP9_NR + 1)
170 170
171#ifdef CONFIG_MACH_WLF_CRAGG_6410 171#ifdef CONFIG_MACH_WLF_CRAGG_6410
172#define IRQ_BOARD_NR 128 172#define IRQ_BOARD_NR 160
173#elif defined(CONFIG_SMDK6410_WM1190_EV1) 173#elif defined(CONFIG_SMDK6410_WM1190_EV1)
174#define IRQ_BOARD_NR 64 174#define IRQ_BOARD_NR 64
175#elif defined(CONFIG_SMDK6410_WM1192_EV1) 175#elif defined(CONFIG_SMDK6410_WM1192_EV1)
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410-module.c b/arch/arm/mach-s3c64xx/mach-crag6410-module.c
index f208154b1382..cd3c97e2ee75 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410-module.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410-module.c
@@ -14,13 +14,43 @@
14 14
15#include <linux/mfd/wm831x/irq.h> 15#include <linux/mfd/wm831x/irq.h>
16#include <linux/mfd/wm831x/gpio.h> 16#include <linux/mfd/wm831x/gpio.h>
17#include <linux/mfd/wm8994/pdata.h>
17 18
19#include <sound/wm5100.h>
18#include <sound/wm8996.h> 20#include <sound/wm8996.h>
19#include <sound/wm8962.h> 21#include <sound/wm8962.h>
20#include <sound/wm9081.h> 22#include <sound/wm9081.h>
21 23
22#include <mach/crag6410.h> 24#include <mach/crag6410.h>
23 25
26static struct wm5100_pdata wm5100_pdata = {
27 .ldo_ena = S3C64XX_GPN(7),
28 .irq_flags = IRQF_TRIGGER_HIGH,
29 .gpio_base = CODEC_GPIO_BASE,
30
31 .in_mode = {
32 WM5100_IN_DIFF,
33 WM5100_IN_DIFF,
34 WM5100_IN_DIFF,
35 WM5100_IN_SE,
36 },
37
38 .hp_pol = CODEC_GPIO_BASE + 3,
39 .jack_modes = {
40 { WM5100_MICDET_MICBIAS3, 0, 0 },
41 { WM5100_MICDET_MICBIAS2, 1, 1 },
42 },
43
44 .gpio_defaults = {
45 0,
46 0,
47 0,
48 0,
49 0x2, /* IRQ: CMOS output */
50 0x3, /* CLKOUT: CMOS output */
51 },
52};
53
24static struct wm8996_retune_mobile_config wm8996_retune[] = { 54static struct wm8996_retune_mobile_config wm8996_retune[] = {
25 { 55 {
26 .name = "Sub LPF", 56 .name = "Sub LPF",
@@ -72,7 +102,6 @@ static struct wm8962_pdata wm8962_pdata __initdata = {
72 0x8000 | WM8962_GPIO_FN_DMICDAT, 102 0x8000 | WM8962_GPIO_FN_DMICDAT,
73 WM8962_GPIO_FN_IRQ, /* Open drain mode */ 103 WM8962_GPIO_FN_IRQ, /* Open drain mode */
74 }, 104 },
75 .irq_active_low = true,
76}; 105};
77 106
78static struct wm9081_pdata wm9081_pdata __initdata = { 107static struct wm9081_pdata wm9081_pdata __initdata = {
@@ -91,6 +120,7 @@ static const struct i2c_board_info wm1254_devs[] = {
91 120
92static const struct i2c_board_info wm1255_devs[] = { 121static const struct i2c_board_info wm1255_devs[] = {
93 { I2C_BOARD_INFO("wm5100", 0x1a), 122 { I2C_BOARD_INFO("wm5100", 0x1a),
123 .platform_data = &wm5100_pdata,
94 .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2, 124 .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
95 }, 125 },
96 { I2C_BOARD_INFO("wm9081", 0x6c), 126 { I2C_BOARD_INFO("wm9081", 0x6c),
@@ -104,6 +134,24 @@ static const struct i2c_board_info wm1259_devs[] = {
104 }, 134 },
105}; 135};
106 136
137static struct wm8994_pdata wm8994_pdata = {
138 .gpio_base = CODEC_GPIO_BASE,
139 .gpio_defaults = {
140 0x3, /* IRQ out, active high, CMOS */
141 },
142 .irq_base = CODEC_IRQ_BASE,
143 .ldo = {
144 { .supply = "WALLVDD" },
145 { .supply = "WALLVDD" },
146 },
147};
148
149static const struct i2c_board_info wm1277_devs[] = {
150 { I2C_BOARD_INFO("wm8958", 0x1a), /* WM8958 is the superset */
151 .platform_data = &wm8994_pdata,
152 .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
153 },
154};
107 155
108static __devinitdata const struct { 156static __devinitdata const struct {
109 u8 id; 157 u8 id;
@@ -125,6 +173,8 @@ static __devinitdata const struct {
125 { .id = 0x3b, .name = "1255-EV1 Kilchoman", 173 { .id = 0x3b, .name = "1255-EV1 Kilchoman",
126 .i2c_devs = wm1255_devs, .num_i2c_devs = ARRAY_SIZE(wm1255_devs) }, 174 .i2c_devs = wm1255_devs, .num_i2c_devs = ARRAY_SIZE(wm1255_devs) },
127 { .id = 0x3c, .name = "1273-EV1 Longmorn" }, 175 { .id = 0x3c, .name = "1273-EV1 Longmorn" },
176 { .id = 0x3d, .name = "1277-EV1 Littlemill",
177 .i2c_devs = wm1277_devs, .num_i2c_devs = ARRAY_SIZE(wm1277_devs) },
128}; 178};
129 179
130static __devinit int wlf_gf_module_probe(struct i2c_client *i2c, 180static __devinit int wlf_gf_module_probe(struct i2c_client *i2c,
@@ -154,8 +204,8 @@ static __devinit int wlf_gf_module_probe(struct i2c_client *i2c,
154 "Failed to register dev: %d\n", ret); 204 "Failed to register dev: %d\n", ret);
155 } 205 }
156 } else { 206 } else {
157 dev_warn(&i2c->dev, "Unknown module ID %d revision %d\n", 207 dev_warn(&i2c->dev, "Unknown module ID 0x%x revision %d\n",
158 id, rev); 208 id, rev + 1);
159 } 209 }
160 210
161 return 0; 211 return 0;
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c b/arch/arm/mach-s3c64xx/mach-crag6410.c
index 988ac2e48f08..799558c15b4e 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410.c
@@ -37,6 +37,8 @@
37#include <linux/mfd/wm831x/irq.h> 37#include <linux/mfd/wm831x/irq.h>
38#include <linux/mfd/wm831x/gpio.h> 38#include <linux/mfd/wm831x/gpio.h>
39 39
40#include <sound/wm1250-ev1.h>
41
40#include <asm/hardware/vic.h> 42#include <asm/hardware/vic.h>
41#include <asm/mach/arch.h> 43#include <asm/mach/arch.h>
42#include <asm/mach-types.h> 44#include <asm/mach-types.h>
@@ -288,6 +290,11 @@ static struct platform_device speyside_wm8962_device = {
288 .id = -1, 290 .id = -1,
289}; 291};
290 292
293static struct platform_device littlemill_device = {
294 .name = "littlemill",
295 .id = -1,
296};
297
291static struct regulator_consumer_supply wallvdd_consumers[] = { 298static struct regulator_consumer_supply wallvdd_consumers[] = {
292 REGULATOR_SUPPLY("SPKVDD1", "1-001a"), 299 REGULATOR_SUPPLY("SPKVDD1", "1-001a"),
293 REGULATOR_SUPPLY("SPKVDD2", "1-001a"), 300 REGULATOR_SUPPLY("SPKVDD2", "1-001a"),
@@ -340,6 +347,7 @@ static struct platform_device *crag6410_devices[] __initdata = {
340 &crag6410_backlight_device, 347 &crag6410_backlight_device,
341 &speyside_device, 348 &speyside_device,
342 &speyside_wm8962_device, 349 &speyside_wm8962_device,
350 &littlemill_device,
343 &lowland_device, 351 &lowland_device,
344 &wallvdd_device, 352 &wallvdd_device,
345}; 353};
@@ -373,6 +381,10 @@ static struct regulator_init_data vddarm __initdata = {
373 .driver_data = &vddarm_pdata, 381 .driver_data = &vddarm_pdata,
374}; 382};
375 383
384static struct regulator_consumer_supply vddint_consumers[] __initdata = {
385 REGULATOR_SUPPLY("vddint", NULL),
386};
387
376static struct regulator_init_data vddint __initdata = { 388static struct regulator_init_data vddint __initdata = {
377 .constraints = { 389 .constraints = {
378 .name = "VDDINT", 390 .name = "VDDINT",
@@ -381,6 +393,9 @@ static struct regulator_init_data vddint __initdata = {
381 .always_on = 1, 393 .always_on = 1,
382 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, 394 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
383 }, 395 },
396 .num_consumer_supplies = ARRAY_SIZE(vddint_consumers),
397 .consumer_supplies = vddint_consumers,
398 .supply_regulator = "WALLVDD",
384}; 399};
385 400
386static struct regulator_init_data vddmem __initdata = { 401static struct regulator_init_data vddmem __initdata = {
@@ -501,7 +516,8 @@ static struct wm831x_touch_pdata touch_pdata __initdata = {
501static struct wm831x_pdata crag_pmic_pdata __initdata = { 516static struct wm831x_pdata crag_pmic_pdata __initdata = {
502 .wm831x_num = 1, 517 .wm831x_num = 1,
503 .irq_base = BANFF_PMIC_IRQ_BASE, 518 .irq_base = BANFF_PMIC_IRQ_BASE,
504 .gpio_base = GPIO_BOARD_START + 8, 519 .gpio_base = BANFF_PMIC_GPIO_BASE,
520 .soft_shutdown = true,
505 521
506 .backup = &banff_backup_pdata, 522 .backup = &banff_backup_pdata,
507 523
@@ -606,6 +622,7 @@ static struct wm831x_pdata glenfarclas_pmic_pdata __initdata = {
606 .wm831x_num = 2, 622 .wm831x_num = 2,
607 .irq_base = GLENFARCLAS_PMIC_IRQ_BASE, 623 .irq_base = GLENFARCLAS_PMIC_IRQ_BASE,
608 .gpio_base = GLENFARCLAS_PMIC_GPIO_BASE, 624 .gpio_base = GLENFARCLAS_PMIC_GPIO_BASE,
625 .soft_shutdown = true,
609 626
610 .gpio_defaults = { 627 .gpio_defaults = {
611 /* GPIO1-3: IRQ inputs, rising edge triggered, CMOS */ 628 /* GPIO1-3: IRQ inputs, rising edge triggered, CMOS */
@@ -623,6 +640,16 @@ static struct wm831x_pdata glenfarclas_pmic_pdata __initdata = {
623 .disable_touch = true, 640 .disable_touch = true,
624}; 641};
625 642
643static struct wm1250_ev1_pdata wm1250_ev1_pdata = {
644 .gpios = {
645 [WM1250_EV1_GPIO_CLK_ENA] = S3C64XX_GPN(12),
646 [WM1250_EV1_GPIO_CLK_SEL0] = S3C64XX_GPL(12),
647 [WM1250_EV1_GPIO_CLK_SEL1] = S3C64XX_GPL(13),
648 [WM1250_EV1_GPIO_OSR] = S3C64XX_GPL(14),
649 [WM1250_EV1_GPIO_MASTER] = S3C64XX_GPL(8),
650 },
651};
652
626static struct i2c_board_info i2c_devs1[] __initdata = { 653static struct i2c_board_info i2c_devs1[] __initdata = {
627 { I2C_BOARD_INFO("wm8311", 0x34), 654 { I2C_BOARD_INFO("wm8311", 0x34),
628 .irq = S3C_EINT(0), 655 .irq = S3C_EINT(0),
@@ -632,7 +659,13 @@ static struct i2c_board_info i2c_devs1[] __initdata = {
632 { I2C_BOARD_INFO("wlf-gf-module", 0x25) }, 659 { I2C_BOARD_INFO("wlf-gf-module", 0x25) },
633 { I2C_BOARD_INFO("wlf-gf-module", 0x26) }, 660 { I2C_BOARD_INFO("wlf-gf-module", 0x26) },
634 661
635 { I2C_BOARD_INFO("wm1250-ev1", 0x27) }, 662 { I2C_BOARD_INFO("wm1250-ev1", 0x27),
663 .platform_data = &wm1250_ev1_pdata },
664};
665
666static struct s3c2410_platform_i2c i2c1_pdata = {
667 .frequency = 400000,
668 .bus_num = 1,
636}; 669};
637 670
638static void __init crag6410_map_io(void) 671static void __init crag6410_map_io(void)
@@ -693,7 +726,7 @@ static void __init crag6410_machine_init(void)
693 s3c_sdhci2_set_platdata(&crag6410_hsmmc2_pdata); 726 s3c_sdhci2_set_platdata(&crag6410_hsmmc2_pdata);
694 727
695 s3c_i2c0_set_platdata(&i2c0_pdata); 728 s3c_i2c0_set_platdata(&i2c0_pdata);
696 s3c_i2c1_set_platdata(NULL); 729 s3c_i2c1_set_platdata(&i2c1_pdata);
697 s3c_fb_set_platdata(&crag6410_lcd_pdata); 730 s3c_fb_set_platdata(&crag6410_lcd_pdata);
698 731
699 i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0)); 732 i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
diff --git a/arch/arm/mach-s3c64xx/pm.c b/arch/arm/mach-s3c64xx/pm.c
index b375cd5c47cb..0868d1331912 100644
--- a/arch/arm/mach-s3c64xx/pm.c
+++ b/arch/arm/mach-s3c64xx/pm.c
@@ -89,6 +89,8 @@ static struct sleep_save misc_save[] = {
89 89
90 SAVE_ITEM(S3C64XX_SDMA_SEL), 90 SAVE_ITEM(S3C64XX_SDMA_SEL),
91 SAVE_ITEM(S3C64XX_MODEM_MIFPCON), 91 SAVE_ITEM(S3C64XX_MODEM_MIFPCON),
92
93 SAVE_ITEM(S3C64XX_NORMAL_CFG),
92}; 94};
93 95
94void s3c_pm_configure_extint(void) 96void s3c_pm_configure_extint(void)
@@ -181,10 +183,23 @@ static void s3c64xx_pm_prepare(void)
181 183
182static int s3c64xx_pm_init(void) 184static int s3c64xx_pm_init(void)
183{ 185{
186 u32 val;
187
184 pm_cpu_prep = s3c64xx_pm_prepare; 188 pm_cpu_prep = s3c64xx_pm_prepare;
185 pm_cpu_sleep = s3c64xx_cpu_suspend; 189 pm_cpu_sleep = s3c64xx_cpu_suspend;
186 pm_uart_udivslot = 1; 190 pm_uart_udivslot = 1;
187 191
192 /*
193 * Unconditionally disable power domains that contain only
194 * blocks which have no mainline driver support.
195 */
196 val = __raw_readl(S3C64XX_NORMAL_CFG);
197 val &= ~(S3C64XX_NORMALCFG_DOMAIN_G_ON |
198 S3C64XX_NORMALCFG_DOMAIN_V_ON |
199 S3C64XX_NORMALCFG_DOMAIN_I_ON |
200 S3C64XX_NORMALCFG_DOMAIN_P_ON);
201 __raw_writel(val, S3C64XX_NORMAL_CFG);
202
188#ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK 203#ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK
189 gpio_request(S3C64XX_GPN(12), "DEBUG_LED0"); 204 gpio_request(S3C64XX_GPN(12), "DEBUG_LED0");
190 gpio_request(S3C64XX_GPN(13), "DEBUG_LED1"); 205 gpio_request(S3C64XX_GPN(13), "DEBUG_LED1");
diff --git a/arch/arm/mach-s3c64xx/s3c6400.c b/arch/arm/mach-s3c64xx/s3c6400.c
index 7a3bc32df425..51c00f2453c6 100644
--- a/arch/arm/mach-s3c64xx/s3c6400.c
+++ b/arch/arm/mach-s3c64xx/s3c6400.c
@@ -70,7 +70,7 @@ void __init s3c6400_init_irq(void)
70 s3c64xx_init_irq(~0 & ~(0xf << 5), ~0); 70 s3c64xx_init_irq(~0 & ~(0xf << 5), ~0);
71} 71}
72 72
73struct sysdev_class s3c6400_sysclass = { 73static struct sysdev_class s3c6400_sysclass = {
74 .name = "s3c6400-core", 74 .name = "s3c6400-core",
75}; 75};
76 76
diff --git a/arch/arm/mach-s3c64xx/setup-fb-24bpp.c b/arch/arm/mach-s3c64xx/setup-fb-24bpp.c
index 83d2afb79e9f..2cf80026c58d 100644
--- a/arch/arm/mach-s3c64xx/setup-fb-24bpp.c
+++ b/arch/arm/mach-s3c64xx/setup-fb-24bpp.c
@@ -20,7 +20,7 @@
20#include <plat/fb.h> 20#include <plat/fb.h>
21#include <plat/gpio-cfg.h> 21#include <plat/gpio-cfg.h>
22 22
23extern void s3c64xx_fb_gpio_setup_24bpp(void) 23void s3c64xx_fb_gpio_setup_24bpp(void)
24{ 24{
25 s3c_gpio_cfgrange_nopull(S3C64XX_GPI(0), 16, S3C_GPIO_SFN(2)); 25 s3c_gpio_cfgrange_nopull(S3C64XX_GPI(0), 16, S3C_GPIO_SFN(2));
26 s3c_gpio_cfgrange_nopull(S3C64XX_GPJ(0), 12, S3C_GPIO_SFN(2)); 26 s3c_gpio_cfgrange_nopull(S3C64XX_GPJ(0), 12, S3C_GPIO_SFN(2));
diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c
index 4ca77c41d499..3ac9e57d9705 100644
--- a/arch/arm/mach-s5pv210/mach-smdkv210.c
+++ b/arch/arm/mach-s5pv210/mach-smdkv210.c
@@ -274,6 +274,7 @@ static struct samsung_bl_gpio_info smdkv210_bl_gpio_info = {
274 274
275static struct platform_pwm_backlight_data smdkv210_bl_data = { 275static struct platform_pwm_backlight_data smdkv210_bl_data = {
276 .pwm_id = 3, 276 .pwm_id = 3,
277 .pwm_period_ns = 1000,
277}; 278};
278 279
279static void __init smdkv210_map_io(void) 280static void __init smdkv210_map_io(void)
diff --git a/arch/arm/mach-sa1100/Makefile.boot b/arch/arm/mach-sa1100/Makefile.boot
index 5a616f6e5612..f7951aa04562 100644
--- a/arch/arm/mach-sa1100/Makefile.boot
+++ b/arch/arm/mach-sa1100/Makefile.boot
@@ -1,5 +1,5 @@
1ifeq ($(CONFIG_ARCH_SA1100),y) 1ifeq ($(CONFIG_SA1111),y)
2 zreladdr-$(CONFIG_SA1111) += 0xc0208000 2 zreladdr-y += 0xc0208000
3else 3else
4 zreladdr-y += 0xc0008000 4 zreladdr-y += 0xc0008000
5endif 5endif
diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
index d9bf7c19660e..e120ff54f663 100644
--- a/arch/arm/mach-tegra/Makefile
+++ b/arch/arm/mach-tegra/Makefile
@@ -1,3 +1,4 @@
1obj-y += board-pinmux.o
1obj-y += common.o 2obj-y += common.o
2obj-y += devices.o 3obj-y += devices.o
3obj-y += io.o 4obj-y += io.o
diff --git a/arch/arm/mach-tegra/board-dt-tegra20.c b/arch/arm/mach-tegra/board-dt-tegra20.c
index ddaa037be028..70f060251f00 100644
--- a/arch/arm/mach-tegra/board-dt-tegra20.c
+++ b/arch/arm/mach-tegra/board-dt-tegra20.c
@@ -54,6 +54,8 @@ void trimslice_pinmux_init(void);
54void ventana_pinmux_init(void); 54void ventana_pinmux_init(void);
55 55
56struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = { 56struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = {
57 OF_DEV_AUXDATA("nvidia,tegra20-pinmux", TEGRA_APB_MISC_BASE + 0x14, "tegra-pinmux", NULL),
58 OF_DEV_AUXDATA("nvidia,tegra20-gpio", TEGRA_GPIO_BASE, "tegra-gpio", NULL),
57 OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC1_BASE, "sdhci-tegra.0", NULL), 59 OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC1_BASE, "sdhci-tegra.0", NULL),
58 OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC2_BASE, "sdhci-tegra.1", NULL), 60 OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC2_BASE, "sdhci-tegra.1", NULL),
59 OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC3_BASE, "sdhci-tegra.2", NULL), 61 OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC3_BASE, "sdhci-tegra.2", NULL),
@@ -110,13 +112,6 @@ static void __init tegra_dt_init(void)
110 112
111 tegra_clk_init_from_table(tegra_dt_clk_init_table); 113 tegra_clk_init_from_table(tegra_dt_clk_init_table);
112 114
113 /*
114 * Finished with the static registrations now; fill in the missing
115 * devices
116 */
117 of_platform_populate(NULL, tegra_dt_match_table,
118 tegra20_auxdata_lookup, NULL);
119
120 for (i = 0; i < ARRAY_SIZE(pinmux_configs); i++) { 115 for (i = 0; i < ARRAY_SIZE(pinmux_configs); i++) {
121 if (of_machine_is_compatible(pinmux_configs[i].machine)) { 116 if (of_machine_is_compatible(pinmux_configs[i].machine)) {
122 pinmux_configs[i].init(); 117 pinmux_configs[i].init();
@@ -126,6 +121,13 @@ static void __init tegra_dt_init(void)
126 121
127 WARN(i == ARRAY_SIZE(pinmux_configs), 122 WARN(i == ARRAY_SIZE(pinmux_configs),
128 "Unknown platform! Pinmuxing not initialized\n"); 123 "Unknown platform! Pinmuxing not initialized\n");
124
125 /*
126 * Finished with the static registrations now; fill in the missing
127 * devices
128 */
129 of_platform_populate(NULL, tegra_dt_match_table,
130 tegra20_auxdata_lookup, NULL);
129} 131}
130 132
131static const char *tegra20_dt_board_compat[] = { 133static const char *tegra20_dt_board_compat[] = {
diff --git a/arch/arm/mach-tegra/board-harmony-pcie.c b/arch/arm/mach-tegra/board-harmony-pcie.c
index bd402d0d5d06..33c4fedab840 100644
--- a/arch/arm/mach-tegra/board-harmony-pcie.c
+++ b/arch/arm/mach-tegra/board-harmony-pcie.c
@@ -22,8 +22,6 @@
22 22
23#include <asm/mach-types.h> 23#include <asm/mach-types.h>
24 24
25#include <mach/pinmux.h>
26#include <mach/pinmux-tegra20.h>
27#include "board.h" 25#include "board.h"
28#include "board-harmony.h" 26#include "board-harmony.h"
29 27
@@ -49,10 +47,6 @@ static int __init harmony_pcie_init(void)
49 47
50 regulator_enable(regulator); 48 regulator_enable(regulator);
51 49
52 tegra_pinmux_set_tristate(TEGRA_PINGROUP_GPV, TEGRA_TRI_NORMAL);
53 tegra_pinmux_set_tristate(TEGRA_PINGROUP_SLXA, TEGRA_TRI_NORMAL);
54 tegra_pinmux_set_tristate(TEGRA_PINGROUP_SLXK, TEGRA_TRI_NORMAL);
55
56 err = tegra_pcie_init(true, true); 50 err = tegra_pcie_init(true, true);
57 if (err) 51 if (err)
58 goto err_pcie; 52 goto err_pcie;
@@ -60,10 +54,6 @@ static int __init harmony_pcie_init(void)
60 return 0; 54 return 0;
61 55
62err_pcie: 56err_pcie:
63 tegra_pinmux_set_tristate(TEGRA_PINGROUP_GPV, TEGRA_TRI_TRISTATE);
64 tegra_pinmux_set_tristate(TEGRA_PINGROUP_SLXA, TEGRA_TRI_TRISTATE);
65 tegra_pinmux_set_tristate(TEGRA_PINGROUP_SLXK, TEGRA_TRI_TRISTATE);
66
67 regulator_disable(regulator); 57 regulator_disable(regulator);
68 regulator_put(regulator); 58 regulator_put(regulator);
69err_reg: 59err_reg:
diff --git a/arch/arm/mach-tegra/board-harmony-pinmux.c b/arch/arm/mach-tegra/board-harmony-pinmux.c
index b8a2485e3cb9..465808c8ac0b 100644
--- a/arch/arm/mach-tegra/board-harmony-pinmux.c
+++ b/arch/arm/mach-tegra/board-harmony-pinmux.c
@@ -23,7 +23,7 @@
23 23
24#include "gpio-names.h" 24#include "gpio-names.h"
25#include "board-harmony.h" 25#include "board-harmony.h"
26#include "devices.h" 26#include "board-pinmux.h"
27 27
28static struct tegra_pingroup_config harmony_pinmux[] = { 28static struct tegra_pingroup_config harmony_pinmux[] = {
29 {TEGRA_PINGROUP_ATA, TEGRA_MUX_IDE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 29 {TEGRA_PINGROUP_ATA, TEGRA_MUX_IDE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
@@ -144,11 +144,6 @@ static struct tegra_pingroup_config harmony_pinmux[] = {
144 {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 144 {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
145}; 145};
146 146
147static struct platform_device *pinmux_devices[] = {
148 &tegra_gpio_device,
149 &tegra_pinmux_device,
150};
151
152static struct tegra_gpio_table gpio_table[] = { 147static struct tegra_gpio_table gpio_table[] = {
153 { .gpio = TEGRA_GPIO_SD2_CD, .enable = true }, 148 { .gpio = TEGRA_GPIO_SD2_CD, .enable = true },
154 { .gpio = TEGRA_GPIO_SD2_WP, .enable = true }, 149 { .gpio = TEGRA_GPIO_SD2_WP, .enable = true },
@@ -162,13 +157,14 @@ static struct tegra_gpio_table gpio_table[] = {
162 { .gpio = TEGRA_GPIO_EXT_MIC_EN, .enable = true }, 157 { .gpio = TEGRA_GPIO_EXT_MIC_EN, .enable = true },
163}; 158};
164 159
160static struct tegra_board_pinmux_conf conf = {
161 .pgs = harmony_pinmux,
162 .pg_count = ARRAY_SIZE(harmony_pinmux),
163 .gpios = gpio_table,
164 .gpio_count = ARRAY_SIZE(gpio_table),
165};
166
165void harmony_pinmux_init(void) 167void harmony_pinmux_init(void)
166{ 168{
167 if (!of_machine_is_compatible("nvidia,tegra20")) 169 tegra_board_pinmux_init(&conf, NULL);
168 platform_add_devices(pinmux_devices,
169 ARRAY_SIZE(pinmux_devices));
170
171 tegra_pinmux_config_table(harmony_pinmux, ARRAY_SIZE(harmony_pinmux));
172
173 tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table));
174} 170}
diff --git a/arch/arm/mach-tegra/board-paz00-pinmux.c b/arch/arm/mach-tegra/board-paz00-pinmux.c
index bc1fe58c26fb..c775572dcea4 100644
--- a/arch/arm/mach-tegra/board-paz00-pinmux.c
+++ b/arch/arm/mach-tegra/board-paz00-pinmux.c
@@ -23,7 +23,7 @@
23 23
24#include "gpio-names.h" 24#include "gpio-names.h"
25#include "board-paz00.h" 25#include "board-paz00.h"
26#include "devices.h" 26#include "board-pinmux.h"
27 27
28static struct tegra_pingroup_config paz00_pinmux[] = { 28static struct tegra_pingroup_config paz00_pinmux[] = {
29 {TEGRA_PINGROUP_ATA, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 29 {TEGRA_PINGROUP_ATA, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
@@ -31,7 +31,7 @@ static struct tegra_pingroup_config paz00_pinmux[] = {
31 {TEGRA_PINGROUP_ATC, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 31 {TEGRA_PINGROUP_ATC, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
32 {TEGRA_PINGROUP_ATD, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 32 {TEGRA_PINGROUP_ATD, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
33 {TEGRA_PINGROUP_ATE, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 33 {TEGRA_PINGROUP_ATE, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
34 {TEGRA_PINGROUP_CDEV1, TEGRA_MUX_PLLA_OUT, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE}, 34 {TEGRA_PINGROUP_CDEV1, TEGRA_MUX_PLLA_OUT, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
35 {TEGRA_PINGROUP_CDEV2, TEGRA_MUX_PLLP_OUT4, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, 35 {TEGRA_PINGROUP_CDEV2, TEGRA_MUX_PLLP_OUT4, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
36 {TEGRA_PINGROUP_CRTP, TEGRA_MUX_CRT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 36 {TEGRA_PINGROUP_CRTP, TEGRA_MUX_CRT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
37 {TEGRA_PINGROUP_CSUS, TEGRA_MUX_PLLC_OUT1, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE}, 37 {TEGRA_PINGROUP_CSUS, TEGRA_MUX_PLLC_OUT1, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
@@ -144,11 +144,6 @@ static struct tegra_pingroup_config paz00_pinmux[] = {
144 {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 144 {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
145}; 145};
146 146
147static struct platform_device *pinmux_devices[] = {
148 &tegra_gpio_device,
149 &tegra_pinmux_device,
150};
151
152static struct tegra_gpio_table gpio_table[] = { 147static struct tegra_gpio_table gpio_table[] = {
153 { .gpio = TEGRA_GPIO_SD1_CD, .enable = true }, 148 { .gpio = TEGRA_GPIO_SD1_CD, .enable = true },
154 { .gpio = TEGRA_GPIO_SD1_WP, .enable = true }, 149 { .gpio = TEGRA_GPIO_SD1_WP, .enable = true },
@@ -159,13 +154,14 @@ static struct tegra_gpio_table gpio_table[] = {
159 { .gpio = TEGRA_WIFI_LED, .enable = true }, 154 { .gpio = TEGRA_WIFI_LED, .enable = true },
160}; 155};
161 156
157static struct tegra_board_pinmux_conf conf = {
158 .pgs = paz00_pinmux,
159 .pg_count = ARRAY_SIZE(paz00_pinmux),
160 .gpios = gpio_table,
161 .gpio_count = ARRAY_SIZE(gpio_table),
162};
163
162void paz00_pinmux_init(void) 164void paz00_pinmux_init(void)
163{ 165{
164 if (!of_machine_is_compatible("nvidia,tegra20")) 166 tegra_board_pinmux_init(&conf, NULL);
165 platform_add_devices(pinmux_devices,
166 ARRAY_SIZE(pinmux_devices));
167
168 tegra_pinmux_config_table(paz00_pinmux, ARRAY_SIZE(paz00_pinmux));
169
170 tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table));
171} 167}
diff --git a/arch/arm/mach-tegra/board-paz00.c b/arch/arm/mach-tegra/board-paz00.c
index e68b40727e6d..8a5245919456 100644
--- a/arch/arm/mach-tegra/board-paz00.c
+++ b/arch/arm/mach-tegra/board-paz00.c
@@ -23,8 +23,10 @@
23#include <linux/serial_8250.h> 23#include <linux/serial_8250.h>
24#include <linux/clk.h> 24#include <linux/clk.h>
25#include <linux/dma-mapping.h> 25#include <linux/dma-mapping.h>
26#include <linux/gpio_keys.h>
26#include <linux/pda_power.h> 27#include <linux/pda_power.h>
27#include <linux/io.h> 28#include <linux/io.h>
29#include <linux/input.h>
28#include <linux/i2c.h> 30#include <linux/i2c.h>
29#include <linux/gpio.h> 31#include <linux/gpio.h>
30#include <linux/rfkill-gpio.h> 32#include <linux/rfkill-gpio.h>
@@ -115,12 +117,37 @@ static struct platform_device leds_gpio = {
115 }, 117 },
116}; 118};
117 119
120static struct gpio_keys_button paz00_gpio_keys_buttons[] = {
121 {
122 .code = KEY_POWER,
123 .gpio = TEGRA_GPIO_POWERKEY,
124 .active_low = 1,
125 .desc = "Power",
126 .type = EV_KEY,
127 .wakeup = 1,
128 },
129};
130
131static struct gpio_keys_platform_data paz00_gpio_keys = {
132 .buttons = paz00_gpio_keys_buttons,
133 .nbuttons = ARRAY_SIZE(paz00_gpio_keys_buttons),
134};
135
136static struct platform_device gpio_keys_device = {
137 .name = "gpio-keys",
138 .id = -1,
139 .dev = {
140 .platform_data = &paz00_gpio_keys,
141 },
142};
143
118static struct platform_device *paz00_devices[] __initdata = { 144static struct platform_device *paz00_devices[] __initdata = {
119 &debug_uart, 145 &debug_uart,
120 &tegra_sdhci_device4, 146 &tegra_sdhci_device4,
121 &tegra_sdhci_device1, 147 &tegra_sdhci_device1,
122 &wifi_rfkill_device, 148 &wifi_rfkill_device,
123 &leds_gpio, 149 &leds_gpio,
150 &gpio_keys_device,
124}; 151};
125 152
126static void paz00_i2c_init(void) 153static void paz00_i2c_init(void)
diff --git a/arch/arm/mach-tegra/board-paz00.h b/arch/arm/mach-tegra/board-paz00.h
index 8aff06eb58c3..ffa83f580db6 100644
--- a/arch/arm/mach-tegra/board-paz00.h
+++ b/arch/arm/mach-tegra/board-paz00.h
@@ -32,6 +32,9 @@
32#define TEGRA_WIFI_RST TEGRA_GPIO_PD1 32#define TEGRA_WIFI_RST TEGRA_GPIO_PD1
33#define TEGRA_WIFI_LED TEGRA_GPIO_PD0 33#define TEGRA_WIFI_LED TEGRA_GPIO_PD0
34 34
35/* WakeUp */
36#define TEGRA_GPIO_POWERKEY TEGRA_GPIO_PJ7
37
35void paz00_pinmux_init(void); 38void paz00_pinmux_init(void);
36 39
37#endif 40#endif
diff --git a/arch/arm/mach-tegra/board-pinmux.c b/arch/arm/mach-tegra/board-pinmux.c
new file mode 100644
index 000000000000..adc3efe979b3
--- /dev/null
+++ b/arch/arm/mach-tegra/board-pinmux.c
@@ -0,0 +1,104 @@
1/*
2 * Copyright (c) 2011, NVIDIA CORPORATION. All rights reserved.
3 *
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 */
14
15#include <linux/device.h>
16#include <linux/kernel.h>
17#include <linux/notifier.h>
18#include <linux/of.h>
19#include <linux/string.h>
20
21#include <mach/gpio-tegra.h>
22#include <mach/pinmux.h>
23
24#include "board-pinmux.h"
25#include "devices.h"
26
27struct tegra_board_pinmux_conf *confs[2];
28
29static void tegra_board_pinmux_setup_gpios(void)
30{
31 int i;
32
33 for (i = 0; i < ARRAY_SIZE(confs); i++) {
34 if (!confs[i])
35 continue;
36
37 tegra_gpio_config(confs[i]->gpios, confs[i]->gpio_count);
38 }
39}
40
41static void tegra_board_pinmux_setup_pinmux(void)
42{
43 int i;
44
45 for (i = 0; i < ARRAY_SIZE(confs); i++) {
46 if (!confs[i])
47 continue;
48
49 tegra_pinmux_config_table(confs[i]->pgs, confs[i]->pg_count);
50
51 if (confs[i]->drives)
52 tegra_drive_pinmux_config_table(confs[i]->drives,
53 confs[i]->drive_count);
54 }
55}
56
57static int tegra_board_pinmux_bus_notify(struct notifier_block *nb,
58 unsigned long event, void *vdev)
59{
60 static bool had_gpio;
61 static bool had_pinmux;
62
63 struct device *dev = vdev;
64 const char *devname;
65
66 if (event != BUS_NOTIFY_BOUND_DRIVER)
67 return NOTIFY_DONE;
68
69 devname = dev_name(dev);
70
71 if (!had_gpio && !strcmp(devname, GPIO_DEV)) {
72 tegra_board_pinmux_setup_gpios();
73 had_gpio = true;
74 } else if (!had_pinmux && !strcmp(devname, PINMUX_DEV)) {
75 tegra_board_pinmux_setup_pinmux();
76 had_pinmux = true;
77 }
78
79 if (had_gpio && had_pinmux)
80 return NOTIFY_STOP_MASK;
81 else
82 return NOTIFY_DONE;
83}
84
85static struct notifier_block nb = {
86 .notifier_call = tegra_board_pinmux_bus_notify,
87};
88
89static struct platform_device *devices[] = {
90 &tegra_gpio_device,
91 &tegra_pinmux_device,
92};
93
94void tegra_board_pinmux_init(struct tegra_board_pinmux_conf *conf_a,
95 struct tegra_board_pinmux_conf *conf_b)
96{
97 confs[0] = conf_a;
98 confs[1] = conf_b;
99
100 bus_register_notifier(&platform_bus_type, &nb);
101
102 if (!of_machine_is_compatible("nvidia,tegra20"))
103 platform_add_devices(devices, ARRAY_SIZE(devices));
104}
diff --git a/arch/arm/mach-tegra/board-pinmux.h b/arch/arm/mach-tegra/board-pinmux.h
new file mode 100644
index 000000000000..4aac73546f54
--- /dev/null
+++ b/arch/arm/mach-tegra/board-pinmux.h
@@ -0,0 +1,38 @@
1/*
2 * Copyright (c) 2011, NVIDIA CORPORATION. All rights reserved.
3 *
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 */
14
15#ifndef __MACH_TEGRA_BOARD_PINMUX_H
16#define __MACH_TEGRA_BOARD_PINMUX_H
17
18#define GPIO_DEV "tegra-gpio"
19#define PINMUX_DEV "tegra-pinmux"
20
21struct tegra_pingroup_config;
22struct tegra_gpio_table;
23
24struct tegra_board_pinmux_conf {
25 struct tegra_pingroup_config *pgs;
26 int pg_count;
27
28 struct tegra_drive_pingroup_config *drives;
29 int drive_count;
30
31 struct tegra_gpio_table *gpios;
32 int gpio_count;
33};
34
35void tegra_board_pinmux_init(struct tegra_board_pinmux_conf *conf_a,
36 struct tegra_board_pinmux_conf *conf_b);
37
38#endif
diff --git a/arch/arm/mach-tegra/board-seaboard-pinmux.c b/arch/arm/mach-tegra/board-seaboard-pinmux.c
index f6b9c01ef0db..55e7e43a14ad 100644
--- a/arch/arm/mach-tegra/board-seaboard-pinmux.c
+++ b/arch/arm/mach-tegra/board-seaboard-pinmux.c
@@ -22,8 +22,8 @@
22#include <mach/pinmux-tegra20.h> 22#include <mach/pinmux-tegra20.h>
23 23
24#include "gpio-names.h" 24#include "gpio-names.h"
25#include "board-pinmux.h"
25#include "board-seaboard.h" 26#include "board-seaboard.h"
26#include "devices.h"
27 27
28#define DEFAULT_DRIVE(_name) \ 28#define DEFAULT_DRIVE(_name) \
29 { \ 29 { \
@@ -37,11 +37,11 @@
37 .slew_falling = TEGRA_SLEW_SLOWEST, \ 37 .slew_falling = TEGRA_SLEW_SLOWEST, \
38 } 38 }
39 39
40static __initdata struct tegra_drive_pingroup_config seaboard_drive_pinmux[] = { 40static struct tegra_drive_pingroup_config seaboard_drive_pinmux[] = {
41 DEFAULT_DRIVE(SDIO1), 41 DEFAULT_DRIVE(SDIO1),
42}; 42};
43 43
44static __initdata struct tegra_pingroup_config seaboard_pinmux[] = { 44static struct tegra_pingroup_config common_pinmux[] = {
45 {TEGRA_PINGROUP_ATA, TEGRA_MUX_IDE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 45 {TEGRA_PINGROUP_ATA, TEGRA_MUX_IDE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
46 {TEGRA_PINGROUP_ATB, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 46 {TEGRA_PINGROUP_ATB, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
47 {TEGRA_PINGROUP_ATC, TEGRA_MUX_NAND, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 47 {TEGRA_PINGROUP_ATC, TEGRA_MUX_NAND, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
@@ -55,7 +55,6 @@ static __initdata struct tegra_pingroup_config seaboard_pinmux[] = {
55 {TEGRA_PINGROUP_DAP2, TEGRA_MUX_DAP2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 55 {TEGRA_PINGROUP_DAP2, TEGRA_MUX_DAP2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
56 {TEGRA_PINGROUP_DAP3, TEGRA_MUX_DAP3, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 56 {TEGRA_PINGROUP_DAP3, TEGRA_MUX_DAP3, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
57 {TEGRA_PINGROUP_DAP4, TEGRA_MUX_DAP4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 57 {TEGRA_PINGROUP_DAP4, TEGRA_MUX_DAP4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
58 {TEGRA_PINGROUP_DDC, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
59 {TEGRA_PINGROUP_DTA, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, 58 {TEGRA_PINGROUP_DTA, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
60 {TEGRA_PINGROUP_DTB, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, 59 {TEGRA_PINGROUP_DTB, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
61 {TEGRA_PINGROUP_DTC, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, 60 {TEGRA_PINGROUP_DTC, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
@@ -65,7 +64,6 @@ static __initdata struct tegra_pingroup_config seaboard_pinmux[] = {
65 {TEGRA_PINGROUP_GMA, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 64 {TEGRA_PINGROUP_GMA, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
66 {TEGRA_PINGROUP_GMB, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, 65 {TEGRA_PINGROUP_GMB, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
67 {TEGRA_PINGROUP_GMC, TEGRA_MUX_UARTD, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 66 {TEGRA_PINGROUP_GMC, TEGRA_MUX_UARTD, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
68 {TEGRA_PINGROUP_GMD, TEGRA_MUX_SFLASH, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
69 {TEGRA_PINGROUP_GME, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 67 {TEGRA_PINGROUP_GME, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
70 {TEGRA_PINGROUP_GPU, TEGRA_MUX_PWM, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 68 {TEGRA_PINGROUP_GPU, TEGRA_MUX_PWM, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
71 {TEGRA_PINGROUP_GPU7, TEGRA_MUX_RTCK, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 69 {TEGRA_PINGROUP_GPU7, TEGRA_MUX_RTCK, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
@@ -108,13 +106,8 @@ static __initdata struct tegra_pingroup_config seaboard_pinmux[] = {
108 {TEGRA_PINGROUP_LM0, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 106 {TEGRA_PINGROUP_LM0, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
109 {TEGRA_PINGROUP_LM1, TEGRA_MUX_CRT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 107 {TEGRA_PINGROUP_LM1, TEGRA_MUX_CRT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
110 {TEGRA_PINGROUP_LPP, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 108 {TEGRA_PINGROUP_LPP, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
111 {TEGRA_PINGROUP_LPW0, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
112 {TEGRA_PINGROUP_LPW1, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 109 {TEGRA_PINGROUP_LPW1, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
113 {TEGRA_PINGROUP_LPW2, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
114 {TEGRA_PINGROUP_LSC0, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 110 {TEGRA_PINGROUP_LSC0, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
115 {TEGRA_PINGROUP_LSC1, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
116 {TEGRA_PINGROUP_LSCK, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
117 {TEGRA_PINGROUP_LSDA, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
118 {TEGRA_PINGROUP_LSDI, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 111 {TEGRA_PINGROUP_LSDI, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
119 {TEGRA_PINGROUP_LSPI, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 112 {TEGRA_PINGROUP_LSPI, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
120 {TEGRA_PINGROUP_LVP0, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 113 {TEGRA_PINGROUP_LVP0, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
@@ -122,25 +115,19 @@ static __initdata struct tegra_pingroup_config seaboard_pinmux[] = {
122 {TEGRA_PINGROUP_LVS, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 115 {TEGRA_PINGROUP_LVS, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
123 {TEGRA_PINGROUP_OWC, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 116 {TEGRA_PINGROUP_OWC, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
124 {TEGRA_PINGROUP_PMC, TEGRA_MUX_PWR_ON, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 117 {TEGRA_PINGROUP_PMC, TEGRA_MUX_PWR_ON, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
125 {TEGRA_PINGROUP_PTA, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
126 {TEGRA_PINGROUP_RM, TEGRA_MUX_I2C, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 118 {TEGRA_PINGROUP_RM, TEGRA_MUX_I2C, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
127 {TEGRA_PINGROUP_SDB, TEGRA_MUX_SDIO3, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 119 {TEGRA_PINGROUP_SDB, TEGRA_MUX_SDIO3, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
128 {TEGRA_PINGROUP_SDC, TEGRA_MUX_SDIO3, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 120 {TEGRA_PINGROUP_SDC, TEGRA_MUX_SDIO3, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
129 {TEGRA_PINGROUP_SDD, TEGRA_MUX_SDIO3, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 121 {TEGRA_PINGROUP_SDD, TEGRA_MUX_SDIO3, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
130 {TEGRA_PINGROUP_SDIO1, TEGRA_MUX_SDIO1, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, 122 {TEGRA_PINGROUP_SDIO1, TEGRA_MUX_SDIO1, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
131 {TEGRA_PINGROUP_SLXA, TEGRA_MUX_PCIE, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, 123 {TEGRA_PINGROUP_SLXA, TEGRA_MUX_PCIE, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
132 {TEGRA_PINGROUP_SLXC, TEGRA_MUX_SPDIF, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
133 {TEGRA_PINGROUP_SLXD, TEGRA_MUX_SPDIF, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 124 {TEGRA_PINGROUP_SLXD, TEGRA_MUX_SPDIF, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
134 {TEGRA_PINGROUP_SLXK, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
135 {TEGRA_PINGROUP_SPDI, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 125 {TEGRA_PINGROUP_SPDI, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
136 {TEGRA_PINGROUP_SPDO, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 126 {TEGRA_PINGROUP_SPDO, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
137 {TEGRA_PINGROUP_SPIA, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
138 {TEGRA_PINGROUP_SPIB, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 127 {TEGRA_PINGROUP_SPIB, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
139 {TEGRA_PINGROUP_SPIC, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
140 {TEGRA_PINGROUP_SPID, TEGRA_MUX_SPI1, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 128 {TEGRA_PINGROUP_SPID, TEGRA_MUX_SPI1, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
141 {TEGRA_PINGROUP_SPIE, TEGRA_MUX_SPI1, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 129 {TEGRA_PINGROUP_SPIE, TEGRA_MUX_SPI1, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
142 {TEGRA_PINGROUP_SPIF, TEGRA_MUX_SPI1, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE}, 130 {TEGRA_PINGROUP_SPIF, TEGRA_MUX_SPI1, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
143 {TEGRA_PINGROUP_SPIG, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
144 {TEGRA_PINGROUP_SPIH, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, 131 {TEGRA_PINGROUP_SPIH, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
145 {TEGRA_PINGROUP_UAA, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, 132 {TEGRA_PINGROUP_UAA, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
146 {TEGRA_PINGROUP_UAB, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, 133 {TEGRA_PINGROUP_UAB, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
@@ -160,13 +147,24 @@ static __initdata struct tegra_pingroup_config seaboard_pinmux[] = {
160 {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 147 {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
161}; 148};
162 149
163static __initdata struct tegra_pingroup_config ventana_pinmux[] = { 150static struct tegra_pingroup_config seaboard_pinmux[] = {
164 {TEGRA_PINGROUP_DAP3, TEGRA_MUX_DAP3, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 151 {TEGRA_PINGROUP_DDC, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
152 {TEGRA_PINGROUP_GMD, TEGRA_MUX_SFLASH, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
153 {TEGRA_PINGROUP_LPW0, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
154 {TEGRA_PINGROUP_LPW2, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
155 {TEGRA_PINGROUP_LSC1, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
156 {TEGRA_PINGROUP_LSCK, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
157 {TEGRA_PINGROUP_LSDA, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
158 {TEGRA_PINGROUP_PTA, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
159 {TEGRA_PINGROUP_SLXC, TEGRA_MUX_SPDIF, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
160 {TEGRA_PINGROUP_SLXK, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
161 {TEGRA_PINGROUP_SPIA, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
162 {TEGRA_PINGROUP_SPIC, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
163 {TEGRA_PINGROUP_SPIG, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
164};
165
166static struct tegra_pingroup_config ventana_pinmux[] = {
165 {TEGRA_PINGROUP_DDC, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 167 {TEGRA_PINGROUP_DDC, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
166 {TEGRA_PINGROUP_DTA, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
167 {TEGRA_PINGROUP_DTB, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
168 {TEGRA_PINGROUP_DTC, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
169 {TEGRA_PINGROUP_DTD, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
170 {TEGRA_PINGROUP_GMD, TEGRA_MUX_SFLASH, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 168 {TEGRA_PINGROUP_GMD, TEGRA_MUX_SFLASH, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
171 {TEGRA_PINGROUP_LPW0, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 169 {TEGRA_PINGROUP_LPW0, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
172 {TEGRA_PINGROUP_LPW2, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 170 {TEGRA_PINGROUP_LPW2, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
@@ -181,65 +179,59 @@ static __initdata struct tegra_pingroup_config ventana_pinmux[] = {
181 {TEGRA_PINGROUP_SPIG, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 179 {TEGRA_PINGROUP_SPIG, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
182}; 180};
183 181
184static struct platform_device *pinmux_devices[] = {
185 &tegra_gpio_device,
186 &tegra_pinmux_device,
187};
188
189static struct tegra_gpio_table common_gpio_table[] = { 182static struct tegra_gpio_table common_gpio_table[] = {
190 { .gpio = TEGRA_GPIO_SD2_CD, .enable = true }, 183 { .gpio = TEGRA_GPIO_SD2_CD, .enable = true },
191 { .gpio = TEGRA_GPIO_SD2_WP, .enable = true }, 184 { .gpio = TEGRA_GPIO_SD2_WP, .enable = true },
192 { .gpio = TEGRA_GPIO_SD2_POWER, .enable = true }, 185 { .gpio = TEGRA_GPIO_SD2_POWER, .enable = true },
186 { .gpio = TEGRA_GPIO_CDC_IRQ, .enable = true },
187};
188
189static struct tegra_gpio_table seaboard_gpio_table[] = {
193 { .gpio = TEGRA_GPIO_LIDSWITCH, .enable = true }, 190 { .gpio = TEGRA_GPIO_LIDSWITCH, .enable = true },
194 { .gpio = TEGRA_GPIO_POWERKEY, .enable = true }, 191 { .gpio = TEGRA_GPIO_POWERKEY, .enable = true },
195 { .gpio = TEGRA_GPIO_HP_DET, .enable = true }, 192 { .gpio = TEGRA_GPIO_HP_DET, .enable = true },
196 { .gpio = TEGRA_GPIO_ISL29018_IRQ, .enable = true }, 193 { .gpio = TEGRA_GPIO_ISL29018_IRQ, .enable = true },
197 { .gpio = TEGRA_GPIO_CDC_IRQ, .enable = true },
198 { .gpio = TEGRA_GPIO_USB1, .enable = true }, 194 { .gpio = TEGRA_GPIO_USB1, .enable = true },
199}; 195};
200 196
201static void __init update_pinmux(struct tegra_pingroup_config *newtbl, int size) 197static struct tegra_gpio_table ventana_gpio_table[] = {
202{ 198 /* hp_det */
203 int i, j; 199 { .gpio = TEGRA_GPIO_PW2, .enable = true },
204 struct tegra_pingroup_config *new_pingroup, *base_pingroup; 200 /* int_mic_en */
205 201 { .gpio = TEGRA_GPIO_PX0, .enable = true },
206 /* Update base seaboard pinmux table with secondary board 202 /* ext_mic_en */
207 * specific pinmux table table. 203 { .gpio = TEGRA_GPIO_PX1, .enable = true },
208 */ 204};
209 for (i = 0; i < size; i++) {
210 new_pingroup = &newtbl[i];
211 for (j = 0; j < ARRAY_SIZE(seaboard_pinmux); j++) {
212 base_pingroup = &seaboard_pinmux[j];
213 if (new_pingroup->pingroup == base_pingroup->pingroup) {
214 *base_pingroup = *new_pingroup;
215 break;
216 }
217 }
218 }
219}
220
221void __init seaboard_common_pinmux_init(void)
222{
223 if (!of_machine_is_compatible("nvidia,tegra20"))
224 platform_add_devices(pinmux_devices,
225 ARRAY_SIZE(pinmux_devices));
226 205
227 tegra_pinmux_config_table(seaboard_pinmux, ARRAY_SIZE(seaboard_pinmux)); 206static struct tegra_board_pinmux_conf common_conf = {
207 .pgs = common_pinmux,
208 .pg_count = ARRAY_SIZE(common_pinmux),
209 .gpios = common_gpio_table,
210 .gpio_count = ARRAY_SIZE(common_gpio_table),
211};
228 212
229 tegra_drive_pinmux_config_table(seaboard_drive_pinmux, 213static struct tegra_board_pinmux_conf seaboard_conf = {
230 ARRAY_SIZE(seaboard_drive_pinmux)); 214 .pgs = seaboard_pinmux,
215 .pg_count = ARRAY_SIZE(seaboard_pinmux),
216 .drives = seaboard_drive_pinmux,
217 .drive_count = ARRAY_SIZE(seaboard_drive_pinmux),
218 .gpios = seaboard_gpio_table,
219 .gpio_count = ARRAY_SIZE(seaboard_gpio_table),
220};
231 221
232 tegra_gpio_config(common_gpio_table, ARRAY_SIZE(common_gpio_table)); 222static struct tegra_board_pinmux_conf ventana_conf = {
233} 223 .pgs = ventana_pinmux,
224 .pg_count = ARRAY_SIZE(ventana_pinmux),
225 .gpios = ventana_gpio_table,
226 .gpio_count = ARRAY_SIZE(ventana_gpio_table),
227};
234 228
235void __init seaboard_pinmux_init(void) 229void seaboard_pinmux_init(void)
236{ 230{
237 seaboard_common_pinmux_init(); 231 tegra_board_pinmux_init(&common_conf, &seaboard_conf);
238} 232}
239 233
240void __init ventana_pinmux_init(void) 234void ventana_pinmux_init(void)
241{ 235{
242 update_pinmux(ventana_pinmux, ARRAY_SIZE(ventana_pinmux)); 236 tegra_board_pinmux_init(&common_conf, &ventana_conf);
243 seaboard_common_pinmux_init();
244} 237}
245
diff --git a/arch/arm/mach-tegra/board-trimslice-pinmux.c b/arch/arm/mach-tegra/board-trimslice-pinmux.c
index 7331e15b73cc..a21a2be57cb6 100644
--- a/arch/arm/mach-tegra/board-trimslice-pinmux.c
+++ b/arch/arm/mach-tegra/board-trimslice-pinmux.c
@@ -22,10 +22,10 @@
22#include <mach/pinmux-tegra20.h> 22#include <mach/pinmux-tegra20.h>
23 23
24#include "gpio-names.h" 24#include "gpio-names.h"
25#include "board-pinmux.h"
25#include "board-trimslice.h" 26#include "board-trimslice.h"
26#include "devices.h"
27 27
28static __initdata struct tegra_pingroup_config trimslice_pinmux[] = { 28static struct tegra_pingroup_config trimslice_pinmux[] = {
29 {TEGRA_PINGROUP_ATA, TEGRA_MUX_IDE, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 29 {TEGRA_PINGROUP_ATA, TEGRA_MUX_IDE, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
30 {TEGRA_PINGROUP_ATB, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 30 {TEGRA_PINGROUP_ATB, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
31 {TEGRA_PINGROUP_ATC, TEGRA_MUX_NAND, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 31 {TEGRA_PINGROUP_ATC, TEGRA_MUX_NAND, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
@@ -106,7 +106,7 @@ static __initdata struct tegra_pingroup_config trimslice_pinmux[] = {
106 {TEGRA_PINGROUP_LVS, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, 106 {TEGRA_PINGROUP_LVS, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
107 {TEGRA_PINGROUP_OWC, TEGRA_MUX_RSVD2, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, 107 {TEGRA_PINGROUP_OWC, TEGRA_MUX_RSVD2, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
108 {TEGRA_PINGROUP_PMC, TEGRA_MUX_PWR_ON, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 108 {TEGRA_PINGROUP_PMC, TEGRA_MUX_PWR_ON, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
109 {TEGRA_PINGROUP_PTA, TEGRA_MUX_RSVD3, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 109 {TEGRA_PINGROUP_PTA, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
110 {TEGRA_PINGROUP_RM, TEGRA_MUX_I2C, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, 110 {TEGRA_PINGROUP_RM, TEGRA_MUX_I2C, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
111 {TEGRA_PINGROUP_SDB, TEGRA_MUX_PWM, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 111 {TEGRA_PINGROUP_SDB, TEGRA_MUX_PWM, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
112 {TEGRA_PINGROUP_SDC, TEGRA_MUX_PWM, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, 112 {TEGRA_PINGROUP_SDC, TEGRA_MUX_PWM, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
@@ -144,11 +144,6 @@ static __initdata struct tegra_pingroup_config trimslice_pinmux[] = {
144 {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 144 {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
145}; 145};
146 146
147static struct platform_device *pinmux_devices[] = {
148 &tegra_gpio_device,
149 &tegra_pinmux_device,
150};
151
152static struct tegra_gpio_table gpio_table[] = { 147static struct tegra_gpio_table gpio_table[] = {
153 { .gpio = TRIMSLICE_GPIO_SD4_CD, .enable = true }, /* mmc4 cd */ 148 { .gpio = TRIMSLICE_GPIO_SD4_CD, .enable = true }, /* mmc4 cd */
154 { .gpio = TRIMSLICE_GPIO_SD4_WP, .enable = true }, /* mmc4 wp */ 149 { .gpio = TRIMSLICE_GPIO_SD4_WP, .enable = true }, /* mmc4 wp */
@@ -157,11 +152,14 @@ static struct tegra_gpio_table gpio_table[] = {
157 { .gpio = TRIMSLICE_GPIO_USB2_RST, .enable = true }, /* USB2 PHY rst */ 152 { .gpio = TRIMSLICE_GPIO_USB2_RST, .enable = true }, /* USB2 PHY rst */
158}; 153};
159 154
160void __init trimslice_pinmux_init(void) 155static struct tegra_board_pinmux_conf conf = {
156 .pgs = trimslice_pinmux,
157 .pg_count = ARRAY_SIZE(trimslice_pinmux),
158 .gpios = gpio_table,
159 .gpio_count = ARRAY_SIZE(gpio_table),
160};
161
162void trimslice_pinmux_init(void)
161{ 163{
162 if (!of_machine_is_compatible("nvidia,tegra20")) 164 tegra_board_pinmux_init(&conf, NULL);
163 platform_add_devices(pinmux_devices,
164 ARRAY_SIZE(pinmux_devices));
165 tegra_pinmux_config_table(trimslice_pinmux, ARRAY_SIZE(trimslice_pinmux));
166 tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table));
167} 165}
diff --git a/arch/arm/mach-tegra/pcie.c b/arch/arm/mach-tegra/pcie.c
index 97ef3e55dfdf..ec63c6b2b6b5 100644
--- a/arch/arm/mach-tegra/pcie.c
+++ b/arch/arm/mach-tegra/pcie.c
@@ -37,7 +37,6 @@
37#include <asm/sizes.h> 37#include <asm/sizes.h>
38#include <asm/mach/pci.h> 38#include <asm/mach/pci.h>
39 39
40#include <mach/pinmux.h>
41#include <mach/iomap.h> 40#include <mach/iomap.h>
42#include <mach/clk.h> 41#include <mach/clk.h>
43#include <mach/powergate.h> 42#include <mach/powergate.h>
diff --git a/arch/arm/plat-mxc/cpufreq.c b/arch/arm/plat-mxc/cpufreq.c
index 74aac96cda20..adbff706ef6f 100644
--- a/arch/arm/plat-mxc/cpufreq.c
+++ b/arch/arm/plat-mxc/cpufreq.c
@@ -17,6 +17,7 @@
17 * the CPU clock speed on the fly. 17 * the CPU clock speed on the fly.
18 */ 18 */
19 19
20#include <linux/module.h>
20#include <linux/cpufreq.h> 21#include <linux/cpufreq.h>
21#include <linux/clk.h> 22#include <linux/clk.h>
22#include <linux/err.h> 23#include <linux/err.h>
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx25.h b/arch/arm/plat-mxc/include/mach/iomux-mx25.h
index bf64e1e594ed..f0726d48df22 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx25.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx25.h
@@ -265,16 +265,20 @@
265#define MX25_PAD_CSI_D2__CSI_D2 IOMUX_PAD(0x318, 0x120, 0x10, 0, 0, NO_PAD_CTRL) 265#define MX25_PAD_CSI_D2__CSI_D2 IOMUX_PAD(0x318, 0x120, 0x10, 0, 0, NO_PAD_CTRL)
266#define MX25_PAD_CSI_D2__UART5_RXD_MUX IOMUX_PAD(0x318, 0x120, 0x11, 0x578, 1, NO_PAD_CTRL) 266#define MX25_PAD_CSI_D2__UART5_RXD_MUX IOMUX_PAD(0x318, 0x120, 0x11, 0x578, 1, NO_PAD_CTRL)
267#define MX25_PAD_CSI_D2__GPIO_1_27 IOMUX_PAD(0x318, 0x120, 0x15, 0, 0, NO_PAD_CTRL) 267#define MX25_PAD_CSI_D2__GPIO_1_27 IOMUX_PAD(0x318, 0x120, 0x15, 0, 0, NO_PAD_CTRL)
268#define MX25_PAD_CSI_D2__CSPI3_MOSI IOMUX_PAD(0x318, 0x120, 0x17, 0, 0, NO_PAD_CTRL)
268 269
269#define MX25_PAD_CSI_D3__CSI_D3 IOMUX_PAD(0x31c, 0x124, 0x10, 0, 0, NO_PAD_CTRL) 270#define MX25_PAD_CSI_D3__CSI_D3 IOMUX_PAD(0x31c, 0x124, 0x10, 0, 0, NO_PAD_CTRL)
270#define MX25_PAD_CSI_D3__GPIO_1_28 IOMUX_PAD(0x31c, 0x124, 0x15, 0, 0, NO_PAD_CTRL) 271#define MX25_PAD_CSI_D3__GPIO_1_28 IOMUX_PAD(0x31c, 0x124, 0x15, 0, 0, NO_PAD_CTRL)
272#define MX25_PAD_CSI_D3__CSPI3_MISO IOMUX_PAD(0x31c, 0x124, 0x17, 0x4b4, 1, NO_PAD_CTRL)
271 273
272#define MX25_PAD_CSI_D4__CSI_D4 IOMUX_PAD(0x320, 0x128, 0x10, 0, 0, NO_PAD_CTRL) 274#define MX25_PAD_CSI_D4__CSI_D4 IOMUX_PAD(0x320, 0x128, 0x10, 0, 0, NO_PAD_CTRL)
273#define MX25_PAD_CSI_D4__UART5_RTS IOMUX_PAD(0x320, 0x128, 0x11, 0x574, 1, NO_PAD_CTRL) 275#define MX25_PAD_CSI_D4__UART5_RTS IOMUX_PAD(0x320, 0x128, 0x11, 0x574, 1, NO_PAD_CTRL)
274#define MX25_PAD_CSI_D4__GPIO_1_29 IOMUX_PAD(0x320, 0x128, 0x15, 0, 0, NO_PAD_CTRL) 276#define MX25_PAD_CSI_D4__GPIO_1_29 IOMUX_PAD(0x320, 0x128, 0x15, 0, 0, NO_PAD_CTRL)
277#define MX25_PAD_CSI_D4__CSPI3_SCLK IOMUX_PAD(0x320, 0x128, 0x17, 0, 0, NO_PAD_CTRL)
275 278
276#define MX25_PAD_CSI_D5__CSI_D5 IOMUX_PAD(0x324, 0x12c, 0x10, 0, 0, NO_PAD_CTRL) 279#define MX25_PAD_CSI_D5__CSI_D5 IOMUX_PAD(0x324, 0x12c, 0x10, 0, 0, NO_PAD_CTRL)
277#define MX25_PAD_CSI_D5__GPIO_1_30 IOMUX_PAD(0x324, 0x12c, 0x15, 0, 0, NO_PAD_CTRL) 280#define MX25_PAD_CSI_D5__GPIO_1_30 IOMUX_PAD(0x324, 0x12c, 0x15, 0, 0, NO_PAD_CTRL)
281#define MX25_PAD_CSI_D5__CSPI3_RDY IOMUX_PAD(0x324, 0x12c, 0x17, 0, 0, NO_PAD_CTRL)
278 282
279#define MX25_PAD_CSI_D6__CSI_D6 IOMUX_PAD(0x328, 0x130, 0x10, 0, 0, NO_PAD_CTRL) 283#define MX25_PAD_CSI_D6__CSI_D6 IOMUX_PAD(0x328, 0x130, 0x10, 0, 0, NO_PAD_CTRL)
280#define MX25_PAD_CSI_D6__GPIO_1_31 IOMUX_PAD(0x328, 0x130, 0x15, 0, 0, NO_PAD_CTRL) 284#define MX25_PAD_CSI_D6__GPIO_1_31 IOMUX_PAD(0x328, 0x130, 0x15, 0, 0, NO_PAD_CTRL)
diff --git a/arch/arm/plat-mxc/pwm.c b/arch/arm/plat-mxc/pwm.c
index 42d74ea59084..845de59f07ed 100644
--- a/arch/arm/plat-mxc/pwm.c
+++ b/arch/arm/plat-mxc/pwm.c
@@ -32,6 +32,9 @@
32#define MX3_PWMSAR 0x0C /* PWM Sample Register */ 32#define MX3_PWMSAR 0x0C /* PWM Sample Register */
33#define MX3_PWMPR 0x10 /* PWM Period Register */ 33#define MX3_PWMPR 0x10 /* PWM Period Register */
34#define MX3_PWMCR_PRESCALER(x) (((x - 1) & 0xFFF) << 4) 34#define MX3_PWMCR_PRESCALER(x) (((x - 1) & 0xFFF) << 4)
35#define MX3_PWMCR_DOZEEN (1 << 24)
36#define MX3_PWMCR_WAITEN (1 << 23)
37#define MX3_PWMCR_DBGEN (1 << 22)
35#define MX3_PWMCR_CLKSRC_IPG_HIGH (2 << 16) 38#define MX3_PWMCR_CLKSRC_IPG_HIGH (2 << 16)
36#define MX3_PWMCR_CLKSRC_IPG (1 << 16) 39#define MX3_PWMCR_CLKSRC_IPG (1 << 16)
37#define MX3_PWMCR_EN (1 << 0) 40#define MX3_PWMCR_EN (1 << 0)
@@ -77,7 +80,9 @@ int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns)
77 writel(duty_cycles, pwm->mmio_base + MX3_PWMSAR); 80 writel(duty_cycles, pwm->mmio_base + MX3_PWMSAR);
78 writel(period_cycles, pwm->mmio_base + MX3_PWMPR); 81 writel(period_cycles, pwm->mmio_base + MX3_PWMPR);
79 82
80 cr = MX3_PWMCR_PRESCALER(prescale) | MX3_PWMCR_EN; 83 cr = MX3_PWMCR_PRESCALER(prescale) |
84 MX3_PWMCR_DOZEEN | MX3_PWMCR_WAITEN |
85 MX3_PWMCR_DBGEN | MX3_PWMCR_EN;
81 86
82 if (cpu_is_mx25()) 87 if (cpu_is_mx25())
83 cr |= MX3_PWMCR_CLKSRC_IPG; 88 cr |= MX3_PWMCR_CLKSRC_IPG;
diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile
index 3df04d944e4d..9a584614e7e6 100644
--- a/arch/arm/plat-omap/Makefile
+++ b/arch/arm/plat-omap/Makefile
@@ -19,7 +19,6 @@ obj-$(CONFIG_ARCH_OMAP4) += omap_device.o
19 19
20obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o 20obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
21 21
22obj-$(CONFIG_CPU_FREQ) += cpu-omap.o
23obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o 22obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o
24obj-$(CONFIG_OMAP_DEBUG_DEVICES) += debug-devices.o 23obj-$(CONFIG_OMAP_DEBUG_DEVICES) += debug-devices.o
25obj-$(CONFIG_OMAP_DEBUG_LEDS) += debug-leds.o 24obj-$(CONFIG_OMAP_DEBUG_LEDS) += debug-leds.o
diff --git a/arch/arm/plat-omap/include/plat/am33xx.h b/arch/arm/plat-omap/include/plat/am33xx.h
new file mode 100644
index 000000000000..06c19bb7bca6
--- /dev/null
+++ b/arch/arm/plat-omap/include/plat/am33xx.h
@@ -0,0 +1,25 @@
1/*
2 * This file contains the address info for various AM33XX modules.
3 *
4 * Copyright (C) 2011 Texas Instruments, Inc. - http://www.ti.com/
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation version 2.
9 *
10 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
11 * kind, whether express or implied; without even the implied warranty
12 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#ifndef __ASM_ARCH_AM33XX_H
17#define __ASM_ARCH_AM33XX_H
18
19#define L4_SLOW_AM33XX_BASE 0x48000000
20
21#define AM33XX_SCM_BASE 0x44E10000
22#define AM33XX_CTRL_BASE AM33XX_SCM_BASE
23#define AM33XX_PRCM_BASE 0x44E00000
24
25#endif /* __ASM_ARCH_AM33XX_H */
diff --git a/arch/arm/plat-omap/include/plat/clock.h b/arch/arm/plat-omap/include/plat/clock.h
index eb73ab40e955..240a7b9fd946 100644
--- a/arch/arm/plat-omap/include/plat/clock.h
+++ b/arch/arm/plat-omap/include/plat/clock.h
@@ -59,6 +59,8 @@ struct clkops {
59#define RATE_IN_4430 (1 << 5) 59#define RATE_IN_4430 (1 << 5)
60#define RATE_IN_TI816X (1 << 6) 60#define RATE_IN_TI816X (1 << 6)
61#define RATE_IN_4460 (1 << 7) 61#define RATE_IN_4460 (1 << 7)
62#define RATE_IN_AM33XX (1 << 8)
63#define RATE_IN_TI814X (1 << 9)
62 64
63#define RATE_IN_24XX (RATE_IN_242X | RATE_IN_243X) 65#define RATE_IN_24XX (RATE_IN_242X | RATE_IN_243X)
64#define RATE_IN_34XX (RATE_IN_3430ES1 | RATE_IN_3430ES2PLUS) 66#define RATE_IN_34XX (RATE_IN_3430ES1 | RATE_IN_3430ES2PLUS)
@@ -84,7 +86,7 @@ struct clkops {
84struct clksel_rate { 86struct clksel_rate {
85 u32 val; 87 u32 val;
86 u8 div; 88 u8 div;
87 u8 flags; 89 u16 flags;
88}; 90};
89 91
90/** 92/**
diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h
index 408a12f79205..6b51086fce18 100644
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -69,6 +69,7 @@ unsigned int omap_rev(void);
69 * cpu_is_omap343x(): True for OMAP3430 69 * cpu_is_omap343x(): True for OMAP3430
70 * cpu_is_omap443x(): True for OMAP4430 70 * cpu_is_omap443x(): True for OMAP4430
71 * cpu_is_omap446x(): True for OMAP4460 71 * cpu_is_omap446x(): True for OMAP4460
72 * cpu_is_omap447x(): True for OMAP4470
72 */ 73 */
73#define GET_OMAP_CLASS (omap_rev() & 0xff) 74#define GET_OMAP_CLASS (omap_rev() & 0xff)
74 75
@@ -78,6 +79,22 @@ static inline int is_omap ##class (void) \
78 return (GET_OMAP_CLASS == (id)) ? 1 : 0; \ 79 return (GET_OMAP_CLASS == (id)) ? 1 : 0; \
79} 80}
80 81
82#define GET_AM_CLASS ((omap_rev() >> 24) & 0xff)
83
84#define IS_AM_CLASS(class, id) \
85static inline int is_am ##class (void) \
86{ \
87 return (GET_AM_CLASS == (id)) ? 1 : 0; \
88}
89
90#define GET_TI_CLASS ((omap_rev() >> 24) & 0xff)
91
92#define IS_TI_CLASS(class, id) \
93static inline int is_ti ##class (void) \
94{ \
95 return (GET_TI_CLASS == (id)) ? 1 : 0; \
96}
97
81#define GET_OMAP_SUBCLASS ((omap_rev() >> 20) & 0x0fff) 98#define GET_OMAP_SUBCLASS ((omap_rev() >> 20) & 0x0fff)
82 99
83#define IS_OMAP_SUBCLASS(subclass, id) \ 100#define IS_OMAP_SUBCLASS(subclass, id) \
@@ -92,12 +109,21 @@ static inline int is_ti ##subclass (void) \
92 return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \ 109 return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \
93} 110}
94 111
112#define IS_AM_SUBCLASS(subclass, id) \
113static inline int is_am ##subclass (void) \
114{ \
115 return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \
116}
117
95IS_OMAP_CLASS(7xx, 0x07) 118IS_OMAP_CLASS(7xx, 0x07)
96IS_OMAP_CLASS(15xx, 0x15) 119IS_OMAP_CLASS(15xx, 0x15)
97IS_OMAP_CLASS(16xx, 0x16) 120IS_OMAP_CLASS(16xx, 0x16)
98IS_OMAP_CLASS(24xx, 0x24) 121IS_OMAP_CLASS(24xx, 0x24)
99IS_OMAP_CLASS(34xx, 0x34) 122IS_OMAP_CLASS(34xx, 0x34)
100IS_OMAP_CLASS(44xx, 0x44) 123IS_OMAP_CLASS(44xx, 0x44)
124IS_AM_CLASS(33xx, 0x33)
125
126IS_TI_CLASS(81xx, 0x81)
101 127
102IS_OMAP_SUBCLASS(242x, 0x242) 128IS_OMAP_SUBCLASS(242x, 0x242)
103IS_OMAP_SUBCLASS(243x, 0x243) 129IS_OMAP_SUBCLASS(243x, 0x243)
@@ -105,8 +131,11 @@ IS_OMAP_SUBCLASS(343x, 0x343)
105IS_OMAP_SUBCLASS(363x, 0x363) 131IS_OMAP_SUBCLASS(363x, 0x363)
106IS_OMAP_SUBCLASS(443x, 0x443) 132IS_OMAP_SUBCLASS(443x, 0x443)
107IS_OMAP_SUBCLASS(446x, 0x446) 133IS_OMAP_SUBCLASS(446x, 0x446)
134IS_OMAP_SUBCLASS(447x, 0x447)
108 135
109IS_TI_SUBCLASS(816x, 0x816) 136IS_TI_SUBCLASS(816x, 0x816)
137IS_TI_SUBCLASS(814x, 0x814)
138IS_AM_SUBCLASS(335x, 0x335)
110 139
111#define cpu_is_omap7xx() 0 140#define cpu_is_omap7xx() 0
112#define cpu_is_omap15xx() 0 141#define cpu_is_omap15xx() 0
@@ -116,10 +145,15 @@ IS_TI_SUBCLASS(816x, 0x816)
116#define cpu_is_omap243x() 0 145#define cpu_is_omap243x() 0
117#define cpu_is_omap34xx() 0 146#define cpu_is_omap34xx() 0
118#define cpu_is_omap343x() 0 147#define cpu_is_omap343x() 0
148#define cpu_is_ti81xx() 0
119#define cpu_is_ti816x() 0 149#define cpu_is_ti816x() 0
150#define cpu_is_ti814x() 0
151#define cpu_is_am33xx() 0
152#define cpu_is_am335x() 0
120#define cpu_is_omap44xx() 0 153#define cpu_is_omap44xx() 0
121#define cpu_is_omap443x() 0 154#define cpu_is_omap443x() 0
122#define cpu_is_omap446x() 0 155#define cpu_is_omap446x() 0
156#define cpu_is_omap447x() 0
123 157
124#if defined(MULTI_OMAP1) 158#if defined(MULTI_OMAP1)
125# if defined(CONFIG_ARCH_OMAP730) 159# if defined(CONFIG_ARCH_OMAP730)
@@ -322,7 +356,11 @@ IS_OMAP_TYPE(3517, 0x3517)
322# undef cpu_is_omap3530 356# undef cpu_is_omap3530
323# undef cpu_is_omap3505 357# undef cpu_is_omap3505
324# undef cpu_is_omap3517 358# undef cpu_is_omap3517
359# undef cpu_is_ti81xx
325# undef cpu_is_ti816x 360# undef cpu_is_ti816x
361# undef cpu_is_ti814x
362# undef cpu_is_am33xx
363# undef cpu_is_am335x
326# define cpu_is_omap3430() is_omap3430() 364# define cpu_is_omap3430() is_omap3430()
327# define cpu_is_omap3503() (cpu_is_omap3430() && \ 365# define cpu_is_omap3503() (cpu_is_omap3430() && \
328 (!omap3_has_iva()) && \ 366 (!omap3_has_iva()) && \
@@ -339,16 +377,22 @@ IS_OMAP_TYPE(3517, 0x3517)
339 !omap3_has_sgx()) 377 !omap3_has_sgx())
340# undef cpu_is_omap3630 378# undef cpu_is_omap3630
341# define cpu_is_omap3630() is_omap363x() 379# define cpu_is_omap3630() is_omap363x()
380# define cpu_is_ti81xx() is_ti81xx()
342# define cpu_is_ti816x() is_ti816x() 381# define cpu_is_ti816x() is_ti816x()
382# define cpu_is_ti814x() is_ti814x()
383# define cpu_is_am33xx() is_am33xx()
384# define cpu_is_am335x() is_am335x()
343#endif 385#endif
344 386
345# if defined(CONFIG_ARCH_OMAP4) 387# if defined(CONFIG_ARCH_OMAP4)
346# undef cpu_is_omap44xx 388# undef cpu_is_omap44xx
347# undef cpu_is_omap443x 389# undef cpu_is_omap443x
348# undef cpu_is_omap446x 390# undef cpu_is_omap446x
391# undef cpu_is_omap447x
349# define cpu_is_omap44xx() is_omap44xx() 392# define cpu_is_omap44xx() is_omap44xx()
350# define cpu_is_omap443x() is_omap443x() 393# define cpu_is_omap443x() is_omap443x()
351# define cpu_is_omap446x() is_omap446x() 394# define cpu_is_omap446x() is_omap446x()
395# define cpu_is_omap447x() is_omap447x()
352# endif 396# endif
353 397
354/* Macros to detect if we have OMAP1 or OMAP2 */ 398/* Macros to detect if we have OMAP1 or OMAP2 */
@@ -386,15 +430,27 @@ IS_OMAP_TYPE(3517, 0x3517)
386#define TI8168_REV_ES1_0 TI816X_CLASS 430#define TI8168_REV_ES1_0 TI816X_CLASS
387#define TI8168_REV_ES1_1 (TI816X_CLASS | (0x1 << 8)) 431#define TI8168_REV_ES1_1 (TI816X_CLASS | (0x1 << 8))
388 432
433#define TI814X_CLASS 0x81400034
434#define TI8148_REV_ES1_0 TI814X_CLASS
435#define TI8148_REV_ES2_0 (TI814X_CLASS | (0x1 << 8))
436#define TI8148_REV_ES2_1 (TI814X_CLASS | (0x2 << 8))
437
438#define AM335X_CLASS 0x33500034
439#define AM335X_REV_ES1_0 AM335X_CLASS
440
389#define OMAP443X_CLASS 0x44300044 441#define OMAP443X_CLASS 0x44300044
390#define OMAP4430_REV_ES1_0 (OMAP443X_CLASS | (0x10 << 8)) 442#define OMAP4430_REV_ES1_0 (OMAP443X_CLASS | (0x10 << 8))
391#define OMAP4430_REV_ES2_0 (OMAP443X_CLASS | (0x20 << 8)) 443#define OMAP4430_REV_ES2_0 (OMAP443X_CLASS | (0x20 << 8))
392#define OMAP4430_REV_ES2_1 (OMAP443X_CLASS | (0x21 << 8)) 444#define OMAP4430_REV_ES2_1 (OMAP443X_CLASS | (0x21 << 8))
393#define OMAP4430_REV_ES2_2 (OMAP443X_CLASS | (0x22 << 8)) 445#define OMAP4430_REV_ES2_2 (OMAP443X_CLASS | (0x22 << 8))
446#define OMAP4430_REV_ES2_3 (OMAP443X_CLASS | (0x23 << 8))
394 447
395#define OMAP446X_CLASS 0x44600044 448#define OMAP446X_CLASS 0x44600044
396#define OMAP4460_REV_ES1_0 (OMAP446X_CLASS | (0x10 << 8)) 449#define OMAP4460_REV_ES1_0 (OMAP446X_CLASS | (0x10 << 8))
397 450
451#define OMAP447X_CLASS 0x44700044
452#define OMAP4470_REV_ES1_0 (OMAP447X_CLASS | (0x10 << 8))
453
398void omap2_check_revision(void); 454void omap2_check_revision(void);
399 455
400/* 456/*
diff --git a/arch/arm/plat-omap/include/plat/hardware.h b/arch/arm/plat-omap/include/plat/hardware.h
index e87efe1499b8..e897978371c2 100644
--- a/arch/arm/plat-omap/include/plat/hardware.h
+++ b/arch/arm/plat-omap/include/plat/hardware.h
@@ -286,6 +286,7 @@
286#include <plat/omap24xx.h> 286#include <plat/omap24xx.h>
287#include <plat/omap34xx.h> 287#include <plat/omap34xx.h>
288#include <plat/omap44xx.h> 288#include <plat/omap44xx.h>
289#include <plat/ti816x.h> 289#include <plat/ti81xx.h>
290#include <plat/am33xx.h>
290 291
291#endif /* __ASM_ARCH_OMAP_HARDWARE_H */ 292#endif /* __ASM_ARCH_OMAP_HARDWARE_H */
diff --git a/arch/arm/plat-omap/include/plat/io.h b/arch/arm/plat-omap/include/plat/io.h
index 1234944a4da0..0696bae1818b 100644
--- a/arch/arm/plat-omap/include/plat/io.h
+++ b/arch/arm/plat-omap/include/plat/io.h
@@ -73,6 +73,9 @@
73#define OMAP4_L3_IO_OFFSET 0xb4000000 73#define OMAP4_L3_IO_OFFSET 0xb4000000
74#define OMAP4_L3_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_L3_IO_OFFSET) /* L3 */ 74#define OMAP4_L3_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_L3_IO_OFFSET) /* L3 */
75 75
76#define AM33XX_L4_WK_IO_OFFSET 0xb5000000
77#define AM33XX_L4_WK_IO_ADDRESS(pa) IOMEM((pa) + AM33XX_L4_WK_IO_OFFSET)
78
76#define OMAP4_L3_PER_IO_OFFSET 0xb1100000 79#define OMAP4_L3_PER_IO_OFFSET 0xb1100000
77#define OMAP4_L3_PER_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_L3_PER_IO_OFFSET) 80#define OMAP4_L3_PER_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_L3_PER_IO_OFFSET)
78 81
@@ -154,6 +157,15 @@
154#define L4_34XX_SIZE SZ_4M /* 1MB of 128MB used, want 1MB sect */ 157#define L4_34XX_SIZE SZ_4M /* 1MB of 128MB used, want 1MB sect */
155 158
156/* 159/*
160 * ----------------------------------------------------------------------------
161 * AM33XX specific IO mapping
162 * ----------------------------------------------------------------------------
163 */
164#define L4_WK_AM33XX_PHYS L4_WK_AM33XX_BASE
165#define L4_WK_AM33XX_VIRT (L4_WK_AM33XX_PHYS + AM33XX_L4_WK_IO_OFFSET)
166#define L4_WK_AM33XX_SIZE SZ_4M /* 1MB of 128MB used, want 1MB sect */
167
168/*
157 * Need to look at the Size 4M for L4. 169 * Need to look at the Size 4M for L4.
158 * VPOM3430 was not working for Int controller 170 * VPOM3430 was not working for Int controller
159 */ 171 */
diff --git a/arch/arm/plat-omap/include/plat/omap34xx.h b/arch/arm/plat-omap/include/plat/omap34xx.h
index b9e85886b9d6..0d818acf3917 100644
--- a/arch/arm/plat-omap/include/plat/omap34xx.h
+++ b/arch/arm/plat-omap/include/plat/omap34xx.h
@@ -35,6 +35,8 @@
35#define L4_EMU_34XX_BASE 0x54000000 35#define L4_EMU_34XX_BASE 0x54000000
36#define L3_34XX_BASE 0x68000000 36#define L3_34XX_BASE 0x68000000
37 37
38#define L4_WK_AM33XX_BASE 0x44C00000
39
38#define OMAP3430_32KSYNCT_BASE 0x48320000 40#define OMAP3430_32KSYNCT_BASE 0x48320000
39#define OMAP3430_CM_BASE 0x48004800 41#define OMAP3430_CM_BASE 0x48004800
40#define OMAP3430_PRM_BASE 0x48306800 42#define OMAP3430_PRM_BASE 0x48306800
diff --git a/arch/arm/plat-omap/include/plat/serial.h b/arch/arm/plat-omap/include/plat/serial.h
index 1ab9fd6abe6d..6975ee3f5217 100644
--- a/arch/arm/plat-omap/include/plat/serial.h
+++ b/arch/arm/plat-omap/include/plat/serial.h
@@ -51,10 +51,10 @@
51#define OMAP4_UART3_BASE 0x48020000 51#define OMAP4_UART3_BASE 0x48020000
52#define OMAP4_UART4_BASE 0x4806e000 52#define OMAP4_UART4_BASE 0x4806e000
53 53
54/* TI816X serial ports */ 54/* TI81XX serial ports */
55#define TI816X_UART1_BASE 0x48020000 55#define TI81XX_UART1_BASE 0x48020000
56#define TI816X_UART2_BASE 0x48022000 56#define TI81XX_UART2_BASE 0x48022000
57#define TI816X_UART3_BASE 0x48024000 57#define TI81XX_UART3_BASE 0x48024000
58 58
59/* AM3505/3517 UART4 */ 59/* AM3505/3517 UART4 */
60#define AM35XX_UART4_BASE 0x4809E000 /* Only on AM3505/3517 */ 60#define AM35XX_UART4_BASE 0x4809E000 /* Only on AM3505/3517 */
@@ -89,9 +89,9 @@
89#define OMAP4UART2 OMAP2UART2 89#define OMAP4UART2 OMAP2UART2
90#define OMAP4UART3 43 90#define OMAP4UART3 43
91#define OMAP4UART4 44 91#define OMAP4UART4 44
92#define TI816XUART1 81 92#define TI81XXUART1 81
93#define TI816XUART2 82 93#define TI81XXUART2 82
94#define TI816XUART3 83 94#define TI81XXUART3 83
95#define ZOOM_UART 95 /* Only on zoom2/3 */ 95#define ZOOM_UART 95 /* Only on zoom2/3 */
96 96
97/* This is only used by 8250.c for omap1510 */ 97/* This is only used by 8250.c for omap1510 */
diff --git a/arch/arm/plat-omap/include/plat/ti816x.h b/arch/arm/plat-omap/include/plat/ti81xx.h
index 50510f5dda1e..8f9843f78422 100644
--- a/arch/arm/plat-omap/include/plat/ti816x.h
+++ b/arch/arm/plat-omap/include/plat/ti81xx.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * This file contains the address data for various TI816X modules. 2 * This file contains the address data for various TI81XX modules.
3 * 3 *
4 * Copyright (C) 2010 Texas Instruments, Inc. - http://www.ti.com/ 4 * Copyright (C) 2010 Texas Instruments, Inc. - http://www.ti.com/
5 * 5 *
@@ -13,15 +13,15 @@
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 */ 14 */
15 15
16#ifndef __ASM_ARCH_TI816X_H 16#ifndef __ASM_ARCH_TI81XX_H
17#define __ASM_ARCH_TI816X_H 17#define __ASM_ARCH_TI81XX_H
18 18
19#define L4_SLOW_TI816X_BASE 0x48000000 19#define L4_SLOW_TI81XX_BASE 0x48000000
20 20
21#define TI816X_SCM_BASE 0x48140000 21#define TI81XX_SCM_BASE 0x48140000
22#define TI816X_CTRL_BASE TI816X_SCM_BASE 22#define TI81XX_CTRL_BASE TI81XX_SCM_BASE
23#define TI816X_PRCM_BASE 0x48180000 23#define TI81XX_PRCM_BASE 0x48180000
24 24
25#define TI816X_ARM_INTC_BASE 0x48200000 25#define TI81XX_ARM_INTC_BASE 0x48200000
26 26
27#endif /* __ASM_ARCH_TI816X_H */ 27#endif /* __ASM_ARCH_TI81XX_H */
diff --git a/arch/arm/plat-omap/include/plat/uncompress.h b/arch/arm/plat-omap/include/plat/uncompress.h
index 2f472e989ec6..6ee90495ca4c 100644
--- a/arch/arm/plat-omap/include/plat/uncompress.h
+++ b/arch/arm/plat-omap/include/plat/uncompress.h
@@ -99,9 +99,9 @@ static inline void flush(void)
99#define DEBUG_LL_ZOOM(mach) \ 99#define DEBUG_LL_ZOOM(mach) \
100 _DEBUG_LL_ENTRY(mach, ZOOM_UART_BASE, ZOOM_PORT_SHIFT, ZOOM_UART) 100 _DEBUG_LL_ENTRY(mach, ZOOM_UART_BASE, ZOOM_PORT_SHIFT, ZOOM_UART)
101 101
102#define DEBUG_LL_TI816X(p, mach) \ 102#define DEBUG_LL_TI81XX(p, mach) \
103 _DEBUG_LL_ENTRY(mach, TI816X_UART##p##_BASE, OMAP_PORT_SHIFT, \ 103 _DEBUG_LL_ENTRY(mach, TI81XX_UART##p##_BASE, OMAP_PORT_SHIFT, \
104 TI816XUART##p) 104 TI81XXUART##p)
105 105
106static inline void __arch_decomp_setup(unsigned long arch_id) 106static inline void __arch_decomp_setup(unsigned long arch_id)
107{ 107{
@@ -177,7 +177,10 @@ static inline void __arch_decomp_setup(unsigned long arch_id)
177 DEBUG_LL_ZOOM(omap_zoom3); 177 DEBUG_LL_ZOOM(omap_zoom3);
178 178
179 /* TI8168 base boards using UART3 */ 179 /* TI8168 base boards using UART3 */
180 DEBUG_LL_TI816X(3, ti8168evm); 180 DEBUG_LL_TI81XX(3, ti8168evm);
181
182 /* TI8148 base boards using UART1 */
183 DEBUG_LL_TI81XX(1, ti8148evm);
181 184
182 } while (0); 185 } while (0);
183} 186}
diff --git a/arch/arm/plat-omap/include/plat/usb.h b/arch/arm/plat-omap/include/plat/usb.h
index 17d3c939775c..c616385f27bd 100644
--- a/arch/arm/plat-omap/include/plat/usb.h
+++ b/arch/arm/plat-omap/include/plat/usb.h
@@ -114,6 +114,7 @@ extern void am35x_musb_reset(void);
114extern void am35x_musb_phy_power(u8 on); 114extern void am35x_musb_phy_power(u8 on);
115extern void am35x_musb_clear_irq(void); 115extern void am35x_musb_clear_irq(void);
116extern void am35x_set_mode(u8 musb_mode); 116extern void am35x_set_mode(u8 musb_mode);
117extern void ti81xx_musb_phy_power(u8 on);
117 118
118/* 119/*
119 * FIXME correct answer depends on hmc_mode, 120 * FIXME correct answer depends on hmc_mode,
@@ -273,6 +274,37 @@ static inline void omap2_usbfs_init(struct omap_usb_config *pdata)
273#define CONF2_OTGPWRDN (1 << 2) 274#define CONF2_OTGPWRDN (1 << 2)
274#define CONF2_DATPOL (1 << 1) 275#define CONF2_DATPOL (1 << 1)
275 276
277/* TI81XX specific definitions */
278#define USBCTRL0 0x620
279#define USBSTAT0 0x624
280
281/* TI816X PHY controls bits */
282#define TI816X_USBPHY0_NORMAL_MODE (1 << 0)
283#define TI816X_USBPHY_REFCLK_OSC (1 << 8)
284
285/* TI814X PHY controls bits */
286#define USBPHY_CM_PWRDN (1 << 0)
287#define USBPHY_OTG_PWRDN (1 << 1)
288#define USBPHY_CHGDET_DIS (1 << 2)
289#define USBPHY_CHGDET_RSTRT (1 << 3)
290#define USBPHY_SRCONDM (1 << 4)
291#define USBPHY_SINKONDP (1 << 5)
292#define USBPHY_CHGISINK_EN (1 << 6)
293#define USBPHY_CHGVSRC_EN (1 << 7)
294#define USBPHY_DMPULLUP (1 << 8)
295#define USBPHY_DPPULLUP (1 << 9)
296#define USBPHY_CDET_EXTCTL (1 << 10)
297#define USBPHY_GPIO_MODE (1 << 12)
298#define USBPHY_DPOPBUFCTL (1 << 13)
299#define USBPHY_DMOPBUFCTL (1 << 14)
300#define USBPHY_DPINPUT (1 << 15)
301#define USBPHY_DMINPUT (1 << 16)
302#define USBPHY_DPGPIO_PD (1 << 17)
303#define USBPHY_DMGPIO_PD (1 << 18)
304#define USBPHY_OTGVDET_EN (1 << 19)
305#define USBPHY_OTGSESSEND_EN (1 << 20)
306#define USBPHY_DATA_POLARITY (1 << 23)
307
276#if defined(CONFIG_ARCH_OMAP1) && defined(CONFIG_USB) 308#if defined(CONFIG_ARCH_OMAP1) && defined(CONFIG_USB)
277u32 omap1_usb0_init(unsigned nwires, unsigned is_device); 309u32 omap1_usb0_init(unsigned nwires, unsigned is_device);
278u32 omap1_usb1_init(unsigned nwires); 310u32 omap1_usb1_init(unsigned nwires);
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index 313eb26cfa62..bb0af66bb487 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -88,12 +88,20 @@ config S5P_GPIO_DRVSTR
88 88
89config SAMSUNG_GPIO_EXTRA 89config SAMSUNG_GPIO_EXTRA
90 int "Number of additional GPIO pins" 90 int "Number of additional GPIO pins"
91 default 128 if SAMSUNG_GPIO_EXTRA128
92 default 64 if SAMSUNG_GPIO_EXTRA64
91 default 0 93 default 0
92 help 94 help
93 Use additional GPIO space in addition to the GPIO's the SOC 95 Use additional GPIO space in addition to the GPIO's the SOC
94 provides. This allows expanding the GPIO space for use with 96 provides. This allows expanding the GPIO space for use with
95 GPIO expanders. 97 GPIO expanders.
96 98
99config SAMSUNG_GPIO_EXTRA64
100 bool
101
102config SAMSUNG_GPIO_EXTRA128
103 bool
104
97config S3C_GPIO_SPACE 105config S3C_GPIO_SPACE
98 int "Space between gpio banks" 106 int "Space between gpio banks"
99 default 0 107 default 0
diff --git a/arch/arm/plat-samsung/dev-backlight.c b/arch/arm/plat-samsung/dev-backlight.c
index e657305644cc..a976c023b286 100644
--- a/arch/arm/plat-samsung/dev-backlight.c
+++ b/arch/arm/plat-samsung/dev-backlight.c
@@ -15,7 +15,6 @@
15#include <linux/slab.h> 15#include <linux/slab.h>
16#include <linux/io.h> 16#include <linux/io.h>
17#include <linux/pwm_backlight.h> 17#include <linux/pwm_backlight.h>
18#include <linux/slab.h>
19 18
20#include <plat/devs.h> 19#include <plat/devs.h>
21#include <plat/gpio-cfg.h> 20#include <plat/gpio-cfg.h>
diff --git a/arch/m68k/include/asm/unistd.h b/arch/m68k/include/asm/unistd.h
index 43f984e93970..303192fc9260 100644
--- a/arch/m68k/include/asm/unistd.h
+++ b/arch/m68k/include/asm/unistd.h
@@ -350,10 +350,12 @@
350#define __NR_clock_adjtime 342 350#define __NR_clock_adjtime 342
351#define __NR_syncfs 343 351#define __NR_syncfs 343
352#define __NR_setns 344 352#define __NR_setns 344
353#define __NR_process_vm_readv 345
354#define __NR_process_vm_writev 346
353 355
354#ifdef __KERNEL__ 356#ifdef __KERNEL__
355 357
356#define NR_syscalls 345 358#define NR_syscalls 347
357 359
358#define __ARCH_WANT_IPC_PARSE_VERSION 360#define __ARCH_WANT_IPC_PARSE_VERSION
359#define __ARCH_WANT_OLD_READDIR 361#define __ARCH_WANT_OLD_READDIR
diff --git a/arch/m68k/kernel/syscalltable.S b/arch/m68k/kernel/syscalltable.S
index c468f2edaa85..ce827b376110 100644
--- a/arch/m68k/kernel/syscalltable.S
+++ b/arch/m68k/kernel/syscalltable.S
@@ -365,4 +365,6 @@ ENTRY(sys_call_table)
365 .long sys_clock_adjtime 365 .long sys_clock_adjtime
366 .long sys_syncfs 366 .long sys_syncfs
367 .long sys_setns 367 .long sys_setns
368 .long sys_process_vm_readv /* 345 */
369 .long sys_process_vm_writev
368 370
diff --git a/arch/mips/kernel/perf_event_mipsxx.c b/arch/mips/kernel/perf_event_mipsxx.c
index 4f2971bcf8e5..315fc0b250f8 100644
--- a/arch/mips/kernel/perf_event_mipsxx.c
+++ b/arch/mips/kernel/perf_event_mipsxx.c
@@ -623,7 +623,7 @@ static int mipspmu_event_init(struct perf_event *event)
623 if (!atomic_inc_not_zero(&active_events)) { 623 if (!atomic_inc_not_zero(&active_events)) {
624 if (atomic_read(&active_events) > MIPS_MAX_HWEVENTS) { 624 if (atomic_read(&active_events) > MIPS_MAX_HWEVENTS) {
625 atomic_dec(&active_events); 625 atomic_dec(&active_events);
626 return -ENOSPC; 626 return -EINVAL;
627 } 627 }
628 628
629 mutex_lock(&pmu_reserve_mutex); 629 mutex_lock(&pmu_reserve_mutex);
@@ -732,15 +732,15 @@ static int validate_group(struct perf_event *event)
732 memset(&fake_cpuc, 0, sizeof(fake_cpuc)); 732 memset(&fake_cpuc, 0, sizeof(fake_cpuc));
733 733
734 if (!validate_event(&fake_cpuc, leader)) 734 if (!validate_event(&fake_cpuc, leader))
735 return -ENOSPC; 735 return -EINVAL;
736 736
737 list_for_each_entry(sibling, &leader->sibling_list, group_entry) { 737 list_for_each_entry(sibling, &leader->sibling_list, group_entry) {
738 if (!validate_event(&fake_cpuc, sibling)) 738 if (!validate_event(&fake_cpuc, sibling))
739 return -ENOSPC; 739 return -EINVAL;
740 } 740 }
741 741
742 if (!validate_event(&fake_cpuc, event)) 742 if (!validate_event(&fake_cpuc, event))
743 return -ENOSPC; 743 return -EINVAL;
744 744
745 return 0; 745 return 0;
746} 746}
diff --git a/arch/s390/include/asm/pgtable.h b/arch/s390/include/asm/pgtable.h
index 524d23b8610c..4f289ff0b7fe 100644
--- a/arch/s390/include/asm/pgtable.h
+++ b/arch/s390/include/asm/pgtable.h
@@ -599,10 +599,10 @@ static inline pgste_t pgste_update_all(pte_t *ptep, pgste_t pgste)
599 skey = page_get_storage_key(address); 599 skey = page_get_storage_key(address);
600 bits = skey & (_PAGE_CHANGED | _PAGE_REFERENCED); 600 bits = skey & (_PAGE_CHANGED | _PAGE_REFERENCED);
601 /* Clear page changed & referenced bit in the storage key */ 601 /* Clear page changed & referenced bit in the storage key */
602 if (bits) { 602 if (bits & _PAGE_CHANGED)
603 skey ^= bits; 603 page_set_storage_key(address, skey ^ bits, 1);
604 page_set_storage_key(address, skey, 1); 604 else if (bits)
605 } 605 page_reset_referenced(address);
606 /* Transfer page changed & referenced bit to guest bits in pgste */ 606 /* Transfer page changed & referenced bit to guest bits in pgste */
607 pgste_val(pgste) |= bits << 48; /* RCP_GR_BIT & RCP_GC_BIT */ 607 pgste_val(pgste) |= bits << 48; /* RCP_GR_BIT & RCP_GC_BIT */
608 /* Get host changed & referenced bits from pgste */ 608 /* Get host changed & referenced bits from pgste */
diff --git a/arch/s390/kernel/ptrace.c b/arch/s390/kernel/ptrace.c
index 450931a45b68..573bc29551ef 100644
--- a/arch/s390/kernel/ptrace.c
+++ b/arch/s390/kernel/ptrace.c
@@ -296,13 +296,6 @@ static int __poke_user(struct task_struct *child, addr_t addr, addr_t data)
296 ((data & PSW_MASK_EA) && !(data & PSW_MASK_BA)))) 296 ((data & PSW_MASK_EA) && !(data & PSW_MASK_BA))))
297 /* Invalid psw mask. */ 297 /* Invalid psw mask. */
298 return -EINVAL; 298 return -EINVAL;
299 if (addr == (addr_t) &dummy->regs.psw.addr)
300 /*
301 * The debugger changed the instruction address,
302 * reset system call restart, see signal.c:do_signal
303 */
304 task_thread_info(child)->system_call = 0;
305
306 *(addr_t *)((addr_t) &task_pt_regs(child)->psw + addr) = data; 299 *(addr_t *)((addr_t) &task_pt_regs(child)->psw + addr) = data;
307 300
308 } else if (addr < (addr_t) (&dummy->regs.orig_gpr2)) { 301 } else if (addr < (addr_t) (&dummy->regs.orig_gpr2)) {
@@ -614,11 +607,6 @@ static int __poke_user_compat(struct task_struct *child,
614 /* Transfer 31 bit amode bit to psw mask. */ 607 /* Transfer 31 bit amode bit to psw mask. */
615 regs->psw.mask = (regs->psw.mask & ~PSW_MASK_BA) | 608 regs->psw.mask = (regs->psw.mask & ~PSW_MASK_BA) |
616 (__u64)(tmp & PSW32_ADDR_AMODE); 609 (__u64)(tmp & PSW32_ADDR_AMODE);
617 /*
618 * The debugger changed the instruction address,
619 * reset system call restart, see signal.c:do_signal
620 */
621 task_thread_info(child)->system_call = 0;
622 } else { 610 } else {
623 /* gpr 0-15 */ 611 /* gpr 0-15 */
624 *(__u32*)((addr_t) &regs->psw + addr*2 + 4) = tmp; 612 *(__u32*)((addr_t) &regs->psw + addr*2 + 4) = tmp;
@@ -905,6 +893,14 @@ static int s390_last_break_get(struct task_struct *target,
905 return 0; 893 return 0;
906} 894}
907 895
896static int s390_last_break_set(struct task_struct *target,
897 const struct user_regset *regset,
898 unsigned int pos, unsigned int count,
899 const void *kbuf, const void __user *ubuf)
900{
901 return 0;
902}
903
908#endif 904#endif
909 905
910static int s390_system_call_get(struct task_struct *target, 906static int s390_system_call_get(struct task_struct *target,
@@ -951,6 +947,7 @@ static const struct user_regset s390_regsets[] = {
951 .size = sizeof(long), 947 .size = sizeof(long),
952 .align = sizeof(long), 948 .align = sizeof(long),
953 .get = s390_last_break_get, 949 .get = s390_last_break_get,
950 .set = s390_last_break_set,
954 }, 951 },
955#endif 952#endif
956 [REGSET_SYSTEM_CALL] = { 953 [REGSET_SYSTEM_CALL] = {
@@ -1116,6 +1113,14 @@ static int s390_compat_last_break_get(struct task_struct *target,
1116 return 0; 1113 return 0;
1117} 1114}
1118 1115
1116static int s390_compat_last_break_set(struct task_struct *target,
1117 const struct user_regset *regset,
1118 unsigned int pos, unsigned int count,
1119 const void *kbuf, const void __user *ubuf)
1120{
1121 return 0;
1122}
1123
1119static const struct user_regset s390_compat_regsets[] = { 1124static const struct user_regset s390_compat_regsets[] = {
1120 [REGSET_GENERAL] = { 1125 [REGSET_GENERAL] = {
1121 .core_note_type = NT_PRSTATUS, 1126 .core_note_type = NT_PRSTATUS,
@@ -1139,6 +1144,7 @@ static const struct user_regset s390_compat_regsets[] = {
1139 .size = sizeof(long), 1144 .size = sizeof(long),
1140 .align = sizeof(long), 1145 .align = sizeof(long),
1141 .get = s390_compat_last_break_get, 1146 .get = s390_compat_last_break_get,
1147 .set = s390_compat_last_break_set,
1142 }, 1148 },
1143 [REGSET_SYSTEM_CALL] = { 1149 [REGSET_SYSTEM_CALL] = {
1144 .core_note_type = NT_S390_SYSTEM_CALL, 1150 .core_note_type = NT_S390_SYSTEM_CALL,
diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c
index e58a462949b1..e54c4ff8abaa 100644
--- a/arch/s390/kernel/setup.c
+++ b/arch/s390/kernel/setup.c
@@ -579,7 +579,7 @@ static unsigned long __init find_crash_base(unsigned long crash_size,
579 *msg = "first memory chunk must be at least crashkernel size"; 579 *msg = "first memory chunk must be at least crashkernel size";
580 return 0; 580 return 0;
581 } 581 }
582 if (is_kdump_kernel() && (crash_size == OLDMEM_SIZE)) 582 if (OLDMEM_BASE && crash_size == OLDMEM_SIZE)
583 return OLDMEM_BASE; 583 return OLDMEM_BASE;
584 584
585 for (i = MEMORY_CHUNKS - 1; i >= 0; i--) { 585 for (i = MEMORY_CHUNKS - 1; i >= 0; i--) {
diff --git a/arch/s390/kernel/signal.c b/arch/s390/kernel/signal.c
index 05a85bc14c98..7f6f9f354545 100644
--- a/arch/s390/kernel/signal.c
+++ b/arch/s390/kernel/signal.c
@@ -460,9 +460,9 @@ void do_signal(struct pt_regs *regs)
460 regs->svc_code >> 16); 460 regs->svc_code >> 16);
461 break; 461 break;
462 } 462 }
463 /* No longer in a system call */
464 clear_thread_flag(TIF_SYSCALL);
465 } 463 }
464 /* No longer in a system call */
465 clear_thread_flag(TIF_SYSCALL);
466 466
467 if ((is_compat_task() ? 467 if ((is_compat_task() ?
468 handle_signal32(signr, &ka, &info, oldset, regs) : 468 handle_signal32(signr, &ka, &info, oldset, regs) :
@@ -486,6 +486,7 @@ void do_signal(struct pt_regs *regs)
486 } 486 }
487 487
488 /* No handlers present - check for system call restart */ 488 /* No handlers present - check for system call restart */
489 clear_thread_flag(TIF_SYSCALL);
489 if (current_thread_info()->system_call) { 490 if (current_thread_info()->system_call) {
490 regs->svc_code = current_thread_info()->system_call; 491 regs->svc_code = current_thread_info()->system_call;
491 switch (regs->gprs[2]) { 492 switch (regs->gprs[2]) {
@@ -500,9 +501,6 @@ void do_signal(struct pt_regs *regs)
500 regs->gprs[2] = regs->orig_gpr2; 501 regs->gprs[2] = regs->orig_gpr2;
501 set_thread_flag(TIF_SYSCALL); 502 set_thread_flag(TIF_SYSCALL);
502 break; 503 break;
503 default:
504 clear_thread_flag(TIF_SYSCALL);
505 break;
506 } 504 }
507 } 505 }
508 506
diff --git a/arch/sparc/kernel/ds.c b/arch/sparc/kernel/ds.c
index 7429b47c3aca..381edcd5bc29 100644
--- a/arch/sparc/kernel/ds.c
+++ b/arch/sparc/kernel/ds.c
@@ -1181,13 +1181,11 @@ static int __devinit ds_probe(struct vio_dev *vdev,
1181 1181
1182 dp->rcv_buf_len = 4096; 1182 dp->rcv_buf_len = 4096;
1183 1183
1184 dp->ds_states = kzalloc(sizeof(ds_states_template), 1184 dp->ds_states = kmemdup(ds_states_template,
1185 GFP_KERNEL); 1185 sizeof(ds_states_template), GFP_KERNEL);
1186 if (!dp->ds_states) 1186 if (!dp->ds_states)
1187 goto out_free_rcv_buf; 1187 goto out_free_rcv_buf;
1188 1188
1189 memcpy(dp->ds_states, ds_states_template,
1190 sizeof(ds_states_template));
1191 dp->num_ds_states = ARRAY_SIZE(ds_states_template); 1189 dp->num_ds_states = ARRAY_SIZE(ds_states_template);
1192 1190
1193 for (i = 0; i < dp->num_ds_states; i++) 1191 for (i = 0; i < dp->num_ds_states; i++)
diff --git a/arch/sparc/kernel/prom_common.c b/arch/sparc/kernel/prom_common.c
index 46614807a57f..741df916c124 100644
--- a/arch/sparc/kernel/prom_common.c
+++ b/arch/sparc/kernel/prom_common.c
@@ -58,12 +58,10 @@ int of_set_property(struct device_node *dp, const char *name, void *val, int len
58 void *new_val; 58 void *new_val;
59 int err; 59 int err;
60 60
61 new_val = kmalloc(len, GFP_KERNEL); 61 new_val = kmemdup(val, len, GFP_KERNEL);
62 if (!new_val) 62 if (!new_val)
63 return -ENOMEM; 63 return -ENOMEM;
64 64
65 memcpy(new_val, val, len);
66
67 err = -ENODEV; 65 err = -ENODEV;
68 66
69 mutex_lock(&of_set_property_mutex); 67 mutex_lock(&of_set_property_mutex);
diff --git a/arch/sparc/mm/btfixup.c b/arch/sparc/mm/btfixup.c
index 5175ac2f4820..8a7f81743c12 100644
--- a/arch/sparc/mm/btfixup.c
+++ b/arch/sparc/mm/btfixup.c
@@ -302,8 +302,7 @@ void __init btfixup(void)
302 case 'i': /* INT */ 302 case 'i': /* INT */
303 if ((insn & 0xc1c00000) == 0x01000000) /* %HI */ 303 if ((insn & 0xc1c00000) == 0x01000000) /* %HI */
304 set_addr(addr, q[1], fmangled, (insn & 0xffc00000) | (p[1] >> 10)); 304 set_addr(addr, q[1], fmangled, (insn & 0xffc00000) | (p[1] >> 10));
305 else if ((insn & 0x80002000) == 0x80002000 && 305 else if ((insn & 0x80002000) == 0x80002000) /* %LO */
306 (insn & 0x01800000) != 0x01800000) /* %LO */
307 set_addr(addr, q[1], fmangled, (insn & 0xffffe000) | (p[1] & 0x3ff)); 306 set_addr(addr, q[1], fmangled, (insn & 0xffffe000) | (p[1] & 0x3ff));
308 else { 307 else {
309 prom_printf(insn_i, p, addr, insn); 308 prom_printf(insn_i, p, addr, insn);
diff --git a/arch/tile/include/asm/irq.h b/arch/tile/include/asm/irq.h
index 94e9a511de84..f80f8ceabc67 100644
--- a/arch/tile/include/asm/irq.h
+++ b/arch/tile/include/asm/irq.h
@@ -74,16 +74,6 @@ enum {
74 */ 74 */
75void tile_irq_activate(unsigned int irq, int tile_irq_type); 75void tile_irq_activate(unsigned int irq, int tile_irq_type);
76 76
77/*
78 * For onboard, non-PCI (e.g. TILE_IRQ_PERCPU) devices, drivers know
79 * how to use enable/disable_percpu_irq() to manage interrupts on each
80 * core. We can't use the generic enable/disable_irq() because they
81 * use a single reference count per irq, rather than per cpu per irq.
82 */
83void enable_percpu_irq(unsigned int irq);
84void disable_percpu_irq(unsigned int irq);
85
86
87void setup_irq_regs(void); 77void setup_irq_regs(void);
88 78
89#endif /* _ASM_TILE_IRQ_H */ 79#endif /* _ASM_TILE_IRQ_H */
diff --git a/arch/tile/kernel/irq.c b/arch/tile/kernel/irq.c
index aa0134db2dd6..02e628065012 100644
--- a/arch/tile/kernel/irq.c
+++ b/arch/tile/kernel/irq.c
@@ -152,14 +152,13 @@ void tile_dev_intr(struct pt_regs *regs, int intnum)
152 * Remove an irq from the disabled mask. If we're in an interrupt 152 * Remove an irq from the disabled mask. If we're in an interrupt
153 * context, defer enabling the HW interrupt until we leave. 153 * context, defer enabling the HW interrupt until we leave.
154 */ 154 */
155void enable_percpu_irq(unsigned int irq) 155static void tile_irq_chip_enable(struct irq_data *d)
156{ 156{
157 get_cpu_var(irq_disable_mask) &= ~(1UL << irq); 157 get_cpu_var(irq_disable_mask) &= ~(1UL << d->irq);
158 if (__get_cpu_var(irq_depth) == 0) 158 if (__get_cpu_var(irq_depth) == 0)
159 unmask_irqs(1UL << irq); 159 unmask_irqs(1UL << d->irq);
160 put_cpu_var(irq_disable_mask); 160 put_cpu_var(irq_disable_mask);
161} 161}
162EXPORT_SYMBOL(enable_percpu_irq);
163 162
164/* 163/*
165 * Add an irq to the disabled mask. We disable the HW interrupt 164 * Add an irq to the disabled mask. We disable the HW interrupt
@@ -167,13 +166,12 @@ EXPORT_SYMBOL(enable_percpu_irq);
167 * in an interrupt context, the return path is careful to avoid 166 * in an interrupt context, the return path is careful to avoid
168 * unmasking a newly disabled interrupt. 167 * unmasking a newly disabled interrupt.
169 */ 168 */
170void disable_percpu_irq(unsigned int irq) 169static void tile_irq_chip_disable(struct irq_data *d)
171{ 170{
172 get_cpu_var(irq_disable_mask) |= (1UL << irq); 171 get_cpu_var(irq_disable_mask) |= (1UL << d->irq);
173 mask_irqs(1UL << irq); 172 mask_irqs(1UL << d->irq);
174 put_cpu_var(irq_disable_mask); 173 put_cpu_var(irq_disable_mask);
175} 174}
176EXPORT_SYMBOL(disable_percpu_irq);
177 175
178/* Mask an interrupt. */ 176/* Mask an interrupt. */
179static void tile_irq_chip_mask(struct irq_data *d) 177static void tile_irq_chip_mask(struct irq_data *d)
@@ -209,6 +207,8 @@ static void tile_irq_chip_eoi(struct irq_data *d)
209 207
210static struct irq_chip tile_irq_chip = { 208static struct irq_chip tile_irq_chip = {
211 .name = "tile_irq_chip", 209 .name = "tile_irq_chip",
210 .irq_enable = tile_irq_chip_enable,
211 .irq_disable = tile_irq_chip_disable,
212 .irq_ack = tile_irq_chip_ack, 212 .irq_ack = tile_irq_chip_ack,
213 .irq_eoi = tile_irq_chip_eoi, 213 .irq_eoi = tile_irq_chip_eoi,
214 .irq_mask = tile_irq_chip_mask, 214 .irq_mask = tile_irq_chip_mask,
diff --git a/arch/tile/kernel/pci-dma.c b/arch/tile/kernel/pci-dma.c
index 658f2ce426a4..b3ed19f8779c 100644
--- a/arch/tile/kernel/pci-dma.c
+++ b/arch/tile/kernel/pci-dma.c
@@ -15,6 +15,7 @@
15#include <linux/mm.h> 15#include <linux/mm.h>
16#include <linux/dma-mapping.h> 16#include <linux/dma-mapping.h>
17#include <linux/vmalloc.h> 17#include <linux/vmalloc.h>
18#include <linux/export.h>
18#include <asm/tlbflush.h> 19#include <asm/tlbflush.h>
19#include <asm/homecache.h> 20#include <asm/homecache.h>
20 21
diff --git a/arch/tile/kernel/pci.c b/arch/tile/kernel/pci.c
index 2a8014cb1ff5..9d610d3fb11e 100644
--- a/arch/tile/kernel/pci.c
+++ b/arch/tile/kernel/pci.c
@@ -24,6 +24,7 @@
24#include <linux/irq.h> 24#include <linux/irq.h>
25#include <linux/io.h> 25#include <linux/io.h>
26#include <linux/uaccess.h> 26#include <linux/uaccess.h>
27#include <linux/export.h>
27 28
28#include <asm/processor.h> 29#include <asm/processor.h>
29#include <asm/sections.h> 30#include <asm/sections.h>
diff --git a/arch/tile/kernel/sysfs.c b/arch/tile/kernel/sysfs.c
index b671a86f4515..602908268093 100644
--- a/arch/tile/kernel/sysfs.c
+++ b/arch/tile/kernel/sysfs.c
@@ -18,6 +18,7 @@
18#include <linux/cpu.h> 18#include <linux/cpu.h>
19#include <linux/slab.h> 19#include <linux/slab.h>
20#include <linux/smp.h> 20#include <linux/smp.h>
21#include <linux/stat.h>
21#include <hv/hypervisor.h> 22#include <hv/hypervisor.h>
22 23
23/* Return a string queried from the hypervisor, truncated to page size. */ 24/* Return a string queried from the hypervisor, truncated to page size. */
diff --git a/arch/tile/lib/exports.c b/arch/tile/lib/exports.c
index a87d2a859ba9..2a81d32de0da 100644
--- a/arch/tile/lib/exports.c
+++ b/arch/tile/lib/exports.c
@@ -39,6 +39,9 @@ EXPORT_SYMBOL(finv_user_asm);
39EXPORT_SYMBOL(current_text_addr); 39EXPORT_SYMBOL(current_text_addr);
40EXPORT_SYMBOL(dump_stack); 40EXPORT_SYMBOL(dump_stack);
41 41
42/* arch/tile/kernel/head.S */
43EXPORT_SYMBOL(empty_zero_page);
44
42/* arch/tile/lib/, various memcpy files */ 45/* arch/tile/lib/, various memcpy files */
43EXPORT_SYMBOL(memcpy); 46EXPORT_SYMBOL(memcpy);
44EXPORT_SYMBOL(__copy_to_user_inatomic); 47EXPORT_SYMBOL(__copy_to_user_inatomic);
diff --git a/arch/tile/mm/homecache.c b/arch/tile/mm/homecache.c
index cbe6f4f9eca3..1cc6ae477c98 100644
--- a/arch/tile/mm/homecache.c
+++ b/arch/tile/mm/homecache.c
@@ -449,9 +449,12 @@ void homecache_free_pages(unsigned long addr, unsigned int order)
449 VM_BUG_ON(!virt_addr_valid((void *)addr)); 449 VM_BUG_ON(!virt_addr_valid((void *)addr));
450 page = virt_to_page((void *)addr); 450 page = virt_to_page((void *)addr);
451 if (put_page_testzero(page)) { 451 if (put_page_testzero(page)) {
452 int pages = (1 << order);
453 homecache_change_page_home(page, order, initial_page_home()); 452 homecache_change_page_home(page, order, initial_page_home());
454 while (pages--) 453 if (order == 0) {
455 __free_page(page++); 454 free_hot_cold_page(page, 0);
455 } else {
456 init_page_count(page);
457 __free_pages(page, order);
458 }
456 } 459 }
457} 460}
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index cb9a1044a771..efb42949cc09 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -390,7 +390,7 @@ config X86_INTEL_CE
390 This option compiles in support for the CE4100 SOC for settop 390 This option compiles in support for the CE4100 SOC for settop
391 boxes and media devices. 391 boxes and media devices.
392 392
393config X86_INTEL_MID 393config X86_WANT_INTEL_MID
394 bool "Intel MID platform support" 394 bool "Intel MID platform support"
395 depends on X86_32 395 depends on X86_32
396 depends on X86_EXTENDED_PLATFORM 396 depends on X86_EXTENDED_PLATFORM
@@ -399,7 +399,10 @@ config X86_INTEL_MID
399 systems which do not have the PCI legacy interfaces (Moorestown, 399 systems which do not have the PCI legacy interfaces (Moorestown,
400 Medfield). If you are building for a PC class system say N here. 400 Medfield). If you are building for a PC class system say N here.
401 401
402if X86_INTEL_MID 402if X86_WANT_INTEL_MID
403
404config X86_INTEL_MID
405 bool
403 406
404config X86_MRST 407config X86_MRST
405 bool "Moorestown MID platform" 408 bool "Moorestown MID platform"
@@ -411,6 +414,7 @@ config X86_MRST
411 select SPI 414 select SPI
412 select INTEL_SCU_IPC 415 select INTEL_SCU_IPC
413 select X86_PLATFORM_DEVICES 416 select X86_PLATFORM_DEVICES
417 select X86_INTEL_MID
414 ---help--- 418 ---help---
415 Moorestown is Intel's Low Power Intel Architecture (LPIA) based Moblin 419 Moorestown is Intel's Low Power Intel Architecture (LPIA) based Moblin
416 Internet Device(MID) platform. Moorestown consists of two chips: 420 Internet Device(MID) platform. Moorestown consists of two chips:
diff --git a/arch/x86/include/asm/intel_scu_ipc.h b/arch/x86/include/asm/intel_scu_ipc.h
index 4420993acc47..925b605eb5c6 100644
--- a/arch/x86/include/asm/intel_scu_ipc.h
+++ b/arch/x86/include/asm/intel_scu_ipc.h
@@ -3,11 +3,15 @@
3 3
4#include <linux/notifier.h> 4#include <linux/notifier.h>
5 5
6#define IPCMSG_VRTC 0xFA /* Set vRTC device */ 6#define IPCMSG_WARM_RESET 0xF0
7 7#define IPCMSG_COLD_RESET 0xF1
8/* Command id associated with message IPCMSG_VRTC */ 8#define IPCMSG_SOFT_RESET 0xF2
9#define IPC_CMD_VRTC_SETTIME 1 /* Set time */ 9#define IPCMSG_COLD_BOOT 0xF3
10#define IPC_CMD_VRTC_SETALARM 2 /* Set alarm */ 10
11#define IPCMSG_VRTC 0xFA /* Set vRTC device */
12 /* Command id associated with message IPCMSG_VRTC */
13 #define IPC_CMD_VRTC_SETTIME 1 /* Set time */
14 #define IPC_CMD_VRTC_SETALARM 2 /* Set alarm */
11 15
12/* Read single register */ 16/* Read single register */
13int intel_scu_ipc_ioread8(u16 addr, u8 *data); 17int intel_scu_ipc_ioread8(u16 addr, u8 *data);
diff --git a/arch/x86/include/asm/mrst.h b/arch/x86/include/asm/mrst.h
index e6283129c821..93f79094c224 100644
--- a/arch/x86/include/asm/mrst.h
+++ b/arch/x86/include/asm/mrst.h
@@ -31,11 +31,20 @@ enum mrst_cpu_type {
31}; 31};
32 32
33extern enum mrst_cpu_type __mrst_cpu_chip; 33extern enum mrst_cpu_type __mrst_cpu_chip;
34
35#ifdef CONFIG_X86_INTEL_MID
36
34static inline enum mrst_cpu_type mrst_identify_cpu(void) 37static inline enum mrst_cpu_type mrst_identify_cpu(void)
35{ 38{
36 return __mrst_cpu_chip; 39 return __mrst_cpu_chip;
37} 40}
38 41
42#else /* !CONFIG_X86_INTEL_MID */
43
44#define mrst_identify_cpu() (0)
45
46#endif /* !CONFIG_X86_INTEL_MID */
47
39enum mrst_timer_options { 48enum mrst_timer_options {
40 MRST_TIMER_DEFAULT, 49 MRST_TIMER_DEFAULT,
41 MRST_TIMER_APBT_ONLY, 50 MRST_TIMER_APBT_ONLY,
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 084ef95274cd..95203d40ffdd 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -169,7 +169,14 @@ static inline int wrmsr_safe(unsigned msr, unsigned low, unsigned high)
169 return native_write_msr_safe(msr, low, high); 169 return native_write_msr_safe(msr, low, high);
170} 170}
171 171
172/* rdmsr with exception handling */ 172/*
173 * rdmsr with exception handling.
174 *
175 * Please note that the exception handling works only after we've
176 * switched to the "smart" #GP handler in trap_init() which knows about
177 * exception tables - using this macro earlier than that causes machine
178 * hangs on boxes which do not implement the @msr in the first argument.
179 */
173#define rdmsr_safe(msr, p1, p2) \ 180#define rdmsr_safe(msr, p1, p2) \
174({ \ 181({ \
175 int __err; \ 182 int __err; \
diff --git a/arch/x86/include/asm/system.h b/arch/x86/include/asm/system.h
index c2ff2a1d845e..2d2f01ce6dcb 100644
--- a/arch/x86/include/asm/system.h
+++ b/arch/x86/include/asm/system.h
@@ -401,6 +401,7 @@ extern unsigned long arch_align_stack(unsigned long sp);
401extern void free_init_pages(char *what, unsigned long begin, unsigned long end); 401extern void free_init_pages(char *what, unsigned long begin, unsigned long end);
402 402
403void default_idle(void); 403void default_idle(void);
404bool set_pm_idle_to_default(void);
404 405
405void stop_this_cpu(void *dummy); 406void stop_this_cpu(void *dummy);
406 407
diff --git a/arch/x86/include/asm/timer.h b/arch/x86/include/asm/timer.h
index fa7b9176b76c..431793e5d484 100644
--- a/arch/x86/include/asm/timer.h
+++ b/arch/x86/include/asm/timer.h
@@ -32,6 +32,22 @@ extern int no_timer_check;
32 * (mathieu.desnoyers@polymtl.ca) 32 * (mathieu.desnoyers@polymtl.ca)
33 * 33 *
34 * -johnstul@us.ibm.com "math is hard, lets go shopping!" 34 * -johnstul@us.ibm.com "math is hard, lets go shopping!"
35 *
36 * In:
37 *
38 * ns = cycles * cyc2ns_scale / SC
39 *
40 * Although we may still have enough bits to store the value of ns,
41 * in some cases, we may not have enough bits to store cycles * cyc2ns_scale,
42 * leading to an incorrect result.
43 *
44 * To avoid this, we can decompose 'cycles' into quotient and remainder
45 * of division by SC. Then,
46 *
47 * ns = (quot * SC + rem) * cyc2ns_scale / SC
48 * = quot * cyc2ns_scale + (rem * cyc2ns_scale) / SC
49 *
50 * - sqazi@google.com
35 */ 51 */
36 52
37DECLARE_PER_CPU(unsigned long, cyc2ns); 53DECLARE_PER_CPU(unsigned long, cyc2ns);
@@ -41,9 +57,14 @@ DECLARE_PER_CPU(unsigned long long, cyc2ns_offset);
41 57
42static inline unsigned long long __cycles_2_ns(unsigned long long cyc) 58static inline unsigned long long __cycles_2_ns(unsigned long long cyc)
43{ 59{
60 unsigned long long quot;
61 unsigned long long rem;
44 int cpu = smp_processor_id(); 62 int cpu = smp_processor_id();
45 unsigned long long ns = per_cpu(cyc2ns_offset, cpu); 63 unsigned long long ns = per_cpu(cyc2ns_offset, cpu);
46 ns += cyc * per_cpu(cyc2ns, cpu) >> CYC2NS_SCALE_FACTOR; 64 quot = (cyc >> CYC2NS_SCALE_FACTOR);
65 rem = cyc & ((1ULL << CYC2NS_SCALE_FACTOR) - 1);
66 ns += quot * per_cpu(cyc2ns, cpu) +
67 ((rem * per_cpu(cyc2ns, cpu)) >> CYC2NS_SCALE_FACTOR);
47 return ns; 68 return ns;
48} 69}
49 70
diff --git a/arch/x86/include/asm/uv/uv_mmrs.h b/arch/x86/include/asm/uv/uv_mmrs.h
index 10474fb1185d..cf1d73643f60 100644
--- a/arch/x86/include/asm/uv/uv_mmrs.h
+++ b/arch/x86/include/asm/uv/uv_mmrs.h
@@ -57,6 +57,7 @@
57 57
58#define UV1_HUB_PART_NUMBER 0x88a5 58#define UV1_HUB_PART_NUMBER 0x88a5
59#define UV2_HUB_PART_NUMBER 0x8eb8 59#define UV2_HUB_PART_NUMBER 0x8eb8
60#define UV2_HUB_PART_NUMBER_X 0x1111
60 61
61/* Compat: if this #define is present, UV headers support UV2 */ 62/* Compat: if this #define is present, UV headers support UV2 */
62#define UV2_HUB_IS_SUPPORTED 1 63#define UV2_HUB_IS_SUPPORTED 1
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c
index 62ae3001ae02..9d59bbacd4e3 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -93,6 +93,8 @@ static int __init early_get_pnodeid(void)
93 93
94 if (node_id.s.part_number == UV2_HUB_PART_NUMBER) 94 if (node_id.s.part_number == UV2_HUB_PART_NUMBER)
95 uv_min_hub_revision_id += UV2_HUB_REVISION_BASE - 1; 95 uv_min_hub_revision_id += UV2_HUB_REVISION_BASE - 1;
96 if (node_id.s.part_number == UV2_HUB_PART_NUMBER_X)
97 uv_min_hub_revision_id += UV2_HUB_REVISION_BASE - 1;
96 98
97 uv_hub_info->hub_revision = uv_min_hub_revision_id; 99 uv_hub_info->hub_revision = uv_min_hub_revision_id;
98 pnode = (node_id.s.node_id >> 1) & ((1 << m_n_config.s.n_skt) - 1); 100 pnode = (node_id.s.node_id >> 1) & ((1 << m_n_config.s.n_skt) - 1);
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index c7e46cb35327..0bab2b18bb20 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -442,8 +442,6 @@ static void __cpuinit bsp_init_amd(struct cpuinfo_x86 *c)
442 442
443static void __cpuinit early_init_amd(struct cpuinfo_x86 *c) 443static void __cpuinit early_init_amd(struct cpuinfo_x86 *c)
444{ 444{
445 u32 dummy;
446
447 early_init_amd_mc(c); 445 early_init_amd_mc(c);
448 446
449 /* 447 /*
@@ -473,12 +471,12 @@ static void __cpuinit early_init_amd(struct cpuinfo_x86 *c)
473 set_cpu_cap(c, X86_FEATURE_EXTD_APICID); 471 set_cpu_cap(c, X86_FEATURE_EXTD_APICID);
474 } 472 }
475#endif 473#endif
476
477 rdmsr_safe(MSR_AMD64_PATCH_LEVEL, &c->microcode, &dummy);
478} 474}
479 475
480static void __cpuinit init_amd(struct cpuinfo_x86 *c) 476static void __cpuinit init_amd(struct cpuinfo_x86 *c)
481{ 477{
478 u32 dummy;
479
482#ifdef CONFIG_SMP 480#ifdef CONFIG_SMP
483 unsigned long long value; 481 unsigned long long value;
484 482
@@ -657,6 +655,8 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
657 checking_wrmsrl(MSR_AMD64_MCx_MASK(4), mask); 655 checking_wrmsrl(MSR_AMD64_MCx_MASK(4), mask);
658 } 656 }
659 } 657 }
658
659 rdmsr_safe(MSR_AMD64_PATCH_LEVEL, &c->microcode, &dummy);
660} 660}
661 661
662#ifdef CONFIG_X86_32 662#ifdef CONFIG_X86_32
diff --git a/arch/x86/kernel/cpu/mtrr/generic.c b/arch/x86/kernel/cpu/mtrr/generic.c
index a71efcdbb092..97b26356e9ee 100644
--- a/arch/x86/kernel/cpu/mtrr/generic.c
+++ b/arch/x86/kernel/cpu/mtrr/generic.c
@@ -547,6 +547,7 @@ static void generic_get_mtrr(unsigned int reg, unsigned long *base,
547 547
548 if (tmp != mask_lo) { 548 if (tmp != mask_lo) {
549 printk(KERN_WARNING "mtrr: your BIOS has configured an incorrect mask, fixing it.\n"); 549 printk(KERN_WARNING "mtrr: your BIOS has configured an incorrect mask, fixing it.\n");
550 add_taint(TAINT_FIRMWARE_WORKAROUND);
550 mask_lo = tmp; 551 mask_lo = tmp;
551 } 552 }
552 } 553 }
@@ -693,6 +694,7 @@ static void prepare_set(void) __acquires(set_atomicity_lock)
693 694
694 /* Disable MTRRs, and set the default type to uncached */ 695 /* Disable MTRRs, and set the default type to uncached */
695 mtrr_wrmsr(MSR_MTRRdefType, deftype_lo & ~0xcff, deftype_hi); 696 mtrr_wrmsr(MSR_MTRRdefType, deftype_lo & ~0xcff, deftype_hi);
697 wbinvd();
696} 698}
697 699
698static void post_set(void) __releases(set_atomicity_lock) 700static void post_set(void) __releases(set_atomicity_lock)
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
index 640891014b2a..2bda212a0010 100644
--- a/arch/x86/kernel/cpu/perf_event.c
+++ b/arch/x86/kernel/cpu/perf_event.c
@@ -312,12 +312,8 @@ int x86_setup_perfctr(struct perf_event *event)
312 return -EOPNOTSUPP; 312 return -EOPNOTSUPP;
313 } 313 }
314 314
315 /*
316 * Do not allow config1 (extended registers) to propagate,
317 * there's no sane user-space generalization yet:
318 */
319 if (attr->type == PERF_TYPE_RAW) 315 if (attr->type == PERF_TYPE_RAW)
320 return 0; 316 return x86_pmu_extra_regs(event->attr.config, event);
321 317
322 if (attr->type == PERF_TYPE_HW_CACHE) 318 if (attr->type == PERF_TYPE_HW_CACHE)
323 return set_ext_hw_attr(hwc, event); 319 return set_ext_hw_attr(hwc, event);
@@ -588,7 +584,7 @@ done:
588 x86_pmu.put_event_constraints(cpuc, cpuc->event_list[i]); 584 x86_pmu.put_event_constraints(cpuc, cpuc->event_list[i]);
589 } 585 }
590 } 586 }
591 return num ? -ENOSPC : 0; 587 return num ? -EINVAL : 0;
592} 588}
593 589
594/* 590/*
@@ -607,7 +603,7 @@ static int collect_events(struct cpu_hw_events *cpuc, struct perf_event *leader,
607 603
608 if (is_x86_event(leader)) { 604 if (is_x86_event(leader)) {
609 if (n >= max_count) 605 if (n >= max_count)
610 return -ENOSPC; 606 return -EINVAL;
611 cpuc->event_list[n] = leader; 607 cpuc->event_list[n] = leader;
612 n++; 608 n++;
613 } 609 }
@@ -620,7 +616,7 @@ static int collect_events(struct cpu_hw_events *cpuc, struct perf_event *leader,
620 continue; 616 continue;
621 617
622 if (n >= max_count) 618 if (n >= max_count)
623 return -ENOSPC; 619 return -EINVAL;
624 620
625 cpuc->event_list[n] = event; 621 cpuc->event_list[n] = event;
626 n++; 622 n++;
@@ -1316,7 +1312,7 @@ static int validate_event(struct perf_event *event)
1316 c = x86_pmu.get_event_constraints(fake_cpuc, event); 1312 c = x86_pmu.get_event_constraints(fake_cpuc, event);
1317 1313
1318 if (!c || !c->weight) 1314 if (!c || !c->weight)
1319 ret = -ENOSPC; 1315 ret = -EINVAL;
1320 1316
1321 if (x86_pmu.put_event_constraints) 1317 if (x86_pmu.put_event_constraints)
1322 x86_pmu.put_event_constraints(fake_cpuc, event); 1318 x86_pmu.put_event_constraints(fake_cpuc, event);
@@ -1341,7 +1337,7 @@ static int validate_group(struct perf_event *event)
1341{ 1337{
1342 struct perf_event *leader = event->group_leader; 1338 struct perf_event *leader = event->group_leader;
1343 struct cpu_hw_events *fake_cpuc; 1339 struct cpu_hw_events *fake_cpuc;
1344 int ret = -ENOSPC, n; 1340 int ret = -EINVAL, n;
1345 1341
1346 fake_cpuc = allocate_fake_cpuc(); 1342 fake_cpuc = allocate_fake_cpuc();
1347 if (IS_ERR(fake_cpuc)) 1343 if (IS_ERR(fake_cpuc))
diff --git a/arch/x86/kernel/cpu/perf_event_amd_ibs.c b/arch/x86/kernel/cpu/perf_event_amd_ibs.c
index ab6343d21825..3b8a2d30d14e 100644
--- a/arch/x86/kernel/cpu/perf_event_amd_ibs.c
+++ b/arch/x86/kernel/cpu/perf_event_amd_ibs.c
@@ -199,8 +199,7 @@ static int force_ibs_eilvt_setup(void)
199 goto out; 199 goto out;
200 } 200 }
201 201
202 pr_err(FW_BUG "using offset %d for IBS interrupts\n", offset); 202 pr_info("IBS: LVT offset %d assigned\n", offset);
203 pr_err(FW_BUG "workaround enabled for IBS LVT offset\n");
204 203
205 return 0; 204 return 0;
206out: 205out:
@@ -265,19 +264,23 @@ perf_ibs_cpu_notifier(struct notifier_block *self, unsigned long action, void *h
265static __init int amd_ibs_init(void) 264static __init int amd_ibs_init(void)
266{ 265{
267 u32 caps; 266 u32 caps;
268 int ret; 267 int ret = -EINVAL;
269 268
270 caps = __get_ibs_caps(); 269 caps = __get_ibs_caps();
271 if (!caps) 270 if (!caps)
272 return -ENODEV; /* ibs not supported by the cpu */ 271 return -ENODEV; /* ibs not supported by the cpu */
273 272
274 if (!ibs_eilvt_valid()) { 273 /*
275 ret = force_ibs_eilvt_setup(); 274 * Force LVT offset assignment for family 10h: The offsets are
276 if (ret) { 275 * not assigned by the BIOS for this family, so the OS is
277 pr_err("Failed to setup IBS, %d\n", ret); 276 * responsible for doing it. If the OS assignment fails, fall
278 return ret; 277 * back to BIOS settings and try to setup this.
279 } 278 */
280 } 279 if (boot_cpu_data.x86 == 0x10)
280 force_ibs_eilvt_setup();
281
282 if (!ibs_eilvt_valid())
283 goto out;
281 284
282 get_online_cpus(); 285 get_online_cpus();
283 ibs_caps = caps; 286 ibs_caps = caps;
@@ -287,7 +290,11 @@ static __init int amd_ibs_init(void)
287 smp_call_function(setup_APIC_ibs, NULL, 1); 290 smp_call_function(setup_APIC_ibs, NULL, 1);
288 put_online_cpus(); 291 put_online_cpus();
289 292
290 return perf_event_ibs_init(); 293 ret = perf_event_ibs_init();
294out:
295 if (ret)
296 pr_err("Failed to setup IBS, %d\n", ret);
297 return ret;
291} 298}
292 299
293/* Since we need the pci subsystem to init ibs we can't do this earlier: */ 300/* Since we need the pci subsystem to init ibs we can't do this earlier: */
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index 2be5ebe99872..8d601b18bf9f 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -1545,6 +1545,13 @@ static void intel_clovertown_quirks(void)
1545 x86_pmu.pebs_constraints = NULL; 1545 x86_pmu.pebs_constraints = NULL;
1546} 1546}
1547 1547
1548static void intel_sandybridge_quirks(void)
1549{
1550 printk(KERN_WARNING "PEBS disabled due to CPU errata.\n");
1551 x86_pmu.pebs = 0;
1552 x86_pmu.pebs_constraints = NULL;
1553}
1554
1548__init int intel_pmu_init(void) 1555__init int intel_pmu_init(void)
1549{ 1556{
1550 union cpuid10_edx edx; 1557 union cpuid10_edx edx;
@@ -1694,6 +1701,7 @@ __init int intel_pmu_init(void)
1694 break; 1701 break;
1695 1702
1696 case 42: /* SandyBridge */ 1703 case 42: /* SandyBridge */
1704 x86_pmu.quirks = intel_sandybridge_quirks;
1697 case 45: /* SandyBridge, "Romely-EP" */ 1705 case 45: /* SandyBridge, "Romely-EP" */
1698 memcpy(hw_cache_event_ids, snb_hw_cache_event_ids, 1706 memcpy(hw_cache_event_ids, snb_hw_cache_event_ids,
1699 sizeof(hw_cache_event_ids)); 1707 sizeof(hw_cache_event_ids));
diff --git a/arch/x86/kernel/cpu/perf_event_intel_ds.c b/arch/x86/kernel/cpu/perf_event_intel_ds.c
index c0d238f49db8..73da6b64f5b7 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_ds.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_ds.c
@@ -493,6 +493,7 @@ static int intel_pmu_pebs_fixup_ip(struct pt_regs *regs)
493 unsigned long from = cpuc->lbr_entries[0].from; 493 unsigned long from = cpuc->lbr_entries[0].from;
494 unsigned long old_to, to = cpuc->lbr_entries[0].to; 494 unsigned long old_to, to = cpuc->lbr_entries[0].to;
495 unsigned long ip = regs->ip; 495 unsigned long ip = regs->ip;
496 int is_64bit = 0;
496 497
497 /* 498 /*
498 * We don't need to fixup if the PEBS assist is fault like 499 * We don't need to fixup if the PEBS assist is fault like
@@ -544,7 +545,10 @@ static int intel_pmu_pebs_fixup_ip(struct pt_regs *regs)
544 } else 545 } else
545 kaddr = (void *)to; 546 kaddr = (void *)to;
546 547
547 kernel_insn_init(&insn, kaddr); 548#ifdef CONFIG_X86_64
549 is_64bit = kernel_ip(to) || !test_thread_flag(TIF_IA32);
550#endif
551 insn_init(&insn, kaddr, is_64bit);
548 insn_get_length(&insn); 552 insn_get_length(&insn);
549 to += insn.length; 553 to += insn.length;
550 } while (to < ip); 554 } while (to < ip);
diff --git a/arch/x86/kernel/cpu/perf_event_p4.c b/arch/x86/kernel/cpu/perf_event_p4.c
index 492bf1358a7c..ef484d9d0a25 100644
--- a/arch/x86/kernel/cpu/perf_event_p4.c
+++ b/arch/x86/kernel/cpu/perf_event_p4.c
@@ -1268,7 +1268,7 @@ reserve:
1268 } 1268 }
1269 1269
1270done: 1270done:
1271 return num ? -ENOSPC : 0; 1271 return num ? -EINVAL : 0;
1272} 1272}
1273 1273
1274static __initconst const struct x86_pmu p4_pmu = { 1274static __initconst const struct x86_pmu p4_pmu = {
diff --git a/arch/x86/kernel/hpet.c b/arch/x86/kernel/hpet.c
index b946a9eac7d9..1bb0bf4d92cd 100644
--- a/arch/x86/kernel/hpet.c
+++ b/arch/x86/kernel/hpet.c
@@ -1049,6 +1049,14 @@ int hpet_rtc_timer_init(void)
1049} 1049}
1050EXPORT_SYMBOL_GPL(hpet_rtc_timer_init); 1050EXPORT_SYMBOL_GPL(hpet_rtc_timer_init);
1051 1051
1052static void hpet_disable_rtc_channel(void)
1053{
1054 unsigned long cfg;
1055 cfg = hpet_readl(HPET_T1_CFG);
1056 cfg &= ~HPET_TN_ENABLE;
1057 hpet_writel(cfg, HPET_T1_CFG);
1058}
1059
1052/* 1060/*
1053 * The functions below are called from rtc driver. 1061 * The functions below are called from rtc driver.
1054 * Return 0 if HPET is not being used. 1062 * Return 0 if HPET is not being used.
@@ -1060,6 +1068,9 @@ int hpet_mask_rtc_irq_bit(unsigned long bit_mask)
1060 return 0; 1068 return 0;
1061 1069
1062 hpet_rtc_flags &= ~bit_mask; 1070 hpet_rtc_flags &= ~bit_mask;
1071 if (unlikely(!hpet_rtc_flags))
1072 hpet_disable_rtc_channel();
1073
1063 return 1; 1074 return 1;
1064} 1075}
1065EXPORT_SYMBOL_GPL(hpet_mask_rtc_irq_bit); 1076EXPORT_SYMBOL_GPL(hpet_mask_rtc_irq_bit);
@@ -1125,15 +1136,11 @@ EXPORT_SYMBOL_GPL(hpet_rtc_dropped_irq);
1125 1136
1126static void hpet_rtc_timer_reinit(void) 1137static void hpet_rtc_timer_reinit(void)
1127{ 1138{
1128 unsigned int cfg, delta; 1139 unsigned int delta;
1129 int lost_ints = -1; 1140 int lost_ints = -1;
1130 1141
1131 if (unlikely(!hpet_rtc_flags)) { 1142 if (unlikely(!hpet_rtc_flags))
1132 cfg = hpet_readl(HPET_T1_CFG); 1143 hpet_disable_rtc_channel();
1133 cfg &= ~HPET_TN_ENABLE;
1134 hpet_writel(cfg, HPET_T1_CFG);
1135 return;
1136 }
1137 1144
1138 if (!(hpet_rtc_flags & RTC_PIE) || hpet_pie_limit) 1145 if (!(hpet_rtc_flags & RTC_PIE) || hpet_pie_limit)
1139 delta = hpet_default_delta; 1146 delta = hpet_default_delta;
diff --git a/arch/x86/kernel/irq_64.c b/arch/x86/kernel/irq_64.c
index acf8fbf8fbda..69bca468c47a 100644
--- a/arch/x86/kernel/irq_64.c
+++ b/arch/x86/kernel/irq_64.c
@@ -38,6 +38,9 @@ static inline void stack_overflow_check(struct pt_regs *regs)
38#ifdef CONFIG_DEBUG_STACKOVERFLOW 38#ifdef CONFIG_DEBUG_STACKOVERFLOW
39 u64 curbase = (u64)task_stack_page(current); 39 u64 curbase = (u64)task_stack_page(current);
40 40
41 if (user_mode_vm(regs))
42 return;
43
41 WARN_ONCE(regs->sp >= curbase && 44 WARN_ONCE(regs->sp >= curbase &&
42 regs->sp <= curbase + THREAD_SIZE && 45 regs->sp <= curbase + THREAD_SIZE &&
43 regs->sp < curbase + sizeof(struct thread_info) + 46 regs->sp < curbase + sizeof(struct thread_info) +
diff --git a/arch/x86/kernel/microcode_core.c b/arch/x86/kernel/microcode_core.c
index f2d2a664e797..9d46f5e43b51 100644
--- a/arch/x86/kernel/microcode_core.c
+++ b/arch/x86/kernel/microcode_core.c
@@ -256,7 +256,7 @@ static int __init microcode_dev_init(void)
256 return 0; 256 return 0;
257} 257}
258 258
259static void microcode_dev_exit(void) 259static void __exit microcode_dev_exit(void)
260{ 260{
261 misc_deregister(&microcode_dev); 261 misc_deregister(&microcode_dev);
262} 262}
@@ -519,10 +519,8 @@ static int __init microcode_init(void)
519 519
520 microcode_pdev = platform_device_register_simple("microcode", -1, 520 microcode_pdev = platform_device_register_simple("microcode", -1,
521 NULL, 0); 521 NULL, 0);
522 if (IS_ERR(microcode_pdev)) { 522 if (IS_ERR(microcode_pdev))
523 microcode_dev_exit();
524 return PTR_ERR(microcode_pdev); 523 return PTR_ERR(microcode_pdev);
525 }
526 524
527 get_online_cpus(); 525 get_online_cpus();
528 mutex_lock(&microcode_mutex); 526 mutex_lock(&microcode_mutex);
@@ -532,14 +530,12 @@ static int __init microcode_init(void)
532 mutex_unlock(&microcode_mutex); 530 mutex_unlock(&microcode_mutex);
533 put_online_cpus(); 531 put_online_cpus();
534 532
535 if (error) { 533 if (error)
536 platform_device_unregister(microcode_pdev); 534 goto out_pdev;
537 return error;
538 }
539 535
540 error = microcode_dev_init(); 536 error = microcode_dev_init();
541 if (error) 537 if (error)
542 return error; 538 goto out_sysdev_driver;
543 539
544 register_syscore_ops(&mc_syscore_ops); 540 register_syscore_ops(&mc_syscore_ops);
545 register_hotcpu_notifier(&mc_cpu_notifier); 541 register_hotcpu_notifier(&mc_cpu_notifier);
@@ -548,6 +544,20 @@ static int __init microcode_init(void)
548 " <tigran@aivazian.fsnet.co.uk>, Peter Oruba\n"); 544 " <tigran@aivazian.fsnet.co.uk>, Peter Oruba\n");
549 545
550 return 0; 546 return 0;
547
548out_sysdev_driver:
549 get_online_cpus();
550 mutex_lock(&microcode_mutex);
551
552 sysdev_driver_unregister(&cpu_sysdev_class, &mc_sysdev_driver);
553
554 mutex_unlock(&microcode_mutex);
555 put_online_cpus();
556
557out_pdev:
558 platform_device_unregister(microcode_pdev);
559 return error;
560
551} 561}
552module_init(microcode_init); 562module_init(microcode_init);
553 563
diff --git a/arch/x86/kernel/mpparse.c b/arch/x86/kernel/mpparse.c
index 9103b89c145a..0741b062a304 100644
--- a/arch/x86/kernel/mpparse.c
+++ b/arch/x86/kernel/mpparse.c
@@ -95,8 +95,8 @@ static void __init MP_bus_info(struct mpc_bus *m)
95 } 95 }
96#endif 96#endif
97 97
98 set_bit(m->busid, mp_bus_not_pci);
98 if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) { 99 if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) {
99 set_bit(m->busid, mp_bus_not_pci);
100#if defined(CONFIG_EISA) || defined(CONFIG_MCA) 100#if defined(CONFIG_EISA) || defined(CONFIG_MCA)
101 mp_bus_id_to_type[m->busid] = MP_BUS_ISA; 101 mp_bus_id_to_type[m->busid] = MP_BUS_ISA;
102#endif 102#endif
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index b9b3b1a51643..ee5d4fbd53b4 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -403,6 +403,14 @@ void default_idle(void)
403EXPORT_SYMBOL(default_idle); 403EXPORT_SYMBOL(default_idle);
404#endif 404#endif
405 405
406bool set_pm_idle_to_default(void)
407{
408 bool ret = !!pm_idle;
409
410 pm_idle = default_idle;
411
412 return ret;
413}
406void stop_this_cpu(void *dummy) 414void stop_this_cpu(void *dummy)
407{ 415{
408 local_irq_disable(); 416 local_irq_disable();
diff --git a/arch/x86/kernel/quirks.c b/arch/x86/kernel/quirks.c
index b78643d0f9a5..03920a15a632 100644
--- a/arch/x86/kernel/quirks.c
+++ b/arch/x86/kernel/quirks.c
@@ -553,4 +553,17 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_MISC,
553 quirk_amd_nb_node); 553 quirk_amd_nb_node);
554DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_LINK, 554DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_LINK,
555 quirk_amd_nb_node); 555 quirk_amd_nb_node);
556DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_NB_F0,
557 quirk_amd_nb_node);
558DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_NB_F1,
559 quirk_amd_nb_node);
560DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_NB_F2,
561 quirk_amd_nb_node);
562DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_NB_F3,
563 quirk_amd_nb_node);
564DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_NB_F4,
565 quirk_amd_nb_node);
566DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_NB_F5,
567 quirk_amd_nb_node);
568
556#endif 569#endif
diff --git a/arch/x86/kernel/reboot.c b/arch/x86/kernel/reboot.c
index e334be1182b9..37a458b521a6 100644
--- a/arch/x86/kernel/reboot.c
+++ b/arch/x86/kernel/reboot.c
@@ -124,7 +124,7 @@ __setup("reboot=", reboot_setup);
124 */ 124 */
125 125
126/* 126/*
127 * Some machines require the "reboot=b" commandline option, 127 * Some machines require the "reboot=b" or "reboot=k" commandline options,
128 * this quirk makes that automatic. 128 * this quirk makes that automatic.
129 */ 129 */
130static int __init set_bios_reboot(const struct dmi_system_id *d) 130static int __init set_bios_reboot(const struct dmi_system_id *d)
@@ -136,6 +136,15 @@ static int __init set_bios_reboot(const struct dmi_system_id *d)
136 return 0; 136 return 0;
137} 137}
138 138
139static int __init set_kbd_reboot(const struct dmi_system_id *d)
140{
141 if (reboot_type != BOOT_KBD) {
142 reboot_type = BOOT_KBD;
143 printk(KERN_INFO "%s series board detected. Selecting KBD-method for reboot.\n", d->ident);
144 }
145 return 0;
146}
147
139static struct dmi_system_id __initdata reboot_dmi_table[] = { 148static struct dmi_system_id __initdata reboot_dmi_table[] = {
140 { /* Handle problems with rebooting on Dell E520's */ 149 { /* Handle problems with rebooting on Dell E520's */
141 .callback = set_bios_reboot, 150 .callback = set_bios_reboot,
@@ -295,7 +304,7 @@ static struct dmi_system_id __initdata reboot_dmi_table[] = {
295 }, 304 },
296 }, 305 },
297 { /* Handle reboot issue on Acer Aspire one */ 306 { /* Handle reboot issue on Acer Aspire one */
298 .callback = set_bios_reboot, 307 .callback = set_kbd_reboot,
299 .ident = "Acer Aspire One A110", 308 .ident = "Acer Aspire One A110",
300 .matches = { 309 .matches = {
301 DMI_MATCH(DMI_SYS_VENDOR, "Acer"), 310 DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
@@ -443,6 +452,14 @@ static struct dmi_system_id __initdata pci_reboot_dmi_table[] = {
443 DMI_MATCH(DMI_PRODUCT_NAME, "Latitude E6420"), 452 DMI_MATCH(DMI_PRODUCT_NAME, "Latitude E6420"),
444 }, 453 },
445 }, 454 },
455 { /* Handle problems with rebooting on the OptiPlex 990. */
456 .callback = set_pci_reboot,
457 .ident = "Dell OptiPlex 990",
458 .matches = {
459 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
460 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 990"),
461 },
462 },
446 { } 463 { }
447}; 464};
448 465
diff --git a/arch/x86/kernel/rtc.c b/arch/x86/kernel/rtc.c
index 348ce016a835..af6db6ec5b2a 100644
--- a/arch/x86/kernel/rtc.c
+++ b/arch/x86/kernel/rtc.c
@@ -12,6 +12,7 @@
12#include <asm/vsyscall.h> 12#include <asm/vsyscall.h>
13#include <asm/x86_init.h> 13#include <asm/x86_init.h>
14#include <asm/time.h> 14#include <asm/time.h>
15#include <asm/mrst.h>
15 16
16#ifdef CONFIG_X86_32 17#ifdef CONFIG_X86_32
17/* 18/*
@@ -242,6 +243,10 @@ static __init int add_rtc_cmos(void)
242 if (of_have_populated_dt()) 243 if (of_have_populated_dt())
243 return 0; 244 return 0;
244 245
246 /* Intel MID platforms don't have ioport rtc */
247 if (mrst_identify_cpu())
248 return -ENODEV;
249
245 platform_device_register(&rtc_device); 250 platform_device_register(&rtc_device);
246 dev_info(&rtc_device.dev, 251 dev_info(&rtc_device.dev,
247 "registered platform RTC device (no PNP device found)\n"); 252 "registered platform RTC device (no PNP device found)\n");
diff --git a/arch/x86/mm/gup.c b/arch/x86/mm/gup.c
index ea305856151c..dd74e46828c0 100644
--- a/arch/x86/mm/gup.c
+++ b/arch/x86/mm/gup.c
@@ -201,6 +201,8 @@ static noinline int gup_huge_pud(pud_t pud, unsigned long addr,
201 do { 201 do {
202 VM_BUG_ON(compound_head(page) != head); 202 VM_BUG_ON(compound_head(page) != head);
203 pages[*nr] = page; 203 pages[*nr] = page;
204 if (PageTail(page))
205 get_huge_page_tail(page);
204 (*nr)++; 206 (*nr)++;
205 page++; 207 page++;
206 refs++; 208 refs++;
diff --git a/arch/x86/mm/highmem_32.c b/arch/x86/mm/highmem_32.c
index b49962662101..f4f29b19fac5 100644
--- a/arch/x86/mm/highmem_32.c
+++ b/arch/x86/mm/highmem_32.c
@@ -45,6 +45,7 @@ void *kmap_atomic_prot(struct page *page, pgprot_t prot)
45 vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); 45 vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
46 BUG_ON(!pte_none(*(kmap_pte-idx))); 46 BUG_ON(!pte_none(*(kmap_pte-idx)));
47 set_pte(kmap_pte-idx, mk_pte(page, prot)); 47 set_pte(kmap_pte-idx, mk_pte(page, prot));
48 arch_flush_lazy_mmu_mode();
48 49
49 return (void *)vaddr; 50 return (void *)vaddr;
50} 51}
@@ -88,6 +89,7 @@ void __kunmap_atomic(void *kvaddr)
88 */ 89 */
89 kpte_clear_flush(kmap_pte-idx, vaddr); 90 kpte_clear_flush(kmap_pte-idx, vaddr);
90 kmap_atomic_idx_pop(); 91 kmap_atomic_idx_pop();
92 arch_flush_lazy_mmu_mode();
91 } 93 }
92#ifdef CONFIG_DEBUG_HIGHMEM 94#ifdef CONFIG_DEBUG_HIGHMEM
93 else { 95 else {
diff --git a/arch/x86/oprofile/init.c b/arch/x86/oprofile/init.c
index cdfe4c54deca..f148cf652678 100644
--- a/arch/x86/oprofile/init.c
+++ b/arch/x86/oprofile/init.c
@@ -21,6 +21,7 @@ extern int op_nmi_timer_init(struct oprofile_operations *ops);
21extern void op_nmi_exit(void); 21extern void op_nmi_exit(void);
22extern void x86_backtrace(struct pt_regs * const regs, unsigned int depth); 22extern void x86_backtrace(struct pt_regs * const regs, unsigned int depth);
23 23
24static int nmi_timer;
24 25
25int __init oprofile_arch_init(struct oprofile_operations *ops) 26int __init oprofile_arch_init(struct oprofile_operations *ops)
26{ 27{
@@ -31,8 +32,9 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
31#ifdef CONFIG_X86_LOCAL_APIC 32#ifdef CONFIG_X86_LOCAL_APIC
32 ret = op_nmi_init(ops); 33 ret = op_nmi_init(ops);
33#endif 34#endif
35 nmi_timer = (ret != 0);
34#ifdef CONFIG_X86_IO_APIC 36#ifdef CONFIG_X86_IO_APIC
35 if (ret < 0) 37 if (nmi_timer)
36 ret = op_nmi_timer_init(ops); 38 ret = op_nmi_timer_init(ops);
37#endif 39#endif
38 ops->backtrace = x86_backtrace; 40 ops->backtrace = x86_backtrace;
@@ -44,6 +46,7 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
44void oprofile_arch_exit(void) 46void oprofile_arch_exit(void)
45{ 47{
46#ifdef CONFIG_X86_LOCAL_APIC 48#ifdef CONFIG_X86_LOCAL_APIC
47 op_nmi_exit(); 49 if (!nmi_timer)
50 op_nmi_exit();
48#endif 51#endif
49} 52}
diff --git a/arch/x86/platform/efi/efi_32.c b/arch/x86/platform/efi/efi_32.c
index e36bf714cb77..40e446941dd7 100644
--- a/arch/x86/platform/efi/efi_32.c
+++ b/arch/x86/platform/efi/efi_32.c
@@ -39,43 +39,14 @@
39 */ 39 */
40 40
41static unsigned long efi_rt_eflags; 41static unsigned long efi_rt_eflags;
42static pgd_t efi_bak_pg_dir_pointer[2];
43 42
44void efi_call_phys_prelog(void) 43void efi_call_phys_prelog(void)
45{ 44{
46 unsigned long cr4;
47 unsigned long temp;
48 struct desc_ptr gdt_descr; 45 struct desc_ptr gdt_descr;
49 46
50 local_irq_save(efi_rt_eflags); 47 local_irq_save(efi_rt_eflags);
51 48
52 /* 49 load_cr3(initial_page_table);
53 * If I don't have PAE, I should just duplicate two entries in page
54 * directory. If I have PAE, I just need to duplicate one entry in
55 * page directory.
56 */
57 cr4 = read_cr4_safe();
58
59 if (cr4 & X86_CR4_PAE) {
60 efi_bak_pg_dir_pointer[0].pgd =
61 swapper_pg_dir[pgd_index(0)].pgd;
62 swapper_pg_dir[0].pgd =
63 swapper_pg_dir[pgd_index(PAGE_OFFSET)].pgd;
64 } else {
65 efi_bak_pg_dir_pointer[0].pgd =
66 swapper_pg_dir[pgd_index(0)].pgd;
67 efi_bak_pg_dir_pointer[1].pgd =
68 swapper_pg_dir[pgd_index(0x400000)].pgd;
69 swapper_pg_dir[pgd_index(0)].pgd =
70 swapper_pg_dir[pgd_index(PAGE_OFFSET)].pgd;
71 temp = PAGE_OFFSET + 0x400000;
72 swapper_pg_dir[pgd_index(0x400000)].pgd =
73 swapper_pg_dir[pgd_index(temp)].pgd;
74 }
75
76 /*
77 * After the lock is released, the original page table is restored.
78 */
79 __flush_tlb_all(); 50 __flush_tlb_all();
80 51
81 gdt_descr.address = __pa(get_cpu_gdt_table(0)); 52 gdt_descr.address = __pa(get_cpu_gdt_table(0));
@@ -85,28 +56,13 @@ void efi_call_phys_prelog(void)
85 56
86void efi_call_phys_epilog(void) 57void efi_call_phys_epilog(void)
87{ 58{
88 unsigned long cr4;
89 struct desc_ptr gdt_descr; 59 struct desc_ptr gdt_descr;
90 60
91 gdt_descr.address = (unsigned long)get_cpu_gdt_table(0); 61 gdt_descr.address = (unsigned long)get_cpu_gdt_table(0);
92 gdt_descr.size = GDT_SIZE - 1; 62 gdt_descr.size = GDT_SIZE - 1;
93 load_gdt(&gdt_descr); 63 load_gdt(&gdt_descr);
94 64
95 cr4 = read_cr4_safe(); 65 load_cr3(swapper_pg_dir);
96
97 if (cr4 & X86_CR4_PAE) {
98 swapper_pg_dir[pgd_index(0)].pgd =
99 efi_bak_pg_dir_pointer[0].pgd;
100 } else {
101 swapper_pg_dir[pgd_index(0)].pgd =
102 efi_bak_pg_dir_pointer[0].pgd;
103 swapper_pg_dir[pgd_index(0x400000)].pgd =
104 efi_bak_pg_dir_pointer[1].pgd;
105 }
106
107 /*
108 * After the lock is released, the original page table is restored.
109 */
110 __flush_tlb_all(); 66 __flush_tlb_all();
111 67
112 local_irq_restore(efi_rt_eflags); 68 local_irq_restore(efi_rt_eflags);
diff --git a/arch/x86/platform/mrst/mrst.c b/arch/x86/platform/mrst/mrst.c
index b1489a06a49d..ad4ec1cb097e 100644
--- a/arch/x86/platform/mrst/mrst.c
+++ b/arch/x86/platform/mrst/mrst.c
@@ -76,6 +76,20 @@ struct sfi_rtc_table_entry sfi_mrtc_array[SFI_MRTC_MAX];
76EXPORT_SYMBOL_GPL(sfi_mrtc_array); 76EXPORT_SYMBOL_GPL(sfi_mrtc_array);
77int sfi_mrtc_num; 77int sfi_mrtc_num;
78 78
79static void mrst_power_off(void)
80{
81 if (__mrst_cpu_chip == MRST_CPU_CHIP_LINCROFT)
82 intel_scu_ipc_simple_command(IPCMSG_COLD_RESET, 1);
83}
84
85static void mrst_reboot(void)
86{
87 if (__mrst_cpu_chip == MRST_CPU_CHIP_LINCROFT)
88 intel_scu_ipc_simple_command(IPCMSG_COLD_RESET, 0);
89 else
90 intel_scu_ipc_simple_command(IPCMSG_COLD_BOOT, 0);
91}
92
79/* parse all the mtimer info to a static mtimer array */ 93/* parse all the mtimer info to a static mtimer array */
80static int __init sfi_parse_mtmr(struct sfi_table_header *table) 94static int __init sfi_parse_mtmr(struct sfi_table_header *table)
81{ 95{
@@ -265,17 +279,6 @@ static int mrst_i8042_detect(void)
265 return 0; 279 return 0;
266} 280}
267 281
268/* Reboot and power off are handled by the SCU on a MID device */
269static void mrst_power_off(void)
270{
271 intel_scu_ipc_simple_command(0xf1, 1);
272}
273
274static void mrst_reboot(void)
275{
276 intel_scu_ipc_simple_command(0xf1, 0);
277}
278
279/* 282/*
280 * Moorestown does not have external NMI source nor port 0x61 to report 283 * Moorestown does not have external NMI source nor port 0x61 to report
281 * NMI status. The possible NMI sources are from pmu as a result of NMI 284 * NMI status. The possible NMI sources are from pmu as a result of NMI
@@ -484,6 +487,46 @@ static void __init *max7315_platform_data(void *info)
484 return max7315; 487 return max7315;
485} 488}
486 489
490static void *tca6416_platform_data(void *info)
491{
492 static struct pca953x_platform_data tca6416;
493 struct i2c_board_info *i2c_info = info;
494 int gpio_base, intr;
495 char base_pin_name[SFI_NAME_LEN + 1];
496 char intr_pin_name[SFI_NAME_LEN + 1];
497
498 strcpy(i2c_info->type, "tca6416");
499 strcpy(base_pin_name, "tca6416_base");
500 strcpy(intr_pin_name, "tca6416_int");
501
502 gpio_base = get_gpio_by_name(base_pin_name);
503 intr = get_gpio_by_name(intr_pin_name);
504
505 if (gpio_base == -1)
506 return NULL;
507 tca6416.gpio_base = gpio_base;
508 if (intr != -1) {
509 i2c_info->irq = intr + MRST_IRQ_OFFSET;
510 tca6416.irq_base = gpio_base + MRST_IRQ_OFFSET;
511 } else {
512 i2c_info->irq = -1;
513 tca6416.irq_base = -1;
514 }
515 return &tca6416;
516}
517
518static void *mpu3050_platform_data(void *info)
519{
520 struct i2c_board_info *i2c_info = info;
521 int intr = get_gpio_by_name("mpu3050_int");
522
523 if (intr == -1)
524 return NULL;
525
526 i2c_info->irq = intr + MRST_IRQ_OFFSET;
527 return NULL;
528}
529
487static void __init *emc1403_platform_data(void *info) 530static void __init *emc1403_platform_data(void *info)
488{ 531{
489 static short intr2nd_pdata; 532 static short intr2nd_pdata;
@@ -646,12 +689,15 @@ static void *msic_ocd_platform_data(void *info)
646static const struct devs_id __initconst device_ids[] = { 689static const struct devs_id __initconst device_ids[] = {
647 {"bma023", SFI_DEV_TYPE_I2C, 1, &no_platform_data}, 690 {"bma023", SFI_DEV_TYPE_I2C, 1, &no_platform_data},
648 {"pmic_gpio", SFI_DEV_TYPE_SPI, 1, &pmic_gpio_platform_data}, 691 {"pmic_gpio", SFI_DEV_TYPE_SPI, 1, &pmic_gpio_platform_data},
692 {"pmic_gpio", SFI_DEV_TYPE_IPC, 1, &pmic_gpio_platform_data},
649 {"spi_max3111", SFI_DEV_TYPE_SPI, 0, &max3111_platform_data}, 693 {"spi_max3111", SFI_DEV_TYPE_SPI, 0, &max3111_platform_data},
650 {"i2c_max7315", SFI_DEV_TYPE_I2C, 1, &max7315_platform_data}, 694 {"i2c_max7315", SFI_DEV_TYPE_I2C, 1, &max7315_platform_data},
651 {"i2c_max7315_2", SFI_DEV_TYPE_I2C, 1, &max7315_platform_data}, 695 {"i2c_max7315_2", SFI_DEV_TYPE_I2C, 1, &max7315_platform_data},
696 {"tca6416", SFI_DEV_TYPE_I2C, 1, &tca6416_platform_data},
652 {"emc1403", SFI_DEV_TYPE_I2C, 1, &emc1403_platform_data}, 697 {"emc1403", SFI_DEV_TYPE_I2C, 1, &emc1403_platform_data},
653 {"i2c_accel", SFI_DEV_TYPE_I2C, 0, &lis331dl_platform_data}, 698 {"i2c_accel", SFI_DEV_TYPE_I2C, 0, &lis331dl_platform_data},
654 {"pmic_audio", SFI_DEV_TYPE_IPC, 1, &no_platform_data}, 699 {"pmic_audio", SFI_DEV_TYPE_IPC, 1, &no_platform_data},
700 {"mpu3050", SFI_DEV_TYPE_I2C, 1, &mpu3050_platform_data},
655 701
656 /* MSIC subdevices */ 702 /* MSIC subdevices */
657 {"msic_battery", SFI_DEV_TYPE_IPC, 1, &msic_battery_platform_data}, 703 {"msic_battery", SFI_DEV_TYPE_IPC, 1, &msic_battery_platform_data},
diff --git a/arch/x86/xen/setup.c b/arch/x86/xen/setup.c
index 38d0af4fefec..b2c7179fa263 100644
--- a/arch/x86/xen/setup.c
+++ b/arch/x86/xen/setup.c
@@ -173,9 +173,21 @@ static unsigned long __init xen_get_max_pages(void)
173 domid_t domid = DOMID_SELF; 173 domid_t domid = DOMID_SELF;
174 int ret; 174 int ret;
175 175
176 ret = HYPERVISOR_memory_op(XENMEM_maximum_reservation, &domid); 176 /*
177 if (ret > 0) 177 * For the initial domain we use the maximum reservation as
178 max_pages = ret; 178 * the maximum page.
179 *
180 * For guest domains the current maximum reservation reflects
181 * the current maximum rather than the static maximum. In this
182 * case the e820 map provided to us will cover the static
183 * maximum region.
184 */
185 if (xen_initial_domain()) {
186 ret = HYPERVISOR_memory_op(XENMEM_maximum_reservation, &domid);
187 if (ret > 0)
188 max_pages = ret;
189 }
190
179 return min(max_pages, MAX_DOMAIN_PAGES); 191 return min(max_pages, MAX_DOMAIN_PAGES);
180} 192}
181 193
@@ -410,6 +422,6 @@ void __init xen_arch_setup(void)
410#endif 422#endif
411 disable_cpuidle(); 423 disable_cpuidle();
412 boot_option_idle_override = IDLE_HALT; 424 boot_option_idle_override = IDLE_HALT;
413 425 WARN_ON(set_pm_idle_to_default());
414 fiddle_vdso(); 426 fiddle_vdso();
415} 427}